1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * max30102.c - Support for MAX30102 heart rate and pulse oximeter sensor
4 *
5 * Copyright (C) 2017 Matt Ranostay <matt.ranostay@konsulko.com>
6 *
7 * Support for MAX30105 optical particle sensor
8 * Copyright (C) 2017 Peter Meerwald-Stadler <pmeerw@pmeerw.net>
9 *
10 * 7-bit I2C chip address: 0x57
11 * TODO: proximity power saving feature
12 */
13
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
17 #include <linux/delay.h>
18 #include <linux/err.h>
19 #include <linux/irq.h>
20 #include <linux/i2c.h>
21 #include <linux/mutex.h>
22 #include <linux/regmap.h>
23 #include <linux/iio/iio.h>
24 #include <linux/iio/buffer.h>
25 #include <linux/iio/kfifo_buf.h>
26
27 #define MAX30102_DRV_NAME "max30102"
28 #define MAX30102_PART_NUMBER 0x15
29
30 enum max30102_chip_id {
31 max30102,
32 max30105,
33 };
34
35 enum max3012_led_idx {
36 MAX30102_LED_RED,
37 MAX30102_LED_IR,
38 MAX30105_LED_GREEN,
39 };
40
41 #define MAX30102_REG_INT_STATUS 0x00
42 #define MAX30102_REG_INT_STATUS_PWR_RDY BIT(0)
43 #define MAX30102_REG_INT_STATUS_PROX_INT BIT(4)
44 #define MAX30102_REG_INT_STATUS_ALC_OVF BIT(5)
45 #define MAX30102_REG_INT_STATUS_PPG_RDY BIT(6)
46 #define MAX30102_REG_INT_STATUS_FIFO_RDY BIT(7)
47
48 #define MAX30102_REG_INT_ENABLE 0x02
49 #define MAX30102_REG_INT_ENABLE_PROX_INT_EN BIT(4)
50 #define MAX30102_REG_INT_ENABLE_ALC_OVF_EN BIT(5)
51 #define MAX30102_REG_INT_ENABLE_PPG_EN BIT(6)
52 #define MAX30102_REG_INT_ENABLE_FIFO_EN BIT(7)
53 #define MAX30102_REG_INT_ENABLE_MASK 0xf0
54 #define MAX30102_REG_INT_ENABLE_MASK_SHIFT 4
55
56 #define MAX30102_REG_FIFO_WR_PTR 0x04
57 #define MAX30102_REG_FIFO_OVR_CTR 0x05
58 #define MAX30102_REG_FIFO_RD_PTR 0x06
59 #define MAX30102_REG_FIFO_DATA 0x07
60 #define MAX30102_REG_FIFO_DATA_BYTES 3
61
62 #define MAX30102_REG_FIFO_CONFIG 0x08
63 #define MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES BIT(1)
64 #define MAX30102_REG_FIFO_CONFIG_AVG_SHIFT 5
65 #define MAX30102_REG_FIFO_CONFIG_AFULL BIT(0)
66
67 #define MAX30102_REG_MODE_CONFIG 0x09
68 #define MAX30102_REG_MODE_CONFIG_MODE_NONE 0x00
69 #define MAX30102_REG_MODE_CONFIG_MODE_HR 0x02 /* red LED */
70 #define MAX30102_REG_MODE_CONFIG_MODE_HR_SPO2 0x03 /* red + IR LED */
71 #define MAX30102_REG_MODE_CONFIG_MODE_MULTI 0x07 /* multi-LED mode */
72 #define MAX30102_REG_MODE_CONFIG_MODE_MASK GENMASK(2, 0)
73 #define MAX30102_REG_MODE_CONFIG_PWR BIT(7)
74
75 #define MAX30102_REG_MODE_CONTROL_SLOT21 0x11 /* multi-LED control */
76 #define MAX30102_REG_MODE_CONTROL_SLOT43 0x12
77 #define MAX30102_REG_MODE_CONTROL_SLOT_MASK (GENMASK(6, 4) | GENMASK(2, 0))
78 #define MAX30102_REG_MODE_CONTROL_SLOT_SHIFT 4
79
80 #define MAX30102_REG_SPO2_CONFIG 0x0a
81 #define MAX30102_REG_SPO2_CONFIG_PULSE_411_US 0x03
82 #define MAX30102_REG_SPO2_CONFIG_SR_400HZ 0x03
83 #define MAX30102_REG_SPO2_CONFIG_SR_MASK 0x07
84 #define MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT 2
85 #define MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS BIT(0)
86 #define MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT 5
87
88 #define MAX30102_REG_RED_LED_CONFIG 0x0c
89 #define MAX30102_REG_IR_LED_CONFIG 0x0d
90 #define MAX30105_REG_GREEN_LED_CONFIG 0x0e
91
92 #define MAX30102_REG_TEMP_CONFIG 0x21
93 #define MAX30102_REG_TEMP_CONFIG_TEMP_EN BIT(0)
94
95 #define MAX30102_REG_TEMP_INTEGER 0x1f
96 #define MAX30102_REG_TEMP_FRACTION 0x20
97
98 #define MAX30102_REG_REV_ID 0xfe
99 #define MAX30102_REG_PART_ID 0xff
100
101 struct max30102_data {
102 struct i2c_client *client;
103 struct iio_dev *indio_dev;
104 struct mutex lock;
105 struct regmap *regmap;
106 enum max30102_chip_id chip_id;
107
108 u8 buffer[12];
109 __be32 processed_buffer[3]; /* 3 x 18-bit (padded to 32-bits) */
110 };
111
112 static const struct regmap_config max30102_regmap_config = {
113 .name = "max30102_regmap",
114
115 .reg_bits = 8,
116 .val_bits = 8,
117 };
118
119 static const unsigned long max30102_scan_masks[] = {
120 BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR),
121 0
122 };
123
124 static const unsigned long max30105_scan_masks[] = {
125 BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR),
126 BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR) |
127 BIT(MAX30105_LED_GREEN),
128 0
129 };
130
131 #define MAX30102_INTENSITY_CHANNEL(_si, _mod) { \
132 .type = IIO_INTENSITY, \
133 .channel2 = _mod, \
134 .modified = 1, \
135 .scan_index = _si, \
136 .scan_type = { \
137 .sign = 'u', \
138 .shift = 8, \
139 .realbits = 18, \
140 .storagebits = 32, \
141 .endianness = IIO_BE, \
142 }, \
143 }
144
145 static const struct iio_chan_spec max30102_channels[] = {
146 MAX30102_INTENSITY_CHANNEL(MAX30102_LED_RED, IIO_MOD_LIGHT_RED),
147 MAX30102_INTENSITY_CHANNEL(MAX30102_LED_IR, IIO_MOD_LIGHT_IR),
148 {
149 .type = IIO_TEMP,
150 .info_mask_separate =
151 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
152 .scan_index = -1,
153 },
154 };
155
156 static const struct iio_chan_spec max30105_channels[] = {
157 MAX30102_INTENSITY_CHANNEL(MAX30102_LED_RED, IIO_MOD_LIGHT_RED),
158 MAX30102_INTENSITY_CHANNEL(MAX30102_LED_IR, IIO_MOD_LIGHT_IR),
159 MAX30102_INTENSITY_CHANNEL(MAX30105_LED_GREEN, IIO_MOD_LIGHT_GREEN),
160 {
161 .type = IIO_TEMP,
162 .info_mask_separate =
163 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
164 .scan_index = -1,
165 },
166 };
167
max30102_set_power(struct max30102_data * data,bool en)168 static int max30102_set_power(struct max30102_data *data, bool en)
169 {
170 return regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
171 MAX30102_REG_MODE_CONFIG_PWR,
172 en ? 0 : MAX30102_REG_MODE_CONFIG_PWR);
173 }
174
max30102_set_powermode(struct max30102_data * data,u8 mode,bool en)175 static int max30102_set_powermode(struct max30102_data *data, u8 mode, bool en)
176 {
177 u8 reg = mode;
178
179 if (!en)
180 reg |= MAX30102_REG_MODE_CONFIG_PWR;
181
182 return regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
183 MAX30102_REG_MODE_CONFIG_PWR |
184 MAX30102_REG_MODE_CONFIG_MODE_MASK, reg);
185 }
186
187 #define MAX30102_MODE_CONTROL_LED_SLOTS(slot2, slot1) \
188 ((slot2 << MAX30102_REG_MODE_CONTROL_SLOT_SHIFT) | slot1)
189
max30102_buffer_postenable(struct iio_dev * indio_dev)190 static int max30102_buffer_postenable(struct iio_dev *indio_dev)
191 {
192 struct max30102_data *data = iio_priv(indio_dev);
193 int ret;
194 u8 reg;
195
196 switch (*indio_dev->active_scan_mask) {
197 case BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR):
198 reg = MAX30102_REG_MODE_CONFIG_MODE_HR_SPO2;
199 break;
200 case BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR) |
201 BIT(MAX30105_LED_GREEN):
202 ret = regmap_update_bits(data->regmap,
203 MAX30102_REG_MODE_CONTROL_SLOT21,
204 MAX30102_REG_MODE_CONTROL_SLOT_MASK,
205 MAX30102_MODE_CONTROL_LED_SLOTS(2, 1));
206 if (ret)
207 return ret;
208
209 ret = regmap_update_bits(data->regmap,
210 MAX30102_REG_MODE_CONTROL_SLOT43,
211 MAX30102_REG_MODE_CONTROL_SLOT_MASK,
212 MAX30102_MODE_CONTROL_LED_SLOTS(0, 3));
213 if (ret)
214 return ret;
215
216 reg = MAX30102_REG_MODE_CONFIG_MODE_MULTI;
217 break;
218 default:
219 return -EINVAL;
220 }
221
222 return max30102_set_powermode(data, reg, true);
223 }
224
max30102_buffer_predisable(struct iio_dev * indio_dev)225 static int max30102_buffer_predisable(struct iio_dev *indio_dev)
226 {
227 struct max30102_data *data = iio_priv(indio_dev);
228
229 return max30102_set_powermode(data, MAX30102_REG_MODE_CONFIG_MODE_NONE,
230 false);
231 }
232
233 static const struct iio_buffer_setup_ops max30102_buffer_setup_ops = {
234 .postenable = max30102_buffer_postenable,
235 .predisable = max30102_buffer_predisable,
236 };
237
max30102_fifo_count(struct max30102_data * data)238 static inline int max30102_fifo_count(struct max30102_data *data)
239 {
240 unsigned int val;
241 int ret;
242
243 ret = regmap_read(data->regmap, MAX30102_REG_INT_STATUS, &val);
244 if (ret)
245 return ret;
246
247 /* FIFO has one sample slot left */
248 if (val & MAX30102_REG_INT_STATUS_FIFO_RDY)
249 return 1;
250
251 return 0;
252 }
253
254 #define MAX30102_COPY_DATA(i) \
255 memcpy(&data->processed_buffer[(i)], \
256 &buffer[(i) * MAX30102_REG_FIFO_DATA_BYTES], \
257 MAX30102_REG_FIFO_DATA_BYTES)
258
max30102_read_measurement(struct max30102_data * data,unsigned int measurements)259 static int max30102_read_measurement(struct max30102_data *data,
260 unsigned int measurements)
261 {
262 int ret;
263 u8 *buffer = (u8 *) &data->buffer;
264
265 ret = i2c_smbus_read_i2c_block_data(data->client,
266 MAX30102_REG_FIFO_DATA,
267 measurements *
268 MAX30102_REG_FIFO_DATA_BYTES,
269 buffer);
270
271 switch (measurements) {
272 case 3:
273 MAX30102_COPY_DATA(2);
274 fallthrough;
275 case 2:
276 MAX30102_COPY_DATA(1);
277 fallthrough;
278 case 1:
279 MAX30102_COPY_DATA(0);
280 break;
281 default:
282 return -EINVAL;
283 }
284
285 return (ret == measurements * MAX30102_REG_FIFO_DATA_BYTES) ?
286 0 : -EINVAL;
287 }
288
max30102_interrupt_handler(int irq,void * private)289 static irqreturn_t max30102_interrupt_handler(int irq, void *private)
290 {
291 struct iio_dev *indio_dev = private;
292 struct max30102_data *data = iio_priv(indio_dev);
293 unsigned int measurements = bitmap_weight(indio_dev->active_scan_mask,
294 iio_get_masklength(indio_dev));
295 int ret, cnt = 0;
296
297 mutex_lock(&data->lock);
298
299 while (cnt || (cnt = max30102_fifo_count(data)) > 0) {
300 ret = max30102_read_measurement(data, measurements);
301 if (ret)
302 break;
303
304 iio_push_to_buffers(data->indio_dev, data->processed_buffer);
305 cnt--;
306 }
307
308 mutex_unlock(&data->lock);
309
310 return IRQ_HANDLED;
311 }
312
max30102_get_current_idx(unsigned int val,int * reg)313 static int max30102_get_current_idx(unsigned int val, int *reg)
314 {
315 /* each step is 0.200 mA */
316 *reg = val / 200;
317
318 return *reg > 0xff ? -EINVAL : 0;
319 }
320
max30102_led_init(struct max30102_data * data)321 static int max30102_led_init(struct max30102_data *data)
322 {
323 struct device *dev = &data->client->dev;
324 unsigned int val;
325 int reg, ret;
326
327 ret = device_property_read_u32(dev, "maxim,red-led-current-microamp", &val);
328 if (ret) {
329 dev_info(dev, "no red-led-current-microamp set\n");
330
331 /* Default to 7 mA RED LED */
332 val = 7000;
333 }
334
335 ret = max30102_get_current_idx(val, ®);
336 if (ret) {
337 dev_err(dev, "invalid RED LED current setting %d\n", val);
338 return ret;
339 }
340
341 ret = regmap_write(data->regmap, MAX30102_REG_RED_LED_CONFIG, reg);
342 if (ret)
343 return ret;
344
345 if (data->chip_id == max30105) {
346 ret = device_property_read_u32(dev,
347 "maxim,green-led-current-microamp", &val);
348 if (ret) {
349 dev_info(dev, "no green-led-current-microamp set\n");
350
351 /* Default to 7 mA green LED */
352 val = 7000;
353 }
354
355 ret = max30102_get_current_idx(val, ®);
356 if (ret) {
357 dev_err(dev, "invalid green LED current setting %d\n",
358 val);
359 return ret;
360 }
361
362 ret = regmap_write(data->regmap, MAX30105_REG_GREEN_LED_CONFIG,
363 reg);
364 if (ret)
365 return ret;
366 }
367
368 ret = device_property_read_u32(dev, "maxim,ir-led-current-microamp", &val);
369 if (ret) {
370 dev_info(dev, "no ir-led-current-microamp set\n");
371
372 /* Default to 7 mA IR LED */
373 val = 7000;
374 }
375
376 ret = max30102_get_current_idx(val, ®);
377 if (ret) {
378 dev_err(dev, "invalid IR LED current setting %d\n", val);
379 return ret;
380 }
381
382 return regmap_write(data->regmap, MAX30102_REG_IR_LED_CONFIG, reg);
383 }
384
max30102_chip_init(struct max30102_data * data)385 static int max30102_chip_init(struct max30102_data *data)
386 {
387 int ret;
388
389 /* setup LED current settings */
390 ret = max30102_led_init(data);
391 if (ret)
392 return ret;
393
394 /* configure 18-bit HR + SpO2 readings at 400Hz */
395 ret = regmap_write(data->regmap, MAX30102_REG_SPO2_CONFIG,
396 (MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS
397 << MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT) |
398 (MAX30102_REG_SPO2_CONFIG_SR_400HZ
399 << MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT) |
400 MAX30102_REG_SPO2_CONFIG_PULSE_411_US);
401 if (ret)
402 return ret;
403
404 /* average 4 samples + generate FIFO interrupt */
405 ret = regmap_write(data->regmap, MAX30102_REG_FIFO_CONFIG,
406 (MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES
407 << MAX30102_REG_FIFO_CONFIG_AVG_SHIFT) |
408 MAX30102_REG_FIFO_CONFIG_AFULL);
409 if (ret)
410 return ret;
411
412 /* enable FIFO interrupt */
413 return regmap_update_bits(data->regmap, MAX30102_REG_INT_ENABLE,
414 MAX30102_REG_INT_ENABLE_MASK,
415 MAX30102_REG_INT_ENABLE_FIFO_EN);
416 }
417
max30102_read_temp(struct max30102_data * data,int * val)418 static int max30102_read_temp(struct max30102_data *data, int *val)
419 {
420 int ret;
421 unsigned int reg;
422
423 ret = regmap_read(data->regmap, MAX30102_REG_TEMP_INTEGER, ®);
424 if (ret < 0)
425 return ret;
426 *val = reg << 4;
427
428 ret = regmap_read(data->regmap, MAX30102_REG_TEMP_FRACTION, ®);
429 if (ret < 0)
430 return ret;
431
432 *val |= reg & 0xf;
433 *val = sign_extend32(*val, 11);
434
435 return 0;
436 }
437
max30102_get_temp(struct max30102_data * data,int * val,bool en)438 static int max30102_get_temp(struct max30102_data *data, int *val, bool en)
439 {
440 int ret;
441
442 if (en) {
443 ret = max30102_set_power(data, true);
444 if (ret)
445 return ret;
446 }
447
448 /* start acquisition */
449 ret = regmap_set_bits(data->regmap, MAX30102_REG_TEMP_CONFIG,
450 MAX30102_REG_TEMP_CONFIG_TEMP_EN);
451 if (ret)
452 goto out;
453
454 msleep(35);
455 ret = max30102_read_temp(data, val);
456
457 out:
458 if (en)
459 max30102_set_power(data, false);
460
461 return ret;
462 }
463
max30102_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)464 static int max30102_read_raw(struct iio_dev *indio_dev,
465 struct iio_chan_spec const *chan,
466 int *val, int *val2, long mask)
467 {
468 struct max30102_data *data = iio_priv(indio_dev);
469 int ret;
470
471 switch (mask) {
472 case IIO_CHAN_INFO_RAW: {
473 /*
474 * Temperature reading can only be acquired when not in
475 * shutdown; leave shutdown briefly when buffer not running
476 */
477 IIO_DEV_GUARD_CURRENT_MODE(indio_dev);
478
479 ret = max30102_get_temp(data, val, !iio_buffer_enabled(indio_dev));
480 if (ret)
481 return ret;
482
483 return IIO_VAL_INT;
484 }
485 case IIO_CHAN_INFO_SCALE:
486 *val = 1000; /* 62.5 */
487 *val2 = 16;
488 return IIO_VAL_FRACTIONAL;
489 default:
490 return -EINVAL;
491 }
492 }
493
494 static const struct iio_info max30102_info = {
495 .read_raw = max30102_read_raw,
496 };
497
max30102_probe(struct i2c_client * client)498 static int max30102_probe(struct i2c_client *client)
499 {
500 const struct i2c_device_id *id = i2c_client_get_device_id(client);
501 struct max30102_data *data;
502 struct iio_dev *indio_dev;
503 int ret;
504 unsigned int reg;
505
506 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
507 if (!indio_dev)
508 return -ENOMEM;
509
510 indio_dev->name = MAX30102_DRV_NAME;
511 indio_dev->info = &max30102_info;
512 indio_dev->modes = INDIO_DIRECT_MODE;
513
514 data = iio_priv(indio_dev);
515 data->indio_dev = indio_dev;
516 data->client = client;
517 data->chip_id = id->driver_data;
518
519 mutex_init(&data->lock);
520 i2c_set_clientdata(client, indio_dev);
521
522 switch (data->chip_id) {
523 case max30105:
524 indio_dev->channels = max30105_channels;
525 indio_dev->num_channels = ARRAY_SIZE(max30105_channels);
526 indio_dev->available_scan_masks = max30105_scan_masks;
527 break;
528 case max30102:
529 indio_dev->channels = max30102_channels;
530 indio_dev->num_channels = ARRAY_SIZE(max30102_channels);
531 indio_dev->available_scan_masks = max30102_scan_masks;
532 break;
533 default:
534 return -ENODEV;
535 }
536
537 ret = devm_iio_kfifo_buffer_setup(&client->dev, indio_dev,
538 &max30102_buffer_setup_ops);
539 if (ret)
540 return ret;
541
542 data->regmap = devm_regmap_init_i2c(client, &max30102_regmap_config);
543 if (IS_ERR(data->regmap)) {
544 dev_err(&client->dev, "regmap initialization failed\n");
545 return PTR_ERR(data->regmap);
546 }
547
548 /* check part ID */
549 ret = regmap_read(data->regmap, MAX30102_REG_PART_ID, ®);
550 if (ret)
551 return ret;
552 if (reg != MAX30102_PART_NUMBER)
553 return -ENODEV;
554
555 /* show revision ID */
556 ret = regmap_read(data->regmap, MAX30102_REG_REV_ID, ®);
557 if (ret)
558 return ret;
559 dev_dbg(&client->dev, "max3010x revision %02x\n", reg);
560
561 /* clear mode setting, chip shutdown */
562 ret = max30102_set_powermode(data, MAX30102_REG_MODE_CONFIG_MODE_NONE,
563 false);
564 if (ret)
565 return ret;
566
567 ret = max30102_chip_init(data);
568 if (ret)
569 return ret;
570
571 if (client->irq <= 0) {
572 dev_err(&client->dev, "no valid irq defined\n");
573 return -EINVAL;
574 }
575
576 ret = devm_request_threaded_irq(&client->dev, client->irq,
577 NULL, max30102_interrupt_handler,
578 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
579 "max30102_irq", indio_dev);
580 if (ret)
581 return ret;
582
583 return iio_device_register(indio_dev);
584 }
585
max30102_remove(struct i2c_client * client)586 static void max30102_remove(struct i2c_client *client)
587 {
588 struct iio_dev *indio_dev = i2c_get_clientdata(client);
589 struct max30102_data *data = iio_priv(indio_dev);
590
591 iio_device_unregister(indio_dev);
592 max30102_set_power(data, false);
593 }
594
595 static const struct i2c_device_id max30102_id[] = {
596 { .name = "max30101", .driver_data = max30105 },
597 { .name = "max30102", .driver_data = max30102 },
598 { .name = "max30105", .driver_data = max30105 },
599 { }
600 };
601 MODULE_DEVICE_TABLE(i2c, max30102_id);
602
603 static const struct of_device_id max30102_dt_ids[] = {
604 { .compatible = "maxim,max30101" },
605 { .compatible = "maxim,max30102" },
606 { .compatible = "maxim,max30105" },
607 { }
608 };
609 MODULE_DEVICE_TABLE(of, max30102_dt_ids);
610
611 static struct i2c_driver max30102_driver = {
612 .driver = {
613 .name = MAX30102_DRV_NAME,
614 .of_match_table = max30102_dt_ids,
615 },
616 .probe = max30102_probe,
617 .remove = max30102_remove,
618 .id_table = max30102_id,
619 };
620 module_i2c_driver(max30102_driver);
621
622 MODULE_AUTHOR("Matt Ranostay <matt.ranostay@konsulko.com>");
623 MODULE_DESCRIPTION("MAX30102 heart rate/pulse oximeter and MAX30105 particle sensor driver");
624 MODULE_LICENSE("GPL");
625