1// SPDX-License-Identifier: GPL-2.0-only OR MIT 2/* 3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 4 * Copyright (c) 2022-2024 TQ-Systems GmbH <linux@ew.tq-group.com>, D-82229 Seefeld, Germany. 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/input/input.h> 11#include <dt-bindings/leds/common.h> 12#include <dt-bindings/net/ti-dp83867.h> 13#include <dt-bindings/phy/phy.h> 14#include <dt-bindings/pwm/pwm.h> 15#include "k3-serdes.h" 16 17#include "k3-am642-tqma64xxl.dtsi" 18 19/ { 20 compatible = "tq,am642-tqma6442l-mbax4xxl", "tq,am642-tqma6442l", 21 "ti,am642"; 22 model = "TQ-Systems TQMa64xxL SoM on MBax4xxL carrier board"; 23 chassis-type = "embedded"; 24 25 aliases { 26 ethernet0 = &cpsw_port1; 27 ethernet1 = &icssg1_emac0; 28 ethernet2 = &icssg1_emac1; 29 i2c1 = &mcu_i2c0; 30 mmc1 = &sdhci1; 31 serial0 = &mcu_uart0; 32 serial1 = &mcu_uart1; 33 serial2 = &main_uart0; 34 serial3 = &main_uart1; 35 serial4 = &main_uart2; 36 serial5 = &main_uart4; 37 serial6 = &main_uart5; 38 serial7 = &main_uart3; 39 spi1 = &main_spi0; 40 spi2 = &mcu_spi0; 41 }; 42 43 chosen { 44 stdout-path = &main_uart0; 45 }; 46 47 gpio-keys { 48 compatible = "gpio-keys"; 49 pinctrl-names = "default"; 50 pinctrl-0 = <&mcu_gpio_keys_pins>; 51 52 user-button { 53 label = "USER_BUTTON"; 54 linux,code = <BTN_0>; 55 gpios = <&mcu_gpio0 5 GPIO_ACTIVE_LOW>; 56 }; 57 }; 58 59 gpio-leds { 60 compatible = "gpio-leds"; 61 pinctrl-names = "default"; 62 pinctrl-0 = <&mcu_gpio_leds_pins>; 63 64 led-0 { 65 gpios = <&mcu_gpio0 8 GPIO_ACTIVE_HIGH>; 66 color = <LED_COLOR_ID_GREEN>; 67 function = LED_FUNCTION_INDICATOR; 68 }; 69 led-1 { 70 gpios = <&mcu_gpio0 9 GPIO_ACTIVE_HIGH>; 71 color = <LED_COLOR_ID_YELLOW>; 72 function = LED_FUNCTION_INDICATOR; 73 }; 74 }; 75 76 icssg1_eth: icssg1-eth { 77 compatible = "ti,am642-icssg-prueth"; 78 pinctrl-names = "default"; 79 pinctrl-0 = <&pru_icssg1_rgmii1_pins>, <&pru_icssg1_rgmii2_pins>; 80 interrupt-parent = <&icssg1_intc>; 81 interrupts = <24 0 2>, <25 1 3>; 82 interrupt-names = "tx_ts0", "tx_ts1"; 83 dmas = <&main_pktdma 0xc200 15>, /* egress slice 0 */ 84 <&main_pktdma 0xc201 15>, /* egress slice 0 */ 85 <&main_pktdma 0xc202 15>, /* egress slice 0 */ 86 <&main_pktdma 0xc203 15>, /* egress slice 0 */ 87 <&main_pktdma 0xc204 15>, /* egress slice 1 */ 88 <&main_pktdma 0xc205 15>, /* egress slice 1 */ 89 <&main_pktdma 0xc206 15>, /* egress slice 1 */ 90 <&main_pktdma 0xc207 15>, /* egress slice 1 */ 91 <&main_pktdma 0x4200 15>, /* ingress slice 0 */ 92 <&main_pktdma 0x4201 15>; /* ingress slice 1 */ 93 dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3", 94 "tx1-0", "tx1-1", "tx1-2", "tx1-3", 95 "rx0", "rx1"; 96 sram = <&oc_sram>; 97 firmware-name = "ti-pruss/am64x-sr2-pru0-prueth-fw.elf", 98 "ti-pruss/am64x-sr2-rtu0-prueth-fw.elf", 99 "ti-pruss/am64x-sr2-txpru0-prueth-fw.elf", 100 "ti-pruss/am64x-sr2-pru1-prueth-fw.elf", 101 "ti-pruss/am64x-sr2-rtu1-prueth-fw.elf", 102 "ti-pruss/am64x-sr2-txpru1-prueth-fw.elf"; 103 ti,prus = <&pru1_0>, <&rtu1_0>, <&tx_pru1_0>, <&pru1_1>, <&rtu1_1>, <&tx_pru1_1>; 104 ti,pruss-gp-mux-sel = <2>, /* MII mode */ 105 <2>, 106 <2>, 107 <2>, /* MII mode */ 108 <2>, 109 <2>; 110 ti,mii-g-rt = <&icssg1_mii_g_rt>; 111 ti,mii-rt = <&icssg1_mii_rt>; 112 ti,iep = <&icssg1_iep0>, <&icssg1_iep1>; 113 114 ethernet-ports { 115 #address-cells = <1>; 116 #size-cells = <0>; 117 118 icssg1_emac0: port@0 { 119 reg = <0>; 120 phy-handle = <&icssg1_phy0c>; 121 phy-mode = "rgmii-id"; 122 /* Filled in by bootloader */ 123 local-mac-address = [00 00 00 00 00 00]; 124 }; 125 126 icssg1_emac1: port@1 { 127 reg = <1>; 128 phy-handle = <&icssg1_phy03>; 129 phy-mode = "rgmii-id"; 130 /* Filled in by bootloader */ 131 local-mac-address = [00 00 00 00 00 00]; 132 }; 133 }; 134 }; 135 136 fan0: pwm-fan { 137 compatible = "pwm-fan"; 138 pinctrl-names = "default"; 139 pinctrl-0 = <&pwm_fan_pins>; 140 fan-supply = <®_pwm_fan>; 141 #cooling-cells = <2>; 142 /* typical 25 kHz -> 40.000 nsec */ 143 pwms = <&epwm5 0 40000 PWM_POLARITY_INVERTED>; 144 cooling-levels = <0 32 64 128 196 240>; 145 pulses-per-revolution = <2>; 146 interrupt-parent = <&main_gpio1>; 147 interrupts = <49 IRQ_TYPE_EDGE_FALLING>; 148 status = "disabled"; 149 }; 150 151 wifi_pwrseq: pwrseq-wifi { 152 compatible = "mmc-pwrseq-simple"; 153 pinctrl-names = "default"; 154 pinctrl-0 = <&main_mmc1_wifi_pwrseq_pins>; 155 reset-gpios = <&main_gpio0 23 GPIO_ACTIVE_LOW>; 156 }; 157 158 reg_pwm_fan: regulator-pwm-fan { 159 compatible = "regulator-fixed"; 160 pinctrl-names = "default"; 161 pinctrl-0 = <&pwm_fan_reg_pins>; 162 regulator-name = "FAN_PWR"; 163 regulator-min-microvolt = <12000000>; 164 regulator-max-microvolt = <12000000>; 165 gpio = <&main_gpio1 48 GPIO_ACTIVE_HIGH>; 166 enable-active-high; 167 }; 168 169 reg_sd: regulator-sd { 170 compatible = "regulator-fixed"; 171 pinctrl-names = "default"; 172 pinctrl-0 = <&main_mmc1_reg_pins>; 173 regulator-name = "V_3V3_SD"; 174 regulator-min-microvolt = <3300000>; 175 regulator-max-microvolt = <3300000>; 176 gpio = <&main_gpio1 43 GPIO_ACTIVE_HIGH>; 177 enable-active-high; 178 bootph-all; 179 }; 180}; 181 182&cpsw3g { 183 pinctrl-names = "default"; 184 pinctrl-0 = <&cpsw_pins>; 185 status = "okay"; 186}; 187 188&cpsw_port1 { 189 phy-mode = "rgmii-id"; 190 phy-handle = <&cpsw3g_phy0>; 191 status = "okay"; 192}; 193 194&cpsw3g_mdio { 195 pinctrl-names = "default"; 196 pinctrl-0 = <&cpsw_mdio_pins>; 197 status = "okay"; 198 199 cpsw3g_phy0: ethernet-phy@0 { 200 compatible = "ethernet-phy-ieee802.3-c22"; 201 reg = <0>; 202 reset-gpios = <&main_gpio0 44 GPIO_ACTIVE_LOW>; 203 reset-assert-us = <1000>; 204 reset-deassert-us = <1000>; 205 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 206 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; 207 }; 208}; 209 210&epwm5 { 211 pinctrl-names = "default"; 212 pinctrl-0 = <&epwm5_pins>; 213 status = "okay"; 214}; 215 216&icssg1_mdio { 217 pinctrl-names = "default"; 218 pinctrl-0 = <&pru_icssg1_mdio_pins>; 219 status = "okay"; 220 221 /* phy-mode is fixed up to rgmii-rxid by prueth driver to account for 222 * the SoC integration, so the only rx-internal-delay and no 223 * tx-internal-delay is set for the PHYs. 224 */ 225 226 icssg1_phy03: ethernet-phy@3 { 227 compatible = "ethernet-phy-ieee802.3-c22"; 228 reg = <0x3>; 229 reset-gpios = <&main_gpio1 47 GPIO_ACTIVE_LOW>; 230 reset-assert-us = <1000>; 231 reset-deassert-us = <1000>; 232 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 233 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; 234 }; 235 236 icssg1_phy0c: ethernet-phy@c { 237 compatible = "ethernet-phy-ieee802.3-c22"; 238 reg = <0xc>; 239 reset-gpios = <&main_gpio1 51 GPIO_ACTIVE_LOW>; 240 reset-assert-us = <1000>; 241 reset-deassert-us = <1000>; 242 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 243 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; 244 }; 245}; 246 247 248&main_gpio0 { 249 pinctrl-names = "default"; 250 pinctrl-0 = <&main_gpio0_digital_pins>, 251 <&main_gpio0_hog_pins>; 252 gpio-line-names = 253 "", "", "", "", /* 0-3 */ 254 "", "", "", "", /* 4-7 */ 255 "", "", "", "", /* 8-11 */ 256 "", "", "", "", /* 12-15 */ 257 "", "", "", "", /* 16-19 */ 258 "", "", "", "", /* 20-23 */ 259 "", "", "EN_DIG_OUT_1", "STATUS_OUT_1", /* 24-27 */ 260 "EN_DIG_OUT_2", "STATUS_OUT_2", "EN_SIG_OUT_3", "", /* 28-31 */ 261 "", "", "STATUS_OUT_3", "EN_DIG_OUT_4", /* 32-35 */ 262 "", "", "STATUS_OUT_4", "DIG_IN_1", /* 36-39 */ 263 "DIG_IN_2", "DIG_IN_3", "DIG_IN_4"; /* 40- */ 264 bootph-all; 265}; 266 267&main_gpio1 { 268 pinctrl-names = "default"; 269 pinctrl-0 = <&main_gpio1_hog_pins>, 270 <&main_gpio1_pru_pins>; 271 gpio-line-names = 272 "", "", "", "", /* 0-3 */ 273 "", "", "", "", /* 4-7 */ 274 "", "", "", "", /* 8-11 */ 275 "", "", "", "", /* 12-15 */ 276 "", "", "", "", /* 16-19 */ 277 "", "", "", "", /* 20-23 */ 278 "", "", "", "", /* 24-27 */ 279 "", "", "", "", /* 28-31 */ 280 "", "", "", "", /* 32-35 */ 281 "", "", "", "", /* 36-39 */ 282 "", "", "", "", /* 40-43 */ 283 "", "", "", "", /* 44-47 */ 284 "", "", "", "", /* 48-51 */ 285 "", "", "", "ADC_SYNC", /* 52-55 */ 286 "", "", "ADC_RST#", "ADC_DATA_RDY", /* 56-59 */ 287 "", "", "", "", /* 60-63 */ 288 "", "", "", "ADC_INT#", /* 64-67 */ 289 "BG95_PWRKEY", "BG95_RESET"; /* 68- */ 290 bootph-all; 291 292 line50-hog { 293 /* See also usb0 */ 294 gpio-hog; 295 gpios = <50 0>; 296 line-name = "USB0_VBUS_OC#"; 297 input; 298 }; 299 300 line54-hog { 301 gpio-hog; 302 gpios = <54 0>; 303 line-name = "PRG0_MDIO_SWITCH"; 304 output-low; 305 }; 306 307 line70-hog { 308 gpio-hog; 309 gpios = <70 0>; 310 line-name = "PHY_INT#"; 311 input; 312 }; 313}; 314 315&main_mcan0 { 316 pinctrl-names = "default"; 317 pinctrl-0 = <&main_mcan0_pins>; 318 status = "okay"; 319}; 320 321&main_mcan1 { 322 pinctrl-names = "default"; 323 pinctrl-0 = <&main_mcan1_pins>; 324 status = "okay"; 325}; 326 327&main_spi0 { 328 pinctrl-names = "default"; 329 pinctrl-0 = <&main_spi0_pins>; 330 ti,pindir-d0-out-d1-in; 331 status = "okay"; 332 333 /* adc@0: NXP NAFE13388 */ 334}; 335 336/* UART/USB adapter port 1 */ 337&main_uart0 { 338 pinctrl-names = "default"; 339 pinctrl-0 = <&main_uart0_pins>; 340 bootph-pre-ram; 341 status = "okay"; 342}; 343 344/* 345 * IOT Module - GNSS UART 346 * 347 * Note: We expect usage of a SYSFW that does not reserve UART1 for debug traces 348 */ 349&main_uart1 { 350 pinctrl-names = "default"; 351 pinctrl-0 = <&main_uart1_pins>; 352 status = "okay"; 353}; 354 355/* RS485 port */ 356&main_uart2 { 357 pinctrl-names = "default"; 358 pinctrl-0 = <&main_uart2_pins>; 359 linux,rs485-enabled-at-boot-time; 360 rs485-rts-active-low; 361 status = "okay"; 362}; 363 364/* Bluetooth module */ 365&main_uart3 { 366 pinctrl-names = "default"; 367 pinctrl-0 = <&main_uart3_pins>; 368 /* 369 * Left disabled for now, until a way to deal with drivers and firmware 370 * for the combined WLAN/BT module has been figured out 371 */ 372}; 373 374/* IOT module - Main UART */ 375&main_uart4 { 376 pinctrl-names = "default"; 377 pinctrl-0 = <&main_uart4_pins>; 378 status = "okay"; 379}; 380 381/* IOT module - DBG UART */ 382&main_uart5 { 383 pinctrl-names = "default"; 384 pinctrl-0 = <&main_uart5_pins>; 385 status = "okay"; 386}; 387 388&main0_thermal { 389 trips { 390 main0_active0: trip-active0 { 391 temperature = <40000>; 392 hysteresis = <5000>; 393 type = "active"; 394 }; 395 396 main0_active1: trip-active1 { 397 temperature = <48000>; 398 hysteresis = <3000>; 399 type = "active"; 400 }; 401 402 main0_active2: trip-active2 { 403 temperature = <60000>; 404 hysteresis = <10000>; 405 type = "active"; 406 }; 407 }; 408 409 cooling-maps { 410 map1 { 411 trip = <&main0_active0>; 412 cooling-device = <&fan0 1 1>; 413 }; 414 415 map2 { 416 trip = <&main0_active1>; 417 cooling-device = <&fan0 2 2>; 418 }; 419 420 map3 { 421 trip = <&main0_active2>; 422 cooling-device = <&fan0 3 3>; 423 }; 424 }; 425}; 426 427&main1_thermal { 428 trips { 429 main1_active0: trip-active0 { 430 temperature = <40000>; 431 hysteresis = <5000>; 432 type = "active"; 433 }; 434 435 main1_active1: trip-active1 { 436 temperature = <48000>; 437 hysteresis = <3000>; 438 type = "active"; 439 }; 440 441 main1_active2: trip-active2 { 442 temperature = <60000>; 443 hysteresis = <10000>; 444 type = "active"; 445 }; 446 }; 447 448 cooling-maps { 449 map1 { 450 trip = <&main1_active0>; 451 cooling-device = <&fan0 1 1>; 452 }; 453 454 map2 { 455 trip = <&main1_active1>; 456 cooling-device = <&fan0 2 2>; 457 }; 458 459 map3 { 460 trip = <&main1_active2>; 461 cooling-device = <&fan0 3 3>; 462 }; 463 }; 464}; 465 466&mcu_gpio0 { 467 pinctrl-names = "default"; 468 pinctrl-0 = <&mcu_gpio0_pins>; 469}; 470 471&mcu_i2c0 { 472 pinctrl-names = "default"; 473 pinctrl-0 = <&mcu_i2c0_pins>; 474 /* Left disabled: not functional without external pullup */ 475}; 476 477&mcu_spi0 { 478 pinctrl-names = "default"; 479 pinctrl-0 = <&mcu_spi0_pins>; 480 ti,pindir-d0-out-d1-in; 481 status = "okay"; 482}; 483 484/* UART/USB adapter port 2 */ 485&mcu_uart0 { 486 pinctrl-names = "default"; 487 pinctrl-0 = <&mcu_uart0_pins>; 488 status = "okay"; 489}; 490 491/* Pin header */ 492&mcu_uart1 { 493 pinctrl-names = "default"; 494 pinctrl-0 = <&mcu_uart1_pins>; 495 status = "okay"; 496}; 497 498&serdes_ln_ctrl { 499 idle-states = <AM64_SERDES0_LANE0_USB>; 500 bootph-all; 501}; 502 503&serdes_refclk { 504 bootph-all; 505}; 506 507&serdes0 { 508 serdes0_usb_link: phy@0 { 509 reg = <0>; 510 #phy-cells = <0>; 511 resets = <&serdes_wiz0 1>; 512 bootph-all; 513 cdns,num-lanes = <1>; 514 cdns,phy-type = <PHY_TYPE_USB3>; 515 }; 516}; 517 518&sdhci1 { 519 pinctrl-names = "default"; 520 pinctrl-0 = <&main_mmc1_pins>; 521 bus-width = <4>; 522 cd-gpios = <&main_gpio1 77 GPIO_ACTIVE_LOW>; 523 disable-wp; 524 no-mmc; 525 bootph-all; 526 ti,fails-without-test-cd; 527 /* Enabled by overlay */ 528}; 529 530&tscadc0 { 531 status = "okay"; 532 adc { 533 ti,adc-channels = <0 1 2 3 4 5 6 7>; 534 }; 535}; 536 537&usb0 { 538 /* 539 * The CDNS USB driver currently doesn't support overcurrent GPIOs, 540 * so there is no overcurrent detection. The OC pin is configured 541 * as a GPIO hog instead. 542 */ 543 pinctrl-names = "default"; 544 pinctrl-0 = <&main_usb0_pins>; 545 dr_mode = "otg"; 546 maximum-speed = "super-speed"; 547 phys = <&serdes0_usb_link>; 548 phy-names = "cdns3,usb3-phy"; 549 bootph-all; 550}; 551 552&usbss0 { 553 bootph-all; 554 ti,vbus-divider; 555}; 556 557&main_pmx0 { 558 cpsw_pins: cpsw-pins { 559 pinctrl-single,pins = < 560 /* (W5) PRG0_PRU1_GPO7.RGMII1_RD0 */ 561 AM64X_IOPAD(0x01cc, PIN_INPUT, 4) 562 /* (Y5) PRG0_PRU1_GPO9.RGMII1_RD1 */ 563 AM64X_IOPAD(0x01d4, PIN_INPUT, 4) 564 /* (V6) PRG0_PRU1_GPO10.RGMII1_RD2 */ 565 AM64X_IOPAD(0x01d8, PIN_INPUT, 4) 566 /* (V5) PRG0_PRU1_GPO17.RGMII1_RD3 */ 567 AM64X_IOPAD(0x01f4, PIN_INPUT, 4) 568 /* (AA5) PRG0_PRU0_GPO10.RGMII1_RXC */ 569 AM64X_IOPAD(0x0188, PIN_INPUT, 4) 570 /* (W6) PRG0_PRU0_GPO9.RGMII1_RX_CTL */ 571 AM64X_IOPAD(0x0184, PIN_INPUT, 4) 572 /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */ 573 AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) 574 /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */ 575 AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) 576 /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */ 577 AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) 578 /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */ 579 AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) 580 /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */ 581 AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) 582 /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */ 583 AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) 584 >; 585 }; 586 587 cpsw_mdio_pins: cpsw-mdio-pins { 588 pinctrl-single,pins = < 589 /* (R21) GPMC0_CSn3.GPIO0_44 - RESET_RGMII1# */ 590 AM64X_IOPAD(0x00b4, PIN_OUTPUT, 7) 591 592 /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */ 593 AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) 594 /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */ 595 AM64X_IOPAD(0x01f8, PIN_INPUT, 4) 596 >; 597 }; 598 599 epwm5_pins: epwm5-pins { 600 pinctrl-single,pins = < 601 /* (W19) GPMC0_WAIT0.EHRPWM5_B */ 602 AM64X_IOPAD(0x0098, PIN_OUTPUT, 3) 603 >; 604 }; 605 606 /* Digital IOs */ 607 main_gpio0_digital_pins: main-gpio0-digital-pins { 608 pinctrl-single,pins = < 609 /* (W20) GPMC0_AD11.GPIO0_26 - EN_DIG_OUT_1 */ 610 AM64X_IOPAD(0x0068, PIN_OUTPUT, 7) 611 /* (W21) GPMC0_AD12.GPIO0_27 - STATUS_OUT_1 */ 612 AM64X_IOPAD(0x006c, PIN_INPUT, 7) 613 /* (V18) GPMC0_AD13.GPIO0_28 - EN_DIG_OUT_2 */ 614 AM64X_IOPAD(0x0070, PIN_OUTPUT, 7) 615 /* (Y21) GPMC0_AD14.GPIO0_29 - STATUS_OUT_2 */ 616 AM64X_IOPAD(0x0074, PIN_INPUT, 7) 617 /* (Y20) GPMC0_AD15.GPIO0_30 - EN_DIG_OUT_3 */ 618 AM64X_IOPAD(0x0078, PIN_OUTPUT, 7) 619 /* (T21) GPMC0_WEn.GPIO0_34 - STATUS_OUT_3 */ 620 AM64X_IOPAD(0x008c, PIN_INPUT, 7) 621 /* (P17) GPMC0_BE0n_CLE.GPIO0_35 - EN_DIG_OUT_4 */ 622 AM64X_IOPAD(0x0090, PIN_OUTPUT, 7) 623 /* (Y18) GPMC0_WAIT1.GPIO0_38 - STATUS_OUT_4 */ 624 AM64X_IOPAD(0x009c, PIN_INPUT, 7) 625 /* (N16) GPMC0_WPn.GPIO0_39 - DIG_IN_1 */ 626 AM64X_IOPAD(0x00a0, PIN_INPUT, 7) 627 /* (N17) GPMC0_DIR.GPIO0_40 - DIG_IN_2 */ 628 AM64X_IOPAD(0x00a4, PIN_INPUT, 7) 629 /* (R19) GPMC0_CSn0.GPIO0_41 - DIG_IN_3 */ 630 AM64X_IOPAD(0x00a8, PIN_INPUT, 7) 631 /* (R20) GPMC0_CSn1.GPIO0_42 - DIG_IN_4 */ 632 AM64X_IOPAD(0x00ac, PIN_INPUT, 7) 633 >; 634 }; 635 636 main_gpio0_hog_pins: main-gpio0-hog-pins { 637 pinctrl-single,pins = < 638 /* (P19) GPMC0_CSn2.GPIO0_43 - MMC1_CTRL */ 639 AM64X_IOPAD(0x00b0, PIN_OUTPUT, 7) 640 >; 641 bootph-all; 642 }; 643 644 main_gpio1_hog_pins: main-gpio1-hog-pins { 645 pinctrl-single,pins = < 646 /* (B15) SPI1_D0.GPIO1_50 - USB0_VBUS_OC# */ 647 AM64X_IOPAD(0x0228, PIN_INPUT, 7) 648 /* (B16) UART0_CTSn.GPIO1_54 - PRG0_MDIO_SWITCH */ 649 AM64X_IOPAD(0x0238, PIN_OUTPUT, 7) 650 /* (C19) EXTINTn.GPIO1_70 - PHY_INT# */ 651 AM64X_IOPAD(0x0278, PIN_INPUT, 7) 652 >; 653 }; 654 655 main_gpio1_pru_pins: main-gpio1-pru-pins { 656 pinctrl-single,pins = < 657 /* (Y1) PRG0_PRU0_GPO0.GPIO1_0 */ 658 AM64X_IOPAD(0x0160, PIN_INPUT, 7) 659 /* (R4) PRG0_PRU0_GPO1.GPIO1_1 */ 660 AM64X_IOPAD(0x0164, PIN_INPUT, 7) 661 /* (U2) PRG0_PRU0_GPO2.GPIO1_2 */ 662 AM64X_IOPAD(0x0168, PIN_INPUT, 7) 663 /* (V2) PRG0_PRU0_GPO3.GPIO1_3 */ 664 AM64X_IOPAD(0x016c, PIN_INPUT, 7) 665 /* (AA2) PRG0_PRU0_GPO4.GPIO1_4 */ 666 AM64X_IOPAD(0x0170, PIN_INPUT, 7) 667 /* (R3) PRG0_PRU0_GPO5.GPIO1_5 */ 668 AM64X_IOPAD(0x0174, PIN_INPUT, 7) 669 /* (T3) PRG0_PRU0_GPO6.GPIO1_6 */ 670 AM64X_IOPAD(0x0178, PIN_INPUT, 7) 671 /* (T1) PRG0_PRU0_GPO7.GPIO1_7 */ 672 AM64X_IOPAD(0x017c, PIN_INPUT, 7) 673 /* (T2) PRG0_PRU0_GPO8.GPIO1_8 */ 674 AM64X_IOPAD(0x0180, PIN_INPUT, 7) 675 /* (Y3) PRG0_PRU0_GPO11.GPIO1_11 */ 676 AM64X_IOPAD(0x018c, PIN_INPUT, 7) 677 /* (AA3) PRG0_PRU0_GPO12.GPIO1_12 */ 678 AM64X_IOPAD(0x0190, PIN_INPUT, 7) 679 /* (R6) PRG0_PRU0_GPO13.GPIO1_13 */ 680 AM64X_IOPAD(0x0194, PIN_INPUT, 7) 681 /* (V4) PRG0_PRU0_GPO14.GPIO1_14 */ 682 AM64X_IOPAD(0x0198, PIN_INPUT, 7) 683 /* (T5) PRG0_PRU0_GPO15.GPIO1_15 */ 684 AM64X_IOPAD(0x019c, PIN_INPUT, 7) 685 /* (U4) PRG0_PRU0_GPO16.GPIO1_16 */ 686 AM64X_IOPAD(0x01a0, PIN_INPUT, 7) 687 /* (U1) PRG0_PRU0_GPO17.GPIO1_17 */ 688 AM64X_IOPAD(0x01a4, PIN_INPUT, 7) 689 /* (V1) PRG0_PRU0_GPO18.GPIO1_18 */ 690 AM64X_IOPAD(0x01a8, PIN_INPUT, 7) 691 /* (W1) PRG0_PRU0_GPO19.GPIO1_19 */ 692 AM64X_IOPAD(0x01ac, PIN_INPUT, 7) 693 /* (Y2) PRG0_PRU1_GPO0.GPIO1_20 */ 694 AM64X_IOPAD(0x01b0, PIN_INPUT, 7) 695 /* (W2) PRG0_PRU1_GPO1.GPIO1_21 */ 696 AM64X_IOPAD(0x01b4, PIN_INPUT, 7) 697 /* (V3) PRG0_PRU1_GPO2.GPIO1_22 */ 698 AM64X_IOPAD(0x01b8, PIN_INPUT, 7) 699 /* (T4) PRG0_PRU1_GPO3.GPIO1_23 */ 700 AM64X_IOPAD(0x01bc, PIN_INPUT, 7) 701 /* (W3) PRG0_PRU1_GPO4.GPIO1_24 */ 702 AM64X_IOPAD(0x01c0, PIN_INPUT, 7) 703 /* (P4) PRG0_PRU1_GPO5.GPIO1_25 */ 704 AM64X_IOPAD(0x01c4, PIN_INPUT, 7) 705 /* (R5) PRG0_PRU1_GPO6.GPIO1_26 */ 706 AM64X_IOPAD(0x01c8, PIN_INPUT, 7) 707 /* (R1) PRG0_PRU1_GPO8.GPIO1_28 */ 708 AM64X_IOPAD(0x01d0, PIN_INPUT, 7) 709 /* (W4) PRG0_PRU1_GPO11.GPIO1_31 */ 710 AM64X_IOPAD(0x01dc, PIN_INPUT, 7) 711 /* (Y4) PRG0_PRU1_GPO12.GPIO1_32 */ 712 AM64X_IOPAD(0x01e0, PIN_INPUT, 7) 713 /* (T6) PRG0_PRU1_GPO13.GPIO1_33 */ 714 AM64X_IOPAD(0x01e4, PIN_INPUT, 7) 715 /* (U6) PRG0_PRU1_GPO14.GPIO1_34 */ 716 AM64X_IOPAD(0x01e8, PIN_INPUT, 7) 717 /* (U5) PRG0_PRU1_GPO15.GPIO1_35 */ 718 AM64X_IOPAD(0x01ec, PIN_INPUT, 7) 719 /* (AA4) PRG0_PRU1_GPO16.GPIO1_36 */ 720 AM64X_IOPAD(0x01f0, PIN_INPUT, 7) 721 /* (P2) PRG0_MDIO0_MDIO.GPIO1_40 */ 722 AM64X_IOPAD(0x0200, PIN_INPUT, 7) 723 /* (P3) PRG0_MDIO0_MDC.GPIO1_41 */ 724 AM64X_IOPAD(0x0204, PIN_INPUT, 7) 725 >; 726 }; 727 728 main_mcan0_pins: main-mcan0-pins { 729 pinctrl-single,pins = < 730 /* (B17) MCAN0_RX */ 731 AM64X_IOPAD(0x0254, PIN_INPUT, 0) 732 /* (A17) MCAN0_TX */ 733 AM64X_IOPAD(0x0250, PIN_OUTPUT, 0) 734 >; 735 }; 736 737 main_mcan1_pins: main-mcan1-pins { 738 pinctrl-single,pins = < 739 /* (D17) MCAN1_RX */ 740 AM64X_IOPAD(0x025c, PIN_INPUT, 0) 741 /* (C17) MCAN1_TX */ 742 AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) 743 >; 744 }; 745 746 main_mmc1_pins: main-mmc1-pins { 747 pinctrl-single,pins = < 748 /* (J19) MMC1_CMD */ 749 AM64X_IOPAD(0x0294, PIN_INPUT, 0) 750 /* (L20) MMC1_CLK */ 751 AM64X_IOPAD(0x028c, PIN_INPUT, 0) 752 /* (K21) MMC1_DAT0 */ 753 AM64X_IOPAD(0x0288, PIN_INPUT, 0) 754 /* (L21) MMC1_DAT1 */ 755 AM64X_IOPAD(0x0284, PIN_INPUT, 0) 756 /* (K19) MMC1_DAT2 */ 757 AM64X_IOPAD(0x0280, PIN_INPUT, 0) 758 /* (K18) MMC1_DAT3 */ 759 AM64X_IOPAD(0x027c, PIN_INPUT, 0) 760 /* (D19) MMC1_SDCD.GPIO1_77 */ 761 AM64X_IOPAD(0x0298, PIN_INPUT, 7) 762 /* (#N/A) MMC1_CLKLB */ 763 AM64X_IOPAD(0x0290, PIN_INPUT, 0) 764 >; 765 bootph-all; 766 }; 767 768 main_mmc1_reg_pins: main-mmc1-reg-pins { 769 pinctrl-single,pins = < 770 /* (C13) SPI0_CS1.GPIO1_43 - MMC1_SD_EN */ 771 AM64X_IOPAD(0x020c, PIN_OUTPUT, 7) 772 >; 773 bootph-all; 774 }; 775 776 main_mmc1_wifi_pwrseq_pins: main-mmc1-wifi-pwrseq-pins { 777 pinctrl-single,pins = < 778 /* (V19) GPMC0_AD8.GPIO0_23 - WIFI-BT_EN */ 779 AM64X_IOPAD(0x005c, PIN_OUTPUT, 7) 780 >; 781 }; 782 783 main_spi0_pins: main-spi0-pins { 784 pinctrl-single,pins = < 785 /* (D13) SPI0_CLK */ 786 AM64X_IOPAD(0x0210, PIN_OUTPUT, 0) 787 /* (D12) SPI0_CS0 */ 788 AM64X_IOPAD(0x0208, PIN_OUTPUT, 0) 789 /* (A13) SPI0_D0 */ 790 AM64X_IOPAD(0x0214, PIN_OUTPUT, 0) 791 /* (A14) SPI0_D1 */ 792 AM64X_IOPAD(0x0218, PIN_INPUT, 0) 793 >; 794 }; 795 796 main_spi0_adc_pins: main-spi0-adc-pins { 797 pinctrl-single,pins = < 798 /* (A16) UART0_RTSn.GPIO1_55 - ADC_SYNC */ 799 AM64X_IOPAD(0x023c, PIN_INPUT, 7) 800 /* (D16) UART1_CTSn.GPIO1_58 - ADC_RST# */ 801 AM64X_IOPAD(0x0248, PIN_OUTPUT, 7) 802 /* (E16) UART1_RTSn.GPIO1_59 - ADC_DATA_RDY */ 803 AM64X_IOPAD(0x024c, PIN_INPUT, 7) 804 /* (B19) I2C1_SDA.GPIO1_67 - ADC_INT# */ 805 AM64X_IOPAD(0x026c, PIN_INPUT, 7) 806 >; 807 }; 808 809 main_uart0_pins: main-uart0-pins { 810 pinctrl-single,pins = < 811 /* (D15) UART0_RXD */ 812 AM64X_IOPAD(0x0230, PIN_INPUT, 0) 813 /* (C16) UART0_TXD */ 814 AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) 815 >; 816 bootph-pre-ram; 817 }; 818 819 main_uart1_pins: main-uart1-pins { 820 pinctrl-single,pins = < 821 /* (E15) UART1_RXD */ 822 AM64X_IOPAD(0x0240, PIN_INPUT, 0) 823 /* (E14) UART1_TXD */ 824 AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) 825 >; 826 }; 827 828 main_uart2_pins: main-uart2-pins { 829 pinctrl-single,pins = < 830 /* (T18) GPMC0_AD2.UART2_RTSn */ 831 AM64X_IOPAD(0x0044, PIN_OUTPUT, 2) 832 /* (T20) GPMC0_AD0.UART2_RXD */ 833 AM64X_IOPAD(0x003c, PIN_INPUT, 2) 834 /* (U21) GPMC0_AD1.UART2_TXD */ 835 AM64X_IOPAD(0x0040, PIN_OUTPUT, 2) 836 >; 837 }; 838 839 main_uart3_pins: main-uart3-pins { 840 pinctrl-single,pins = < 841 /* (T17) GPMC0_AD9.UART3_CTSn */ 842 AM64X_IOPAD(0x0060, PIN_INPUT, 2) 843 /* (U19) GPMC0_AD5.UART3_RTSn */ 844 AM64X_IOPAD(0x0050, PIN_OUTPUT, 2) 845 /* (U20) GPMC0_AD3.UART3_RXD */ 846 AM64X_IOPAD(0x0048, PIN_INPUT, 2) 847 /* (U18) GPMC0_AD4.UART3_TXD */ 848 AM64X_IOPAD(0x004c, PIN_OUTPUT, 2) 849 >; 850 }; 851 852 main_uart4_pins: main-uart4-pins { 853 pinctrl-single,pins = < 854 /* (R16) GPMC0_AD10.UART4_CTSn */ 855 AM64X_IOPAD(0x0064, PIN_INPUT, 2) 856 /* (R17) GPMC0_CLK.UART4_RTSn */ 857 AM64X_IOPAD(0x007c, PIN_OUTPUT, 2) 858 /* (V20) GPMC0_AD6.UART4_RXD */ 859 AM64X_IOPAD(0x0054, PIN_INPUT, 2) 860 /* (V21) GPMC0_AD7.UART4_TXD */ 861 AM64X_IOPAD(0x0058, PIN_OUTPUT, 2) 862 863 /* Control GPIOs for IOT Module connected to UART4 */ 864 /* (D18) ECAP0_IN_APWM_OUT.GPIO1_68 - BG95_PWRKEY */ 865 AM64X_IOPAD(0x0270, PIN_OUTPUT, 7) 866 /* (A19) EXT_REFCLK1.GPIO1_69 - BG95_RESET */ 867 AM64X_IOPAD(0x0274, PIN_OUTPUT, 7) 868 >; 869 }; 870 871 main_uart5_pins: main-uart5-pins { 872 pinctrl-single,pins = < 873 /* (P16) GPMC0_ADVn_ALE.UART5_RXD */ 874 AM64X_IOPAD(0x0084, PIN_INPUT, 2) 875 /* (R18) GPMC0_OEn_REn.UART5_TXD */ 876 AM64X_IOPAD(0x0088, PIN_OUTPUT, 2) 877 >; 878 }; 879 880 main_usb0_pins: main-usb0-pins { 881 pinctrl-single,pins = < 882 /* (E19) USB0_DRVVBUS */ 883 AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) 884 >; 885 bootph-all; 886 }; 887 888 pru_icssg1_mdio_pins: pru-icssg1-mdio-pins { 889 pinctrl-single,pins = < 890 /* (A15) SPI1_D1.GPIO1_51 - RESET_PRG1_RGMII1# */ 891 AM64X_IOPAD(0x022c, PIN_OUTPUT, 7) 892 /* (B14) SPI1_CS0.GPIO1_47 - RESET_PRG1_RGMII2# */ 893 AM64X_IOPAD(0x021c, PIN_OUTPUT, 7) 894 895 /* (Y6) PRG1_MDIO0_MDC */ 896 AM64X_IOPAD(0x015c, PIN_OUTPUT, 0) 897 /* (AA6) PRG1_MDIO0_MDIO */ 898 AM64X_IOPAD(0x0158, PIN_INPUT, 0) 899 >; 900 }; 901 902 pru_icssg1_rgmii1_pins: pru-icssg1-rgmii1-pins { 903 pinctrl-single,pins = < 904 /* (Y7) PRG1_PRU0_GPO0.PRG1_RGMII1_RD0 */ 905 AM64X_IOPAD(0x00b8, PIN_INPUT, 2) 906 /* (U8) PRG1_PRU0_GPO1.PRG1_RGMII1_RD1 */ 907 AM64X_IOPAD(0x00bc, PIN_INPUT, 2) 908 /* (W8) PRG1_PRU0_GPO2.PRG1_RGMII1_RD2 */ 909 AM64X_IOPAD(0x00c0, PIN_INPUT, 2) 910 /* (V8) PRG1_PRU0_GPO3.PRG1_RGMII1_RD3 */ 911 AM64X_IOPAD(0x00c4, PIN_INPUT, 2) 912 /* (AA7) PRG1_PRU0_GPO6.PRG1_RGMII1_RXC */ 913 AM64X_IOPAD(0x00d0, PIN_INPUT, 2) 914 /* (Y8) PRG1_PRU0_GPO4.PRG1_RGMII1_RX_CTL */ 915 AM64X_IOPAD(0x00c8, PIN_INPUT, 2) 916 /* (AA8) PRG1_PRU0_GPO11.PRG1_RGMII1_TD0 */ 917 AM64X_IOPAD(0x00e4, PIN_OUTPUT, 2) 918 /* (U9) PRG1_PRU0_GPO12.PRG1_RGMII1_TD1 */ 919 AM64X_IOPAD(0x00e8, PIN_OUTPUT, 2) 920 /* (W9) PRG1_PRU0_GPO13.PRG1_RGMII1_TD2 */ 921 AM64X_IOPAD(0x00ec, PIN_OUTPUT, 2) 922 /* (AA9) PRG1_PRU0_GPO14.PRG1_RGMII1_TD3 */ 923 AM64X_IOPAD(0x00f0, PIN_OUTPUT, 2) 924 /* (V9) PRG1_PRU0_GPO16.PRG1_RGMII1_TXC */ 925 AM64X_IOPAD(0x00f8, PIN_OUTPUT, 2) 926 /* (Y9) PRG1_PRU0_GPO15.PRG1_RGMII1_TX_CTL */ 927 AM64X_IOPAD(0x00f4, PIN_OUTPUT, 2) 928 >; 929 }; 930 931 pru_icssg1_rgmii2_pins: pru-icssg1-rgmii2-pins { 932 pinctrl-single,pins = < 933 /* (W11) PRG1_PRU1_GPO0.PRG1_RGMII2_RD0 */ 934 AM64X_IOPAD(0x0108, PIN_INPUT, 2) 935 /* (V11) PRG1_PRU1_GPO1.PRG1_RGMII2_RD1 */ 936 AM64X_IOPAD(0x010c, PIN_INPUT, 2) 937 /* (AA12) PRG1_PRU1_GPO2.PRG1_RGMII2_RD2 */ 938 AM64X_IOPAD(0x0110, PIN_INPUT, 2) 939 /* (Y12) PRG1_PRU1_GPO3.PRG1_RGMII2_RD3 */ 940 AM64X_IOPAD(0x0114, PIN_INPUT, 2) 941 /* (U11) PRG1_PRU1_GPO6.PRG1_RGMII2_RXC */ 942 AM64X_IOPAD(0x0120, PIN_INPUT, 2) 943 /* (W12) PRG1_PRU1_GPO4.PRG1_RGMII2_RX_CTL */ 944 AM64X_IOPAD(0x0118, PIN_INPUT, 2) 945 /* (AA10) PRG1_PRU1_GPO11.PRG1_RGMII2_TD0 */ 946 AM64X_IOPAD(0x0134, PIN_OUTPUT, 2) 947 /* (V10) PRG1_PRU1_GPO12.PRG1_RGMII2_TD1 */ 948 AM64X_IOPAD(0x0138, PIN_OUTPUT, 2) 949 /* (U10) PRG1_PRU1_GPO13.PRG1_RGMII2_TD2 */ 950 AM64X_IOPAD(0x013c, PIN_OUTPUT, 2) 951 /* (AA11) PRG1_PRU1_GPO14.PRG1_RGMII2_TD3 */ 952 AM64X_IOPAD(0x0140, PIN_OUTPUT, 2) 953 /* (Y10) PRG1_PRU1_GPO16.PRG1_RGMII2_TXC */ 954 AM64X_IOPAD(0x0148, PIN_OUTPUT, 2) 955 /* (Y11) PRG1_PRU1_GPO15.PRG1_RGMII2_TX_CTL */ 956 AM64X_IOPAD(0x0144, PIN_OUTPUT, 2) 957 >; 958 }; 959 960 pwm_fan_pins: pwm-fan-pins { 961 pinctrl-single,pins = < 962 /* (T19) GPMC0_BE1n.EHRPWM5_A */ 963 AM64X_IOPAD(0x0094, PIN_OUTPUT, 3) 964 /* (C14) SPI1_CLK.GPIO1_49 - FAN_RPM */ 965 AM64X_IOPAD(0x0224, PIN_INPUT, 7) 966 >; 967 }; 968 969 pwm_fan_reg_pins: pwm-fan-reg-pins { 970 pinctrl-single,pins = < 971 /* (D14) SPI1_CS1.GPIO1_48 - FAN_PWR */ 972 AM64X_IOPAD(0x0220, PIN_OUTPUT, 7) 973 >; 974 }; 975}; 976 977&mcu_pmx0 { 978 mcu_gpio_keys_pins: mcu-gpio-keys-pins { 979 pinctrl-single,pins = < 980 /* (A7) MCU_SPI1_CS0.MCU_GPIO0_5 */ 981 AM64X_MCU_IOPAD(0x0014, PIN_INPUT, 7) 982 >; 983 }; 984 985 mcu_gpio_leds_pins: mcu-gpio-leds-pins { 986 pinctrl-single,pins = < 987 /* (C7) MCU_SPI1_D0.MCU_GPIO0_8 */ 988 AM64X_MCU_IOPAD(0x0020, PIN_OUTPUT, 7) 989 /* (C8) MCU_SPI1_D1.MCU_GPIO0_9 */ 990 AM64X_MCU_IOPAD(0x0024, PIN_OUTPUT, 7) 991 >; 992 }; 993 994 mcu_gpio0_pins: mcu-gpio0-pins { 995 pinctrl-single,pins = < 996 /* (E8) MCU_UART0_RTSn.MCU_GPIO0_0 */ 997 AM64X_MCU_IOPAD(0x0034, PIN_INPUT, 7) 998 /* (D8) MCU_UART0_CTSn.MCU_GPIO0_1 */ 999 AM64X_MCU_IOPAD(0x0030, PIN_INPUT, 7) 1000 /* (B7) MCU_SPI1_CS1.MCU_GPIO0_6 */ 1001 AM64X_MCU_IOPAD(0x0018, PIN_INPUT, 7) 1002 /* (D7) MCU_SPI1_CLK.MCU_GPIO0_7 */ 1003 AM64X_MCU_IOPAD(0x001c, PIN_INPUT, 7) 1004 /* (A11) MCU_I2C1_SCL.MCU_GPIO0_20 */ 1005 AM64X_MCU_IOPAD(0x0050, PIN_INPUT, 7) 1006 /* (B10) MCU_I2C1_SDA.MCU_GPIO0_21 */ 1007 AM64X_MCU_IOPAD(0x0054, PIN_INPUT, 7) 1008 >; 1009 }; 1010 1011 mcu_i2c0_pins: mcu-i2c0-pins { 1012 pinctrl-single,pins = < 1013 /* (E9) MCU_I2C0_SCL */ 1014 AM64X_MCU_IOPAD(0x0048, PIN_INPUT, 0) 1015 /* (A10) MCU_I2C0_SDA */ 1016 AM64X_MCU_IOPAD(0x004c, PIN_INPUT, 0) 1017 >; 1018 }; 1019 1020 mcu_spi0_pins: mcu-spi0-pins { 1021 pinctrl-single,pins = < 1022 /* (E6) MCU_SPI0_CLK */ 1023 AM64X_MCU_IOPAD(0x0008, PIN_OUTPUT, 0) 1024 /* (D6) MCU_SPI0_CS0 */ 1025 AM64X_MCU_IOPAD(0x0000, PIN_OUTPUT, 0) 1026 /* (C6) MCU_SPI0_CS1 */ 1027 AM64X_MCU_IOPAD(0x0004, PIN_OUTPUT, 0) 1028 /* (E7) MCU_SPI0_D0 */ 1029 AM64X_MCU_IOPAD(0x000c, PIN_OUTPUT, 0) 1030 /* (B6) MCU_SPI0_D1 */ 1031 AM64X_MCU_IOPAD(0x0010, PIN_INPUT, 0) 1032 >; 1033 }; 1034 1035 mcu_uart0_pins: mcu-uart0-pins { 1036 pinctrl-single,pins = < 1037 /* (A9) MCU_UART0_RXD */ 1038 AM64X_MCU_IOPAD(0x0028, PIN_INPUT, 0) 1039 /* (A8) MCU_UART0_TXD */ 1040 AM64X_MCU_IOPAD(0x002c, PIN_OUTPUT, 0) 1041 >; 1042 }; 1043 1044 mcu_uart1_pins: mcu-uart1-pins { 1045 pinctrl-single,pins = < 1046 /* (B8) MCU_UART1_CTSn */ 1047 AM64X_MCU_IOPAD(0x0040, PIN_INPUT, 0) 1048 /* (B9) MCU_UART1_RTSn */ 1049 AM64X_MCU_IOPAD(0x0044, PIN_OUTPUT, 0) 1050 /* (C9) MCU_UART1_RXD */ 1051 AM64X_MCU_IOPAD(0x0038, PIN_INPUT, 0) 1052 /* (D9) MCU_UART1_TXD */ 1053 AM64X_MCU_IOPAD(0x003c, PIN_OUTPUT, 0) 1054 >; 1055 }; 1056}; 1057