Home
last modified time | relevance | path

Searched defs:lane_count (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/msm/dp/
H A Ddp_audio.h21 u32 lane_count; member
H A Ddp_panel.h84 static inline bool is_lane_count_valid(u32 lane_count) in is_lane_count_valid()
H A Ddp_ctrl.c177 u8 lane_count, bw_code; in msm_dp_aux_link_configure() local
2304 int lane_count) in msm_dp_ctrl_clock_recovery_any_ok()
/linux/drivers/gpu/drm/display/
H A Ddrm_dp_helper.c93 int lane_count) in drm_dp_channel_eq_ok()
113 int lane_count) in drm_dp_clock_recovery_ok()
177 int lane_count) in drm_dp_128b132b_lane_channel_eq_done()
197 int lane_count) in drm_dp_128b132b_lane_symbol_locked()
4732 static int drm_dp_link_data_symbol_cycles(int lane_count, int pixels, in drm_dp_link_data_symbol_cycles()
4754 int drm_dp_link_symbol_cycles(int lane_count, int pixels, int dsc_slice_count, in drm_dp_link_symbol_cycles()
4798 int drm_dp_bw_overhead(int lane_count, int hactive, in drm_dp_bw_overhead()
/linux/drivers/gpu/drm/tests/
H A Ddrm_dp_mst_helper_test.c73 int lane_count; member
/linux/drivers/gpu/drm/i915/display/
H A Dintel_lt_phy.c1099 intel_lt_phy_setup_powerdown(struct intel_encoder *encoder, u8 lane_count) in intel_lt_phy_setup_powerdown()
1118 u8 lane_count) in intel_lt_phy_lane_reset()
1827 u8 lane_count = ltpll->lane_count; in intel_lt_phy_enable_disable_tx() local
H A Dintel_dp_mst.c1216 int link_rate, int lane_count) in intel_mst_probed_link_params_valid()
1223 int link_rate, int lane_count) in intel_mst_set_probed_link_params()
2182 int lane_count; in intel_dp_mst_prepare_probe() local
H A Dintel_dp_link_caps.c1094 int lane_count; in parse_lane_count() local
1135 int lane_count; in i915_dp_force_lane_count_write() local
H A Dintel_cx0_phy.c2124 bool is_dp, int port_clock, int lane_count, in intel_c10pll_calc_state_from_table()
3111 static void intel_cx0_program_phy_lane(struct intel_encoder *encoder, int lane_count, in intel_cx0_program_phy_lane()
3723 int lane_count = 4; in intel_cx0_pll_power_save_wa() local
H A Dintel_dp.c384 int intel_dp_link_bw_overhead(int link_clock, int lane_count, int hdisplay, in intel_dp_link_bw_overhead()
414 int intel_dp_link_required(int link_clock, int lane_count, in intel_dp_link_required()
1932 int link_clock, int lane_count, in is_bw_sufficient_for_dsc_config()
2523 int link_clock, int lane_count, in intel_dp_mode_valid_with_dsc()
3664 int link_rate, int lane_count) in intel_dp_set_link_params()
H A Dintel_display_types.h1216 u8 lane_count; member
1815 int lane_count; member
1825 u8 lane_count; member