1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /* Copyright (C) 2018 Microchip Technology Inc. */
3
4 #include <linux/netdevice.h>
5 #include <linux/net_tstamp.h>
6 #include <linux/pci.h>
7 #include <linux/phy.h>
8 #include "lan743x_main.h"
9 #include "lan743x_ethtool.h"
10 #include <linux/sched.h>
11 #include <linux/iopoll.h>
12
13 /* eeprom */
14 #define LAN743X_EEPROM_MAGIC (0x74A5)
15 #define LAN743X_OTP_MAGIC (0x74F3)
16 #define EEPROM_INDICATOR_1 (0xA5)
17 #define EEPROM_INDICATOR_2 (0xAA)
18 #define EEPROM_MAC_OFFSET (0x01)
19 #define MAX_EEPROM_SIZE (512)
20 #define MAX_OTP_SIZE (1024)
21 #define MAX_HS_OTP_SIZE (8 * 1024)
22 #define MAX_HS_EEPROM_SIZE (64 * 1024)
23 #define OTP_INDICATOR_1 (0xF3)
24 #define OTP_INDICATOR_2 (0xF7)
25
26 #define LOCK_TIMEOUT_MAX_CNT (100) // 1 sec (10 msce * 100)
27
28 #define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset)
29
lan743x_otp_power_up(struct lan743x_adapter * adapter)30 static int lan743x_otp_power_up(struct lan743x_adapter *adapter)
31 {
32 u32 reg_value;
33
34 reg_value = lan743x_csr_read(adapter, OTP_PWR_DN);
35
36 if (reg_value & OTP_PWR_DN_PWRDN_N_) {
37 /* clear it and wait to be cleared */
38 reg_value &= ~OTP_PWR_DN_PWRDN_N_;
39 lan743x_csr_write(adapter, OTP_PWR_DN, reg_value);
40
41 usleep_range(100, 20000);
42 }
43
44 return 0;
45 }
46
lan743x_otp_power_down(struct lan743x_adapter * adapter)47 static void lan743x_otp_power_down(struct lan743x_adapter *adapter)
48 {
49 u32 reg_value;
50
51 reg_value = lan743x_csr_read(adapter, OTP_PWR_DN);
52 if (!(reg_value & OTP_PWR_DN_PWRDN_N_)) {
53 /* set power down bit */
54 reg_value |= OTP_PWR_DN_PWRDN_N_;
55 lan743x_csr_write(adapter, OTP_PWR_DN, reg_value);
56 }
57 }
58
lan743x_otp_set_address(struct lan743x_adapter * adapter,u32 address)59 static void lan743x_otp_set_address(struct lan743x_adapter *adapter,
60 u32 address)
61 {
62 lan743x_csr_write(adapter, OTP_ADDR_HIGH, (address >> 8) & 0x03);
63 lan743x_csr_write(adapter, OTP_ADDR_LOW, address & 0xFF);
64 }
65
lan743x_otp_read_go(struct lan743x_adapter * adapter)66 static void lan743x_otp_read_go(struct lan743x_adapter *adapter)
67 {
68 lan743x_csr_write(adapter, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
69 lan743x_csr_write(adapter, OTP_CMD_GO, OTP_CMD_GO_GO_);
70 }
71
lan743x_otp_wait_till_not_busy(struct lan743x_adapter * adapter)72 static int lan743x_otp_wait_till_not_busy(struct lan743x_adapter *adapter)
73 {
74 unsigned long timeout;
75 u32 reg_val;
76
77 timeout = jiffies + HZ;
78 do {
79 if (time_after(jiffies, timeout)) {
80 netif_warn(adapter, drv, adapter->netdev,
81 "Timeout on OTP_STATUS completion\n");
82 return -EIO;
83 }
84 udelay(1);
85 reg_val = lan743x_csr_read(adapter, OTP_STATUS);
86 } while (reg_val & OTP_STATUS_BUSY_);
87
88 return 0;
89 }
90
lan743x_otp_read(struct lan743x_adapter * adapter,u32 offset,u32 length,u8 * data)91 static int lan743x_otp_read(struct lan743x_adapter *adapter, u32 offset,
92 u32 length, u8 *data)
93 {
94 int ret;
95 int i;
96
97 if (offset + length > MAX_OTP_SIZE)
98 return -EINVAL;
99
100 ret = lan743x_otp_power_up(adapter);
101 if (ret < 0)
102 return ret;
103
104 ret = lan743x_otp_wait_till_not_busy(adapter);
105 if (ret < 0)
106 return ret;
107
108 for (i = 0; i < length; i++) {
109 lan743x_otp_set_address(adapter, offset + i);
110
111 lan743x_otp_read_go(adapter);
112 ret = lan743x_otp_wait_till_not_busy(adapter);
113 if (ret < 0)
114 return ret;
115 data[i] = lan743x_csr_read(adapter, OTP_READ_DATA);
116 }
117
118 lan743x_otp_power_down(adapter);
119
120 return 0;
121 }
122
lan743x_otp_write(struct lan743x_adapter * adapter,u32 offset,u32 length,u8 * data)123 static int lan743x_otp_write(struct lan743x_adapter *adapter, u32 offset,
124 u32 length, u8 *data)
125 {
126 int ret;
127 int i;
128
129 if (offset + length > MAX_OTP_SIZE)
130 return -EINVAL;
131
132 ret = lan743x_otp_power_up(adapter);
133 if (ret < 0)
134 return ret;
135
136 ret = lan743x_otp_wait_till_not_busy(adapter);
137 if (ret < 0)
138 return ret;
139
140 /* set to BYTE program mode */
141 lan743x_csr_write(adapter, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_);
142
143 for (i = 0; i < length; i++) {
144 lan743x_otp_set_address(adapter, offset + i);
145
146 lan743x_csr_write(adapter, OTP_PRGM_DATA, data[i]);
147 lan743x_csr_write(adapter, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_);
148 lan743x_csr_write(adapter, OTP_CMD_GO, OTP_CMD_GO_GO_);
149
150 ret = lan743x_otp_wait_till_not_busy(adapter);
151 if (ret < 0)
152 return ret;
153 }
154
155 lan743x_otp_power_down(adapter);
156
157 return 0;
158 }
159
lan743x_hs_syslock_acquire(struct lan743x_adapter * adapter,u16 timeout)160 int lan743x_hs_syslock_acquire(struct lan743x_adapter *adapter,
161 u16 timeout)
162 {
163 u16 timeout_cnt = 0;
164 u32 val;
165
166 do {
167 spin_lock(&adapter->eth_syslock_spinlock);
168 if (adapter->eth_syslock_acquire_cnt == 0) {
169 lan743x_csr_write(adapter, ETH_SYSTEM_SYS_LOCK_REG,
170 SYS_LOCK_REG_ENET_SS_LOCK_);
171 val = lan743x_csr_read(adapter,
172 ETH_SYSTEM_SYS_LOCK_REG);
173 if (val & SYS_LOCK_REG_ENET_SS_LOCK_) {
174 adapter->eth_syslock_acquire_cnt++;
175 WARN_ON(adapter->eth_syslock_acquire_cnt == 0);
176 spin_unlock(&adapter->eth_syslock_spinlock);
177 break;
178 }
179 } else {
180 adapter->eth_syslock_acquire_cnt++;
181 WARN_ON(adapter->eth_syslock_acquire_cnt == 0);
182 spin_unlock(&adapter->eth_syslock_spinlock);
183 break;
184 }
185
186 spin_unlock(&adapter->eth_syslock_spinlock);
187
188 if (timeout_cnt++ < timeout)
189 usleep_range(10000, 11000);
190 else
191 return -ETIMEDOUT;
192 } while (true);
193
194 return 0;
195 }
196
lan743x_hs_syslock_release(struct lan743x_adapter * adapter)197 void lan743x_hs_syslock_release(struct lan743x_adapter *adapter)
198 {
199 u32 val;
200
201 spin_lock(&adapter->eth_syslock_spinlock);
202 WARN_ON(adapter->eth_syslock_acquire_cnt == 0);
203
204 if (adapter->eth_syslock_acquire_cnt) {
205 adapter->eth_syslock_acquire_cnt--;
206 if (adapter->eth_syslock_acquire_cnt == 0) {
207 lan743x_csr_write(adapter, ETH_SYSTEM_SYS_LOCK_REG, 0);
208 val = lan743x_csr_read(adapter,
209 ETH_SYSTEM_SYS_LOCK_REG);
210 WARN_ON((val & SYS_LOCK_REG_ENET_SS_LOCK_) != 0);
211 }
212 }
213
214 spin_unlock(&adapter->eth_syslock_spinlock);
215 }
216
lan743x_hs_otp_power_up(struct lan743x_adapter * adapter)217 static void lan743x_hs_otp_power_up(struct lan743x_adapter *adapter)
218 {
219 u32 reg_value;
220
221 reg_value = lan743x_csr_read(adapter, HS_OTP_PWR_DN);
222 if (reg_value & OTP_PWR_DN_PWRDN_N_) {
223 reg_value &= ~OTP_PWR_DN_PWRDN_N_;
224 lan743x_csr_write(adapter, HS_OTP_PWR_DN, reg_value);
225 /* To flush the posted write so the subsequent delay is
226 * guaranteed to happen after the write at the hardware
227 */
228 lan743x_csr_read(adapter, HS_OTP_PWR_DN);
229 udelay(1);
230 }
231 }
232
lan743x_hs_otp_power_down(struct lan743x_adapter * adapter)233 static void lan743x_hs_otp_power_down(struct lan743x_adapter *adapter)
234 {
235 u32 reg_value;
236
237 reg_value = lan743x_csr_read(adapter, HS_OTP_PWR_DN);
238 if (!(reg_value & OTP_PWR_DN_PWRDN_N_)) {
239 reg_value |= OTP_PWR_DN_PWRDN_N_;
240 lan743x_csr_write(adapter, HS_OTP_PWR_DN, reg_value);
241 /* To flush the posted write so the subsequent delay is
242 * guaranteed to happen after the write at the hardware
243 */
244 lan743x_csr_read(adapter, HS_OTP_PWR_DN);
245 udelay(1);
246 }
247 }
248
lan743x_hs_otp_set_address(struct lan743x_adapter * adapter,u32 address)249 static void lan743x_hs_otp_set_address(struct lan743x_adapter *adapter,
250 u32 address)
251 {
252 lan743x_csr_write(adapter, HS_OTP_ADDR_HIGH, (address >> 8) & 0x03);
253 lan743x_csr_write(adapter, HS_OTP_ADDR_LOW, address & 0xFF);
254 }
255
lan743x_hs_otp_read_go(struct lan743x_adapter * adapter)256 static void lan743x_hs_otp_read_go(struct lan743x_adapter *adapter)
257 {
258 lan743x_csr_write(adapter, HS_OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
259 lan743x_csr_write(adapter, HS_OTP_CMD_GO, OTP_CMD_GO_GO_);
260 }
261
lan743x_hs_otp_cmd_cmplt_chk(struct lan743x_adapter * adapter)262 static int lan743x_hs_otp_cmd_cmplt_chk(struct lan743x_adapter *adapter)
263 {
264 u32 val;
265
266 return readx_poll_timeout(LAN743X_CSR_READ_OP, HS_OTP_STATUS, val,
267 !(val & OTP_STATUS_BUSY_),
268 80, 10000);
269 }
270
lan743x_hs_otp_read(struct lan743x_adapter * adapter,u32 offset,u32 length,u8 * data)271 static int lan743x_hs_otp_read(struct lan743x_adapter *adapter, u32 offset,
272 u32 length, u8 *data)
273 {
274 int ret;
275 int i;
276
277 if (offset + length > MAX_HS_OTP_SIZE)
278 return -EINVAL;
279
280 ret = lan743x_hs_syslock_acquire(adapter, LOCK_TIMEOUT_MAX_CNT);
281 if (ret < 0)
282 return ret;
283
284 lan743x_hs_otp_power_up(adapter);
285
286 ret = lan743x_hs_otp_cmd_cmplt_chk(adapter);
287 if (ret < 0)
288 goto power_down;
289
290 lan743x_hs_syslock_release(adapter);
291
292 for (i = 0; i < length; i++) {
293 ret = lan743x_hs_syslock_acquire(adapter,
294 LOCK_TIMEOUT_MAX_CNT);
295 if (ret < 0)
296 return ret;
297
298 lan743x_hs_otp_set_address(adapter, offset + i);
299
300 lan743x_hs_otp_read_go(adapter);
301 ret = lan743x_hs_otp_cmd_cmplt_chk(adapter);
302 if (ret < 0)
303 goto power_down;
304
305 data[i] = lan743x_csr_read(adapter, HS_OTP_READ_DATA);
306
307 lan743x_hs_syslock_release(adapter);
308 }
309
310 ret = lan743x_hs_syslock_acquire(adapter,
311 LOCK_TIMEOUT_MAX_CNT);
312 if (ret < 0)
313 return ret;
314
315 power_down:
316 lan743x_hs_otp_power_down(adapter);
317 lan743x_hs_syslock_release(adapter);
318
319 return ret;
320 }
321
lan743x_hs_otp_write(struct lan743x_adapter * adapter,u32 offset,u32 length,u8 * data)322 static int lan743x_hs_otp_write(struct lan743x_adapter *adapter, u32 offset,
323 u32 length, u8 *data)
324 {
325 int ret;
326 int i;
327
328 if (offset + length > MAX_HS_OTP_SIZE)
329 return -EINVAL;
330
331 ret = lan743x_hs_syslock_acquire(adapter, LOCK_TIMEOUT_MAX_CNT);
332 if (ret < 0)
333 return ret;
334
335 lan743x_hs_otp_power_up(adapter);
336
337 ret = lan743x_hs_otp_cmd_cmplt_chk(adapter);
338 if (ret < 0)
339 goto power_down;
340
341 /* set to BYTE program mode */
342 lan743x_csr_write(adapter, HS_OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_);
343
344 lan743x_hs_syslock_release(adapter);
345
346 for (i = 0; i < length; i++) {
347 ret = lan743x_hs_syslock_acquire(adapter,
348 LOCK_TIMEOUT_MAX_CNT);
349 if (ret < 0)
350 return ret;
351
352 lan743x_hs_otp_set_address(adapter, offset + i);
353
354 lan743x_csr_write(adapter, HS_OTP_PRGM_DATA, data[i]);
355 lan743x_csr_write(adapter, HS_OTP_TST_CMD,
356 OTP_TST_CMD_PRGVRFY_);
357 lan743x_csr_write(adapter, HS_OTP_CMD_GO, OTP_CMD_GO_GO_);
358
359 ret = lan743x_hs_otp_cmd_cmplt_chk(adapter);
360 if (ret < 0)
361 goto power_down;
362
363 lan743x_hs_syslock_release(adapter);
364 }
365
366 ret = lan743x_hs_syslock_acquire(adapter, LOCK_TIMEOUT_MAX_CNT);
367 if (ret < 0)
368 return ret;
369
370 power_down:
371 lan743x_hs_otp_power_down(adapter);
372 lan743x_hs_syslock_release(adapter);
373
374 return ret;
375 }
376
lan743x_eeprom_wait(struct lan743x_adapter * adapter)377 static int lan743x_eeprom_wait(struct lan743x_adapter *adapter)
378 {
379 unsigned long start_time = jiffies;
380 u32 val;
381
382 do {
383 val = lan743x_csr_read(adapter, E2P_CMD);
384
385 if (!(val & E2P_CMD_EPC_BUSY_) ||
386 (val & E2P_CMD_EPC_TIMEOUT_))
387 break;
388 usleep_range(40, 100);
389 } while (!time_after(jiffies, start_time + HZ));
390
391 if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) {
392 netif_warn(adapter, drv, adapter->netdev,
393 "EEPROM read operation timeout\n");
394 return -EIO;
395 }
396
397 return 0;
398 }
399
lan743x_eeprom_confirm_not_busy(struct lan743x_adapter * adapter)400 static int lan743x_eeprom_confirm_not_busy(struct lan743x_adapter *adapter)
401 {
402 unsigned long start_time = jiffies;
403 u32 val;
404
405 do {
406 val = lan743x_csr_read(adapter, E2P_CMD);
407
408 if (!(val & E2P_CMD_EPC_BUSY_))
409 return 0;
410
411 usleep_range(40, 100);
412 } while (!time_after(jiffies, start_time + HZ));
413
414 netif_warn(adapter, drv, adapter->netdev, "EEPROM is busy\n");
415 return -EIO;
416 }
417
lan743x_eeprom_read(struct lan743x_adapter * adapter,u32 offset,u32 length,u8 * data)418 static int lan743x_eeprom_read(struct lan743x_adapter *adapter,
419 u32 offset, u32 length, u8 *data)
420 {
421 int retval;
422 u32 val;
423 int i;
424
425 if (offset + length > MAX_EEPROM_SIZE)
426 return -EINVAL;
427
428 retval = lan743x_eeprom_confirm_not_busy(adapter);
429 if (retval)
430 return retval;
431
432 for (i = 0; i < length; i++) {
433 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_;
434 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
435 lan743x_csr_write(adapter, E2P_CMD, val);
436
437 retval = lan743x_eeprom_wait(adapter);
438 if (retval < 0)
439 return retval;
440
441 val = lan743x_csr_read(adapter, E2P_DATA);
442 data[i] = val & 0xFF;
443 offset++;
444 }
445
446 return 0;
447 }
448
lan743x_eeprom_write(struct lan743x_adapter * adapter,u32 offset,u32 length,u8 * data)449 static int lan743x_eeprom_write(struct lan743x_adapter *adapter,
450 u32 offset, u32 length, u8 *data)
451 {
452 int retval;
453 u32 val;
454 int i;
455
456 if (offset + length > MAX_EEPROM_SIZE)
457 return -EINVAL;
458
459 retval = lan743x_eeprom_confirm_not_busy(adapter);
460 if (retval)
461 return retval;
462
463 /* Issue write/erase enable command */
464 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_;
465 lan743x_csr_write(adapter, E2P_CMD, val);
466
467 retval = lan743x_eeprom_wait(adapter);
468 if (retval < 0)
469 return retval;
470
471 for (i = 0; i < length; i++) {
472 /* Fill data register */
473 val = data[i];
474 lan743x_csr_write(adapter, E2P_DATA, val);
475
476 /* Send "write" command */
477 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_;
478 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
479 lan743x_csr_write(adapter, E2P_CMD, val);
480
481 retval = lan743x_eeprom_wait(adapter);
482 if (retval < 0)
483 return retval;
484
485 offset++;
486 }
487
488 return 0;
489 }
490
lan743x_hs_eeprom_cmd_cmplt_chk(struct lan743x_adapter * adapter)491 static int lan743x_hs_eeprom_cmd_cmplt_chk(struct lan743x_adapter *adapter)
492 {
493 u32 val;
494
495 return readx_poll_timeout(LAN743X_CSR_READ_OP, HS_E2P_CMD, val,
496 (!(val & HS_E2P_CMD_EPC_BUSY_) ||
497 (val & HS_E2P_CMD_EPC_TIMEOUT_)),
498 50, 10000);
499 }
500
lan743x_hs_eeprom_read(struct lan743x_adapter * adapter,u32 offset,u32 length,u8 * data)501 static int lan743x_hs_eeprom_read(struct lan743x_adapter *adapter,
502 u32 offset, u32 length, u8 *data)
503 {
504 int retval;
505 u32 val;
506 int i;
507
508 if (offset + length > MAX_HS_EEPROM_SIZE)
509 return -EINVAL;
510
511 retval = lan743x_hs_syslock_acquire(adapter, LOCK_TIMEOUT_MAX_CNT);
512 if (retval < 0)
513 return retval;
514
515 retval = lan743x_hs_eeprom_cmd_cmplt_chk(adapter);
516 lan743x_hs_syslock_release(adapter);
517 if (retval < 0)
518 return retval;
519
520 for (i = 0; i < length; i++) {
521 retval = lan743x_hs_syslock_acquire(adapter,
522 LOCK_TIMEOUT_MAX_CNT);
523 if (retval < 0)
524 return retval;
525
526 val = HS_E2P_CMD_EPC_BUSY_ | HS_E2P_CMD_EPC_CMD_READ_;
527 val |= (offset & HS_E2P_CMD_EPC_ADDR_MASK_);
528 lan743x_csr_write(adapter, HS_E2P_CMD, val);
529 retval = lan743x_hs_eeprom_cmd_cmplt_chk(adapter);
530 if (retval < 0) {
531 lan743x_hs_syslock_release(adapter);
532 return retval;
533 }
534
535 val = lan743x_csr_read(adapter, HS_E2P_DATA);
536
537 lan743x_hs_syslock_release(adapter);
538
539 data[i] = val & 0xFF;
540 offset++;
541 }
542
543 return 0;
544 }
545
lan743x_hs_eeprom_write(struct lan743x_adapter * adapter,u32 offset,u32 length,u8 * data)546 static int lan743x_hs_eeprom_write(struct lan743x_adapter *adapter,
547 u32 offset, u32 length, u8 *data)
548 {
549 int retval;
550 u32 val;
551 int i;
552
553 if (offset + length > MAX_HS_EEPROM_SIZE)
554 return -EINVAL;
555
556 retval = lan743x_hs_syslock_acquire(adapter, LOCK_TIMEOUT_MAX_CNT);
557 if (retval < 0)
558 return retval;
559
560 retval = lan743x_hs_eeprom_cmd_cmplt_chk(adapter);
561 lan743x_hs_syslock_release(adapter);
562 if (retval < 0)
563 return retval;
564
565 for (i = 0; i < length; i++) {
566 retval = lan743x_hs_syslock_acquire(adapter,
567 LOCK_TIMEOUT_MAX_CNT);
568 if (retval < 0)
569 return retval;
570
571 /* Fill data register */
572 val = data[i];
573 lan743x_csr_write(adapter, HS_E2P_DATA, val);
574
575 /* Send "write" command */
576 val = HS_E2P_CMD_EPC_BUSY_ | HS_E2P_CMD_EPC_CMD_WRITE_;
577 val |= (offset & HS_E2P_CMD_EPC_ADDR_MASK_);
578 lan743x_csr_write(adapter, HS_E2P_CMD, val);
579
580 retval = lan743x_hs_eeprom_cmd_cmplt_chk(adapter);
581 lan743x_hs_syslock_release(adapter);
582 if (retval < 0)
583 return retval;
584
585 offset++;
586 }
587
588 return 0;
589 }
590
lan743x_ethtool_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * info)591 static void lan743x_ethtool_get_drvinfo(struct net_device *netdev,
592 struct ethtool_drvinfo *info)
593 {
594 struct lan743x_adapter *adapter = netdev_priv(netdev);
595
596 strscpy(info->driver, DRIVER_NAME, sizeof(info->driver));
597 strscpy(info->bus_info,
598 pci_name(adapter->pdev), sizeof(info->bus_info));
599 }
600
lan743x_ethtool_get_msglevel(struct net_device * netdev)601 static u32 lan743x_ethtool_get_msglevel(struct net_device *netdev)
602 {
603 struct lan743x_adapter *adapter = netdev_priv(netdev);
604
605 return adapter->msg_enable;
606 }
607
lan743x_ethtool_set_msglevel(struct net_device * netdev,u32 msglevel)608 static void lan743x_ethtool_set_msglevel(struct net_device *netdev,
609 u32 msglevel)
610 {
611 struct lan743x_adapter *adapter = netdev_priv(netdev);
612
613 adapter->msg_enable = msglevel;
614 }
615
lan743x_ethtool_get_eeprom_len(struct net_device * netdev)616 static int lan743x_ethtool_get_eeprom_len(struct net_device *netdev)
617 {
618 struct lan743x_adapter *adapter = netdev_priv(netdev);
619
620 if (adapter->flags & LAN743X_ADAPTER_FLAG_OTP)
621 return adapter->is_pci11x1x ? MAX_HS_OTP_SIZE : MAX_OTP_SIZE;
622
623 return adapter->is_pci11x1x ? MAX_HS_EEPROM_SIZE : MAX_EEPROM_SIZE;
624 }
625
lan743x_ethtool_get_eeprom(struct net_device * netdev,struct ethtool_eeprom * ee,u8 * data)626 static int lan743x_ethtool_get_eeprom(struct net_device *netdev,
627 struct ethtool_eeprom *ee, u8 *data)
628 {
629 struct lan743x_adapter *adapter = netdev_priv(netdev);
630 int ret = 0;
631
632 if (adapter->flags & LAN743X_ADAPTER_FLAG_OTP) {
633 if (adapter->is_pci11x1x)
634 ret = lan743x_hs_otp_read(adapter, ee->offset,
635 ee->len, data);
636 else
637 ret = lan743x_otp_read(adapter, ee->offset,
638 ee->len, data);
639 } else {
640 if (adapter->is_pci11x1x)
641 ret = lan743x_hs_eeprom_read(adapter, ee->offset,
642 ee->len, data);
643 else
644 ret = lan743x_eeprom_read(adapter, ee->offset,
645 ee->len, data);
646 }
647
648 return ret;
649 }
650
lan743x_ethtool_set_eeprom(struct net_device * netdev,struct ethtool_eeprom * ee,u8 * data)651 static int lan743x_ethtool_set_eeprom(struct net_device *netdev,
652 struct ethtool_eeprom *ee, u8 *data)
653 {
654 struct lan743x_adapter *adapter = netdev_priv(netdev);
655 int ret = -EINVAL;
656
657 if (adapter->flags & LAN743X_ADAPTER_FLAG_OTP) {
658 /* Beware! OTP is One Time Programming ONLY! */
659 if (ee->magic == LAN743X_OTP_MAGIC) {
660 if (adapter->is_pci11x1x)
661 ret = lan743x_hs_otp_write(adapter, ee->offset,
662 ee->len, data);
663 else
664 ret = lan743x_otp_write(adapter, ee->offset,
665 ee->len, data);
666 }
667 } else {
668 if (ee->magic == LAN743X_EEPROM_MAGIC) {
669 if (adapter->is_pci11x1x)
670 ret = lan743x_hs_eeprom_write(adapter,
671 ee->offset,
672 ee->len, data);
673 else
674 ret = lan743x_eeprom_write(adapter, ee->offset,
675 ee->len, data);
676 }
677 }
678
679 return ret;
680 }
681
682 static const char lan743x_set0_hw_cnt_strings[][ETH_GSTRING_LEN] = {
683 "RX FCS Errors",
684 "RX Alignment Errors",
685 "Rx Fragment Errors",
686 "RX Jabber Errors",
687 "RX Undersize Frame Errors",
688 "RX Oversize Frame Errors",
689 "RX Dropped Frames",
690 "RX Unicast Byte Count",
691 "RX Broadcast Byte Count",
692 "RX Multicast Byte Count",
693 "RX Unicast Frames",
694 "RX Broadcast Frames",
695 "RX Multicast Frames",
696 "RX Pause Frames",
697 "RX 64 Byte Frames",
698 "RX 65 - 127 Byte Frames",
699 "RX 128 - 255 Byte Frames",
700 "RX 256 - 511 Bytes Frames",
701 "RX 512 - 1023 Byte Frames",
702 "RX 1024 - 1518 Byte Frames",
703 "RX Greater 1518 Byte Frames",
704 };
705
706 static const char lan743x_set1_sw_cnt_strings[][ETH_GSTRING_LEN] = {
707 "RX Queue 0 Frames",
708 "RX Queue 1 Frames",
709 "RX Queue 2 Frames",
710 "RX Queue 3 Frames",
711 };
712
713 static const char lan743x_tx_queue_cnt_strings[][ETH_GSTRING_LEN] = {
714 "TX Queue 0 Frames",
715 "TX Queue 1 Frames",
716 "TX Queue 2 Frames",
717 "TX Queue 3 Frames",
718 "TX Total Queue Frames",
719 };
720
721 static const char lan743x_set2_hw_cnt_strings[][ETH_GSTRING_LEN] = {
722 "RX Total Frames",
723 "EEE RX LPI Transitions",
724 "EEE RX LPI Time",
725 "RX Counter Rollover Status",
726 "TX FCS Errors",
727 "TX Excess Deferral Errors",
728 "TX Carrier Errors",
729 "TX Bad Byte Count",
730 "TX Single Collisions",
731 "TX Multiple Collisions",
732 "TX Excessive Collision",
733 "TX Late Collisions",
734 "TX Unicast Byte Count",
735 "TX Broadcast Byte Count",
736 "TX Multicast Byte Count",
737 "TX Unicast Frames",
738 "TX Broadcast Frames",
739 "TX Multicast Frames",
740 "TX Pause Frames",
741 "TX 64 Byte Frames",
742 "TX 65 - 127 Byte Frames",
743 "TX 128 - 255 Byte Frames",
744 "TX 256 - 511 Bytes Frames",
745 "TX 512 - 1023 Byte Frames",
746 "TX 1024 - 1518 Byte Frames",
747 "TX Greater 1518 Byte Frames",
748 "TX Total Frames",
749 "EEE TX LPI Transitions",
750 "EEE TX LPI Time",
751 "TX Counter Rollover Status",
752 };
753
754 static const u32 lan743x_set0_hw_cnt_addr[] = {
755 STAT_RX_FCS_ERRORS,
756 STAT_RX_ALIGNMENT_ERRORS,
757 STAT_RX_FRAGMENT_ERRORS,
758 STAT_RX_JABBER_ERRORS,
759 STAT_RX_UNDERSIZE_FRAME_ERRORS,
760 STAT_RX_OVERSIZE_FRAME_ERRORS,
761 STAT_RX_DROPPED_FRAMES,
762 STAT_RX_UNICAST_BYTE_COUNT,
763 STAT_RX_BROADCAST_BYTE_COUNT,
764 STAT_RX_MULTICAST_BYTE_COUNT,
765 STAT_RX_UNICAST_FRAMES,
766 STAT_RX_BROADCAST_FRAMES,
767 STAT_RX_MULTICAST_FRAMES,
768 STAT_RX_PAUSE_FRAMES,
769 STAT_RX_64_BYTE_FRAMES,
770 STAT_RX_65_127_BYTE_FRAMES,
771 STAT_RX_128_255_BYTE_FRAMES,
772 STAT_RX_256_511_BYTES_FRAMES,
773 STAT_RX_512_1023_BYTE_FRAMES,
774 STAT_RX_1024_1518_BYTE_FRAMES,
775 STAT_RX_GREATER_1518_BYTE_FRAMES,
776 };
777
778 static const u32 lan743x_set2_hw_cnt_addr[] = {
779 STAT_RX_TOTAL_FRAMES,
780 STAT_EEE_RX_LPI_TRANSITIONS,
781 STAT_EEE_RX_LPI_TIME,
782 STAT_RX_COUNTER_ROLLOVER_STATUS,
783 STAT_TX_FCS_ERRORS,
784 STAT_TX_EXCESS_DEFERRAL_ERRORS,
785 STAT_TX_CARRIER_ERRORS,
786 STAT_TX_BAD_BYTE_COUNT,
787 STAT_TX_SINGLE_COLLISIONS,
788 STAT_TX_MULTIPLE_COLLISIONS,
789 STAT_TX_EXCESSIVE_COLLISION,
790 STAT_TX_LATE_COLLISIONS,
791 STAT_TX_UNICAST_BYTE_COUNT,
792 STAT_TX_BROADCAST_BYTE_COUNT,
793 STAT_TX_MULTICAST_BYTE_COUNT,
794 STAT_TX_UNICAST_FRAMES,
795 STAT_TX_BROADCAST_FRAMES,
796 STAT_TX_MULTICAST_FRAMES,
797 STAT_TX_PAUSE_FRAMES,
798 STAT_TX_64_BYTE_FRAMES,
799 STAT_TX_65_127_BYTE_FRAMES,
800 STAT_TX_128_255_BYTE_FRAMES,
801 STAT_TX_256_511_BYTES_FRAMES,
802 STAT_TX_512_1023_BYTE_FRAMES,
803 STAT_TX_1024_1518_BYTE_FRAMES,
804 STAT_TX_GREATER_1518_BYTE_FRAMES,
805 STAT_TX_TOTAL_FRAMES,
806 STAT_EEE_TX_LPI_TRANSITIONS,
807 STAT_EEE_TX_LPI_TIME,
808 STAT_TX_COUNTER_ROLLOVER_STATUS
809 };
810
811 static const char lan743x_priv_flags_strings[][ETH_GSTRING_LEN] = {
812 "OTP_ACCESS",
813 };
814
lan743x_ethtool_get_strings(struct net_device * netdev,u32 stringset,u8 * data)815 static void lan743x_ethtool_get_strings(struct net_device *netdev,
816 u32 stringset, u8 *data)
817 {
818 struct lan743x_adapter *adapter = netdev_priv(netdev);
819
820 switch (stringset) {
821 case ETH_SS_STATS:
822 memcpy(data, lan743x_set0_hw_cnt_strings,
823 sizeof(lan743x_set0_hw_cnt_strings));
824 memcpy(&data[sizeof(lan743x_set0_hw_cnt_strings)],
825 lan743x_set1_sw_cnt_strings,
826 sizeof(lan743x_set1_sw_cnt_strings));
827 memcpy(&data[sizeof(lan743x_set0_hw_cnt_strings) +
828 sizeof(lan743x_set1_sw_cnt_strings)],
829 lan743x_set2_hw_cnt_strings,
830 sizeof(lan743x_set2_hw_cnt_strings));
831 if (adapter->is_pci11x1x) {
832 memcpy(&data[sizeof(lan743x_set0_hw_cnt_strings) +
833 sizeof(lan743x_set1_sw_cnt_strings) +
834 sizeof(lan743x_set2_hw_cnt_strings)],
835 lan743x_tx_queue_cnt_strings,
836 sizeof(lan743x_tx_queue_cnt_strings));
837 }
838 break;
839 case ETH_SS_PRIV_FLAGS:
840 memcpy(data, lan743x_priv_flags_strings,
841 sizeof(lan743x_priv_flags_strings));
842 break;
843 }
844 }
845
lan743x_ethtool_get_ethtool_stats(struct net_device * netdev,struct ethtool_stats * stats,u64 * data)846 static void lan743x_ethtool_get_ethtool_stats(struct net_device *netdev,
847 struct ethtool_stats *stats,
848 u64 *data)
849 {
850 struct lan743x_adapter *adapter = netdev_priv(netdev);
851 u64 total_queue_count = 0;
852 int data_index = 0;
853 u64 pkt_cnt;
854 u32 buf;
855 int i;
856
857 for (i = 0; i < ARRAY_SIZE(lan743x_set0_hw_cnt_addr); i++) {
858 buf = lan743x_csr_read(adapter, lan743x_set0_hw_cnt_addr[i]);
859 data[data_index++] = (u64)buf;
860 }
861 for (i = 0; i < ARRAY_SIZE(adapter->rx); i++)
862 data[data_index++] = (u64)(adapter->rx[i].frame_count);
863 for (i = 0; i < ARRAY_SIZE(lan743x_set2_hw_cnt_addr); i++) {
864 buf = lan743x_csr_read(adapter, lan743x_set2_hw_cnt_addr[i]);
865 data[data_index++] = (u64)buf;
866 }
867 if (adapter->is_pci11x1x) {
868 for (i = 0; i < ARRAY_SIZE(adapter->tx); i++) {
869 pkt_cnt = (u64)(adapter->tx[i].frame_count);
870 data[data_index++] = pkt_cnt;
871 total_queue_count += pkt_cnt;
872 }
873 data[data_index++] = total_queue_count;
874 }
875 }
876
lan743x_ethtool_get_priv_flags(struct net_device * netdev)877 static u32 lan743x_ethtool_get_priv_flags(struct net_device *netdev)
878 {
879 struct lan743x_adapter *adapter = netdev_priv(netdev);
880
881 return adapter->flags;
882 }
883
lan743x_ethtool_set_priv_flags(struct net_device * netdev,u32 flags)884 static int lan743x_ethtool_set_priv_flags(struct net_device *netdev, u32 flags)
885 {
886 struct lan743x_adapter *adapter = netdev_priv(netdev);
887
888 adapter->flags = flags;
889
890 return 0;
891 }
892
lan743x_ethtool_get_sset_count(struct net_device * netdev,int sset)893 static int lan743x_ethtool_get_sset_count(struct net_device *netdev, int sset)
894 {
895 struct lan743x_adapter *adapter = netdev_priv(netdev);
896
897 switch (sset) {
898 case ETH_SS_STATS:
899 {
900 int ret;
901
902 ret = ARRAY_SIZE(lan743x_set0_hw_cnt_strings);
903 ret += ARRAY_SIZE(lan743x_set1_sw_cnt_strings);
904 ret += ARRAY_SIZE(lan743x_set2_hw_cnt_strings);
905 if (adapter->is_pci11x1x)
906 ret += ARRAY_SIZE(lan743x_tx_queue_cnt_strings);
907 return ret;
908 }
909 case ETH_SS_PRIV_FLAGS:
910 return ARRAY_SIZE(lan743x_priv_flags_strings);
911 default:
912 return -EOPNOTSUPP;
913 }
914 }
915
lan743x_ethtool_get_rxfh_fields(struct net_device * netdev,struct ethtool_rxfh_fields * fields)916 static int lan743x_ethtool_get_rxfh_fields(struct net_device *netdev,
917 struct ethtool_rxfh_fields *fields)
918 {
919 fields->data = 0;
920
921 switch (fields->flow_type) {
922 case TCP_V4_FLOW:case UDP_V4_FLOW:
923 case TCP_V6_FLOW:case UDP_V6_FLOW:
924 fields->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
925 fallthrough;
926 case IPV4_FLOW: case IPV6_FLOW:
927 fields->data |= RXH_IP_SRC | RXH_IP_DST;
928 return 0;
929 }
930
931 return 0;
932 }
933
lan743x_ethtool_get_rxnfc(struct net_device * netdev,struct ethtool_rxnfc * rxnfc,u32 * rule_locs)934 static int lan743x_ethtool_get_rxnfc(struct net_device *netdev,
935 struct ethtool_rxnfc *rxnfc,
936 u32 *rule_locs)
937 {
938 switch (rxnfc->cmd) {
939 case ETHTOOL_GRXRINGS:
940 rxnfc->data = LAN743X_USED_RX_CHANNELS;
941 return 0;
942 }
943 return -EOPNOTSUPP;
944 }
945
lan743x_ethtool_get_rxfh_key_size(struct net_device * netdev)946 static u32 lan743x_ethtool_get_rxfh_key_size(struct net_device *netdev)
947 {
948 return 40;
949 }
950
lan743x_ethtool_get_rxfh_indir_size(struct net_device * netdev)951 static u32 lan743x_ethtool_get_rxfh_indir_size(struct net_device *netdev)
952 {
953 return 128;
954 }
955
lan743x_ethtool_get_rxfh(struct net_device * netdev,struct ethtool_rxfh_param * rxfh)956 static int lan743x_ethtool_get_rxfh(struct net_device *netdev,
957 struct ethtool_rxfh_param *rxfh)
958 {
959 struct lan743x_adapter *adapter = netdev_priv(netdev);
960
961 if (rxfh->indir) {
962 int dw_index;
963 int byte_index = 0;
964
965 for (dw_index = 0; dw_index < 32; dw_index++) {
966 u32 four_entries =
967 lan743x_csr_read(adapter, RFE_INDX(dw_index));
968
969 byte_index = dw_index << 2;
970 rxfh->indir[byte_index + 0] =
971 ((four_entries >> 0) & 0x000000FF);
972 rxfh->indir[byte_index + 1] =
973 ((four_entries >> 8) & 0x000000FF);
974 rxfh->indir[byte_index + 2] =
975 ((four_entries >> 16) & 0x000000FF);
976 rxfh->indir[byte_index + 3] =
977 ((four_entries >> 24) & 0x000000FF);
978 }
979 }
980 if (rxfh->key) {
981 int dword_index;
982 int byte_index = 0;
983
984 for (dword_index = 0; dword_index < 10; dword_index++) {
985 u32 four_entries =
986 lan743x_csr_read(adapter,
987 RFE_HASH_KEY(dword_index));
988
989 byte_index = dword_index << 2;
990 rxfh->key[byte_index + 0] =
991 ((four_entries >> 0) & 0x000000FF);
992 rxfh->key[byte_index + 1] =
993 ((four_entries >> 8) & 0x000000FF);
994 rxfh->key[byte_index + 2] =
995 ((four_entries >> 16) & 0x000000FF);
996 rxfh->key[byte_index + 3] =
997 ((four_entries >> 24) & 0x000000FF);
998 }
999 }
1000 rxfh->hfunc = ETH_RSS_HASH_TOP;
1001 return 0;
1002 }
1003
lan743x_ethtool_set_rxfh(struct net_device * netdev,struct ethtool_rxfh_param * rxfh,struct netlink_ext_ack * extack)1004 static int lan743x_ethtool_set_rxfh(struct net_device *netdev,
1005 struct ethtool_rxfh_param *rxfh,
1006 struct netlink_ext_ack *extack)
1007 {
1008 struct lan743x_adapter *adapter = netdev_priv(netdev);
1009 u32 *indir = rxfh->indir;
1010 u8 *key = rxfh->key;
1011
1012 if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE &&
1013 rxfh->hfunc != ETH_RSS_HASH_TOP)
1014 return -EOPNOTSUPP;
1015
1016 if (indir) {
1017 u32 indir_value = 0;
1018 int dword_index = 0;
1019 int byte_index = 0;
1020
1021 for (dword_index = 0; dword_index < 32; dword_index++) {
1022 byte_index = dword_index << 2;
1023 indir_value =
1024 (((indir[byte_index + 0] & 0x000000FF) << 0) |
1025 ((indir[byte_index + 1] & 0x000000FF) << 8) |
1026 ((indir[byte_index + 2] & 0x000000FF) << 16) |
1027 ((indir[byte_index + 3] & 0x000000FF) << 24));
1028 lan743x_csr_write(adapter, RFE_INDX(dword_index),
1029 indir_value);
1030 }
1031 }
1032 if (key) {
1033 int dword_index = 0;
1034 int byte_index = 0;
1035 u32 key_value = 0;
1036
1037 for (dword_index = 0; dword_index < 10; dword_index++) {
1038 byte_index = dword_index << 2;
1039 key_value =
1040 ((((u32)(key[byte_index + 0])) << 0) |
1041 (((u32)(key[byte_index + 1])) << 8) |
1042 (((u32)(key[byte_index + 2])) << 16) |
1043 (((u32)(key[byte_index + 3])) << 24));
1044 lan743x_csr_write(adapter, RFE_HASH_KEY(dword_index),
1045 key_value);
1046 }
1047 }
1048 return 0;
1049 }
1050
lan743x_ethtool_get_ts_info(struct net_device * netdev,struct kernel_ethtool_ts_info * ts_info)1051 static int lan743x_ethtool_get_ts_info(struct net_device *netdev,
1052 struct kernel_ethtool_ts_info *ts_info)
1053 {
1054 struct lan743x_adapter *adapter = netdev_priv(netdev);
1055
1056 ts_info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
1057 SOF_TIMESTAMPING_TX_HARDWARE |
1058 SOF_TIMESTAMPING_RX_HARDWARE |
1059 SOF_TIMESTAMPING_RAW_HARDWARE;
1060
1061 if (adapter->ptp.ptp_clock)
1062 ts_info->phc_index = ptp_clock_index(adapter->ptp.ptp_clock);
1063
1064 ts_info->tx_types = BIT(HWTSTAMP_TX_OFF) |
1065 BIT(HWTSTAMP_TX_ON) |
1066 BIT(HWTSTAMP_TX_ONESTEP_SYNC);
1067 ts_info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1068 BIT(HWTSTAMP_FILTER_ALL) |
1069 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
1070 return 0;
1071 }
1072
lan743x_ethtool_get_eee(struct net_device * netdev,struct ethtool_keee * eee)1073 static int lan743x_ethtool_get_eee(struct net_device *netdev,
1074 struct ethtool_keee *eee)
1075 {
1076 struct lan743x_adapter *adapter = netdev_priv(netdev);
1077
1078 return phylink_ethtool_get_eee(adapter->phylink, eee);
1079 }
1080
lan743x_ethtool_set_eee(struct net_device * netdev,struct ethtool_keee * eee)1081 static int lan743x_ethtool_set_eee(struct net_device *netdev,
1082 struct ethtool_keee *eee)
1083 {
1084 struct lan743x_adapter *adapter = netdev_priv(netdev);
1085
1086 return phylink_ethtool_set_eee(adapter->phylink, eee);
1087 }
1088
1089 static int
lan743x_ethtool_set_link_ksettings(struct net_device * netdev,const struct ethtool_link_ksettings * cmd)1090 lan743x_ethtool_set_link_ksettings(struct net_device *netdev,
1091 const struct ethtool_link_ksettings *cmd)
1092 {
1093 struct lan743x_adapter *adapter = netdev_priv(netdev);
1094
1095 return phylink_ethtool_ksettings_set(adapter->phylink, cmd);
1096 }
1097
1098 static int
lan743x_ethtool_get_link_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * cmd)1099 lan743x_ethtool_get_link_ksettings(struct net_device *netdev,
1100 struct ethtool_link_ksettings *cmd)
1101 {
1102 struct lan743x_adapter *adapter = netdev_priv(netdev);
1103
1104 return phylink_ethtool_ksettings_get(adapter->phylink, cmd);
1105 }
1106
1107 #ifdef CONFIG_PM
lan743x_ethtool_get_wol(struct net_device * netdev,struct ethtool_wolinfo * wol)1108 static void lan743x_ethtool_get_wol(struct net_device *netdev,
1109 struct ethtool_wolinfo *wol)
1110 {
1111 struct lan743x_adapter *adapter = netdev_priv(netdev);
1112
1113 wol->supported = 0;
1114 wol->wolopts = 0;
1115
1116 phylink_ethtool_get_wol(adapter->phylink, wol);
1117
1118 if (wol->supported != adapter->phy_wol_supported)
1119 netif_warn(adapter, drv, adapter->netdev,
1120 "PHY changed its supported WOL! old=%x, new=%x\n",
1121 adapter->phy_wol_supported, wol->supported);
1122
1123 wol->supported |= MAC_SUPPORTED_WAKES;
1124
1125 if (adapter->is_pci11x1x)
1126 wol->supported |= WAKE_MAGICSECURE;
1127
1128 wol->wolopts |= adapter->wolopts;
1129 if (adapter->wolopts & WAKE_MAGICSECURE)
1130 memcpy(wol->sopass, adapter->sopass, sizeof(wol->sopass));
1131 }
1132
lan743x_ethtool_set_wol(struct net_device * netdev,struct ethtool_wolinfo * wol)1133 static int lan743x_ethtool_set_wol(struct net_device *netdev,
1134 struct ethtool_wolinfo *wol)
1135 {
1136 struct lan743x_adapter *adapter = netdev_priv(netdev);
1137
1138 /* WAKE_MAGICSEGURE is a modifier of and only valid together with
1139 * WAKE_MAGIC
1140 */
1141 if ((wol->wolopts & WAKE_MAGICSECURE) && !(wol->wolopts & WAKE_MAGIC))
1142 return -EINVAL;
1143
1144 if (netdev->phydev) {
1145 struct ethtool_wolinfo phy_wol;
1146 int ret;
1147
1148 phy_wol.wolopts = wol->wolopts & adapter->phy_wol_supported;
1149
1150 /* If WAKE_MAGICSECURE was requested, filter out WAKE_MAGIC
1151 * for PHYs that do not support WAKE_MAGICSECURE
1152 */
1153 if (wol->wolopts & WAKE_MAGICSECURE &&
1154 !(adapter->phy_wol_supported & WAKE_MAGICSECURE))
1155 phy_wol.wolopts &= ~WAKE_MAGIC;
1156
1157 ret = phylink_ethtool_set_wol(adapter->phylink, wol);
1158 if (ret && (ret != -EOPNOTSUPP))
1159 return ret;
1160
1161 if (ret == -EOPNOTSUPP)
1162 adapter->phy_wolopts = 0;
1163 else
1164 adapter->phy_wolopts = phy_wol.wolopts;
1165 } else {
1166 adapter->phy_wolopts = 0;
1167 }
1168
1169 adapter->wolopts = 0;
1170 wol->wolopts &= ~adapter->phy_wolopts;
1171 if (wol->wolopts & WAKE_UCAST)
1172 adapter->wolopts |= WAKE_UCAST;
1173 if (wol->wolopts & WAKE_MCAST)
1174 adapter->wolopts |= WAKE_MCAST;
1175 if (wol->wolopts & WAKE_BCAST)
1176 adapter->wolopts |= WAKE_BCAST;
1177 if (wol->wolopts & WAKE_MAGIC)
1178 adapter->wolopts |= WAKE_MAGIC;
1179 if (wol->wolopts & WAKE_PHY)
1180 adapter->wolopts |= WAKE_PHY;
1181 if (wol->wolopts & WAKE_ARP)
1182 adapter->wolopts |= WAKE_ARP;
1183 if (wol->wolopts & WAKE_MAGICSECURE &&
1184 wol->wolopts & WAKE_MAGIC) {
1185 memcpy(adapter->sopass, wol->sopass, sizeof(wol->sopass));
1186 adapter->wolopts |= WAKE_MAGICSECURE;
1187 } else {
1188 memset(adapter->sopass, 0, sizeof(u8) * SOPASS_MAX);
1189 }
1190
1191 wol->wolopts = adapter->wolopts | adapter->phy_wolopts;
1192 device_set_wakeup_enable(&adapter->pdev->dev, (bool)wol->wolopts);
1193
1194 return 0;
1195 }
1196 #endif /* CONFIG_PM */
1197
lan743x_common_regs(struct net_device * dev,void * p)1198 static void lan743x_common_regs(struct net_device *dev, void *p)
1199 {
1200 struct lan743x_adapter *adapter = netdev_priv(dev);
1201 u32 *rb = p;
1202
1203 memset(p, 0, (MAX_LAN743X_ETH_COMMON_REGS * sizeof(u32)));
1204
1205 rb[ETH_PRIV_FLAGS] = adapter->flags;
1206 rb[ETH_ID_REV] = lan743x_csr_read(adapter, ID_REV);
1207 rb[ETH_FPGA_REV] = lan743x_csr_read(adapter, FPGA_REV);
1208 rb[ETH_STRAP_READ] = lan743x_csr_read(adapter, STRAP_READ);
1209 rb[ETH_INT_STS] = lan743x_csr_read(adapter, INT_STS);
1210 rb[ETH_HW_CFG] = lan743x_csr_read(adapter, HW_CFG);
1211 rb[ETH_PMT_CTL] = lan743x_csr_read(adapter, PMT_CTL);
1212 rb[ETH_E2P_CMD] = lan743x_csr_read(adapter, E2P_CMD);
1213 rb[ETH_E2P_DATA] = lan743x_csr_read(adapter, E2P_DATA);
1214 rb[ETH_MAC_CR] = lan743x_csr_read(adapter, MAC_CR);
1215 rb[ETH_MAC_RX] = lan743x_csr_read(adapter, MAC_RX);
1216 rb[ETH_MAC_TX] = lan743x_csr_read(adapter, MAC_TX);
1217 rb[ETH_FLOW] = lan743x_csr_read(adapter, MAC_FLOW);
1218 rb[ETH_MII_ACC] = lan743x_csr_read(adapter, MAC_MII_ACC);
1219 rb[ETH_MII_DATA] = lan743x_csr_read(adapter, MAC_MII_DATA);
1220 rb[ETH_EEE_TX_LPI_REQ_DLY] = lan743x_csr_read(adapter,
1221 MAC_EEE_TX_LPI_REQ_DLY_CNT);
1222 rb[ETH_WUCSR] = lan743x_csr_read(adapter, MAC_WUCSR);
1223 rb[ETH_WK_SRC] = lan743x_csr_read(adapter, MAC_WK_SRC);
1224 }
1225
lan743x_sgmii_regs(struct net_device * dev,void * p)1226 static void lan743x_sgmii_regs(struct net_device *dev, void *p)
1227 {
1228 struct lan743x_adapter *adp = netdev_priv(dev);
1229 u32 *rb = p;
1230 u16 idx;
1231 int val;
1232 struct {
1233 u8 id;
1234 u8 dev;
1235 u16 addr;
1236 } regs[] = {
1237 { ETH_SR_VSMMD_DEV_ID1, MDIO_MMD_VEND1, 0x0002},
1238 { ETH_SR_VSMMD_DEV_ID2, MDIO_MMD_VEND1, 0x0003},
1239 { ETH_SR_VSMMD_PCS_ID1, MDIO_MMD_VEND1, 0x0004},
1240 { ETH_SR_VSMMD_PCS_ID2, MDIO_MMD_VEND1, 0x0005},
1241 { ETH_SR_VSMMD_STS, MDIO_MMD_VEND1, 0x0008},
1242 { ETH_SR_VSMMD_CTRL, MDIO_MMD_VEND1, 0x0009},
1243 { ETH_SR_MII_CTRL, MDIO_MMD_VEND2, 0x0000},
1244 { ETH_SR_MII_STS, MDIO_MMD_VEND2, 0x0001},
1245 { ETH_SR_MII_DEV_ID1, MDIO_MMD_VEND2, 0x0002},
1246 { ETH_SR_MII_DEV_ID2, MDIO_MMD_VEND2, 0x0003},
1247 { ETH_SR_MII_AN_ADV, MDIO_MMD_VEND2, 0x0004},
1248 { ETH_SR_MII_LP_BABL, MDIO_MMD_VEND2, 0x0005},
1249 { ETH_SR_MII_EXPN, MDIO_MMD_VEND2, 0x0006},
1250 { ETH_SR_MII_EXT_STS, MDIO_MMD_VEND2, 0x000F},
1251 { ETH_SR_MII_TIME_SYNC_ABL, MDIO_MMD_VEND2, 0x0708},
1252 { ETH_SR_MII_TIME_SYNC_TX_MAX_DLY_LWR, MDIO_MMD_VEND2, 0x0709},
1253 { ETH_SR_MII_TIME_SYNC_TX_MAX_DLY_UPR, MDIO_MMD_VEND2, 0x070A},
1254 { ETH_SR_MII_TIME_SYNC_TX_MIN_DLY_LWR, MDIO_MMD_VEND2, 0x070B},
1255 { ETH_SR_MII_TIME_SYNC_TX_MIN_DLY_UPR, MDIO_MMD_VEND2, 0x070C},
1256 { ETH_SR_MII_TIME_SYNC_RX_MAX_DLY_LWR, MDIO_MMD_VEND2, 0x070D},
1257 { ETH_SR_MII_TIME_SYNC_RX_MAX_DLY_UPR, MDIO_MMD_VEND2, 0x070E},
1258 { ETH_SR_MII_TIME_SYNC_RX_MIN_DLY_LWR, MDIO_MMD_VEND2, 0x070F},
1259 { ETH_SR_MII_TIME_SYNC_RX_MIN_DLY_UPR, MDIO_MMD_VEND2, 0x0710},
1260 { ETH_VR_MII_DIG_CTRL1, MDIO_MMD_VEND2, 0x8000},
1261 { ETH_VR_MII_AN_CTRL, MDIO_MMD_VEND2, 0x8001},
1262 { ETH_VR_MII_AN_INTR_STS, MDIO_MMD_VEND2, 0x8002},
1263 { ETH_VR_MII_TC, MDIO_MMD_VEND2, 0x8003},
1264 { ETH_VR_MII_DBG_CTRL, MDIO_MMD_VEND2, 0x8005},
1265 { ETH_VR_MII_EEE_MCTRL0, MDIO_MMD_VEND2, 0x8006},
1266 { ETH_VR_MII_EEE_TXTIMER, MDIO_MMD_VEND2, 0x8008},
1267 { ETH_VR_MII_EEE_RXTIMER, MDIO_MMD_VEND2, 0x8009},
1268 { ETH_VR_MII_LINK_TIMER_CTRL, MDIO_MMD_VEND2, 0x800A},
1269 { ETH_VR_MII_EEE_MCTRL1, MDIO_MMD_VEND2, 0x800B},
1270 { ETH_VR_MII_DIG_STS, MDIO_MMD_VEND2, 0x8010},
1271 { ETH_VR_MII_ICG_ERRCNT1, MDIO_MMD_VEND2, 0x8011},
1272 { ETH_VR_MII_GPIO, MDIO_MMD_VEND2, 0x8015},
1273 { ETH_VR_MII_EEE_LPI_STATUS, MDIO_MMD_VEND2, 0x8016},
1274 { ETH_VR_MII_EEE_WKERR, MDIO_MMD_VEND2, 0x8017},
1275 { ETH_VR_MII_MISC_STS, MDIO_MMD_VEND2, 0x8018},
1276 { ETH_VR_MII_RX_LSTS, MDIO_MMD_VEND2, 0x8020},
1277 { ETH_VR_MII_GEN2_GEN4_TX_BSTCTRL0, MDIO_MMD_VEND2, 0x8038},
1278 { ETH_VR_MII_GEN2_GEN4_TX_LVLCTRL0, MDIO_MMD_VEND2, 0x803A},
1279 { ETH_VR_MII_GEN2_GEN4_TXGENCTRL0, MDIO_MMD_VEND2, 0x803C},
1280 { ETH_VR_MII_GEN2_GEN4_TXGENCTRL1, MDIO_MMD_VEND2, 0x803D},
1281 { ETH_VR_MII_GEN4_TXGENCTRL2, MDIO_MMD_VEND2, 0x803E},
1282 { ETH_VR_MII_GEN2_GEN4_TX_STS, MDIO_MMD_VEND2, 0x8048},
1283 { ETH_VR_MII_GEN2_GEN4_RXGENCTRL0, MDIO_MMD_VEND2, 0x8058},
1284 { ETH_VR_MII_GEN2_GEN4_RXGENCTRL1, MDIO_MMD_VEND2, 0x8059},
1285 { ETH_VR_MII_GEN4_RXEQ_CTRL, MDIO_MMD_VEND2, 0x805B},
1286 { ETH_VR_MII_GEN4_RXLOS_CTRL0, MDIO_MMD_VEND2, 0x805D},
1287 { ETH_VR_MII_GEN2_GEN4_MPLL_CTRL0, MDIO_MMD_VEND2, 0x8078},
1288 { ETH_VR_MII_GEN2_GEN4_MPLL_CTRL1, MDIO_MMD_VEND2, 0x8079},
1289 { ETH_VR_MII_GEN2_GEN4_MPLL_STS, MDIO_MMD_VEND2, 0x8088},
1290 { ETH_VR_MII_GEN2_GEN4_LVL_CTRL, MDIO_MMD_VEND2, 0x8090},
1291 { ETH_VR_MII_GEN4_MISC_CTRL2, MDIO_MMD_VEND2, 0x8093},
1292 { ETH_VR_MII_GEN2_GEN4_MISC_CTRL0, MDIO_MMD_VEND2, 0x8099},
1293 { ETH_VR_MII_GEN2_GEN4_MISC_CTRL1, MDIO_MMD_VEND2, 0x809A},
1294 { ETH_VR_MII_SNPS_CR_CTRL, MDIO_MMD_VEND2, 0x80A0},
1295 { ETH_VR_MII_SNPS_CR_ADDR, MDIO_MMD_VEND2, 0x80A1},
1296 { ETH_VR_MII_SNPS_CR_DATA, MDIO_MMD_VEND2, 0x80A2},
1297 { ETH_VR_MII_DIG_CTRL2, MDIO_MMD_VEND2, 0x80E1},
1298 { ETH_VR_MII_DIG_ERRCNT, MDIO_MMD_VEND2, 0x80E2},
1299 };
1300
1301 for (idx = 0; idx < ARRAY_SIZE(regs); idx++) {
1302 val = lan743x_sgmii_read(adp, regs[idx].dev, regs[idx].addr);
1303 if (val < 0)
1304 rb[regs[idx].id] = 0xFFFF;
1305 else
1306 rb[regs[idx].id] = val;
1307 }
1308 }
1309
lan743x_get_regs_len(struct net_device * dev)1310 static int lan743x_get_regs_len(struct net_device *dev)
1311 {
1312 struct lan743x_adapter *adapter = netdev_priv(dev);
1313 u32 num_regs = MAX_LAN743X_ETH_COMMON_REGS;
1314
1315 if (adapter->is_sgmii_en)
1316 num_regs += MAX_LAN743X_ETH_SGMII_REGS;
1317
1318 return num_regs * sizeof(u32);
1319 }
1320
lan743x_get_regs(struct net_device * dev,struct ethtool_regs * regs,void * p)1321 static void lan743x_get_regs(struct net_device *dev,
1322 struct ethtool_regs *regs, void *p)
1323 {
1324 struct lan743x_adapter *adapter = netdev_priv(dev);
1325 int regs_len;
1326
1327 regs_len = lan743x_get_regs_len(dev);
1328 memset(p, 0, regs_len);
1329
1330 regs->version = LAN743X_ETH_REG_VERSION;
1331 regs->len = regs_len;
1332
1333 lan743x_common_regs(dev, p);
1334 p = (u32 *)p + MAX_LAN743X_ETH_COMMON_REGS;
1335
1336 if (adapter->is_sgmii_en) {
1337 lan743x_sgmii_regs(dev, p);
1338 p = (u32 *)p + MAX_LAN743X_ETH_SGMII_REGS;
1339 }
1340 }
1341
lan743x_get_pauseparam(struct net_device * dev,struct ethtool_pauseparam * pause)1342 static void lan743x_get_pauseparam(struct net_device *dev,
1343 struct ethtool_pauseparam *pause)
1344 {
1345 struct lan743x_adapter *adapter = netdev_priv(dev);
1346
1347 phylink_ethtool_get_pauseparam(adapter->phylink, pause);
1348 }
1349
lan743x_set_pauseparam(struct net_device * dev,struct ethtool_pauseparam * pause)1350 static int lan743x_set_pauseparam(struct net_device *dev,
1351 struct ethtool_pauseparam *pause)
1352 {
1353 struct lan743x_adapter *adapter = netdev_priv(dev);
1354
1355 return phylink_ethtool_set_pauseparam(adapter->phylink, pause);
1356 }
1357
1358 const struct ethtool_ops lan743x_ethtool_ops = {
1359 .get_drvinfo = lan743x_ethtool_get_drvinfo,
1360 .get_msglevel = lan743x_ethtool_get_msglevel,
1361 .set_msglevel = lan743x_ethtool_set_msglevel,
1362 .get_link = ethtool_op_get_link,
1363
1364 .get_eeprom_len = lan743x_ethtool_get_eeprom_len,
1365 .get_eeprom = lan743x_ethtool_get_eeprom,
1366 .set_eeprom = lan743x_ethtool_set_eeprom,
1367 .get_strings = lan743x_ethtool_get_strings,
1368 .get_ethtool_stats = lan743x_ethtool_get_ethtool_stats,
1369 .get_priv_flags = lan743x_ethtool_get_priv_flags,
1370 .set_priv_flags = lan743x_ethtool_set_priv_flags,
1371 .get_sset_count = lan743x_ethtool_get_sset_count,
1372 .get_rxnfc = lan743x_ethtool_get_rxnfc,
1373 .get_rxfh_key_size = lan743x_ethtool_get_rxfh_key_size,
1374 .get_rxfh_indir_size = lan743x_ethtool_get_rxfh_indir_size,
1375 .get_rxfh = lan743x_ethtool_get_rxfh,
1376 .set_rxfh = lan743x_ethtool_set_rxfh,
1377 .get_rxfh_fields = lan743x_ethtool_get_rxfh_fields,
1378 .get_ts_info = lan743x_ethtool_get_ts_info,
1379 .get_eee = lan743x_ethtool_get_eee,
1380 .set_eee = lan743x_ethtool_set_eee,
1381 .get_link_ksettings = lan743x_ethtool_get_link_ksettings,
1382 .set_link_ksettings = lan743x_ethtool_set_link_ksettings,
1383 .get_regs_len = lan743x_get_regs_len,
1384 .get_regs = lan743x_get_regs,
1385 .get_pauseparam = lan743x_get_pauseparam,
1386 .set_pauseparam = lan743x_set_pauseparam,
1387 #ifdef CONFIG_PM
1388 .get_wol = lan743x_ethtool_get_wol,
1389 .set_wol = lan743x_ethtool_set_wol,
1390 #endif
1391 };
1392