1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2019 Spreadtrum Communications Inc.
3
4 #include <linux/dma-mapping.h>
5 #include <linux/dmaengine.h>
6 #include <linux/dma/sprd-dma.h>
7 #include <linux/kernel.h>
8 #include <linux/module.h>
9 #include <sound/pcm.h>
10 #include <sound/pcm_params.h>
11 #include <sound/soc.h>
12 #include <sound/compress_driver.h>
13
14 #include "sprd-pcm-dma.h"
15
16 #define SPRD_COMPR_DMA_CHANS 2
17
18 /* Default values if userspace does not set */
19 #define SPRD_COMPR_MIN_FRAGMENT_SIZE SZ_8K
20 #define SPRD_COMPR_MAX_FRAGMENT_SIZE SZ_32K
21 #define SPRD_COMPR_MIN_NUM_FRAGMENTS 4
22 #define SPRD_COMPR_MAX_NUM_FRAGMENTS 64
23
24 /* DSP FIFO size */
25 #define SPRD_COMPR_MCDT_EMPTY_WMK 0
26 #define SPRD_COMPR_MCDT_FIFO_SIZE 512
27
28 /* Stage 0 IRAM buffer size definition */
29 #define SPRD_COMPR_IRAM_BUF_SIZE SZ_32K
30 #define SPRD_COMPR_IRAM_INFO_SIZE (sizeof(struct sprd_compr_playinfo))
31 #define SPRD_COMPR_IRAM_LINKLIST_SIZE (1024 - SPRD_COMPR_IRAM_INFO_SIZE)
32 #define SPRD_COMPR_IRAM_SIZE (SPRD_COMPR_IRAM_BUF_SIZE + \
33 SPRD_COMPR_IRAM_INFO_SIZE + \
34 SPRD_COMPR_IRAM_LINKLIST_SIZE)
35
36 /* Stage 1 DDR buffer size definition */
37 #define SPRD_COMPR_AREA_BUF_SIZE SZ_2M
38 #define SPRD_COMPR_AREA_LINKLIST_SIZE 1024
39 #define SPRD_COMPR_AREA_SIZE (SPRD_COMPR_AREA_BUF_SIZE + \
40 SPRD_COMPR_AREA_LINKLIST_SIZE)
41
42 struct sprd_compr_dma {
43 struct dma_chan *chan;
44 struct dma_async_tx_descriptor *desc;
45 dma_cookie_t cookie;
46 dma_addr_t phys;
47 void *virt;
48 int trans_len;
49 };
50
51 /*
52 * The Spreadtrum Audio compress offload mode will use 2-stage DMA transfer to
53 * save power. That means we can request 2 dma channels, one for source channel,
54 * and another one for destination channel. Once the source channel's transaction
55 * is done, it will trigger the destination channel's transaction automatically
56 * by hardware signal.
57 *
58 * For 2-stage DMA transfer, we can allocate 2 buffers: IRAM buffer (always
59 * power-on) and DDR buffer. The source channel will transfer data from IRAM
60 * buffer to the DSP fifo to decoding/encoding, once IRAM buffer is empty by
61 * transferring done, the destination channel will start to transfer data from
62 * DDR buffer to IRAM buffer.
63 *
64 * Since the DSP fifo is only 512B, IRAM buffer is allocated by 32K, and DDR
65 * buffer is larger to 2M. That means only the IRAM 32k data is transferred
66 * done, we can wake up the AP system to transfer data from DDR to IRAM, and
67 * other time the AP system can be suspended to save power.
68 */
69 struct sprd_compr_stream {
70 struct snd_compr_stream *cstream;
71 struct sprd_compr_ops *compr_ops;
72 struct sprd_compr_dma dma[SPRD_COMPR_DMA_CHANS];
73
74 /* DMA engine channel number */
75 int num_channels;
76
77 /* Stage 0 IRAM buffer */
78 struct snd_dma_buffer iram_buffer;
79 /* Stage 1 DDR buffer */
80 struct snd_dma_buffer compr_buffer;
81
82 /* DSP play information IRAM buffer */
83 dma_addr_t info_phys;
84 void *info_area;
85 int info_size;
86
87 /* Data size copied to IRAM buffer */
88 u64 copied_total;
89 /* Total received data size from userspace */
90 u64 received_total;
91 /* Stage 0 IRAM buffer received data size */
92 int received_stage0;
93 /* Stage 1 DDR buffer received data size */
94 int received_stage1;
95 /* Stage 1 DDR buffer pointer */
96 int stage1_pointer;
97 };
98
99 static int sprd_platform_compr_trigger(struct snd_soc_component *component,
100 struct snd_compr_stream *cstream,
101 int cmd);
102
sprd_platform_compr_drain_notify(void * arg)103 static void sprd_platform_compr_drain_notify(void *arg)
104 {
105 struct snd_compr_stream *cstream = arg;
106 struct snd_compr_runtime *runtime = cstream->runtime;
107 struct sprd_compr_stream *stream = runtime->private_data;
108
109 memset(stream->info_area, 0, sizeof(struct sprd_compr_playinfo));
110
111 snd_compr_drain_notify(cstream);
112 }
113
sprd_platform_compr_dma_complete(void * data)114 static void sprd_platform_compr_dma_complete(void *data)
115 {
116 struct snd_compr_stream *cstream = data;
117 struct snd_compr_runtime *runtime = cstream->runtime;
118 struct sprd_compr_stream *stream = runtime->private_data;
119 struct sprd_compr_dma *dma = &stream->dma[1];
120
121 /* Update data size copied to IRAM buffer */
122 stream->copied_total += dma->trans_len;
123 if (stream->copied_total > stream->received_total)
124 stream->copied_total = stream->received_total;
125
126 snd_compr_fragment_elapsed(cstream);
127 }
128
sprd_platform_compr_dma_config(struct snd_soc_component * component,struct snd_compr_stream * cstream,struct snd_compr_params * params,int channel)129 static int sprd_platform_compr_dma_config(struct snd_soc_component *component,
130 struct snd_compr_stream *cstream,
131 struct snd_compr_params *params,
132 int channel)
133 {
134 struct snd_compr_runtime *runtime = cstream->runtime;
135 struct sprd_compr_stream *stream = runtime->private_data;
136 struct snd_soc_pcm_runtime *rtd = cstream->private_data;
137 struct device *dev = component->dev;
138 struct sprd_compr_data *data = snd_soc_dai_get_drvdata(snd_soc_rtd_to_cpu(rtd, 0));
139 struct sprd_pcm_dma_params *dma_params = data->dma_params;
140 struct sprd_compr_dma *dma = &stream->dma[channel];
141 struct dma_slave_config config = { };
142 struct sprd_dma_linklist link = { };
143 enum dma_transfer_direction dir;
144 struct scatterlist *sg, *sgt;
145 enum dma_slave_buswidth bus_width;
146 int period, period_cnt, sg_num = 2;
147 dma_addr_t src_addr, dst_addr;
148 unsigned long flags;
149 int ret, j;
150
151 if (!dma_params) {
152 dev_err(dev, "no dma parameters setting\n");
153 return -EINVAL;
154 }
155
156 dma->chan = dma_request_slave_channel(dev,
157 dma_params->chan_name[channel]);
158 if (!dma->chan) {
159 dev_err(dev, "failed to request dma channel\n");
160 return -ENODEV;
161 }
162
163 sgt = sg = kzalloc_objs(*sg, sg_num);
164 if (!sg) {
165 ret = -ENOMEM;
166 goto sg_err;
167 }
168
169 switch (channel) {
170 case 0:
171 bus_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
172 period = (SPRD_COMPR_MCDT_FIFO_SIZE - SPRD_COMPR_MCDT_EMPTY_WMK) * 4;
173 period_cnt = params->buffer.fragment_size / period;
174 src_addr = stream->iram_buffer.addr;
175 dst_addr = dma_params->dev_phys[channel];
176 flags = SPRD_DMA_FLAGS(SPRD_DMA_SRC_CHN1,
177 SPRD_DMA_TRANS_DONE_TRG,
178 SPRD_DMA_FRAG_REQ,
179 SPRD_DMA_TRANS_INT);
180 break;
181
182 case 1:
183 bus_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
184 period = params->buffer.fragment_size;
185 period_cnt = params->buffer.fragments;
186 src_addr = stream->compr_buffer.addr;
187 dst_addr = stream->iram_buffer.addr;
188 flags = SPRD_DMA_FLAGS(SPRD_DMA_DST_CHN1,
189 SPRD_DMA_TRANS_DONE_TRG,
190 SPRD_DMA_FRAG_REQ,
191 SPRD_DMA_TRANS_INT);
192 break;
193
194 default:
195 ret = -EINVAL;
196 goto config_err;
197 }
198
199 dma->trans_len = period * period_cnt;
200
201 config.src_maxburst = period;
202 config.src_addr_width = bus_width;
203 config.dst_addr_width = bus_width;
204 if (cstream->direction == SND_COMPRESS_PLAYBACK) {
205 config.src_addr = src_addr;
206 config.dst_addr = dst_addr;
207 dir = DMA_MEM_TO_DEV;
208 } else {
209 config.src_addr = dst_addr;
210 config.dst_addr = src_addr;
211 dir = DMA_DEV_TO_MEM;
212 }
213
214 sg_init_table(sgt, sg_num);
215 for (j = 0; j < sg_num; j++, sgt++) {
216 sg_dma_len(sgt) = dma->trans_len;
217 sg_dma_address(sgt) = dst_addr;
218 }
219
220 /*
221 * Configure the link-list address for the DMA engine link-list
222 * mode.
223 */
224 link.virt_addr = (unsigned long)dma->virt;
225 link.phy_addr = dma->phys;
226
227 ret = dmaengine_slave_config(dma->chan, &config);
228 if (ret) {
229 dev_err(dev,
230 "failed to set slave configuration: %d\n", ret);
231 goto config_err;
232 }
233
234 /*
235 * We configure the DMA request mode, interrupt mode, channel
236 * mode and channel trigger mode by the flags.
237 */
238 dma->desc = dma->chan->device->device_prep_slave_sg(dma->chan, sg,
239 sg_num, dir,
240 flags, &link);
241 if (!dma->desc) {
242 dev_err(dev, "failed to prepare slave sg\n");
243 ret = -ENOMEM;
244 goto config_err;
245 }
246
247 /* Only channel 1 transfer can wake up the AP system. */
248 if (!params->no_wake_mode && channel == 1) {
249 dma->desc->callback = sprd_platform_compr_dma_complete;
250 dma->desc->callback_param = cstream;
251 }
252
253 kfree(sg);
254
255 return 0;
256
257 config_err:
258 kfree(sg);
259 sg_err:
260 dma_release_channel(dma->chan);
261 return ret;
262 }
263
sprd_platform_compr_set_params(struct snd_soc_component * component,struct snd_compr_stream * cstream,struct snd_compr_params * params)264 static int sprd_platform_compr_set_params(struct snd_soc_component *component,
265 struct snd_compr_stream *cstream,
266 struct snd_compr_params *params)
267 {
268 struct snd_compr_runtime *runtime = cstream->runtime;
269 struct sprd_compr_stream *stream = runtime->private_data;
270 struct device *dev = component->dev;
271 struct sprd_compr_params compr_params = { };
272 int ret;
273
274 /*
275 * The stage 0 IRAM buffer and the stage 1 DDR buffer are allocated
276 * with fixed sizes at open time, so the requested fragment size and
277 * fragments must fit into them, otherwise sprd_platform_compr_copy()
278 * would overflow the buffers. Note the compress core only checks the
279 * fragment size and fragments against an u32 overflow, not against
280 * the buffer sizes advertised by get_caps.
281 */
282 if (params->buffer.fragment_size > SPRD_COMPR_IRAM_BUF_SIZE ||
283 (u64)params->buffer.fragment_size * params->buffer.fragments >
284 SPRD_COMPR_AREA_BUF_SIZE)
285 return -EINVAL;
286
287 /*
288 * Configure the DMA engine 2-stage transfer mode. Channel 1 set as the
289 * destination channel, and channel 0 set as the source channel, that
290 * means once the source channel's transaction is done, it will trigger
291 * the destination channel's transaction automatically.
292 */
293 ret = sprd_platform_compr_dma_config(component, cstream, params, 1);
294 if (ret) {
295 dev_err(dev, "failed to config stage 1 DMA: %d\n", ret);
296 return ret;
297 }
298
299 ret = sprd_platform_compr_dma_config(component, cstream, params, 0);
300 if (ret) {
301 dev_err(dev, "failed to config stage 0 DMA: %d\n", ret);
302 goto config_err;
303 }
304
305 compr_params.direction = cstream->direction;
306 compr_params.sample_rate = params->codec.sample_rate;
307 compr_params.channels = stream->num_channels;
308 compr_params.info_phys = stream->info_phys;
309 compr_params.info_size = stream->info_size;
310 compr_params.rate = params->codec.bit_rate;
311 compr_params.format = params->codec.id;
312
313 ret = stream->compr_ops->set_params(cstream->direction, &compr_params);
314 if (ret) {
315 dev_err(dev, "failed to set parameters: %d\n", ret);
316 goto params_err;
317 }
318
319 return 0;
320
321 params_err:
322 dma_release_channel(stream->dma[0].chan);
323 config_err:
324 dma_release_channel(stream->dma[1].chan);
325 return ret;
326 }
327
sprd_platform_compr_open(struct snd_soc_component * component,struct snd_compr_stream * cstream)328 static int sprd_platform_compr_open(struct snd_soc_component *component,
329 struct snd_compr_stream *cstream)
330 {
331 struct snd_compr_runtime *runtime = cstream->runtime;
332 struct snd_soc_pcm_runtime *rtd = cstream->private_data;
333 struct device *dev = component->dev;
334 struct sprd_compr_data *data = snd_soc_dai_get_drvdata(snd_soc_rtd_to_cpu(rtd, 0));
335 struct sprd_compr_stream *stream;
336 struct sprd_compr_callback cb;
337 int stream_id = cstream->direction, ret;
338
339 ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
340 if (ret)
341 return ret;
342
343 stream = devm_kzalloc(dev, sizeof(*stream), GFP_KERNEL);
344 if (!stream)
345 return -ENOMEM;
346
347 stream->cstream = cstream;
348 stream->num_channels = 2;
349 stream->compr_ops = data->ops;
350
351 /*
352 * Allocate the stage 0 IRAM buffer size, including the DMA 0
353 * link-list size and play information of DSP address size.
354 */
355 ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV_IRAM, dev,
356 SPRD_COMPR_IRAM_SIZE, &stream->iram_buffer);
357 if (ret < 0)
358 goto err_iram;
359
360 /* Use to save link-list configuration for DMA 0. */
361 stream->dma[0].virt = stream->iram_buffer.area + SPRD_COMPR_IRAM_SIZE;
362 stream->dma[0].phys = stream->iram_buffer.addr + SPRD_COMPR_IRAM_SIZE;
363
364 /* Use to update the current data offset of DSP. */
365 stream->info_phys = stream->iram_buffer.addr + SPRD_COMPR_IRAM_SIZE +
366 SPRD_COMPR_IRAM_LINKLIST_SIZE;
367 stream->info_area = stream->iram_buffer.area + SPRD_COMPR_IRAM_SIZE +
368 SPRD_COMPR_IRAM_LINKLIST_SIZE;
369 stream->info_size = SPRD_COMPR_IRAM_INFO_SIZE;
370
371 /*
372 * Allocate the stage 1 DDR buffer size, including the DMA 1 link-list
373 * size.
374 */
375 ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, dev,
376 SPRD_COMPR_AREA_SIZE, &stream->compr_buffer);
377 if (ret < 0)
378 goto err_compr;
379
380 /* Use to save link-list configuration for DMA 1. */
381 stream->dma[1].virt = stream->compr_buffer.area + SPRD_COMPR_AREA_SIZE;
382 stream->dma[1].phys = stream->compr_buffer.addr + SPRD_COMPR_AREA_SIZE;
383
384 cb.drain_notify = sprd_platform_compr_drain_notify;
385 cb.drain_data = cstream;
386 ret = stream->compr_ops->open(stream_id, &cb);
387 if (ret) {
388 dev_err(dev, "failed to open compress platform: %d\n", ret);
389 goto err_open;
390 }
391
392 runtime->private_data = stream;
393 return 0;
394
395 err_open:
396 snd_dma_free_pages(&stream->compr_buffer);
397 err_compr:
398 snd_dma_free_pages(&stream->iram_buffer);
399 err_iram:
400 devm_kfree(dev, stream);
401
402 return ret;
403 }
404
sprd_platform_compr_free(struct snd_soc_component * component,struct snd_compr_stream * cstream)405 static int sprd_platform_compr_free(struct snd_soc_component *component,
406 struct snd_compr_stream *cstream)
407 {
408 struct snd_compr_runtime *runtime = cstream->runtime;
409 struct sprd_compr_stream *stream = runtime->private_data;
410 struct device *dev = component->dev;
411 int stream_id = cstream->direction, i;
412
413 for (i = 0; i < stream->num_channels; i++) {
414 struct sprd_compr_dma *dma = &stream->dma[i];
415
416 if (dma->chan) {
417 dma_release_channel(dma->chan);
418 dma->chan = NULL;
419 }
420 }
421
422 snd_dma_free_pages(&stream->compr_buffer);
423 snd_dma_free_pages(&stream->iram_buffer);
424
425 stream->compr_ops->close(stream_id);
426
427 devm_kfree(dev, stream);
428 return 0;
429 }
430
sprd_platform_compr_trigger(struct snd_soc_component * component,struct snd_compr_stream * cstream,int cmd)431 static int sprd_platform_compr_trigger(struct snd_soc_component *component,
432 struct snd_compr_stream *cstream,
433 int cmd)
434 {
435 struct snd_compr_runtime *runtime = cstream->runtime;
436 struct sprd_compr_stream *stream = runtime->private_data;
437 struct device *dev = component->dev;
438 int channels = stream->num_channels, ret = 0, i;
439 int stream_id = cstream->direction;
440
441 if (cstream->direction != SND_COMPRESS_PLAYBACK) {
442 dev_err(dev, "unsupported compress direction\n");
443 return -EINVAL;
444 }
445
446 switch (cmd) {
447 case SNDRV_PCM_TRIGGER_START:
448 for (i = channels - 1; i >= 0; i--) {
449 struct sprd_compr_dma *dma = &stream->dma[i];
450
451 if (!dma->desc)
452 continue;
453
454 dma->cookie = dmaengine_submit(dma->desc);
455 ret = dma_submit_error(dma->cookie);
456 if (ret) {
457 dev_err(dev, "failed to submit request: %d\n",
458 ret);
459 return ret;
460 }
461 }
462
463 for (i = channels - 1; i >= 0; i--) {
464 struct sprd_compr_dma *dma = &stream->dma[i];
465
466 if (dma->chan)
467 dma_async_issue_pending(dma->chan);
468 }
469
470 ret = stream->compr_ops->start(stream_id);
471 break;
472
473 case SNDRV_PCM_TRIGGER_STOP:
474 for (i = channels - 1; i >= 0; i--) {
475 struct sprd_compr_dma *dma = &stream->dma[i];
476
477 if (dma->chan)
478 dmaengine_terminate_async(dma->chan);
479 }
480
481 stream->copied_total = 0;
482 stream->stage1_pointer = 0;
483 stream->received_total = 0;
484 stream->received_stage0 = 0;
485 stream->received_stage1 = 0;
486
487 ret = stream->compr_ops->stop(stream_id);
488 break;
489
490 case SNDRV_PCM_TRIGGER_SUSPEND:
491 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
492 for (i = channels - 1; i >= 0; i--) {
493 struct sprd_compr_dma *dma = &stream->dma[i];
494
495 if (dma->chan)
496 dmaengine_pause(dma->chan);
497 }
498
499 ret = stream->compr_ops->pause(stream_id);
500 break;
501
502 case SNDRV_PCM_TRIGGER_RESUME:
503 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
504 for (i = channels - 1; i >= 0; i--) {
505 struct sprd_compr_dma *dma = &stream->dma[i];
506
507 if (dma->chan)
508 dmaengine_resume(dma->chan);
509 }
510
511 ret = stream->compr_ops->pause_release(stream_id);
512 break;
513
514 case SND_COMPR_TRIGGER_PARTIAL_DRAIN:
515 case SND_COMPR_TRIGGER_DRAIN:
516 ret = stream->compr_ops->drain(stream->received_total);
517 break;
518
519 default:
520 ret = -EINVAL;
521 break;
522 }
523
524 return ret;
525 }
526
sprd_platform_compr_pointer(struct snd_soc_component * component,struct snd_compr_stream * cstream,struct snd_compr_tstamp64 * tstamp)527 static int sprd_platform_compr_pointer(struct snd_soc_component *component,
528 struct snd_compr_stream *cstream,
529 struct snd_compr_tstamp64 *tstamp)
530 {
531 struct snd_compr_runtime *runtime = cstream->runtime;
532 struct sprd_compr_stream *stream = runtime->private_data;
533 struct sprd_compr_playinfo *info =
534 (struct sprd_compr_playinfo *)stream->info_area;
535
536 tstamp->copied_total = stream->copied_total;
537 tstamp->pcm_io_frames = info->current_data_offset;
538
539 return 0;
540 }
541
sprd_platform_compr_copy(struct snd_soc_component * component,struct snd_compr_stream * cstream,char __user * buf,size_t count)542 static int sprd_platform_compr_copy(struct snd_soc_component *component,
543 struct snd_compr_stream *cstream,
544 char __user *buf, size_t count)
545 {
546 struct snd_compr_runtime *runtime = cstream->runtime;
547 struct sprd_compr_stream *stream = runtime->private_data;
548 int avail_bytes, data_count = count;
549 void *dst;
550
551 /*
552 * We usually set fragment size as 32K, and the stage 0 IRAM buffer
553 * size is 32K too. So if now the received data size of the stage 0
554 * IRAM buffer is less than 32K, that means we have some available
555 * spaces for the stage 0 IRAM buffer.
556 */
557 if (stream->received_stage0 < runtime->fragment_size) {
558 avail_bytes = runtime->fragment_size - stream->received_stage0;
559 dst = stream->iram_buffer.area + stream->received_stage0;
560
561 if (avail_bytes >= data_count) {
562 /*
563 * Copy data to the stage 0 IRAM buffer directly if
564 * spaces are enough.
565 */
566 if (copy_from_user(dst, buf, data_count))
567 return -EFAULT;
568
569 stream->received_stage0 += data_count;
570 stream->copied_total += data_count;
571 goto copy_done;
572 } else {
573 /*
574 * If the data count is larger than the available spaces
575 * of the stage 0 IRAM buffer, we should copy one
576 * partial data to the stage 0 IRAM buffer, and copy
577 * the left to the stage 1 DDR buffer.
578 */
579 if (copy_from_user(dst, buf, avail_bytes))
580 return -EFAULT;
581
582 data_count -= avail_bytes;
583 stream->received_stage0 += avail_bytes;
584 stream->copied_total += avail_bytes;
585 buf += avail_bytes;
586 }
587 }
588
589 /*
590 * Copy data to the stage 1 DDR buffer if no spaces for the stage 0 IRAM
591 * buffer.
592 */
593 dst = stream->compr_buffer.area + stream->stage1_pointer;
594 if (data_count < stream->compr_buffer.bytes - stream->stage1_pointer) {
595 if (copy_from_user(dst, buf, data_count))
596 return -EFAULT;
597
598 stream->stage1_pointer += data_count;
599 } else {
600 avail_bytes = stream->compr_buffer.bytes - stream->stage1_pointer;
601
602 if (copy_from_user(dst, buf, avail_bytes))
603 return -EFAULT;
604
605 if (copy_from_user(stream->compr_buffer.area, buf + avail_bytes,
606 data_count - avail_bytes))
607 return -EFAULT;
608
609 stream->stage1_pointer = data_count - avail_bytes;
610 }
611
612 stream->received_stage1 += data_count;
613
614 copy_done:
615 /* Update the copied data size. */
616 stream->received_total += count;
617 return count;
618 }
619
sprd_platform_compr_get_caps(struct snd_soc_component * component,struct snd_compr_stream * cstream,struct snd_compr_caps * caps)620 static int sprd_platform_compr_get_caps(struct snd_soc_component *component,
621 struct snd_compr_stream *cstream,
622 struct snd_compr_caps *caps)
623 {
624 caps->direction = cstream->direction;
625 caps->min_fragment_size = SPRD_COMPR_MIN_FRAGMENT_SIZE;
626 caps->max_fragment_size = SPRD_COMPR_MAX_FRAGMENT_SIZE;
627 caps->min_fragments = SPRD_COMPR_MIN_NUM_FRAGMENTS;
628 caps->max_fragments = SPRD_COMPR_MAX_NUM_FRAGMENTS;
629 caps->num_codecs = 2;
630 caps->codecs[0] = SND_AUDIOCODEC_MP3;
631 caps->codecs[1] = SND_AUDIOCODEC_AAC;
632
633 return 0;
634 }
635
636 static int
sprd_platform_compr_get_codec_caps(struct snd_soc_component * component,struct snd_compr_stream * cstream,struct snd_compr_codec_caps * codec)637 sprd_platform_compr_get_codec_caps(struct snd_soc_component *component,
638 struct snd_compr_stream *cstream,
639 struct snd_compr_codec_caps *codec)
640 {
641 switch (codec->codec) {
642 case SND_AUDIOCODEC_MP3:
643 codec->num_descriptors = 2;
644 codec->descriptor[0].max_ch = 2;
645 codec->descriptor[0].bit_rate[0] = 320;
646 codec->descriptor[0].bit_rate[1] = 128;
647 codec->descriptor[0].num_bitrates = 2;
648 codec->descriptor[0].profiles = 0;
649 codec->descriptor[0].modes = SND_AUDIOCHANMODE_MP3_STEREO;
650 codec->descriptor[0].formats = 0;
651 break;
652
653 case SND_AUDIOCODEC_AAC:
654 codec->num_descriptors = 2;
655 codec->descriptor[1].max_ch = 2;
656 codec->descriptor[1].bit_rate[0] = 320;
657 codec->descriptor[1].bit_rate[1] = 128;
658 codec->descriptor[1].num_bitrates = 2;
659 codec->descriptor[1].profiles = 0;
660 codec->descriptor[1].modes = 0;
661 codec->descriptor[1].formats = 0;
662 break;
663
664 default:
665 return -EINVAL;
666 }
667
668 return 0;
669 }
670
671 const struct snd_compress_ops sprd_platform_compress_ops = {
672 .open = sprd_platform_compr_open,
673 .free = sprd_platform_compr_free,
674 .set_params = sprd_platform_compr_set_params,
675 .trigger = sprd_platform_compr_trigger,
676 .pointer = sprd_platform_compr_pointer,
677 .copy = sprd_platform_compr_copy,
678 .get_caps = sprd_platform_compr_get_caps,
679 .get_codec_caps = sprd_platform_compr_get_codec_caps,
680 };
681
682 MODULE_DESCRIPTION("Spreadtrum ASoC Compress Platform Driver");
683 MODULE_LICENSE("GPL v2");
684 MODULE_ALIAS("platform:compress-platform");
685