1 // SPDX-License-Identifier: MIT
2 /*
3 * Copyright © 2020 Intel Corporation
4 */
5
6 #include <linux/debugfs.h>
7 #include <linux/string_helpers.h>
8
9 #include <drm/drm_debugfs.h>
10 #include <drm/drm_edid.h>
11 #include <drm/drm_fourcc.h>
12
13 #include "hsw_ips.h"
14 #include "i915_drv.h"
15 #include "i915_irq.h"
16 #include "i915_reg.h"
17 #include "i9xx_wm_regs.h"
18 #include "intel_alpm.h"
19 #include "intel_bo.h"
20 #include "intel_crtc.h"
21 #include "intel_crtc_state_dump.h"
22 #include "intel_de.h"
23 #include "intel_display_debugfs.h"
24 #include "intel_display_debugfs_params.h"
25 #include "intel_display_power.h"
26 #include "intel_display_power_well.h"
27 #include "intel_display_types.h"
28 #include "intel_dmc.h"
29 #include "intel_dp.h"
30 #include "intel_dp_link_training.h"
31 #include "intel_dp_mst.h"
32 #include "intel_dp_test.h"
33 #include "intel_drrs.h"
34 #include "intel_fb.h"
35 #include "intel_fbc.h"
36 #include "intel_fbdev.h"
37 #include "intel_hdcp.h"
38 #include "intel_hdmi.h"
39 #include "intel_hotplug.h"
40 #include "intel_panel.h"
41 #include "intel_pps.h"
42 #include "intel_psr.h"
43 #include "intel_psr_regs.h"
44 #include "intel_vdsc.h"
45 #include "intel_wm.h"
46
node_to_intel_display(struct drm_info_node * node)47 static struct intel_display *node_to_intel_display(struct drm_info_node *node)
48 {
49 return to_intel_display(node->minor->dev);
50 }
51
node_to_i915(struct drm_info_node * node)52 static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node)
53 {
54 return to_i915(node->minor->dev);
55 }
56
intel_display_caps(struct seq_file * m,void * data)57 static int intel_display_caps(struct seq_file *m, void *data)
58 {
59 struct intel_display *display = node_to_intel_display(m->private);
60 struct drm_printer p = drm_seq_file_printer(m);
61
62 intel_display_device_info_print(DISPLAY_INFO(display),
63 DISPLAY_RUNTIME_INFO(display), &p);
64 intel_display_params_dump(&display->params, display->drm->driver->name, &p);
65
66 return 0;
67 }
68
i915_frontbuffer_tracking(struct seq_file * m,void * unused)69 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused)
70 {
71 struct drm_i915_private *dev_priv = node_to_i915(m->private);
72
73 spin_lock(&dev_priv->display.fb_tracking.lock);
74
75 seq_printf(m, "FB tracking busy bits: 0x%08x\n",
76 dev_priv->display.fb_tracking.busy_bits);
77
78 seq_printf(m, "FB tracking flip bits: 0x%08x\n",
79 dev_priv->display.fb_tracking.flip_bits);
80
81 spin_unlock(&dev_priv->display.fb_tracking.lock);
82
83 return 0;
84 }
85
i915_sr_status(struct seq_file * m,void * unused)86 static int i915_sr_status(struct seq_file *m, void *unused)
87 {
88 struct drm_i915_private *dev_priv = node_to_i915(m->private);
89 intel_wakeref_t wakeref;
90 bool sr_enabled = false;
91
92 wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
93
94 if (DISPLAY_VER(dev_priv) >= 9)
95 /* no global SR status; inspect per-plane WM */;
96 else if (HAS_PCH_SPLIT(dev_priv))
97 sr_enabled = intel_de_read(dev_priv, WM1_LP_ILK) & WM_LP_ENABLE;
98 else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) ||
99 IS_I945G(dev_priv) || IS_I945GM(dev_priv))
100 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN;
101 else if (IS_I915GM(dev_priv))
102 sr_enabled = intel_de_read(dev_priv, INSTPM) & INSTPM_SELF_EN;
103 else if (IS_PINEVIEW(dev_priv))
104 sr_enabled = intel_de_read(dev_priv, DSPFW3(dev_priv)) & PINEVIEW_SELF_REFRESH_EN;
105 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
106 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
107
108 intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref);
109
110 seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled));
111
112 return 0;
113 }
114
i915_gem_framebuffer_info(struct seq_file * m,void * data)115 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
116 {
117 struct drm_i915_private *dev_priv = node_to_i915(m->private);
118 struct intel_framebuffer *fbdev_fb = NULL;
119 struct drm_framebuffer *drm_fb;
120
121 #ifdef CONFIG_DRM_FBDEV_EMULATION
122 fbdev_fb = intel_fbdev_framebuffer(dev_priv->display.fbdev.fbdev);
123 if (fbdev_fb) {
124 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
125 fbdev_fb->base.width,
126 fbdev_fb->base.height,
127 fbdev_fb->base.format->depth,
128 fbdev_fb->base.format->cpp[0] * 8,
129 fbdev_fb->base.modifier,
130 drm_framebuffer_read_refcount(&fbdev_fb->base));
131 intel_bo_describe(m, intel_fb_bo(&fbdev_fb->base));
132 seq_putc(m, '\n');
133 }
134 #endif
135
136 mutex_lock(&dev_priv->drm.mode_config.fb_lock);
137 drm_for_each_fb(drm_fb, &dev_priv->drm) {
138 struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb);
139 if (fb == fbdev_fb)
140 continue;
141
142 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
143 fb->base.width,
144 fb->base.height,
145 fb->base.format->depth,
146 fb->base.format->cpp[0] * 8,
147 fb->base.modifier,
148 drm_framebuffer_read_refcount(&fb->base));
149 intel_bo_describe(m, intel_fb_bo(&fb->base));
150 seq_putc(m, '\n');
151 }
152 mutex_unlock(&dev_priv->drm.mode_config.fb_lock);
153
154 return 0;
155 }
156
i915_power_domain_info(struct seq_file * m,void * unused)157 static int i915_power_domain_info(struct seq_file *m, void *unused)
158 {
159 struct drm_i915_private *i915 = node_to_i915(m->private);
160
161 intel_display_power_debug(i915, m);
162
163 return 0;
164 }
165
intel_seq_print_mode(struct seq_file * m,int tabs,const struct drm_display_mode * mode)166 static void intel_seq_print_mode(struct seq_file *m, int tabs,
167 const struct drm_display_mode *mode)
168 {
169 int i;
170
171 for (i = 0; i < tabs; i++)
172 seq_putc(m, '\t');
173
174 seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));
175 }
176
intel_encoder_info(struct seq_file * m,struct intel_crtc * crtc,struct intel_encoder * encoder)177 static void intel_encoder_info(struct seq_file *m,
178 struct intel_crtc *crtc,
179 struct intel_encoder *encoder)
180 {
181 struct drm_i915_private *dev_priv = node_to_i915(m->private);
182 struct drm_connector_list_iter conn_iter;
183 struct drm_connector *connector;
184
185 seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n",
186 encoder->base.base.id, encoder->base.name);
187
188 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
189 drm_for_each_connector_iter(connector, &conn_iter) {
190 const struct drm_connector_state *conn_state =
191 connector->state;
192
193 if (conn_state->best_encoder != &encoder->base)
194 continue;
195
196 seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n",
197 connector->base.id, connector->name);
198 }
199 drm_connector_list_iter_end(&conn_iter);
200 }
201
intel_panel_info(struct seq_file * m,struct intel_connector * connector)202 static void intel_panel_info(struct seq_file *m,
203 struct intel_connector *connector)
204 {
205 const struct drm_display_mode *fixed_mode;
206
207 if (list_empty(&connector->panel.fixed_modes))
208 return;
209
210 seq_puts(m, "\tfixed modes:\n");
211
212 list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head)
213 intel_seq_print_mode(m, 2, fixed_mode);
214 }
215
intel_hdcp_info(struct seq_file * m,struct intel_connector * intel_connector,bool remote_req)216 static void intel_hdcp_info(struct seq_file *m,
217 struct intel_connector *intel_connector,
218 bool remote_req)
219 {
220 bool hdcp_cap = false, hdcp2_cap = false;
221
222 if (!intel_connector->hdcp.shim) {
223 seq_puts(m, "No Connector Support");
224 goto out;
225 }
226
227 if (remote_req) {
228 intel_hdcp_get_remote_capability(intel_connector,
229 &hdcp_cap,
230 &hdcp2_cap);
231 } else {
232 hdcp_cap = intel_hdcp_get_capability(intel_connector);
233 hdcp2_cap = intel_hdcp2_get_capability(intel_connector);
234 }
235
236 if (hdcp_cap)
237 seq_puts(m, "HDCP1.4 ");
238 if (hdcp2_cap)
239 seq_puts(m, "HDCP2.2 ");
240
241 if (!hdcp_cap && !hdcp2_cap)
242 seq_puts(m, "None");
243
244 out:
245 seq_puts(m, "\n");
246 }
247
intel_dp_info(struct seq_file * m,struct intel_connector * connector)248 static void intel_dp_info(struct seq_file *m, struct intel_connector *connector)
249 {
250 struct intel_encoder *intel_encoder = intel_attached_encoder(connector);
251 struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder);
252
253 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]);
254 seq_printf(m, "\taudio support: %s\n",
255 str_yes_no(connector->base.display_info.has_audio));
256
257 drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports,
258 connector->detect_edid, &intel_dp->aux);
259 }
260
intel_dp_mst_info(struct seq_file * m,struct intel_connector * connector)261 static void intel_dp_mst_info(struct seq_file *m,
262 struct intel_connector *connector)
263 {
264 bool has_audio = connector->base.display_info.has_audio;
265
266 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
267 }
268
intel_hdmi_info(struct seq_file * m,struct intel_connector * connector)269 static void intel_hdmi_info(struct seq_file *m,
270 struct intel_connector *connector)
271 {
272 bool has_audio = connector->base.display_info.has_audio;
273
274 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
275 }
276
intel_connector_info(struct seq_file * m,struct drm_connector * connector)277 static void intel_connector_info(struct seq_file *m,
278 struct drm_connector *connector)
279 {
280 struct intel_connector *intel_connector = to_intel_connector(connector);
281 const struct drm_display_mode *mode;
282
283 seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n",
284 connector->base.id, connector->name,
285 drm_get_connector_status_name(connector->status));
286
287 if (connector->status == connector_status_disconnected)
288 return;
289
290 seq_printf(m, "\tphysical dimensions: %dx%dmm\n",
291 connector->display_info.width_mm,
292 connector->display_info.height_mm);
293 seq_printf(m, "\tsubpixel order: %s\n",
294 drm_get_subpixel_order_name(connector->display_info.subpixel_order));
295 seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev);
296
297 switch (connector->connector_type) {
298 case DRM_MODE_CONNECTOR_DisplayPort:
299 case DRM_MODE_CONNECTOR_eDP:
300 if (intel_connector->mst_port)
301 intel_dp_mst_info(m, intel_connector);
302 else
303 intel_dp_info(m, intel_connector);
304 break;
305 case DRM_MODE_CONNECTOR_HDMIA:
306 intel_hdmi_info(m, intel_connector);
307 break;
308 default:
309 break;
310 }
311
312 seq_puts(m, "\tHDCP version: ");
313 if (intel_connector->mst_port) {
314 intel_hdcp_info(m, intel_connector, true);
315 seq_puts(m, "\tMST Hub HDCP version: ");
316 }
317 intel_hdcp_info(m, intel_connector, false);
318
319 seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc);
320
321 intel_panel_info(m, intel_connector);
322
323 seq_printf(m, "\tmodes:\n");
324 list_for_each_entry(mode, &connector->modes, head)
325 intel_seq_print_mode(m, 2, mode);
326 }
327
plane_type(enum drm_plane_type type)328 static const char *plane_type(enum drm_plane_type type)
329 {
330 switch (type) {
331 case DRM_PLANE_TYPE_OVERLAY:
332 return "OVL";
333 case DRM_PLANE_TYPE_PRIMARY:
334 return "PRI";
335 case DRM_PLANE_TYPE_CURSOR:
336 return "CUR";
337 /*
338 * Deliberately omitting default: to generate compiler warnings
339 * when a new drm_plane_type gets added.
340 */
341 }
342
343 return "unknown";
344 }
345
plane_rotation(char * buf,size_t bufsize,unsigned int rotation)346 static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation)
347 {
348 /*
349 * According to doc only one DRM_MODE_ROTATE_ is allowed but this
350 * will print them all to visualize if the values are misused
351 */
352 snprintf(buf, bufsize,
353 "%s%s%s%s%s%s(0x%08x)",
354 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "",
355 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "",
356 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "",
357 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "",
358 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "",
359 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "",
360 rotation);
361 }
362
plane_visibility(const struct intel_plane_state * plane_state)363 static const char *plane_visibility(const struct intel_plane_state *plane_state)
364 {
365 if (plane_state->uapi.visible)
366 return "visible";
367
368 if (plane_state->planar_slave)
369 return "planar-slave";
370
371 return "hidden";
372 }
373
intel_plane_uapi_info(struct seq_file * m,struct intel_plane * plane)374 static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane)
375 {
376 const struct intel_plane_state *plane_state =
377 to_intel_plane_state(plane->base.state);
378 const struct drm_framebuffer *fb = plane_state->uapi.fb;
379 struct drm_rect src, dst;
380 char rot_str[48];
381
382 src = drm_plane_state_src(&plane_state->uapi);
383 dst = drm_plane_state_dest(&plane_state->uapi);
384
385 plane_rotation(rot_str, sizeof(rot_str),
386 plane_state->uapi.rotation);
387
388 seq_puts(m, "\t\tuapi: [FB:");
389 if (fb)
390 seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id,
391 &fb->format->format, fb->modifier, fb->width,
392 fb->height);
393 else
394 seq_puts(m, "0] n/a,0x0,0x0,");
395 seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT
396 ", rotation=%s\n", plane_visibility(plane_state),
397 DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str);
398
399 if (plane_state->planar_linked_plane)
400 seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n",
401 plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name,
402 plane_state->planar_slave ? "slave" : "master");
403 }
404
intel_plane_hw_info(struct seq_file * m,struct intel_plane * plane)405 static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane)
406 {
407 const struct intel_plane_state *plane_state =
408 to_intel_plane_state(plane->base.state);
409 const struct drm_framebuffer *fb = plane_state->hw.fb;
410 char rot_str[48];
411
412 if (!fb)
413 return;
414
415 plane_rotation(rot_str, sizeof(rot_str),
416 plane_state->hw.rotation);
417
418 seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src="
419 DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n",
420 fb->base.id, &fb->format->format,
421 fb->modifier, fb->width, fb->height,
422 str_yes_no(plane_state->uapi.visible),
423 DRM_RECT_FP_ARG(&plane_state->uapi.src),
424 DRM_RECT_ARG(&plane_state->uapi.dst),
425 rot_str);
426 }
427
intel_plane_info(struct seq_file * m,struct intel_crtc * crtc)428 static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc)
429 {
430 struct drm_i915_private *dev_priv = node_to_i915(m->private);
431 struct intel_plane *plane;
432
433 for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) {
434 seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n",
435 plane->base.base.id, plane->base.name,
436 plane_type(plane->base.type));
437 intel_plane_uapi_info(m, plane);
438 intel_plane_hw_info(m, plane);
439 }
440 }
441
intel_scaler_info(struct seq_file * m,struct intel_crtc * crtc)442 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc)
443 {
444 const struct intel_crtc_state *crtc_state =
445 to_intel_crtc_state(crtc->base.state);
446 int num_scalers = crtc->num_scalers;
447 int i;
448
449 /* Not all platforms have a scaler */
450 if (num_scalers) {
451 seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d",
452 num_scalers,
453 crtc_state->scaler_state.scaler_users,
454 crtc_state->scaler_state.scaler_id,
455 crtc_state->hw.scaling_filter);
456
457 for (i = 0; i < num_scalers; i++) {
458 const struct intel_scaler *sc =
459 &crtc_state->scaler_state.scalers[i];
460
461 seq_printf(m, ", scalers[%d]: use=%s, mode=%x",
462 i, str_yes_no(sc->in_use), sc->mode);
463 }
464 seq_puts(m, "\n");
465 } else {
466 seq_puts(m, "\tNo scalers available on this platform\n");
467 }
468 }
469
470 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE)
crtc_updates_info(struct seq_file * m,struct intel_crtc * crtc,const char * hdr)471 static void crtc_updates_info(struct seq_file *m,
472 struct intel_crtc *crtc,
473 const char *hdr)
474 {
475 u64 count;
476 int row;
477
478 count = 0;
479 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++)
480 count += crtc->debug.vbl.times[row];
481 seq_printf(m, "%sUpdates: %llu\n", hdr, count);
482 if (!count)
483 return;
484
485 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) {
486 char columns[80] = " |";
487 unsigned int x;
488
489 if (row & 1) {
490 const char *units;
491
492 if (row > 10) {
493 x = 1000000;
494 units = "ms";
495 } else {
496 x = 1000;
497 units = "us";
498 }
499
500 snprintf(columns, sizeof(columns), "%4ld%s |",
501 DIV_ROUND_CLOSEST(BIT(row + 9), x), units);
502 }
503
504 if (crtc->debug.vbl.times[row]) {
505 x = ilog2(crtc->debug.vbl.times[row]);
506 memset(columns + 8, '*', x);
507 columns[8 + x] = '\0';
508 }
509
510 seq_printf(m, "%s%s\n", hdr, columns);
511 }
512
513 seq_printf(m, "%sMin update: %lluns\n",
514 hdr, crtc->debug.vbl.min);
515 seq_printf(m, "%sMax update: %lluns\n",
516 hdr, crtc->debug.vbl.max);
517 seq_printf(m, "%sAverage update: %lluns\n",
518 hdr, div64_u64(crtc->debug.vbl.sum, count));
519 seq_printf(m, "%sOverruns > %uus: %u\n",
520 hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over);
521 }
522
crtc_updates_show(struct seq_file * m,void * data)523 static int crtc_updates_show(struct seq_file *m, void *data)
524 {
525 crtc_updates_info(m, m->private, "");
526 return 0;
527 }
528
crtc_updates_open(struct inode * inode,struct file * file)529 static int crtc_updates_open(struct inode *inode, struct file *file)
530 {
531 return single_open(file, crtc_updates_show, inode->i_private);
532 }
533
crtc_updates_write(struct file * file,const char __user * ubuf,size_t len,loff_t * offp)534 static ssize_t crtc_updates_write(struct file *file,
535 const char __user *ubuf,
536 size_t len, loff_t *offp)
537 {
538 struct seq_file *m = file->private_data;
539 struct intel_crtc *crtc = m->private;
540
541 /* May race with an update. Meh. */
542 memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl));
543
544 return len;
545 }
546
547 static const struct file_operations crtc_updates_fops = {
548 .owner = THIS_MODULE,
549 .open = crtc_updates_open,
550 .read = seq_read,
551 .llseek = seq_lseek,
552 .release = single_release,
553 .write = crtc_updates_write
554 };
555
crtc_updates_add(struct intel_crtc * crtc)556 static void crtc_updates_add(struct intel_crtc *crtc)
557 {
558 debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry,
559 crtc, &crtc_updates_fops);
560 }
561
562 #else
crtc_updates_info(struct seq_file * m,struct intel_crtc * crtc,const char * hdr)563 static void crtc_updates_info(struct seq_file *m,
564 struct intel_crtc *crtc,
565 const char *hdr)
566 {
567 }
568
crtc_updates_add(struct intel_crtc * crtc)569 static void crtc_updates_add(struct intel_crtc *crtc)
570 {
571 }
572 #endif
573
intel_crtc_info(struct seq_file * m,struct intel_crtc * crtc)574 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc)
575 {
576 struct drm_i915_private *dev_priv = node_to_i915(m->private);
577 struct drm_printer p = drm_seq_file_printer(m);
578 const struct intel_crtc_state *crtc_state =
579 to_intel_crtc_state(crtc->base.state);
580 struct intel_encoder *encoder;
581
582 seq_printf(m, "[CRTC:%d:%s]:\n",
583 crtc->base.base.id, crtc->base.name);
584
585 seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n",
586 str_yes_no(crtc_state->uapi.enable),
587 str_yes_no(crtc_state->uapi.active),
588 DRM_MODE_ARG(&crtc_state->uapi.mode));
589
590 seq_printf(m, "\thw: enable=%s, active=%s\n",
591 str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active));
592 seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n",
593 DRM_MODE_ARG(&crtc_state->hw.adjusted_mode));
594 seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n",
595 DRM_MODE_ARG(&crtc_state->hw.pipe_mode));
596
597 seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n",
598 DRM_RECT_ARG(&crtc_state->pipe_src),
599 str_yes_no(crtc_state->dither), crtc_state->pipe_bpp);
600
601 intel_scaler_info(m, crtc);
602
603 if (crtc_state->joiner_pipes)
604 seq_printf(m, "\tLinked to 0x%x pipes as a %s\n",
605 crtc_state->joiner_pipes,
606 intel_crtc_is_joiner_secondary(crtc_state) ? "slave" : "master");
607
608 intel_vdsc_state_dump(&p, 1, crtc_state);
609
610 for_each_intel_encoder_mask(&dev_priv->drm, encoder,
611 crtc_state->uapi.encoder_mask)
612 intel_encoder_info(m, crtc, encoder);
613
614 intel_plane_info(m, crtc);
615
616 seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n",
617 str_yes_no(!crtc->cpu_fifo_underrun_disabled),
618 str_yes_no(!crtc->pch_fifo_underrun_disabled));
619
620 crtc_updates_info(m, crtc, "\t");
621 }
622
i915_display_info(struct seq_file * m,void * unused)623 static int i915_display_info(struct seq_file *m, void *unused)
624 {
625 struct drm_i915_private *dev_priv = node_to_i915(m->private);
626 struct intel_crtc *crtc;
627 struct drm_connector *connector;
628 struct drm_connector_list_iter conn_iter;
629 intel_wakeref_t wakeref;
630
631 wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
632
633 drm_modeset_lock_all(&dev_priv->drm);
634
635 seq_printf(m, "CRTC info\n");
636 seq_printf(m, "---------\n");
637 for_each_intel_crtc(&dev_priv->drm, crtc)
638 intel_crtc_info(m, crtc);
639
640 seq_printf(m, "\n");
641 seq_printf(m, "Connector info\n");
642 seq_printf(m, "--------------\n");
643 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
644 drm_for_each_connector_iter(connector, &conn_iter)
645 intel_connector_info(m, connector);
646 drm_connector_list_iter_end(&conn_iter);
647
648 drm_modeset_unlock_all(&dev_priv->drm);
649
650 intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
651
652 return 0;
653 }
654
i915_display_capabilities(struct seq_file * m,void * unused)655 static int i915_display_capabilities(struct seq_file *m, void *unused)
656 {
657 struct drm_i915_private *i915 = node_to_i915(m->private);
658 struct drm_printer p = drm_seq_file_printer(m);
659
660 intel_display_device_info_print(DISPLAY_INFO(i915),
661 DISPLAY_RUNTIME_INFO(i915), &p);
662
663 return 0;
664 }
665
i915_shared_dplls_info(struct seq_file * m,void * unused)666 static int i915_shared_dplls_info(struct seq_file *m, void *unused)
667 {
668 struct drm_i915_private *dev_priv = node_to_i915(m->private);
669 struct drm_printer p = drm_seq_file_printer(m);
670 struct intel_shared_dpll *pll;
671 int i;
672
673 drm_modeset_lock_all(&dev_priv->drm);
674
675 drm_printf(&p, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n",
676 dev_priv->display.dpll.ref_clks.nssc,
677 dev_priv->display.dpll.ref_clks.ssc);
678
679 for_each_shared_dpll(dev_priv, pll, i) {
680 drm_printf(&p, "DPLL%i: %s, id: %i\n", pll->index,
681 pll->info->name, pll->info->id);
682 drm_printf(&p, " pipe_mask: 0x%x, active: 0x%x, on: %s\n",
683 pll->state.pipe_mask, pll->active_mask,
684 str_yes_no(pll->on));
685 drm_printf(&p, " tracked hardware state:\n");
686 intel_dpll_dump_hw_state(dev_priv, &p, &pll->state.hw_state);
687 }
688 drm_modeset_unlock_all(&dev_priv->drm);
689
690 return 0;
691 }
692
i915_ddb_info(struct seq_file * m,void * unused)693 static int i915_ddb_info(struct seq_file *m, void *unused)
694 {
695 struct drm_i915_private *dev_priv = node_to_i915(m->private);
696 struct skl_ddb_entry *entry;
697 struct intel_crtc *crtc;
698
699 if (DISPLAY_VER(dev_priv) < 9)
700 return -ENODEV;
701
702 drm_modeset_lock_all(&dev_priv->drm);
703
704 seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size");
705
706 for_each_intel_crtc(&dev_priv->drm, crtc) {
707 struct intel_crtc_state *crtc_state =
708 to_intel_crtc_state(crtc->base.state);
709 enum pipe pipe = crtc->pipe;
710 enum plane_id plane_id;
711
712 seq_printf(m, "Pipe %c\n", pipe_name(pipe));
713
714 for_each_plane_id_on_crtc(crtc, plane_id) {
715 entry = &crtc_state->wm.skl.plane_ddb[plane_id];
716 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1,
717 entry->start, entry->end,
718 skl_ddb_entry_size(entry));
719 }
720
721 entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR];
722 seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start,
723 entry->end, skl_ddb_entry_size(entry));
724 }
725
726 drm_modeset_unlock_all(&dev_priv->drm);
727
728 return 0;
729 }
730
731 static bool
intel_lpsp_power_well_enabled(struct drm_i915_private * i915,enum i915_power_well_id power_well_id)732 intel_lpsp_power_well_enabled(struct drm_i915_private *i915,
733 enum i915_power_well_id power_well_id)
734 {
735 struct intel_display *display = &i915->display;
736 intel_wakeref_t wakeref;
737 bool is_enabled;
738
739 wakeref = intel_runtime_pm_get(&i915->runtime_pm);
740 is_enabled = intel_display_power_well_is_enabled(display,
741 power_well_id);
742 intel_runtime_pm_put(&i915->runtime_pm, wakeref);
743
744 return is_enabled;
745 }
746
i915_lpsp_status(struct seq_file * m,void * unused)747 static int i915_lpsp_status(struct seq_file *m, void *unused)
748 {
749 struct drm_i915_private *i915 = node_to_i915(m->private);
750 bool lpsp_enabled = false;
751
752 if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) {
753 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2);
754 } else if (IS_DISPLAY_VER(i915, 11, 12)) {
755 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3);
756 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
757 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL);
758 } else {
759 seq_puts(m, "LPSP: not supported\n");
760 return 0;
761 }
762
763 seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled));
764
765 return 0;
766 }
767
i915_dp_mst_info(struct seq_file * m,void * unused)768 static int i915_dp_mst_info(struct seq_file *m, void *unused)
769 {
770 struct drm_i915_private *dev_priv = node_to_i915(m->private);
771 struct intel_encoder *intel_encoder;
772 struct intel_digital_port *dig_port;
773 struct drm_connector *connector;
774 struct drm_connector_list_iter conn_iter;
775
776 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
777 drm_for_each_connector_iter(connector, &conn_iter) {
778 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
779 continue;
780
781 intel_encoder = intel_attached_encoder(to_intel_connector(connector));
782 if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST)
783 continue;
784
785 dig_port = enc_to_dig_port(intel_encoder);
786 if (!intel_dp_mst_source_support(&dig_port->dp))
787 continue;
788
789 seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n",
790 dig_port->base.base.base.id,
791 dig_port->base.base.name);
792 drm_dp_mst_dump_topology(m, &dig_port->dp.mst_mgr);
793 }
794 drm_connector_list_iter_end(&conn_iter);
795
796 return 0;
797 }
798
799 static ssize_t
i915_fifo_underrun_reset_write(struct file * filp,const char __user * ubuf,size_t cnt,loff_t * ppos)800 i915_fifo_underrun_reset_write(struct file *filp,
801 const char __user *ubuf,
802 size_t cnt, loff_t *ppos)
803 {
804 struct drm_i915_private *dev_priv = filp->private_data;
805 struct intel_crtc *crtc;
806 int ret;
807 bool reset;
808
809 ret = kstrtobool_from_user(ubuf, cnt, &reset);
810 if (ret)
811 return ret;
812
813 if (!reset)
814 return cnt;
815
816 for_each_intel_crtc(&dev_priv->drm, crtc) {
817 struct drm_crtc_commit *commit;
818 struct intel_crtc_state *crtc_state;
819
820 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
821 if (ret)
822 return ret;
823
824 crtc_state = to_intel_crtc_state(crtc->base.state);
825 commit = crtc_state->uapi.commit;
826 if (commit) {
827 ret = wait_for_completion_interruptible(&commit->hw_done);
828 if (!ret)
829 ret = wait_for_completion_interruptible(&commit->flip_done);
830 }
831
832 if (!ret && crtc_state->hw.active) {
833 drm_dbg_kms(&dev_priv->drm,
834 "Re-arming FIFO underruns on pipe %c\n",
835 pipe_name(crtc->pipe));
836
837 intel_crtc_arm_fifo_underrun(crtc, crtc_state);
838 }
839
840 drm_modeset_unlock(&crtc->base.mutex);
841
842 if (ret)
843 return ret;
844 }
845
846 intel_fbc_reset_underrun(&dev_priv->display);
847
848 return cnt;
849 }
850
851 static const struct file_operations i915_fifo_underrun_reset_ops = {
852 .owner = THIS_MODULE,
853 .open = simple_open,
854 .write = i915_fifo_underrun_reset_write,
855 .llseek = default_llseek,
856 };
857
858 static const struct drm_info_list intel_display_debugfs_list[] = {
859 {"intel_display_caps", intel_display_caps, 0},
860 {"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0},
861 {"i915_sr_status", i915_sr_status, 0},
862 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
863 {"i915_power_domain_info", i915_power_domain_info, 0},
864 {"i915_display_info", i915_display_info, 0},
865 {"i915_display_capabilities", i915_display_capabilities, 0},
866 {"i915_shared_dplls_info", i915_shared_dplls_info, 0},
867 {"i915_dp_mst_info", i915_dp_mst_info, 0},
868 {"i915_ddb_info", i915_ddb_info, 0},
869 {"i915_lpsp_status", i915_lpsp_status, 0},
870 };
871
intel_display_debugfs_register(struct drm_i915_private * i915)872 void intel_display_debugfs_register(struct drm_i915_private *i915)
873 {
874 struct intel_display *display = &i915->display;
875 struct drm_minor *minor = i915->drm.primary;
876
877 debugfs_create_file("i915_fifo_underrun_reset", 0644, minor->debugfs_root,
878 to_i915(minor->dev), &i915_fifo_underrun_reset_ops);
879
880 drm_debugfs_create_files(intel_display_debugfs_list,
881 ARRAY_SIZE(intel_display_debugfs_list),
882 minor->debugfs_root, minor);
883
884 intel_bios_debugfs_register(display);
885 intel_cdclk_debugfs_register(display);
886 intel_dmc_debugfs_register(display);
887 intel_dp_test_debugfs_register(display);
888 intel_fbc_debugfs_register(display);
889 intel_hpd_debugfs_register(i915);
890 intel_opregion_debugfs_register(display);
891 intel_psr_debugfs_register(display);
892 intel_wm_debugfs_register(i915);
893 intel_display_debugfs_params(display);
894 }
895
i915_hdcp_sink_capability_show(struct seq_file * m,void * data)896 static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data)
897 {
898 struct intel_connector *connector = m->private;
899 struct drm_i915_private *i915 = to_i915(connector->base.dev);
900 int ret;
901
902 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
903 if (ret)
904 return ret;
905
906 if (!connector->base.encoder ||
907 connector->base.status != connector_status_connected) {
908 ret = -ENODEV;
909 goto out;
910 }
911
912 seq_printf(m, "%s:%d HDCP version: ", connector->base.name,
913 connector->base.base.id);
914 intel_hdcp_info(m, connector, false);
915
916 out:
917 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
918
919 return ret;
920 }
921 DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability);
922
i915_lpsp_capability_show(struct seq_file * m,void * data)923 static int i915_lpsp_capability_show(struct seq_file *m, void *data)
924 {
925 struct intel_connector *connector = m->private;
926 struct drm_i915_private *i915 = to_i915(connector->base.dev);
927 struct intel_encoder *encoder = intel_attached_encoder(connector);
928 int connector_type = connector->base.connector_type;
929 bool lpsp_capable = false;
930
931 if (!encoder)
932 return -ENODEV;
933
934 if (connector->base.status != connector_status_connected)
935 return -ENODEV;
936
937 if (DISPLAY_VER(i915) >= 13)
938 lpsp_capable = encoder->port <= PORT_B;
939 else if (DISPLAY_VER(i915) >= 12)
940 /*
941 * Actually TGL can drive LPSP on port till DDI_C
942 * but there is no physical connected DDI_C on TGL sku's,
943 * even driver is not initilizing DDI_C port for gen12.
944 */
945 lpsp_capable = encoder->port <= PORT_B;
946 else if (DISPLAY_VER(i915) == 11)
947 lpsp_capable = (connector_type == DRM_MODE_CONNECTOR_DSI ||
948 connector_type == DRM_MODE_CONNECTOR_eDP);
949 else if (IS_DISPLAY_VER(i915, 9, 10))
950 lpsp_capable = (encoder->port == PORT_A &&
951 (connector_type == DRM_MODE_CONNECTOR_DSI ||
952 connector_type == DRM_MODE_CONNECTOR_eDP ||
953 connector_type == DRM_MODE_CONNECTOR_DisplayPort));
954 else if (IS_HASWELL(i915) || IS_BROADWELL(i915))
955 lpsp_capable = connector_type == DRM_MODE_CONNECTOR_eDP;
956
957 seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable");
958
959 return 0;
960 }
961 DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability);
962
i915_dsc_fec_support_show(struct seq_file * m,void * data)963 static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
964 {
965 struct intel_connector *connector = m->private;
966 struct drm_i915_private *i915 = to_i915(connector->base.dev);
967 struct drm_crtc *crtc;
968 struct intel_dp *intel_dp;
969 struct drm_modeset_acquire_ctx ctx;
970 struct intel_crtc_state *crtc_state = NULL;
971 int ret = 0;
972 bool try_again = false;
973
974 drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
975
976 do {
977 try_again = false;
978 ret = drm_modeset_lock(&i915->drm.mode_config.connection_mutex,
979 &ctx);
980 if (ret) {
981 if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) {
982 try_again = true;
983 continue;
984 }
985 break;
986 }
987 crtc = connector->base.state->crtc;
988 if (connector->base.status != connector_status_connected || !crtc) {
989 ret = -ENODEV;
990 break;
991 }
992 ret = drm_modeset_lock(&crtc->mutex, &ctx);
993 if (ret == -EDEADLK) {
994 ret = drm_modeset_backoff(&ctx);
995 if (!ret) {
996 try_again = true;
997 continue;
998 }
999 break;
1000 } else if (ret) {
1001 break;
1002 }
1003 intel_dp = intel_attached_dp(connector);
1004 crtc_state = to_intel_crtc_state(crtc->state);
1005 seq_printf(m, "DSC_Enabled: %s\n",
1006 str_yes_no(crtc_state->dsc.compression_enable));
1007 seq_printf(m, "DSC_Sink_Support: %s\n",
1008 str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd)));
1009 seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n",
1010 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
1011 DP_DSC_RGB)),
1012 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
1013 DP_DSC_YCbCr420_Native)),
1014 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
1015 DP_DSC_YCbCr444)));
1016 seq_printf(m, "DSC_Sink_BPP_Precision: %d\n",
1017 drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd));
1018 seq_printf(m, "DSC_Sink_Max_Slice_Count: %d\n",
1019 drm_dp_dsc_sink_max_slice_count((connector->dp.dsc_dpcd), intel_dp_is_edp(intel_dp)));
1020 seq_printf(m, "Force_DSC_Enable: %s\n",
1021 str_yes_no(intel_dp->force_dsc_en));
1022 if (!intel_dp_is_edp(intel_dp))
1023 seq_printf(m, "FEC_Sink_Support: %s\n",
1024 str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability)));
1025 } while (try_again);
1026
1027 drm_modeset_drop_locks(&ctx);
1028 drm_modeset_acquire_fini(&ctx);
1029
1030 return ret;
1031 }
1032
i915_dsc_fec_support_write(struct file * file,const char __user * ubuf,size_t len,loff_t * offp)1033 static ssize_t i915_dsc_fec_support_write(struct file *file,
1034 const char __user *ubuf,
1035 size_t len, loff_t *offp)
1036 {
1037 struct seq_file *m = file->private_data;
1038 struct intel_connector *connector = m->private;
1039 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1040 struct intel_encoder *encoder = intel_attached_encoder(connector);
1041 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1042 bool dsc_enable = false;
1043 int ret;
1044
1045 if (len == 0)
1046 return 0;
1047
1048 drm_dbg(&i915->drm,
1049 "Copied %zu bytes from user to force DSC\n", len);
1050
1051 ret = kstrtobool_from_user(ubuf, len, &dsc_enable);
1052 if (ret < 0)
1053 return ret;
1054
1055 drm_dbg(&i915->drm, "Got %s for DSC Enable\n",
1056 (dsc_enable) ? "true" : "false");
1057 intel_dp->force_dsc_en = dsc_enable;
1058
1059 *offp += len;
1060 return len;
1061 }
1062
i915_dsc_fec_support_open(struct inode * inode,struct file * file)1063 static int i915_dsc_fec_support_open(struct inode *inode,
1064 struct file *file)
1065 {
1066 return single_open(file, i915_dsc_fec_support_show,
1067 inode->i_private);
1068 }
1069
1070 static const struct file_operations i915_dsc_fec_support_fops = {
1071 .owner = THIS_MODULE,
1072 .open = i915_dsc_fec_support_open,
1073 .read = seq_read,
1074 .llseek = seq_lseek,
1075 .release = single_release,
1076 .write = i915_dsc_fec_support_write
1077 };
1078
i915_dsc_bpc_show(struct seq_file * m,void * data)1079 static int i915_dsc_bpc_show(struct seq_file *m, void *data)
1080 {
1081 struct intel_connector *connector = m->private;
1082 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1083 struct intel_encoder *encoder = intel_attached_encoder(connector);
1084 struct drm_crtc *crtc;
1085 struct intel_crtc_state *crtc_state;
1086 int ret;
1087
1088 if (!encoder)
1089 return -ENODEV;
1090
1091 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1092 if (ret)
1093 return ret;
1094
1095 crtc = connector->base.state->crtc;
1096 if (connector->base.status != connector_status_connected || !crtc) {
1097 ret = -ENODEV;
1098 goto out;
1099 }
1100
1101 crtc_state = to_intel_crtc_state(crtc->state);
1102 seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component);
1103
1104 out: drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1105
1106 return ret;
1107 }
1108
i915_dsc_bpc_write(struct file * file,const char __user * ubuf,size_t len,loff_t * offp)1109 static ssize_t i915_dsc_bpc_write(struct file *file,
1110 const char __user *ubuf,
1111 size_t len, loff_t *offp)
1112 {
1113 struct seq_file *m = file->private_data;
1114 struct intel_connector *connector = m->private;
1115 struct intel_encoder *encoder = intel_attached_encoder(connector);
1116 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1117 int dsc_bpc = 0;
1118 int ret;
1119
1120 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc);
1121 if (ret < 0)
1122 return ret;
1123
1124 intel_dp->force_dsc_bpc = dsc_bpc;
1125 *offp += len;
1126
1127 return len;
1128 }
1129
i915_dsc_bpc_open(struct inode * inode,struct file * file)1130 static int i915_dsc_bpc_open(struct inode *inode,
1131 struct file *file)
1132 {
1133 return single_open(file, i915_dsc_bpc_show, inode->i_private);
1134 }
1135
1136 static const struct file_operations i915_dsc_bpc_fops = {
1137 .owner = THIS_MODULE,
1138 .open = i915_dsc_bpc_open,
1139 .read = seq_read,
1140 .llseek = seq_lseek,
1141 .release = single_release,
1142 .write = i915_dsc_bpc_write
1143 };
1144
i915_dsc_output_format_show(struct seq_file * m,void * data)1145 static int i915_dsc_output_format_show(struct seq_file *m, void *data)
1146 {
1147 struct intel_connector *connector = m->private;
1148 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1149 struct intel_encoder *encoder = intel_attached_encoder(connector);
1150 struct drm_crtc *crtc;
1151 struct intel_crtc_state *crtc_state;
1152 int ret;
1153
1154 if (!encoder)
1155 return -ENODEV;
1156
1157 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1158 if (ret)
1159 return ret;
1160
1161 crtc = connector->base.state->crtc;
1162 if (connector->base.status != connector_status_connected || !crtc) {
1163 ret = -ENODEV;
1164 goto out;
1165 }
1166
1167 crtc_state = to_intel_crtc_state(crtc->state);
1168 seq_printf(m, "DSC_Output_Format: %s\n",
1169 intel_output_format_name(crtc_state->output_format));
1170
1171 out: drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1172
1173 return ret;
1174 }
1175
i915_dsc_output_format_write(struct file * file,const char __user * ubuf,size_t len,loff_t * offp)1176 static ssize_t i915_dsc_output_format_write(struct file *file,
1177 const char __user *ubuf,
1178 size_t len, loff_t *offp)
1179 {
1180 struct seq_file *m = file->private_data;
1181 struct intel_connector *connector = m->private;
1182 struct intel_encoder *encoder = intel_attached_encoder(connector);
1183 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1184 int dsc_output_format = 0;
1185 int ret;
1186
1187 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format);
1188 if (ret < 0)
1189 return ret;
1190
1191 intel_dp->force_dsc_output_format = dsc_output_format;
1192 *offp += len;
1193
1194 return len;
1195 }
1196
i915_dsc_output_format_open(struct inode * inode,struct file * file)1197 static int i915_dsc_output_format_open(struct inode *inode,
1198 struct file *file)
1199 {
1200 return single_open(file, i915_dsc_output_format_show, inode->i_private);
1201 }
1202
1203 static const struct file_operations i915_dsc_output_format_fops = {
1204 .owner = THIS_MODULE,
1205 .open = i915_dsc_output_format_open,
1206 .read = seq_read,
1207 .llseek = seq_lseek,
1208 .release = single_release,
1209 .write = i915_dsc_output_format_write
1210 };
1211
i915_dsc_fractional_bpp_show(struct seq_file * m,void * data)1212 static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data)
1213 {
1214 struct intel_connector *connector = m->private;
1215 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1216 struct intel_encoder *encoder = intel_attached_encoder(connector);
1217 struct drm_crtc *crtc;
1218 struct intel_dp *intel_dp;
1219 int ret;
1220
1221 if (!encoder)
1222 return -ENODEV;
1223
1224 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1225 if (ret)
1226 return ret;
1227
1228 crtc = connector->base.state->crtc;
1229 if (connector->base.status != connector_status_connected || !crtc) {
1230 ret = -ENODEV;
1231 goto out;
1232 }
1233
1234 intel_dp = intel_attached_dp(connector);
1235 seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n",
1236 str_yes_no(intel_dp->force_dsc_fractional_bpp_en));
1237
1238 out:
1239 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1240
1241 return ret;
1242 }
1243
i915_dsc_fractional_bpp_write(struct file * file,const char __user * ubuf,size_t len,loff_t * offp)1244 static ssize_t i915_dsc_fractional_bpp_write(struct file *file,
1245 const char __user *ubuf,
1246 size_t len, loff_t *offp)
1247 {
1248 struct seq_file *m = file->private_data;
1249 struct intel_connector *connector = m->private;
1250 struct intel_encoder *encoder = intel_attached_encoder(connector);
1251 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1252 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1253 bool dsc_fractional_bpp_enable = false;
1254 int ret;
1255
1256 if (len == 0)
1257 return 0;
1258
1259 drm_dbg(&i915->drm,
1260 "Copied %zu bytes from user to force fractional bpp for DSC\n", len);
1261
1262 ret = kstrtobool_from_user(ubuf, len, &dsc_fractional_bpp_enable);
1263 if (ret < 0)
1264 return ret;
1265
1266 drm_dbg(&i915->drm, "Got %s for DSC Fractional BPP Enable\n",
1267 (dsc_fractional_bpp_enable) ? "true" : "false");
1268 intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable;
1269
1270 *offp += len;
1271
1272 return len;
1273 }
1274
i915_dsc_fractional_bpp_open(struct inode * inode,struct file * file)1275 static int i915_dsc_fractional_bpp_open(struct inode *inode,
1276 struct file *file)
1277 {
1278 return single_open(file, i915_dsc_fractional_bpp_show, inode->i_private);
1279 }
1280
1281 static const struct file_operations i915_dsc_fractional_bpp_fops = {
1282 .owner = THIS_MODULE,
1283 .open = i915_dsc_fractional_bpp_open,
1284 .read = seq_read,
1285 .llseek = seq_lseek,
1286 .release = single_release,
1287 .write = i915_dsc_fractional_bpp_write
1288 };
1289
1290 /*
1291 * Returns the Current CRTC's bpc.
1292 * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc
1293 */
i915_current_bpc_show(struct seq_file * m,void * data)1294 static int i915_current_bpc_show(struct seq_file *m, void *data)
1295 {
1296 struct intel_crtc *crtc = m->private;
1297 struct intel_crtc_state *crtc_state;
1298 int ret;
1299
1300 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
1301 if (ret)
1302 return ret;
1303
1304 crtc_state = to_intel_crtc_state(crtc->base.state);
1305 seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3);
1306
1307 drm_modeset_unlock(&crtc->base.mutex);
1308
1309 return ret;
1310 }
1311 DEFINE_SHOW_ATTRIBUTE(i915_current_bpc);
1312
1313 /* Pipe may differ from crtc index if pipes are fused off */
intel_crtc_pipe_show(struct seq_file * m,void * unused)1314 static int intel_crtc_pipe_show(struct seq_file *m, void *unused)
1315 {
1316 struct intel_crtc *crtc = m->private;
1317
1318 seq_printf(m, "%c\n", pipe_name(crtc->pipe));
1319
1320 return 0;
1321 }
1322 DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe);
1323
i915_joiner_show(struct seq_file * m,void * data)1324 static int i915_joiner_show(struct seq_file *m, void *data)
1325 {
1326 struct intel_connector *connector = m->private;
1327
1328 seq_printf(m, "%d\n", connector->force_joined_pipes);
1329
1330 return 0;
1331 }
1332
i915_joiner_write(struct file * file,const char __user * ubuf,size_t len,loff_t * offp)1333 static ssize_t i915_joiner_write(struct file *file,
1334 const char __user *ubuf,
1335 size_t len, loff_t *offp)
1336 {
1337 struct seq_file *m = file->private_data;
1338 struct intel_connector *connector = m->private;
1339 struct intel_display *display = to_intel_display(connector);
1340 int force_joined_pipes = 0;
1341 int ret;
1342
1343 if (len == 0)
1344 return 0;
1345
1346 ret = kstrtoint_from_user(ubuf, len, 0, &force_joined_pipes);
1347 if (ret < 0)
1348 return ret;
1349
1350 switch (force_joined_pipes) {
1351 case 0:
1352 case 1:
1353 case 2:
1354 connector->force_joined_pipes = force_joined_pipes;
1355 break;
1356 case 4:
1357 if (HAS_ULTRAJOINER(display)) {
1358 connector->force_joined_pipes = force_joined_pipes;
1359 break;
1360 }
1361
1362 fallthrough;
1363 default:
1364 return -EINVAL;
1365 }
1366
1367 *offp += len;
1368
1369 return len;
1370 }
1371
i915_joiner_open(struct inode * inode,struct file * file)1372 static int i915_joiner_open(struct inode *inode, struct file *file)
1373 {
1374 return single_open(file, i915_joiner_show, inode->i_private);
1375 }
1376
1377 static const struct file_operations i915_joiner_fops = {
1378 .owner = THIS_MODULE,
1379 .open = i915_joiner_open,
1380 .read = seq_read,
1381 .llseek = seq_lseek,
1382 .release = single_release,
1383 .write = i915_joiner_write
1384 };
1385
1386 /**
1387 * intel_connector_debugfs_add - add i915 specific connector debugfs files
1388 * @connector: pointer to a registered intel_connector
1389 *
1390 * Cleanup will be done by drm_connector_unregister() through a call to
1391 * drm_debugfs_connector_remove().
1392 */
intel_connector_debugfs_add(struct intel_connector * connector)1393 void intel_connector_debugfs_add(struct intel_connector *connector)
1394 {
1395 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1396 struct dentry *root = connector->base.debugfs_entry;
1397 int connector_type = connector->base.connector_type;
1398
1399 /* The connector must have been registered beforehands. */
1400 if (!root)
1401 return;
1402
1403 intel_drrs_connector_debugfs_add(connector);
1404 intel_pps_connector_debugfs_add(connector);
1405 intel_psr_connector_debugfs_add(connector);
1406 intel_alpm_lobf_debugfs_add(connector);
1407 intel_dp_link_training_debugfs_add(connector);
1408
1409 if (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1410 connector_type == DRM_MODE_CONNECTOR_HDMIA ||
1411 connector_type == DRM_MODE_CONNECTOR_HDMIB) {
1412 debugfs_create_file("i915_hdcp_sink_capability", 0444, root,
1413 connector, &i915_hdcp_sink_capability_fops);
1414 }
1415
1416 if (DISPLAY_VER(i915) >= 11 &&
1417 ((connector_type == DRM_MODE_CONNECTOR_DisplayPort && !connector->mst_port) ||
1418 connector_type == DRM_MODE_CONNECTOR_eDP)) {
1419 debugfs_create_file("i915_dsc_fec_support", 0644, root,
1420 connector, &i915_dsc_fec_support_fops);
1421
1422 debugfs_create_file("i915_dsc_bpc", 0644, root,
1423 connector, &i915_dsc_bpc_fops);
1424
1425 debugfs_create_file("i915_dsc_output_format", 0644, root,
1426 connector, &i915_dsc_output_format_fops);
1427
1428 debugfs_create_file("i915_dsc_fractional_bpp", 0644, root,
1429 connector, &i915_dsc_fractional_bpp_fops);
1430 }
1431
1432 if ((connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1433 connector_type == DRM_MODE_CONNECTOR_eDP) &&
1434 intel_dp_has_joiner(intel_attached_dp(connector))) {
1435 debugfs_create_file("i915_joiner_force_enable", 0644, root,
1436 connector, &i915_joiner_fops);
1437 }
1438
1439 if (connector_type == DRM_MODE_CONNECTOR_DSI ||
1440 connector_type == DRM_MODE_CONNECTOR_eDP ||
1441 connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1442 connector_type == DRM_MODE_CONNECTOR_HDMIA ||
1443 connector_type == DRM_MODE_CONNECTOR_HDMIB)
1444 debugfs_create_file("i915_lpsp_capability", 0444, root,
1445 connector, &i915_lpsp_capability_fops);
1446 }
1447
1448 /**
1449 * intel_crtc_debugfs_add - add i915 specific crtc debugfs files
1450 * @crtc: pointer to a drm_crtc
1451 *
1452 * Failure to add debugfs entries should generally be ignored.
1453 */
intel_crtc_debugfs_add(struct intel_crtc * crtc)1454 void intel_crtc_debugfs_add(struct intel_crtc *crtc)
1455 {
1456 struct dentry *root = crtc->base.debugfs_entry;
1457
1458 if (!root)
1459 return;
1460
1461 crtc_updates_add(crtc);
1462 intel_drrs_crtc_debugfs_add(crtc);
1463 intel_fbc_crtc_debugfs_add(crtc);
1464 hsw_ips_crtc_debugfs_add(crtc);
1465
1466 debugfs_create_file("i915_current_bpc", 0444, root, crtc,
1467 &i915_current_bpc_fops);
1468 debugfs_create_file("i915_pipe", 0444, root, crtc,
1469 &intel_crtc_pipe_fops);
1470 }
1471