1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2017 Pengutronix, Oleksij Rempel <kernel@pengutronix.de> 4 */ 5 6 #include <dt-bindings/firmware/imx/rsrc.h> 7 #include <linux/arm-smccc.h> 8 #include <linux/clk.h> 9 #include <linux/err.h> 10 #include <linux/firmware/imx/sci.h> 11 #include <linux/firmware/imx/sm.h> 12 #include <linux/interrupt.h> 13 #include <linux/kernel.h> 14 #include <linux/mailbox_client.h> 15 #include <linux/mfd/syscon.h> 16 #include <linux/module.h> 17 #include <linux/of.h> 18 #include <linux/of_address.h> 19 #include <linux/of_reserved_mem.h> 20 #include <linux/platform_device.h> 21 #include <linux/pm_domain.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/reboot.h> 24 #include <linux/regmap.h> 25 #include <linux/remoteproc.h> 26 #include <linux/scmi_imx_protocol.h> 27 #include <linux/workqueue.h> 28 29 #include "imx_rproc.h" 30 #include "remoteproc_internal.h" 31 32 #define IMX7D_SRC_SCR 0x0C 33 #define IMX7D_ENABLE_M4 BIT(3) 34 #define IMX7D_SW_M4P_RST BIT(2) 35 #define IMX7D_SW_M4C_RST BIT(1) 36 #define IMX7D_SW_M4C_NON_SCLR_RST BIT(0) 37 38 #define IMX7D_M4_RST_MASK (IMX7D_ENABLE_M4 | IMX7D_SW_M4P_RST \ 39 | IMX7D_SW_M4C_RST \ 40 | IMX7D_SW_M4C_NON_SCLR_RST) 41 42 #define IMX7D_M4_START (IMX7D_ENABLE_M4 | IMX7D_SW_M4P_RST \ 43 | IMX7D_SW_M4C_RST) 44 #define IMX7D_M4_STOP (IMX7D_ENABLE_M4 | IMX7D_SW_M4C_RST | \ 45 IMX7D_SW_M4C_NON_SCLR_RST) 46 47 #define IMX8M_M7_STOP (IMX7D_ENABLE_M4 | IMX7D_SW_M4C_RST) 48 #define IMX8M_M7_POLL IMX7D_ENABLE_M4 49 50 #define IMX8M_GPR22 0x58 51 #define IMX8M_GPR22_CM7_CPUWAIT BIT(0) 52 53 /* Address: 0x020D8000 */ 54 #define IMX6SX_SRC_SCR 0x00 55 #define IMX6SX_ENABLE_M4 BIT(22) 56 #define IMX6SX_SW_M4P_RST BIT(12) 57 #define IMX6SX_SW_M4C_NON_SCLR_RST BIT(4) 58 #define IMX6SX_SW_M4C_RST BIT(3) 59 60 #define IMX6SX_M4_START (IMX6SX_ENABLE_M4 | IMX6SX_SW_M4P_RST \ 61 | IMX6SX_SW_M4C_RST) 62 #define IMX6SX_M4_STOP (IMX6SX_ENABLE_M4 | IMX6SX_SW_M4C_RST | \ 63 IMX6SX_SW_M4C_NON_SCLR_RST) 64 #define IMX6SX_M4_RST_MASK (IMX6SX_ENABLE_M4 | IMX6SX_SW_M4P_RST \ 65 | IMX6SX_SW_M4C_NON_SCLR_RST \ 66 | IMX6SX_SW_M4C_RST) 67 68 #define IMX_RPROC_MEM_MAX 32 69 70 #define IMX_SIP_RPROC 0xC2000005 71 #define IMX_SIP_RPROC_START 0x00 72 #define IMX_SIP_RPROC_STARTED 0x01 73 #define IMX_SIP_RPROC_STOP 0x02 74 75 #define IMX_SC_IRQ_GROUP_REBOOTED 5 76 77 /** 78 * struct imx_rproc_mem - slim internal memory structure 79 * @cpu_addr: MPU virtual address of the memory region 80 * @sys_addr: Bus address used to access the memory region 81 * @size: Size of the memory region 82 */ 83 struct imx_rproc_mem { 84 void __iomem *cpu_addr; 85 phys_addr_t sys_addr; 86 size_t size; 87 }; 88 89 /* att flags: lower 16 bits specifying core, higher 16 bits for flags */ 90 /* M4 own area. Can be mapped at probe */ 91 #define ATT_OWN BIT(31) 92 #define ATT_IOMEM BIT(30) 93 94 #define ATT_CORE_MASK 0xffff 95 #define ATT_CORE(I) BIT((I)) 96 97 /* Linux has permission to handle the Logical Machine of remote cores */ 98 #define IMX_RPROC_FLAGS_SM_LMM_CTRL BIT(0) 99 100 static int imx_rproc_xtr_mbox_init(struct rproc *rproc, bool tx_block); 101 static void imx_rproc_free_mbox(void *data); 102 103 /* Forward declarations for platform operations */ 104 static const struct imx_rproc_plat_ops imx_rproc_ops_sm_lmm; 105 static const struct imx_rproc_plat_ops imx_rproc_ops_sm_cpu; 106 107 struct imx_rproc { 108 struct device *dev; 109 struct regmap *regmap; 110 struct regmap *gpr; 111 struct rproc *rproc; 112 const struct imx_rproc_dcfg *dcfg; 113 struct imx_rproc_mem mem[IMX_RPROC_MEM_MAX]; 114 struct clk *clk; 115 struct mbox_client cl; 116 struct mbox_chan *tx_ch; 117 struct mbox_chan *rx_ch; 118 struct work_struct rproc_work; 119 struct workqueue_struct *workqueue; 120 void __iomem *rsc_table; 121 struct imx_sc_ipc *ipc_handle; 122 struct notifier_block rproc_nb; 123 u32 rproc_pt; /* partition id */ 124 u32 rsrc_id; /* resource id */ 125 u32 entry; /* cpu start address */ 126 u32 core_index; 127 struct dev_pm_domain_list *pd_list; 128 const struct imx_rproc_plat_ops *ops; 129 /* 130 * For i.MX System Manager based systems 131 * BIT 0: IMX_RPROC_FLAGS_SM_LMM_CTRL(RPROC LM is under Linux control ) 132 */ 133 u32 flags; 134 }; 135 136 static const struct imx_rproc_att imx_rproc_att_imx95_m7[] = { 137 /* dev addr , sys addr , size , flags */ 138 /* TCM CODE NON-SECURE */ 139 { 0x00000000, 0x203C0000, 0x00040000, ATT_OWN | ATT_IOMEM }, 140 141 /* TCM SYS NON-SECURE*/ 142 { 0x20000000, 0x20400000, 0x00040000, ATT_OWN | ATT_IOMEM }, 143 144 /* DDR */ 145 { 0x80000000, 0x80000000, 0x50000000, 0 }, 146 }; 147 148 static const struct imx_rproc_att imx_rproc_att_imx94_m70[] = { 149 /* dev addr , sys addr , size , flags */ 150 /* TCM CODE NON-SECURE */ 151 { 0x00000000, 0x203C0000, 0x00040000, ATT_OWN | ATT_IOMEM }, 152 /* TCM SYS NON-SECURE*/ 153 { 0x20000000, 0x20400000, 0x00040000, ATT_OWN | ATT_IOMEM }, 154 155 /* DDR */ 156 { 0x80000000, 0x80000000, 0x10000000, 0 }, 157 }; 158 159 static const struct imx_rproc_att imx_rproc_att_imx94_m71[] = { 160 /* dev addr , sys addr , size , flags */ 161 /* TCM CODE NON-SECURE */ 162 { 0x00000000, 0x202C0000, 0x00040000, ATT_OWN | ATT_IOMEM }, 163 /* TCM SYS NON-SECURE*/ 164 { 0x20000000, 0x20300000, 0x00040000, ATT_OWN | ATT_IOMEM }, 165 166 /* DDR */ 167 { 0x80000000, 0x80000000, 0x10000000, 0 }, 168 }; 169 170 static const struct imx_rproc_att imx_rproc_att_imx94_m33s[] = { 171 /* dev addr , sys addr , size , flags */ 172 /* TCM CODE NON-SECURE */ 173 { 0x0FFC0000, 0x209C0000, 0x00040000, ATT_OWN | ATT_IOMEM }, 174 /* TCM SYS NON-SECURE */ 175 { 0x20000000, 0x20A00000, 0x00040000, ATT_OWN | ATT_IOMEM }, 176 /* M33S OCRAM NON-SECURE */ 177 { 0x20800000, 0x20800000, 0x180000, ATT_OWN | ATT_IOMEM }, 178 179 /* DDR */ 180 { 0x80000000, 0x80000000, 0x10000000, 0 }, 181 }; 182 183 static const struct imx_rproc_att imx_rproc_att_imx93[] = { 184 /* dev addr , sys addr , size , flags */ 185 /* TCM CODE NON-SECURE */ 186 { 0x0FFC0000, 0x201C0000, 0x00040000, ATT_OWN | ATT_IOMEM }, 187 188 /* TCM CODE SECURE */ 189 { 0x1FFC0000, 0x201C0000, 0x00040000, ATT_OWN | ATT_IOMEM }, 190 191 /* TCM SYS NON-SECURE*/ 192 { 0x20000000, 0x20200000, 0x00040000, ATT_OWN | ATT_IOMEM }, 193 194 /* TCM SYS SECURE*/ 195 { 0x30000000, 0x20200000, 0x00040000, ATT_OWN | ATT_IOMEM }, 196 197 /* DDR */ 198 { 0x80000000, 0x80000000, 0x10000000, 0 }, 199 { 0x90000000, 0x80000000, 0x10000000, 0 }, 200 201 { 0xC0000000, 0xC0000000, 0x10000000, 0 }, 202 { 0xD0000000, 0xC0000000, 0x10000000, 0 }, 203 }; 204 205 static const struct imx_rproc_att imx_rproc_att_imx8qm[] = { 206 /* dev addr , sys addr , size , flags */ 207 { 0x08000000, 0x08000000, 0x10000000, 0}, 208 /* TCML */ 209 { 0x1FFE0000, 0x34FE0000, 0x00020000, ATT_OWN | ATT_IOMEM | ATT_CORE(0)}, 210 { 0x1FFE0000, 0x38FE0000, 0x00020000, ATT_OWN | ATT_IOMEM | ATT_CORE(1)}, 211 /* TCMU */ 212 { 0x20000000, 0x35000000, 0x00020000, ATT_OWN | ATT_IOMEM | ATT_CORE(0)}, 213 { 0x20000000, 0x39000000, 0x00020000, ATT_OWN | ATT_IOMEM | ATT_CORE(1)}, 214 /* DDR (Data) */ 215 { 0x80000000, 0x80000000, 0x60000000, 0 }, 216 }; 217 218 static const struct imx_rproc_att imx_rproc_att_imx8qxp[] = { 219 { 0x08000000, 0x08000000, 0x10000000, 0 }, 220 /* TCML/U */ 221 { 0x1FFE0000, 0x34FE0000, 0x00040000, ATT_OWN | ATT_IOMEM }, 222 /* OCRAM(Low 96KB) */ 223 { 0x21000000, 0x00100000, 0x00018000, 0 }, 224 /* OCRAM */ 225 { 0x21100000, 0x00100000, 0x00040000, 0 }, 226 /* DDR (Data) */ 227 { 0x80000000, 0x80000000, 0x60000000, 0 }, 228 }; 229 230 static const struct imx_rproc_att imx_rproc_att_imx8mn[] = { 231 /* dev addr , sys addr , size , flags */ 232 /* ITCM */ 233 { 0x00000000, 0x007E0000, 0x00020000, ATT_OWN | ATT_IOMEM }, 234 /* OCRAM_S */ 235 { 0x00180000, 0x00180000, 0x00009000, 0 }, 236 /* OCRAM */ 237 { 0x00900000, 0x00900000, 0x00020000, 0 }, 238 /* OCRAM */ 239 { 0x00920000, 0x00920000, 0x00020000, 0 }, 240 /* OCRAM */ 241 { 0x00940000, 0x00940000, 0x00050000, 0 }, 242 /* QSPI Code - alias */ 243 { 0x08000000, 0x08000000, 0x08000000, 0 }, 244 /* DDR (Code) - alias */ 245 { 0x10000000, 0x40000000, 0x0FFE0000, 0 }, 246 /* DTCM */ 247 { 0x20000000, 0x00800000, 0x00020000, ATT_OWN | ATT_IOMEM }, 248 /* OCRAM_S - alias */ 249 { 0x20180000, 0x00180000, 0x00008000, ATT_OWN }, 250 /* OCRAM */ 251 { 0x20200000, 0x00900000, 0x00020000, ATT_OWN }, 252 /* OCRAM */ 253 { 0x20220000, 0x00920000, 0x00020000, ATT_OWN }, 254 /* OCRAM */ 255 { 0x20240000, 0x00940000, 0x00040000, ATT_OWN }, 256 /* DDR (Data) */ 257 { 0x40000000, 0x40000000, 0x80000000, 0 }, 258 }; 259 260 static const struct imx_rproc_att imx_rproc_att_imx8mq[] = { 261 /* dev addr , sys addr , size , flags */ 262 /* TCML - alias */ 263 { 0x00000000, 0x007e0000, 0x00020000, ATT_IOMEM}, 264 /* OCRAM_S */ 265 { 0x00180000, 0x00180000, 0x00008000, 0 }, 266 /* OCRAM */ 267 { 0x00900000, 0x00900000, 0x00020000, 0 }, 268 /* OCRAM */ 269 { 0x00920000, 0x00920000, 0x00020000, 0 }, 270 /* QSPI Code - alias */ 271 { 0x08000000, 0x08000000, 0x08000000, 0 }, 272 /* DDR (Code) - alias */ 273 { 0x10000000, 0x40000000, 0x0FFE0000, 0 }, 274 /* TCML/U */ 275 { 0x1FFE0000, 0x007E0000, 0x00040000, ATT_OWN | ATT_IOMEM}, 276 /* OCRAM_S */ 277 { 0x20180000, 0x00180000, 0x00008000, ATT_OWN }, 278 /* OCRAM */ 279 { 0x20200000, 0x00900000, 0x00020000, ATT_OWN }, 280 /* OCRAM */ 281 { 0x20220000, 0x00920000, 0x00020000, ATT_OWN }, 282 /* DDR (Data) */ 283 { 0x40000000, 0x40000000, 0x80000000, 0 }, 284 }; 285 286 static const struct imx_rproc_att imx_rproc_att_imx8ulp[] = { 287 {0x1FFC0000, 0x1FFC0000, 0xC0000, ATT_OWN}, 288 {0x21000000, 0x21000000, 0x10000, ATT_OWN}, 289 {0x80000000, 0x80000000, 0x60000000, 0} 290 }; 291 292 static const struct imx_rproc_att imx_rproc_att_imx7ulp[] = { 293 {0x1FFD0000, 0x1FFD0000, 0x30000, ATT_OWN}, 294 {0x20000000, 0x20000000, 0x10000, ATT_OWN}, 295 {0x2F000000, 0x2F000000, 0x20000, ATT_OWN}, 296 {0x2F020000, 0x2F020000, 0x20000, ATT_OWN}, 297 {0x60000000, 0x60000000, 0x40000000, 0} 298 }; 299 300 static const struct imx_rproc_att imx_rproc_att_imx7d[] = { 301 /* dev addr , sys addr , size , flags */ 302 /* OCRAM_S (M4 Boot code) - alias */ 303 { 0x00000000, 0x00180000, 0x00008000, 0 }, 304 /* OCRAM_S (Code) */ 305 { 0x00180000, 0x00180000, 0x00008000, ATT_OWN }, 306 /* OCRAM (Code) - alias */ 307 { 0x00900000, 0x00900000, 0x00020000, 0 }, 308 /* OCRAM_EPDC (Code) - alias */ 309 { 0x00920000, 0x00920000, 0x00020000, 0 }, 310 /* OCRAM_PXP (Code) - alias */ 311 { 0x00940000, 0x00940000, 0x00008000, 0 }, 312 /* TCML (Code) */ 313 { 0x1FFF8000, 0x007F8000, 0x00008000, ATT_OWN | ATT_IOMEM }, 314 /* DDR (Code) - alias, first part of DDR (Data) */ 315 { 0x10000000, 0x80000000, 0x0FFF0000, 0 }, 316 317 /* TCMU (Data) */ 318 { 0x20000000, 0x00800000, 0x00008000, ATT_OWN | ATT_IOMEM }, 319 /* OCRAM (Data) */ 320 { 0x20200000, 0x00900000, 0x00020000, 0 }, 321 /* OCRAM_EPDC (Data) */ 322 { 0x20220000, 0x00920000, 0x00020000, 0 }, 323 /* OCRAM_PXP (Data) */ 324 { 0x20240000, 0x00940000, 0x00008000, 0 }, 325 /* DDR (Data) */ 326 { 0x80000000, 0x80000000, 0x60000000, 0 }, 327 }; 328 329 static const struct imx_rproc_att imx_rproc_att_imx6sx[] = { 330 /* dev addr , sys addr , size , flags */ 331 /* TCML (M4 Boot Code) - alias */ 332 { 0x00000000, 0x007F8000, 0x00008000, ATT_IOMEM }, 333 /* OCRAM_S (Code) */ 334 { 0x00180000, 0x008F8000, 0x00004000, 0 }, 335 /* OCRAM_S (Code) - alias */ 336 { 0x00180000, 0x008FC000, 0x00004000, 0 }, 337 /* TCML (Code) */ 338 { 0x1FFF8000, 0x007F8000, 0x00008000, ATT_OWN | ATT_IOMEM }, 339 /* DDR (Code) - alias, first part of DDR (Data) */ 340 { 0x10000000, 0x80000000, 0x0FFF8000, 0 }, 341 342 /* TCMU (Data) */ 343 { 0x20000000, 0x00800000, 0x00008000, ATT_OWN | ATT_IOMEM }, 344 /* OCRAM_S (Data) - alias? */ 345 { 0x208F8000, 0x008F8000, 0x00004000, 0 }, 346 /* DDR (Data) */ 347 { 0x80000000, 0x80000000, 0x60000000, 0 }, 348 }; 349 350 static int imx_rproc_arm_smc_start(struct rproc *rproc) 351 { 352 struct arm_smccc_res res; 353 354 arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_START, 0, 0, 0, 0, 0, 0, &res); 355 356 return res.a0; 357 } 358 359 static int imx_rproc_mmio_start(struct rproc *rproc) 360 { 361 struct imx_rproc *priv = rproc->priv; 362 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 363 364 if (priv->gpr) 365 return regmap_clear_bits(priv->gpr, dcfg->gpr_reg, dcfg->gpr_wait); 366 367 return regmap_update_bits(priv->regmap, dcfg->src_reg, dcfg->src_mask, dcfg->src_start); 368 } 369 370 static int imx_rproc_scu_api_start(struct rproc *rproc) 371 { 372 struct imx_rproc *priv = rproc->priv; 373 374 return imx_sc_pm_cpu_start(priv->ipc_handle, priv->rsrc_id, true, priv->entry); 375 } 376 377 static u64 imx_rproc_sm_get_reset_vector(struct rproc *rproc) 378 { 379 struct imx_rproc *priv = rproc->priv; 380 u32 reset_vector_mask = priv->dcfg->reset_vector_mask ?: GENMASK(31, 0); 381 382 /* 383 * The hardware fetches the first two words from reset_vectors 384 * (hardware reset address) and populates SP and PC using the first 385 * two words. Execution proceeds from PC. The ELF entry point does 386 * not always match the hardware reset address. 387 * To derive the correct hardware reset address, the lower address 388 * bits must be masked off before programming the reset vector. 389 */ 390 return rproc->bootaddr & reset_vector_mask; 391 } 392 393 static int imx_rproc_sm_cpu_start(struct rproc *rproc) 394 { 395 struct imx_rproc *priv = rproc->priv; 396 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 397 u64 reset_vector; 398 int ret; 399 400 reset_vector = imx_rproc_sm_get_reset_vector(rproc); 401 402 ret = scmi_imx_cpu_reset_vector_set(dcfg->cpuid, reset_vector, true, false, false); 403 if (ret) { 404 dev_err(priv->dev, "Failed to set reset vector cpuid(%u): %d\n", dcfg->cpuid, ret); 405 return ret; 406 } 407 408 return scmi_imx_cpu_start(dcfg->cpuid, true); 409 } 410 411 static int imx_rproc_sm_lmm_start(struct rproc *rproc) 412 { 413 struct imx_rproc *priv = rproc->priv; 414 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 415 struct device *dev = priv->dev; 416 u64 reset_vector; 417 int ret; 418 419 reset_vector = imx_rproc_sm_get_reset_vector(rproc); 420 421 /* 422 * If the remoteproc core can't start the M7, it will already be 423 * handled in imx_rproc_sm_lmm_prepare(). 424 */ 425 ret = scmi_imx_lmm_reset_vector_set(dcfg->lmid, dcfg->cpuid, 0, reset_vector); 426 if (ret) { 427 dev_err(dev, "Failed to set reset vector lmid(%u), cpuid(%u): %d\n", 428 dcfg->lmid, dcfg->cpuid, ret); 429 return ret; 430 } 431 432 ret = scmi_imx_lmm_operation(dcfg->lmid, SCMI_IMX_LMM_BOOT, 0); 433 if (ret) { 434 dev_err(dev, "Failed to boot lmm(%d): %d\n", dcfg->lmid, ret); 435 return ret; 436 } 437 438 return 0; 439 } 440 441 static int imx_rproc_start(struct rproc *rproc) 442 { 443 struct imx_rproc *priv = rproc->priv; 444 struct device *dev = priv->dev; 445 int ret; 446 447 ret = imx_rproc_xtr_mbox_init(rproc, true); 448 if (ret) 449 return ret; 450 451 if (!priv->ops || !priv->ops->start) 452 return -EOPNOTSUPP; 453 454 ret = priv->ops->start(rproc); 455 if (ret) 456 dev_err(dev, "Failed to enable remote core!\n"); 457 458 return ret; 459 } 460 461 static int imx_rproc_arm_smc_stop(struct rproc *rproc) 462 { 463 struct imx_rproc *priv = rproc->priv; 464 struct arm_smccc_res res; 465 466 arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_STOP, 0, 0, 0, 0, 0, 0, &res); 467 if (res.a1) 468 dev_info(priv->dev, "Not in wfi, force stopped\n"); 469 470 return res.a0; 471 } 472 473 static int imx_rproc_mmio_stop(struct rproc *rproc) 474 { 475 struct imx_rproc *priv = rproc->priv; 476 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 477 int ret; 478 479 if (priv->gpr) { 480 ret = regmap_set_bits(priv->gpr, dcfg->gpr_reg, dcfg->gpr_wait); 481 if (ret) { 482 dev_err(priv->dev, "Failed to quiescence M4 platform!\n"); 483 return ret; 484 } 485 } 486 487 return regmap_update_bits(priv->regmap, dcfg->src_reg, dcfg->src_mask, dcfg->src_stop); 488 } 489 490 static int imx_rproc_scu_api_stop(struct rproc *rproc) 491 { 492 struct imx_rproc *priv = rproc->priv; 493 494 return imx_sc_pm_cpu_start(priv->ipc_handle, priv->rsrc_id, false, priv->entry); 495 } 496 497 static int imx_rproc_sm_cpu_stop(struct rproc *rproc) 498 { 499 struct imx_rproc *priv = rproc->priv; 500 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 501 502 return scmi_imx_cpu_start(dcfg->cpuid, false); 503 } 504 505 static int imx_rproc_sm_lmm_stop(struct rproc *rproc) 506 { 507 struct imx_rproc *priv = rproc->priv; 508 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 509 510 if (!(priv->flags & IMX_RPROC_FLAGS_SM_LMM_CTRL)) 511 return -EACCES; 512 513 return scmi_imx_lmm_operation(dcfg->lmid, SCMI_IMX_LMM_SHUTDOWN, 0); 514 } 515 516 static int imx_rproc_stop(struct rproc *rproc) 517 { 518 struct imx_rproc *priv = rproc->priv; 519 struct device *dev = priv->dev; 520 int ret; 521 522 if (!priv->ops || !priv->ops->stop) 523 return -EOPNOTSUPP; 524 525 ret = priv->ops->stop(rproc); 526 if (ret) 527 dev_err(dev, "Failed to stop remote core\n"); 528 else 529 imx_rproc_free_mbox(rproc); 530 531 return ret; 532 } 533 534 static int imx_rproc_da_to_sys(struct imx_rproc *priv, u64 da, 535 size_t len, u64 *sys, bool *is_iomem) 536 { 537 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 538 int i; 539 540 /* parse address translation table */ 541 for (i = 0; i < dcfg->att_size; i++) { 542 const struct imx_rproc_att *att = &dcfg->att[i]; 543 544 /* 545 * Ignore entries not belong to current core: 546 * i.MX8QM has dual general M4_[0,1] cores, M4_0's own entries 547 * has "ATT_CORE(0) & BIT(0)" true, M4_1's own entries has 548 * "ATT_CORE(1) & BIT(1)" true. 549 */ 550 if (att->flags & ATT_CORE_MASK) { 551 if (!((BIT(priv->core_index)) & (att->flags & ATT_CORE_MASK))) 552 continue; 553 } 554 555 if (da >= att->da && da + len < att->da + att->size) { 556 unsigned int offset = da - att->da; 557 558 *sys = att->sa + offset; 559 if (is_iomem) 560 *is_iomem = att->flags & ATT_IOMEM; 561 return 0; 562 } 563 } 564 565 dev_warn(priv->dev, "Translation failed: da = 0x%llx len = 0x%zx\n", 566 da, len); 567 return -ENOENT; 568 } 569 570 static void *imx_rproc_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem) 571 { 572 struct imx_rproc *priv = rproc->priv; 573 void *va = NULL; 574 u64 sys; 575 int i; 576 577 if (len == 0) 578 return NULL; 579 580 /* 581 * On device side we have many aliases, so we need to convert device 582 * address (M4) to system bus address first. 583 */ 584 if (imx_rproc_da_to_sys(priv, da, len, &sys, is_iomem)) 585 return NULL; 586 587 for (i = 0; i < IMX_RPROC_MEM_MAX; i++) { 588 if (sys >= priv->mem[i].sys_addr && sys + len < 589 priv->mem[i].sys_addr + priv->mem[i].size) { 590 unsigned int offset = sys - priv->mem[i].sys_addr; 591 /* __force to make sparse happy with type conversion */ 592 va = (__force void *)(priv->mem[i].cpu_addr + offset); 593 break; 594 } 595 } 596 597 dev_dbg(&rproc->dev, "da = 0x%llx len = 0x%zx va = 0x%p\n", 598 da, len, va); 599 600 return va; 601 } 602 603 static int imx_rproc_mem_alloc(struct rproc *rproc, 604 struct rproc_mem_entry *mem) 605 { 606 struct device *dev = rproc->dev.parent; 607 void *va; 608 609 dev_dbg(dev, "map memory: %p+%zx\n", &mem->dma, mem->len); 610 va = ioremap_wc(mem->dma, mem->len); 611 if (IS_ERR_OR_NULL(va)) { 612 dev_err(dev, "Unable to map memory region: %p+%zx\n", 613 &mem->dma, mem->len); 614 return -ENOMEM; 615 } 616 617 /* Update memory entry va */ 618 mem->va = va; 619 620 return 0; 621 } 622 623 static int imx_rproc_mem_release(struct rproc *rproc, 624 struct rproc_mem_entry *mem) 625 { 626 dev_dbg(rproc->dev.parent, "unmap memory: %pa\n", &mem->dma); 627 iounmap(mem->va); 628 629 return 0; 630 } 631 632 static int imx_rproc_sm_lmm_prepare(struct rproc *rproc) 633 { 634 struct imx_rproc *priv = rproc->priv; 635 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 636 int ret; 637 638 /* 639 * IMX_RPROC_FLAGS_SM_LMM_CTRL not set indicates Linux is not able 640 * to start/stop M7, then if rproc is not in detached state, 641 * prepare should fail. If in detached state, this is in rproc_attach() 642 * path. 643 */ 644 if (rproc->state == RPROC_DETACHED) 645 return 0; 646 647 if (!(priv->flags & IMX_RPROC_FLAGS_SM_LMM_CTRL)) 648 return -EACCES; 649 650 /* Power on the Logical Machine to make sure TCM is available. */ 651 ret = scmi_imx_lmm_operation(dcfg->lmid, SCMI_IMX_LMM_POWER_ON, 0); 652 if (ret) { 653 dev_err(priv->dev, "Failed to power on lmm(%d): %d\n", dcfg->lmid, ret); 654 return ret; 655 } 656 657 dev_info(priv->dev, "lmm(%d) powered on by Linux\n", dcfg->lmid); 658 659 return 0; 660 } 661 662 static int imx_rproc_prepare(struct rproc *rproc) 663 { 664 struct imx_rproc *priv = rproc->priv; 665 struct device_node *np = priv->dev->of_node; 666 struct rproc_mem_entry *mem; 667 int i = 0; 668 u32 da; 669 670 /* Register associated reserved memory regions */ 671 while (1) { 672 int err; 673 struct resource res; 674 675 err = of_reserved_mem_region_to_resource(np, i++, &res); 676 if (err) 677 break; 678 679 /* 680 * Ignore the first memory region which will be used vdev buffer. 681 * No need to do extra handlings, rproc_add_virtio_dev will handle it. 682 */ 683 if (strstarts(res.name, "vdev0buffer")) 684 continue; 685 686 if (strstarts(res.name, "rsc-table")) 687 continue; 688 689 /* No need to translate pa to da, i.MX use same map */ 690 da = res.start; 691 692 /* Register memory region */ 693 mem = rproc_mem_entry_init(priv->dev, NULL, (dma_addr_t)res.start, 694 resource_size(&res), da, 695 imx_rproc_mem_alloc, imx_rproc_mem_release, 696 "%.*s", strchrnul(res.name, '@') - res.name, 697 res.name); 698 if (!mem) 699 return -ENOMEM; 700 701 rproc_coredump_add_segment(rproc, da, resource_size(&res)); 702 rproc_add_carveout(rproc, mem); 703 } 704 705 if (priv->ops && priv->ops->prepare) 706 return priv->ops->prepare(rproc); 707 708 return 0; 709 } 710 711 static int imx_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw) 712 { 713 int ret; 714 715 ret = rproc_elf_load_rsc_table(rproc, fw); 716 if (ret) 717 dev_info(&rproc->dev, "No resource table in elf\n"); 718 719 return 0; 720 } 721 722 static void imx_rproc_kick(struct rproc *rproc, int vqid) 723 { 724 struct imx_rproc *priv = rproc->priv; 725 int err; 726 __u32 mmsg; 727 728 if (!priv->tx_ch) { 729 dev_err(priv->dev, "No initialized mbox tx channel\n"); 730 return; 731 } 732 733 /* 734 * Send the index of the triggered virtqueue as the mu payload. 735 * Let remote processor know which virtqueue is used. 736 */ 737 mmsg = vqid << 16; 738 739 err = mbox_send_message(priv->tx_ch, (void *)&mmsg); 740 if (err < 0) 741 dev_err(priv->dev, "%s: failed (%d, err:%d)\n", 742 __func__, vqid, err); 743 } 744 745 static int imx_rproc_attach(struct rproc *rproc) 746 { 747 return imx_rproc_xtr_mbox_init(rproc, true); 748 } 749 750 static int imx_rproc_scu_api_detach(struct rproc *rproc) 751 { 752 struct imx_rproc *priv = rproc->priv; 753 754 if (imx_sc_rm_is_resource_owned(priv->ipc_handle, priv->rsrc_id)) 755 return -EOPNOTSUPP; 756 757 imx_rproc_free_mbox(rproc); 758 759 return 0; 760 } 761 762 static int imx_rproc_detach(struct rproc *rproc) 763 { 764 struct imx_rproc *priv = rproc->priv; 765 766 if (!priv->ops || !priv->ops->detach) 767 return -EOPNOTSUPP; 768 769 return priv->ops->detach(rproc); 770 } 771 772 static struct resource_table *imx_rproc_get_loaded_rsc_table(struct rproc *rproc, size_t *table_sz) 773 { 774 struct imx_rproc *priv = rproc->priv; 775 776 /* The resource table has already been mapped in imx_rproc_addr_init */ 777 if (!priv->rsc_table) 778 return NULL; 779 780 *table_sz = SZ_1K; 781 return (struct resource_table *)priv->rsc_table; 782 } 783 784 static struct resource_table * 785 imx_rproc_elf_find_loaded_rsc_table(struct rproc *rproc, const struct firmware *fw) 786 { 787 struct imx_rproc *priv = rproc->priv; 788 789 /* No resource table in the firmware */ 790 if (!rproc->table_ptr) 791 return NULL; 792 793 if (priv->rsc_table) 794 return (struct resource_table *)priv->rsc_table; 795 796 return rproc_elf_find_loaded_rsc_table(rproc, fw); 797 } 798 799 static const struct rproc_ops imx_rproc_ops = { 800 .prepare = imx_rproc_prepare, 801 .attach = imx_rproc_attach, 802 .detach = imx_rproc_detach, 803 .start = imx_rproc_start, 804 .stop = imx_rproc_stop, 805 .kick = imx_rproc_kick, 806 .da_to_va = imx_rproc_da_to_va, 807 .load = rproc_elf_load_segments, 808 .parse_fw = imx_rproc_parse_fw, 809 .find_loaded_rsc_table = imx_rproc_elf_find_loaded_rsc_table, 810 .get_loaded_rsc_table = imx_rproc_get_loaded_rsc_table, 811 .sanity_check = rproc_elf_sanity_check, 812 .get_boot_addr = rproc_elf_get_boot_addr, 813 }; 814 815 static int imx_rproc_addr_init(struct imx_rproc *priv, 816 struct platform_device *pdev) 817 { 818 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 819 struct device *dev = &pdev->dev; 820 struct device_node *np = dev->of_node; 821 int a, b = 0, err, nph; 822 823 /* remap required addresses */ 824 for (a = 0; a < dcfg->att_size; a++) { 825 const struct imx_rproc_att *att = &dcfg->att[a]; 826 827 if (!(att->flags & ATT_OWN)) 828 continue; 829 830 if (b >= IMX_RPROC_MEM_MAX) 831 break; 832 833 if (att->flags & ATT_IOMEM) 834 priv->mem[b].cpu_addr = devm_ioremap(&pdev->dev, 835 att->sa, att->size); 836 else 837 priv->mem[b].cpu_addr = devm_ioremap_wc(&pdev->dev, 838 att->sa, att->size); 839 if (!priv->mem[b].cpu_addr) { 840 dev_err(dev, "failed to remap %#x bytes from %#x\n", att->size, att->sa); 841 return -ENOMEM; 842 } 843 priv->mem[b].sys_addr = att->sa; 844 priv->mem[b].size = att->size; 845 b++; 846 } 847 848 /* memory-region is optional property */ 849 nph = of_reserved_mem_region_count(np); 850 if (nph <= 0) 851 return 0; 852 853 /* remap optional addresses */ 854 for (a = 0; a < nph; a++) { 855 struct resource res; 856 857 err = of_reserved_mem_region_to_resource(np, a, &res); 858 if (err) { 859 dev_err(dev, "unable to resolve memory region\n"); 860 return err; 861 } 862 863 /* Not map vdevbuffer, vdevring region */ 864 if (strstarts(res.name, "vdev")) 865 continue; 866 867 if (b >= IMX_RPROC_MEM_MAX) 868 break; 869 870 /* Not use resource version, because we might share region */ 871 priv->mem[b].cpu_addr = devm_ioremap_resource_wc(&pdev->dev, &res); 872 if (IS_ERR(priv->mem[b].cpu_addr)) { 873 dev_err(dev, "failed to remap %pr\n", &res); 874 return -ENOMEM; 875 } 876 priv->mem[b].sys_addr = res.start; 877 priv->mem[b].size = resource_size(&res); 878 if (strstarts(res.name, "rsc-table")) 879 priv->rsc_table = priv->mem[b].cpu_addr; 880 b++; 881 } 882 883 return 0; 884 } 885 886 static int imx_rproc_notified_idr_cb(int id, void *ptr, void *data) 887 { 888 struct rproc *rproc = data; 889 890 rproc_vq_interrupt(rproc, id); 891 892 return 0; 893 } 894 895 static void imx_rproc_vq_work(struct work_struct *work) 896 { 897 struct imx_rproc *priv = container_of(work, struct imx_rproc, 898 rproc_work); 899 struct rproc *rproc = priv->rproc; 900 901 idr_for_each(&rproc->notifyids, imx_rproc_notified_idr_cb, rproc); 902 } 903 904 static void imx_rproc_rx_callback(struct mbox_client *cl, void *msg) 905 { 906 struct rproc *rproc = dev_get_drvdata(cl->dev); 907 struct imx_rproc *priv = rproc->priv; 908 909 queue_work(priv->workqueue, &priv->rproc_work); 910 } 911 912 static int imx_rproc_xtr_mbox_init(struct rproc *rproc, bool tx_block) 913 { 914 struct imx_rproc *priv = rproc->priv; 915 struct device *dev = priv->dev; 916 struct mbox_client *cl; 917 918 /* 919 * stop() and detach() will free the mbox channels, so need 920 * to request mbox channels in start() and attach(). 921 * 922 * Because start() and attach() not able to handle mbox defer 923 * probe, imx_rproc_xtr_mbox_init is also called in probe(). 924 * The check is to avoid request mbox again when start() or 925 * attach() after probe() returns success. 926 */ 927 if (priv->tx_ch && priv->rx_ch) 928 return 0; 929 930 if (!of_property_present(dev->of_node, "mbox-names")) 931 return 0; 932 933 cl = &priv->cl; 934 cl->dev = dev; 935 cl->tx_block = tx_block; 936 cl->tx_tout = 100; 937 cl->knows_txdone = false; 938 cl->rx_callback = imx_rproc_rx_callback; 939 940 priv->tx_ch = mbox_request_channel_byname(cl, "tx"); 941 if (IS_ERR(priv->tx_ch)) 942 return dev_err_probe(cl->dev, PTR_ERR(priv->tx_ch), 943 "failed to request tx mailbox channel\n"); 944 945 priv->rx_ch = mbox_request_channel_byname(cl, "rx"); 946 if (IS_ERR(priv->rx_ch)) { 947 mbox_free_channel(priv->tx_ch); 948 return dev_err_probe(cl->dev, PTR_ERR(priv->rx_ch), 949 "failed to request rx mailbox channel\n"); 950 } 951 952 return 0; 953 } 954 955 static void imx_rproc_free_mbox(void *data) 956 { 957 struct rproc *rproc = data; 958 struct imx_rproc *priv = rproc->priv; 959 960 if (priv->tx_ch) { 961 mbox_free_channel(priv->tx_ch); 962 priv->tx_ch = NULL; 963 } 964 965 if (priv->rx_ch) { 966 mbox_free_channel(priv->rx_ch); 967 priv->rx_ch = NULL; 968 } 969 } 970 971 static void imx_rproc_put_scu(void *data) 972 { 973 struct imx_rproc *priv = data; 974 975 if (imx_sc_rm_is_resource_owned(priv->ipc_handle, priv->rsrc_id)) { 976 dev_pm_domain_detach_list(priv->pd_list); 977 return; 978 } 979 980 imx_scu_irq_group_enable(IMX_SC_IRQ_GROUP_REBOOTED, BIT(priv->rproc_pt), false); 981 imx_scu_irq_unregister_notifier(&priv->rproc_nb); 982 } 983 984 static int imx_rproc_partition_notify(struct notifier_block *nb, 985 unsigned long event, void *group) 986 { 987 struct imx_rproc *priv = container_of(nb, struct imx_rproc, rproc_nb); 988 989 /* Ignore other irqs */ 990 if (!((event & BIT(priv->rproc_pt)) && (*(u8 *)group == IMX_SC_IRQ_GROUP_REBOOTED))) 991 return 0; 992 993 rproc_report_crash(priv->rproc, RPROC_WATCHDOG); 994 995 pr_info("Partition%d reset!\n", priv->rproc_pt); 996 997 return 0; 998 } 999 1000 static int imx_rproc_attach_pd(struct imx_rproc *priv) 1001 { 1002 struct device *dev = priv->dev; 1003 int ret, i; 1004 bool detached = true; 1005 1006 /* 1007 * If there is only one power-domain entry, the platform driver framework 1008 * will handle it, no need handle it in this driver. 1009 */ 1010 if (dev->pm_domain) 1011 return 0; 1012 1013 ret = dev_pm_domain_attach_list(dev, NULL, &priv->pd_list); 1014 if (ret < 0) 1015 return ret; 1016 /* 1017 * If all the power domain devices are already turned on, the remote 1018 * core is already powered up and running when the kernel booted (e.g., 1019 * started by U-Boot's bootaux command). In this case attach to it. 1020 */ 1021 for (i = 0; i < ret; i++) { 1022 if (!dev_pm_genpd_is_on(priv->pd_list->pd_devs[i])) { 1023 detached = false; 1024 break; 1025 } 1026 } 1027 1028 if (detached) 1029 priv->rproc->state = RPROC_DETACHED; 1030 1031 return 0; 1032 } 1033 1034 static int imx_rproc_arm_smc_detect_mode(struct rproc *rproc) 1035 { 1036 struct imx_rproc *priv = rproc->priv; 1037 struct arm_smccc_res res; 1038 1039 arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_STARTED, 0, 0, 0, 0, 0, 0, &res); 1040 if (res.a0) 1041 priv->rproc->state = RPROC_DETACHED; 1042 1043 return 0; 1044 } 1045 1046 static int imx_rproc_mmio_detect_mode(struct rproc *rproc) 1047 { 1048 const struct regmap_config config = { .name = "imx-rproc" }; 1049 struct imx_rproc *priv = rproc->priv; 1050 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 1051 struct device *dev = priv->dev; 1052 struct regmap *regmap; 1053 u32 val; 1054 int ret; 1055 1056 priv->gpr = syscon_regmap_lookup_by_phandle(dev->of_node, "fsl,iomuxc-gpr"); 1057 if (IS_ERR(priv->gpr)) 1058 priv->gpr = NULL; 1059 1060 regmap = syscon_regmap_lookup_by_phandle(dev->of_node, "syscon"); 1061 if (IS_ERR(regmap)) { 1062 dev_err(dev, "failed to find syscon\n"); 1063 return PTR_ERR(regmap); 1064 } 1065 1066 priv->regmap = regmap; 1067 ret = regmap_attach_dev(dev, regmap, &config); 1068 if (ret) { 1069 dev_err(dev, "regmap attach failed\n"); 1070 return ret; 1071 } 1072 1073 if (priv->gpr) { 1074 ret = regmap_read(priv->gpr, dcfg->gpr_reg, &val); 1075 if (val & dcfg->gpr_wait) { 1076 /* 1077 * After cold boot, the CM indicates its in wait 1078 * state, but not fully powered off. Power it off 1079 * fully so firmware can be loaded into it. 1080 */ 1081 imx_rproc_stop(priv->rproc); 1082 return 0; 1083 } 1084 } 1085 1086 ret = regmap_read(regmap, dcfg->src_reg, &val); 1087 if (ret) { 1088 dev_err(dev, "Failed to read src\n"); 1089 return ret; 1090 } 1091 1092 if ((val & dcfg->src_mask) != dcfg->src_stop) 1093 priv->rproc->state = RPROC_DETACHED; 1094 1095 return 0; 1096 } 1097 1098 static int imx_rproc_scu_api_detect_mode(struct rproc *rproc) 1099 { 1100 struct imx_rproc *priv = rproc->priv; 1101 struct device *dev = priv->dev; 1102 int ret; 1103 u8 pt; 1104 1105 ret = imx_scu_get_handle(&priv->ipc_handle); 1106 if (ret) 1107 return ret; 1108 ret = of_property_read_u32(dev->of_node, "fsl,resource-id", &priv->rsrc_id); 1109 if (ret) { 1110 dev_err(dev, "No fsl,resource-id property\n"); 1111 return ret; 1112 } 1113 1114 if (priv->rsrc_id == IMX_SC_R_M4_1_PID0) 1115 priv->core_index = 1; 1116 else 1117 priv->core_index = 0; 1118 1119 ret = devm_add_action_or_reset(dev, imx_rproc_put_scu, priv); 1120 if (ret) 1121 return dev_err_probe(dev, ret, "Failed to add action for put scu\n"); 1122 1123 /* 1124 * If Mcore resource is not owned by Acore partition, It is kicked by ROM, 1125 * and Linux could only do IPC with Mcore and nothing else. 1126 */ 1127 if (imx_sc_rm_is_resource_owned(priv->ipc_handle, priv->rsrc_id)) { 1128 if (of_property_read_u32(dev->of_node, "fsl,entry-address", &priv->entry)) 1129 return -EINVAL; 1130 1131 return imx_rproc_attach_pd(priv); 1132 } 1133 1134 priv->rproc->state = RPROC_DETACHED; 1135 priv->rproc->recovery_disabled = false; 1136 rproc_set_feature(priv->rproc, RPROC_FEAT_ATTACH_ON_RECOVERY); 1137 1138 /* Get partition id and enable irq in SCFW */ 1139 ret = imx_sc_rm_get_resource_owner(priv->ipc_handle, priv->rsrc_id, &pt); 1140 if (ret) { 1141 dev_err(dev, "not able to get resource owner\n"); 1142 return ret; 1143 } 1144 1145 priv->rproc_pt = pt; 1146 priv->rproc_nb.notifier_call = imx_rproc_partition_notify; 1147 1148 ret = imx_scu_irq_register_notifier(&priv->rproc_nb); 1149 if (ret) { 1150 dev_err(dev, "register scu notifier failed, %d\n", ret); 1151 return ret; 1152 } 1153 1154 ret = imx_scu_irq_group_enable(IMX_SC_IRQ_GROUP_REBOOTED, BIT(priv->rproc_pt), 1155 true); 1156 if (ret) { 1157 imx_scu_irq_unregister_notifier(&priv->rproc_nb); 1158 dev_err(dev, "Enable irq failed, %d\n", ret); 1159 return ret; 1160 } 1161 1162 return 0; 1163 } 1164 1165 /* Check whether remoteproc core is responsible for M7 lifecycle */ 1166 static int imx_rproc_sm_lmm_check(struct rproc *rproc, bool started) 1167 { 1168 struct imx_rproc *priv = rproc->priv; 1169 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 1170 struct device *dev = priv->dev; 1171 int ret; 1172 1173 ret = scmi_imx_lmm_operation(dcfg->lmid, SCMI_IMX_LMM_POWER_ON, 0); 1174 if (ret) { 1175 if (ret == -EACCES) { 1176 /* 1177 * M7 is booted before Linux and not under Linux Control, so only 1178 * do IPC between RPROC and Linux, not return failure 1179 */ 1180 dev_info(dev, "lmm(%d) not under Linux Control\n", dcfg->lmid); 1181 return 0; 1182 } 1183 1184 dev_err(dev, "power on lmm(%d) failed: %d\n", dcfg->lmid, ret); 1185 return ret; 1186 } 1187 1188 /* Shutdown remote processor if not started */ 1189 if (!started) { 1190 ret = scmi_imx_lmm_operation(dcfg->lmid, SCMI_IMX_LMM_SHUTDOWN, 0); 1191 if (ret) { 1192 dev_err(dev, "shutdown lmm(%d) failed: %d\n", dcfg->lmid, ret); 1193 return ret; 1194 } 1195 } 1196 1197 priv->flags |= IMX_RPROC_FLAGS_SM_LMM_CTRL; 1198 1199 return 0; 1200 } 1201 1202 static int imx_rproc_sm_detect_mode(struct rproc *rproc) 1203 { 1204 struct imx_rproc *priv = rproc->priv; 1205 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 1206 struct device *dev = priv->dev; 1207 struct scmi_imx_lmm_info info; 1208 bool started = false; 1209 int ret; 1210 1211 ret = scmi_imx_cpu_started(dcfg->cpuid, &started); 1212 if (ret) { 1213 dev_err(dev, "Failed to detect cpu(%d) status: %d\n", dcfg->cpuid, ret); 1214 return ret; 1215 } 1216 1217 if (started) 1218 priv->rproc->state = RPROC_DETACHED; 1219 1220 /* Get current Linux Logical Machine ID */ 1221 ret = scmi_imx_lmm_info(LMM_ID_DISCOVER, &info); 1222 if (ret) { 1223 dev_err(dev, "Failed to get current LMM ID err: %d\n", ret); 1224 return ret; 1225 } 1226 1227 /* 1228 * Check whether M7 is in the same LM as host core(running Linux) 1229 * If yes, use CPU protocol API to manage M7. 1230 * If no, use Logical Machine API to manage M7. 1231 */ 1232 if (dcfg->lmid == info.lmid) { 1233 priv->ops = &imx_rproc_ops_sm_cpu; 1234 dev_info(dev, "Using CPU Protocol OPS\n"); 1235 return 0; 1236 } 1237 1238 priv->ops = &imx_rproc_ops_sm_lmm; 1239 dev_info(dev, "Using LMM Protocol OPS\n"); 1240 1241 return imx_rproc_sm_lmm_check(rproc, started); 1242 } 1243 1244 static int imx_rproc_detect_mode(struct imx_rproc *priv) 1245 { 1246 /* 1247 * To i.MX{7,8} ULP, Linux is under control of RTOS, no need 1248 * priv->ops or priv->ops->detect_mode, it is state RPROC_DETACHED. 1249 */ 1250 if (!priv->ops || !priv->ops->detect_mode) { 1251 priv->rproc->state = RPROC_DETACHED; 1252 return 0; 1253 } 1254 1255 return priv->ops->detect_mode(priv->rproc); 1256 } 1257 1258 static int imx_rproc_sys_off_handler(struct sys_off_data *data) 1259 { 1260 struct rproc *rproc = data->cb_data; 1261 int ret; 1262 1263 imx_rproc_free_mbox(rproc); 1264 1265 ret = imx_rproc_xtr_mbox_init(rproc, false); 1266 if (ret) { 1267 dev_err(&rproc->dev, "Failed to request non-blocking mbox\n"); 1268 return NOTIFY_BAD; 1269 } 1270 1271 return NOTIFY_DONE; 1272 } 1273 1274 static void imx_rproc_destroy_workqueue(void *data) 1275 { 1276 struct workqueue_struct *workqueue = data; 1277 1278 destroy_workqueue(workqueue); 1279 } 1280 1281 static int imx_rproc_probe(struct platform_device *pdev) 1282 { 1283 struct device *dev = &pdev->dev; 1284 struct device_node *np = dev->of_node; 1285 struct imx_rproc *priv; 1286 struct rproc *rproc; 1287 const struct imx_rproc_dcfg *dcfg; 1288 int ret; 1289 1290 rproc = devm_rproc_alloc(dev, np->name, &imx_rproc_ops, 1291 NULL, sizeof(*priv)); 1292 if (!rproc) 1293 return -ENOMEM; 1294 1295 dcfg = of_device_get_match_data(dev); 1296 if (!dcfg) 1297 return -EINVAL; 1298 1299 priv = rproc->priv; 1300 priv->rproc = rproc; 1301 priv->dcfg = dcfg; 1302 priv->dev = dev; 1303 1304 if (dcfg->ops) 1305 priv->ops = dcfg->ops; 1306 1307 dev_set_drvdata(dev, rproc); 1308 priv->workqueue = create_workqueue(dev_name(dev)); 1309 if (!priv->workqueue) { 1310 dev_err(dev, "cannot create workqueue\n"); 1311 return -ENOMEM; 1312 } 1313 1314 ret = devm_add_action_or_reset(dev, imx_rproc_destroy_workqueue, priv->workqueue); 1315 if (ret) 1316 return dev_err_probe(dev, ret, "Failed to add devm destroy workqueue action\n"); 1317 1318 INIT_WORK(&priv->rproc_work, imx_rproc_vq_work); 1319 1320 ret = imx_rproc_xtr_mbox_init(rproc, true); 1321 if (ret) 1322 return ret; 1323 1324 ret = devm_add_action_or_reset(dev, imx_rproc_free_mbox, rproc); 1325 if (ret) 1326 return dev_err_probe(dev, ret, 1327 "Failed to add devm free mbox action: %d\n", ret); 1328 1329 ret = imx_rproc_addr_init(priv, pdev); 1330 if (ret) 1331 return dev_err_probe(dev, ret, "failed on imx_rproc_addr_init\n"); 1332 1333 ret = imx_rproc_detect_mode(priv); 1334 if (ret) 1335 return dev_err_probe(dev, ret, "failed on detect mode\n"); 1336 1337 /* 1338 * Handle clocks when remote core is under control of Linux AND the 1339 * clocks are not managed by system firmware. 1340 */ 1341 if (dcfg->flags & IMX_RPROC_NEED_CLKS) { 1342 priv->clk = devm_clk_get_enabled(dev, NULL); 1343 if (IS_ERR(priv->clk)) 1344 return dev_err_probe(dev, PTR_ERR(priv->clk), "Failed to enable clock\n"); 1345 } 1346 1347 if (rproc->state != RPROC_DETACHED) 1348 rproc->auto_boot = of_property_read_bool(np, "fsl,auto-boot"); 1349 1350 if (dcfg->flags & IMX_RPROC_NEED_SYSTEM_OFF) { 1351 /* 1352 * setup mailbox to non-blocking mode in 1353 * [SYS_OFF_MODE_POWER_OFF_PREPARE, SYS_OFF_MODE_RESTART_PREPARE] 1354 * phase before invoking [SYS_OFF_MODE_POWER_OFF, SYS_OFF_MODE_RESTART] 1355 * atomic chain, see kernel/reboot.c. 1356 */ 1357 ret = devm_register_sys_off_handler(dev, SYS_OFF_MODE_POWER_OFF_PREPARE, 1358 SYS_OFF_PRIO_DEFAULT, 1359 imx_rproc_sys_off_handler, rproc); 1360 if (ret) 1361 return dev_err_probe(dev, ret, "register power off handler failure\n"); 1362 1363 ret = devm_register_sys_off_handler(dev, SYS_OFF_MODE_RESTART_PREPARE, 1364 SYS_OFF_PRIO_DEFAULT, 1365 imx_rproc_sys_off_handler, rproc); 1366 if (ret) 1367 return dev_err_probe(dev, ret, "register restart handler failure\n"); 1368 } 1369 1370 pm_runtime_enable(dev); 1371 ret = pm_runtime_resume_and_get(dev); 1372 if (ret) 1373 return dev_err_probe(dev, ret, "pm_runtime get failed\n"); 1374 1375 ret = devm_rproc_add(dev, rproc); 1376 if (ret) { 1377 dev_err(dev, "rproc_add failed\n"); 1378 goto err_put_pm; 1379 } 1380 1381 return 0; 1382 1383 err_put_pm: 1384 pm_runtime_disable(dev); 1385 pm_runtime_put_noidle(dev); 1386 1387 return ret; 1388 } 1389 1390 static void imx_rproc_remove(struct platform_device *pdev) 1391 { 1392 struct rproc *rproc = platform_get_drvdata(pdev); 1393 struct imx_rproc *priv = rproc->priv; 1394 1395 pm_runtime_disable(priv->dev); 1396 pm_runtime_put_noidle(priv->dev); 1397 } 1398 1399 static const struct imx_rproc_plat_ops imx_rproc_ops_arm_smc = { 1400 .start = imx_rproc_arm_smc_start, 1401 .stop = imx_rproc_arm_smc_stop, 1402 .detect_mode = imx_rproc_arm_smc_detect_mode, 1403 }; 1404 1405 static const struct imx_rproc_plat_ops imx_rproc_ops_mmio = { 1406 .start = imx_rproc_mmio_start, 1407 .stop = imx_rproc_mmio_stop, 1408 .detect_mode = imx_rproc_mmio_detect_mode, 1409 }; 1410 1411 static const struct imx_rproc_plat_ops imx_rproc_ops_scu_api = { 1412 .start = imx_rproc_scu_api_start, 1413 .stop = imx_rproc_scu_api_stop, 1414 .detach = imx_rproc_scu_api_detach, 1415 .detect_mode = imx_rproc_scu_api_detect_mode, 1416 }; 1417 1418 static const struct imx_rproc_plat_ops imx_rproc_ops_sm_lmm = { 1419 .detect_mode = imx_rproc_sm_detect_mode, 1420 .prepare = imx_rproc_sm_lmm_prepare, 1421 .start = imx_rproc_sm_lmm_start, 1422 .stop = imx_rproc_sm_lmm_stop, 1423 }; 1424 1425 static const struct imx_rproc_plat_ops imx_rproc_ops_sm_cpu = { 1426 .detect_mode = imx_rproc_sm_detect_mode, 1427 .start = imx_rproc_sm_cpu_start, 1428 .stop = imx_rproc_sm_cpu_stop, 1429 }; 1430 1431 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn_mmio = { 1432 .src_reg = IMX7D_SRC_SCR, 1433 .src_mask = IMX7D_M4_RST_MASK, 1434 .src_start = IMX7D_M4_START, 1435 .src_stop = IMX8M_M7_STOP, 1436 .gpr_reg = IMX8M_GPR22, 1437 .gpr_wait = IMX8M_GPR22_CM7_CPUWAIT, 1438 .att = imx_rproc_att_imx8mn, 1439 .att_size = ARRAY_SIZE(imx_rproc_att_imx8mn), 1440 .ops = &imx_rproc_ops_mmio, 1441 .flags = IMX_RPROC_NEED_CLKS, 1442 }; 1443 1444 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn = { 1445 .att = imx_rproc_att_imx8mn, 1446 .att_size = ARRAY_SIZE(imx_rproc_att_imx8mn), 1447 .ops = &imx_rproc_ops_arm_smc, 1448 .flags = IMX_RPROC_NEED_CLKS, 1449 }; 1450 1451 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mq = { 1452 .src_reg = IMX7D_SRC_SCR, 1453 .src_mask = IMX7D_M4_RST_MASK, 1454 .src_start = IMX7D_M4_START, 1455 .src_stop = IMX7D_M4_STOP, 1456 .att = imx_rproc_att_imx8mq, 1457 .att_size = ARRAY_SIZE(imx_rproc_att_imx8mq), 1458 .ops = &imx_rproc_ops_mmio, 1459 .flags = IMX_RPROC_NEED_CLKS, 1460 }; 1461 1462 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qm = { 1463 .att = imx_rproc_att_imx8qm, 1464 .att_size = ARRAY_SIZE(imx_rproc_att_imx8qm), 1465 .ops = &imx_rproc_ops_scu_api, 1466 }; 1467 1468 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qxp = { 1469 .att = imx_rproc_att_imx8qxp, 1470 .att_size = ARRAY_SIZE(imx_rproc_att_imx8qxp), 1471 .ops = &imx_rproc_ops_scu_api, 1472 }; 1473 1474 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8ulp = { 1475 .att = imx_rproc_att_imx8ulp, 1476 .att_size = ARRAY_SIZE(imx_rproc_att_imx8ulp), 1477 }; 1478 1479 static const struct imx_rproc_dcfg imx_rproc_cfg_imx7ulp = { 1480 .att = imx_rproc_att_imx7ulp, 1481 .att_size = ARRAY_SIZE(imx_rproc_att_imx7ulp), 1482 .flags = IMX_RPROC_NEED_SYSTEM_OFF, 1483 }; 1484 1485 static const struct imx_rproc_dcfg imx_rproc_cfg_imx7d = { 1486 .src_reg = IMX7D_SRC_SCR, 1487 .src_mask = IMX7D_M4_RST_MASK, 1488 .src_start = IMX7D_M4_START, 1489 .src_stop = IMX7D_M4_STOP, 1490 .att = imx_rproc_att_imx7d, 1491 .att_size = ARRAY_SIZE(imx_rproc_att_imx7d), 1492 .ops = &imx_rproc_ops_mmio, 1493 .flags = IMX_RPROC_NEED_CLKS, 1494 }; 1495 1496 static const struct imx_rproc_dcfg imx_rproc_cfg_imx6sx = { 1497 .src_reg = IMX6SX_SRC_SCR, 1498 .src_mask = IMX6SX_M4_RST_MASK, 1499 .src_start = IMX6SX_M4_START, 1500 .src_stop = IMX6SX_M4_STOP, 1501 .att = imx_rproc_att_imx6sx, 1502 .att_size = ARRAY_SIZE(imx_rproc_att_imx6sx), 1503 .ops = &imx_rproc_ops_mmio, 1504 .flags = IMX_RPROC_NEED_CLKS, 1505 }; 1506 1507 static const struct imx_rproc_dcfg imx_rproc_cfg_imx93 = { 1508 .att = imx_rproc_att_imx93, 1509 .att_size = ARRAY_SIZE(imx_rproc_att_imx93), 1510 .ops = &imx_rproc_ops_arm_smc, 1511 .flags = IMX_RPROC_NEED_CLKS, 1512 }; 1513 1514 static const struct imx_rproc_dcfg imx_rproc_cfg_imx94_m70 = { 1515 .att = imx_rproc_att_imx94_m70, 1516 .att_size = ARRAY_SIZE(imx_rproc_att_imx94_m70), 1517 .ops = &imx_rproc_ops_sm_lmm, 1518 .cpuid = 1, 1519 .lmid = 2, 1520 .reset_vector_mask = GENMASK_U32(31, 16), 1521 }; 1522 1523 static const struct imx_rproc_dcfg imx_rproc_cfg_imx94_m71 = { 1524 .att = imx_rproc_att_imx94_m71, 1525 .att_size = ARRAY_SIZE(imx_rproc_att_imx94_m71), 1526 .ops = &imx_rproc_ops_sm_lmm, 1527 .cpuid = 7, 1528 .lmid = 3, 1529 .reset_vector_mask = GENMASK_U32(31, 16), 1530 }; 1531 1532 static const struct imx_rproc_dcfg imx_rproc_cfg_imx94_m33s = { 1533 .att = imx_rproc_att_imx94_m33s, 1534 .att_size = ARRAY_SIZE(imx_rproc_att_imx94_m33s), 1535 .ops = &imx_rproc_ops_sm_lmm, 1536 .cpuid = 8, 1537 .lmid = 1, 1538 .reset_vector_mask = GENMASK_U32(31, 16), 1539 }; 1540 1541 static const struct imx_rproc_dcfg imx_rproc_cfg_imx95_m7 = { 1542 .att = imx_rproc_att_imx95_m7, 1543 .att_size = ARRAY_SIZE(imx_rproc_att_imx95_m7), 1544 .ops = &imx_rproc_ops_sm_lmm, 1545 /* Must align with System Manager Firmware */ 1546 .cpuid = 1, /* Use 1 as cpu id for M7 core */ 1547 .lmid = 1, /* Use 1 as Logical Machine ID where M7 resides */ 1548 .reset_vector_mask = GENMASK_U32(31, 16), 1549 }; 1550 1551 static const struct of_device_id imx_rproc_of_match[] = { 1552 { .compatible = "fsl,imx7ulp-cm4", .data = &imx_rproc_cfg_imx7ulp }, 1553 { .compatible = "fsl,imx7d-cm4", .data = &imx_rproc_cfg_imx7d }, 1554 { .compatible = "fsl,imx6sx-cm4", .data = &imx_rproc_cfg_imx6sx }, 1555 { .compatible = "fsl,imx8mq-cm4", .data = &imx_rproc_cfg_imx8mq }, 1556 { .compatible = "fsl,imx8mm-cm4", .data = &imx_rproc_cfg_imx8mq }, 1557 { .compatible = "fsl,imx8mn-cm7", .data = &imx_rproc_cfg_imx8mn }, 1558 { .compatible = "fsl,imx8mp-cm7", .data = &imx_rproc_cfg_imx8mn }, 1559 { .compatible = "fsl,imx8mn-cm7-mmio", .data = &imx_rproc_cfg_imx8mn_mmio }, 1560 { .compatible = "fsl,imx8mp-cm7-mmio", .data = &imx_rproc_cfg_imx8mn_mmio }, 1561 { .compatible = "fsl,imx8qxp-cm4", .data = &imx_rproc_cfg_imx8qxp }, 1562 { .compatible = "fsl,imx8qm-cm4", .data = &imx_rproc_cfg_imx8qm }, 1563 { .compatible = "fsl,imx8ulp-cm33", .data = &imx_rproc_cfg_imx8ulp }, 1564 { .compatible = "fsl,imx93-cm33", .data = &imx_rproc_cfg_imx93 }, 1565 { .compatible = "fsl,imx94-cm70", .data = &imx_rproc_cfg_imx94_m70 }, 1566 { .compatible = "fsl,imx94-cm71", .data = &imx_rproc_cfg_imx94_m71 }, 1567 { .compatible = "fsl,imx94-cm33s", .data = &imx_rproc_cfg_imx94_m33s }, 1568 { .compatible = "fsl,imx95-cm7", .data = &imx_rproc_cfg_imx95_m7 }, 1569 {}, 1570 }; 1571 MODULE_DEVICE_TABLE(of, imx_rproc_of_match); 1572 1573 static struct platform_driver imx_rproc_driver = { 1574 .probe = imx_rproc_probe, 1575 .remove = imx_rproc_remove, 1576 .driver = { 1577 .name = "imx-rproc", 1578 .of_match_table = imx_rproc_of_match, 1579 }, 1580 }; 1581 1582 module_platform_driver(imx_rproc_driver); 1583 1584 MODULE_LICENSE("GPL v2"); 1585 MODULE_DESCRIPTION("i.MX remote processor control driver"); 1586 MODULE_AUTHOR("Oleksij Rempel <o.rempel@pengutronix.de>"); 1587