1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/sed-opal.h> 15 #include <linux/fault-inject.h> 16 #include <linux/rcupdate.h> 17 #include <linux/wait.h> 18 #include <linux/t10-pi.h> 19 #include <linux/ratelimit_types.h> 20 21 #include <trace/events/block.h> 22 23 extern const struct pr_ops nvme_pr_ops; 24 25 extern unsigned int nvme_io_timeout; 26 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 27 28 extern unsigned int admin_timeout; 29 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 30 31 #define NVME_DEFAULT_KATO 5 32 33 #ifdef CONFIG_ARCH_NO_SG_CHAIN 34 #define NVME_INLINE_SG_CNT 0 35 #define NVME_INLINE_METADATA_SG_CNT 0 36 #else 37 #define NVME_INLINE_SG_CNT 2 38 #define NVME_INLINE_METADATA_SG_CNT 1 39 #endif 40 41 /* 42 * Default to a 4K page size, with the intention to update this 43 * path in the future to accommodate architectures with differing 44 * kernel and IO page sizes. 45 */ 46 #define NVME_CTRL_PAGE_SHIFT 12 47 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 48 49 extern struct workqueue_struct *nvme_wq; 50 extern struct workqueue_struct *nvme_reset_wq; 51 extern struct workqueue_struct *nvme_delete_wq; 52 extern struct mutex nvme_subsystems_lock; 53 54 /* 55 * List of workarounds for devices that required behavior not specified in 56 * the standard. 57 */ 58 enum nvme_quirks { 59 /* 60 * Prefers I/O aligned to a stripe size specified in a vendor 61 * specific Identify field. 62 */ 63 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 64 65 /* 66 * The controller doesn't handle Identify value others than 0 or 1 67 * correctly. 68 */ 69 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 70 71 /* 72 * The controller deterministically returns 0's on reads to 73 * logical blocks that deallocate was called on. 74 */ 75 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 76 77 /* 78 * The controller needs a delay before starts checking the device 79 * readiness, which is done by reading the NVME_CSTS_RDY bit. 80 */ 81 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 82 83 /* 84 * APST should not be used. 85 */ 86 NVME_QUIRK_NO_APST = (1 << 4), 87 88 /* 89 * The deepest sleep state should not be used. 90 */ 91 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 92 93 /* 94 * Problems seen with concurrent commands 95 */ 96 NVME_QUIRK_QDEPTH_ONE = (1 << 6), 97 98 /* 99 * Set MEDIUM priority on SQ creation 100 */ 101 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 102 103 /* 104 * Ignore device provided subnqn. 105 */ 106 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 107 108 /* 109 * Broken Write Zeroes. 110 */ 111 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 112 113 /* 114 * Force simple suspend/resume path. 115 */ 116 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 117 118 /* 119 * Use only one interrupt vector for all queues 120 */ 121 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 122 123 /* 124 * Use non-standard 128 bytes SQEs. 125 */ 126 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 127 128 /* 129 * Prevent tag overlap between queues 130 */ 131 NVME_QUIRK_SHARED_TAGS = (1 << 13), 132 133 /* 134 * Don't change the value of the temperature threshold feature 135 */ 136 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 137 138 /* 139 * The controller doesn't handle the Identify Namespace 140 * Identification Descriptor list subcommand despite claiming 141 * NVMe 1.3 compliance. 142 */ 143 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 144 145 /* 146 * The controller does not properly handle DMA addresses over 147 * 48 bits. 148 */ 149 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 150 151 /* 152 * The controller requires the command_id value be limited, so skip 153 * encoding the generation sequence number. 154 */ 155 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 156 157 /* 158 * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 159 */ 160 NVME_QUIRK_BOGUS_NID = (1 << 18), 161 162 /* 163 * No temperature thresholds for channels other than 0 (Composite). 164 */ 165 NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19), 166 167 /* 168 * Disables simple suspend/resume path. 169 */ 170 NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND = (1 << 20), 171 172 /* 173 * MSI (but not MSI-X) interrupts are broken and never fire. 174 */ 175 NVME_QUIRK_BROKEN_MSI = (1 << 21), 176 177 /* 178 * Align dma pool segment size to 512 bytes 179 */ 180 NVME_QUIRK_DMAPOOL_ALIGN_512 = (1 << 22), 181 }; 182 183 static inline char *nvme_quirk_name(enum nvme_quirks q) 184 { 185 switch (q) { 186 case NVME_QUIRK_STRIPE_SIZE: 187 return "stripe_size"; 188 case NVME_QUIRK_IDENTIFY_CNS: 189 return "identify_cns"; 190 case NVME_QUIRK_DEALLOCATE_ZEROES: 191 return "deallocate_zeroes"; 192 case NVME_QUIRK_DELAY_BEFORE_CHK_RDY: 193 return "delay_before_chk_rdy"; 194 case NVME_QUIRK_NO_APST: 195 return "no_apst"; 196 case NVME_QUIRK_NO_DEEPEST_PS: 197 return "no_deepest_ps"; 198 case NVME_QUIRK_QDEPTH_ONE: 199 return "qdepth_one"; 200 case NVME_QUIRK_MEDIUM_PRIO_SQ: 201 return "medium_prio_sq"; 202 case NVME_QUIRK_IGNORE_DEV_SUBNQN: 203 return "ignore_dev_subnqn"; 204 case NVME_QUIRK_DISABLE_WRITE_ZEROES: 205 return "disable_write_zeroes"; 206 case NVME_QUIRK_SIMPLE_SUSPEND: 207 return "simple_suspend"; 208 case NVME_QUIRK_SINGLE_VECTOR: 209 return "single_vector"; 210 case NVME_QUIRK_128_BYTES_SQES: 211 return "128_bytes_sqes"; 212 case NVME_QUIRK_SHARED_TAGS: 213 return "shared_tags"; 214 case NVME_QUIRK_NO_TEMP_THRESH_CHANGE: 215 return "no_temp_thresh_change"; 216 case NVME_QUIRK_NO_NS_DESC_LIST: 217 return "no_ns_desc_list"; 218 case NVME_QUIRK_DMA_ADDRESS_BITS_48: 219 return "dma_address_bits_48"; 220 case NVME_QUIRK_SKIP_CID_GEN: 221 return "skip_cid_gen"; 222 case NVME_QUIRK_BOGUS_NID: 223 return "bogus_nid"; 224 case NVME_QUIRK_NO_SECONDARY_TEMP_THRESH: 225 return "no_secondary_temp_thresh"; 226 case NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND: 227 return "force_no_simple_suspend"; 228 case NVME_QUIRK_BROKEN_MSI: 229 return "broken_msi"; 230 case NVME_QUIRK_DMAPOOL_ALIGN_512: 231 return "dmapool_align_512"; 232 } 233 234 return "unknown"; 235 } 236 237 /* 238 * Common request structure for NVMe passthrough. All drivers must have 239 * this structure as the first member of their request-private data. 240 */ 241 struct nvme_request { 242 struct nvme_command *cmd; 243 union nvme_result result; 244 u8 genctr; 245 u8 retries; 246 u8 flags; 247 u16 status; 248 #ifdef CONFIG_NVME_MULTIPATH 249 unsigned long start_time; 250 #endif 251 struct nvme_ctrl *ctrl; 252 }; 253 254 /* 255 * Mark a bio as coming in through the mpath node. 256 */ 257 #define REQ_NVME_MPATH REQ_DRV 258 259 enum { 260 NVME_REQ_CANCELLED = (1 << 0), 261 NVME_REQ_USERCMD = (1 << 1), 262 NVME_MPATH_IO_STATS = (1 << 2), 263 NVME_MPATH_CNT_ACTIVE = (1 << 3), 264 }; 265 266 static inline struct nvme_request *nvme_req(struct request *req) 267 { 268 return blk_mq_rq_to_pdu(req); 269 } 270 271 static inline u16 nvme_req_qid(struct request *req) 272 { 273 if (!req->q->queuedata) 274 return 0; 275 276 return req->mq_hctx->queue_num + 1; 277 } 278 279 /* The below value is the specific amount of delay needed before checking 280 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 281 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 282 * found empirically. 283 */ 284 #define NVME_QUIRK_DELAY_AMOUNT 2300 285 286 /* 287 * enum nvme_ctrl_state: Controller state 288 * 289 * @NVME_CTRL_NEW: New controller just allocated, initial state 290 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 291 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 292 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 293 * transport 294 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 295 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 296 * disabled/failed immediately. This state comes 297 * after all async event processing took place and 298 * before ns removal and the controller deletion 299 * progress 300 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 301 * shutdown or removal. In this case we forcibly 302 * kill all inflight I/O as they have no chance to 303 * complete 304 */ 305 enum nvme_ctrl_state { 306 NVME_CTRL_NEW, 307 NVME_CTRL_LIVE, 308 NVME_CTRL_RESETTING, 309 NVME_CTRL_CONNECTING, 310 NVME_CTRL_DELETING, 311 NVME_CTRL_DELETING_NOIO, 312 NVME_CTRL_DEAD, 313 }; 314 315 struct nvme_fault_inject { 316 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 317 struct fault_attr attr; 318 struct dentry *parent; 319 bool dont_retry; /* DNR, do not retry */ 320 u16 status; /* status code */ 321 #endif 322 }; 323 324 enum nvme_ctrl_flags { 325 NVME_CTRL_FAILFAST_EXPIRED = 0, 326 NVME_CTRL_ADMIN_Q_STOPPED = 1, 327 NVME_CTRL_STARTED_ONCE = 2, 328 NVME_CTRL_STOPPED = 3, 329 NVME_CTRL_SKIP_ID_CNS_CS = 4, 330 NVME_CTRL_DIRTY_CAPABILITY = 5, 331 NVME_CTRL_FROZEN = 6, 332 }; 333 334 struct nvme_ctrl { 335 bool comp_seen; 336 bool identified; 337 bool passthru_err_log_enabled; 338 enum nvme_ctrl_state state; 339 spinlock_t lock; 340 struct mutex scan_lock; 341 const struct nvme_ctrl_ops *ops; 342 struct request_queue *admin_q; 343 struct request_queue *connect_q; 344 struct request_queue *fabrics_q; 345 struct device *dev; 346 int instance; 347 int numa_node; 348 struct blk_mq_tag_set *tagset; 349 struct blk_mq_tag_set *admin_tagset; 350 struct list_head namespaces; 351 struct mutex namespaces_lock; 352 struct srcu_struct srcu; 353 struct device ctrl_device; 354 struct device *device; /* char device */ 355 #ifdef CONFIG_NVME_HWMON 356 struct device *hwmon_device; 357 #endif 358 struct cdev cdev; 359 struct work_struct reset_work; 360 struct work_struct delete_work; 361 wait_queue_head_t state_wq; 362 363 struct nvme_subsystem *subsys; 364 struct list_head subsys_entry; 365 366 struct opal_dev *opal_dev; 367 368 u16 cntlid; 369 370 u16 mtfa; 371 u32 ctrl_config; 372 u32 queue_count; 373 u32 admin_timeout; 374 u32 io_timeout; 375 376 u64 cap; 377 u32 max_hw_sectors; 378 u32 max_segments; 379 u32 max_integrity_segments; 380 u32 max_zeroes_sectors; 381 #ifdef CONFIG_BLK_DEV_ZONED 382 u32 max_zone_append; 383 #endif 384 u16 crdt[3]; 385 u16 oncs; 386 u8 dmrl; 387 u32 dmrsl; 388 u16 oacs; 389 u16 sqsize; 390 u32 max_namespaces; 391 atomic_t abort_limit; 392 u8 vwc; 393 u32 vs; 394 u32 sgls; 395 u16 kas; 396 u8 npss; 397 u8 apsta; 398 u16 wctemp; 399 u16 cctemp; 400 u32 oaes; 401 u32 aen_result; 402 u32 ctratt; 403 unsigned int shutdown_timeout; 404 unsigned int kato; 405 bool subsystem; 406 unsigned long quirks; 407 struct nvme_id_power_state psd[32]; 408 struct nvme_effects_log *effects; 409 struct xarray cels; 410 struct work_struct scan_work; 411 struct work_struct async_event_work; 412 struct delayed_work ka_work; 413 struct delayed_work failfast_work; 414 struct nvme_command ka_cmd; 415 unsigned long ka_last_check_time; 416 struct work_struct fw_act_work; 417 unsigned long events; 418 atomic_long_t errors; 419 atomic_long_t nr_reset; 420 421 #ifdef CONFIG_NVME_MULTIPATH 422 /* asymmetric namespace access: */ 423 u8 anacap; 424 u8 anatt; 425 u32 anagrpmax; 426 u32 nanagrpid; 427 struct mutex ana_lock; 428 struct nvme_ana_rsp_hdr *ana_log_buf; 429 size_t ana_log_size; 430 struct timer_list anatt_timer; 431 struct work_struct ana_work; 432 atomic_t nr_active; 433 #endif 434 435 #ifdef CONFIG_NVME_HOST_AUTH 436 struct work_struct dhchap_auth_work; 437 struct mutex dhchap_auth_mutex; 438 struct nvme_dhchap_queue_context *dhchap_ctxs; 439 struct nvme_dhchap_key *host_key; 440 struct nvme_dhchap_key *ctrl_key; 441 u16 transaction; 442 #endif 443 key_serial_t tls_pskid; 444 445 /* Power saving configuration */ 446 u64 ps_max_latency_us; 447 bool apst_enabled; 448 449 /* PCIe only: */ 450 u16 hmmaxd; 451 u32 hmpre; 452 u32 hmmin; 453 u32 hmminds; 454 455 /* Fabrics only */ 456 u32 ioccsz; 457 u32 iorcsz; 458 u16 icdoff; 459 u16 maxcmd; 460 int nr_reconnects; 461 /* accumulate reconenct attempts, as nr_reconnects can reset to zero */ 462 atomic_long_t acc_reconnects; 463 unsigned long flags; 464 struct nvmf_ctrl_options *opts; 465 466 struct page *discard_page; 467 unsigned long discard_page_busy; 468 469 struct nvme_fault_inject fault_inject; 470 471 enum nvme_ctrl_type cntrltype; 472 enum nvme_dctype dctype; 473 474 u16 awupf; /* 0's based value. */ 475 }; 476 477 static inline enum nvme_ctrl_state nvme_ctrl_state(struct nvme_ctrl *ctrl) 478 { 479 return READ_ONCE(ctrl->state); 480 } 481 482 enum nvme_iopolicy { 483 NVME_IOPOLICY_NUMA, 484 NVME_IOPOLICY_RR, 485 NVME_IOPOLICY_QD, 486 }; 487 488 struct nvme_subsystem { 489 int instance; 490 struct device dev; 491 /* 492 * Because we unregister the device on the last put we need 493 * a separate refcount. 494 */ 495 struct kref ref; 496 struct list_head entry; 497 struct mutex lock; 498 struct list_head ctrls; 499 struct list_head nsheads; 500 char subnqn[NVMF_NQN_SIZE]; 501 char serial[20]; 502 char model[40]; 503 char firmware_rev[8]; 504 u8 cmic; 505 enum nvme_subsys_type subtype; 506 u16 vendor_id; 507 struct ida ns_ida; 508 #ifdef CONFIG_NVME_MULTIPATH 509 enum nvme_iopolicy iopolicy; 510 #endif 511 }; 512 513 /* 514 * Container structure for uniqueue namespace identifiers. 515 */ 516 struct nvme_ns_ids { 517 u8 eui64[8]; 518 u8 nguid[16]; 519 uuid_t uuid; 520 u8 csi; 521 }; 522 523 /* 524 * Anchor structure for namespaces. There is one for each namespace in a 525 * NVMe subsystem that any of our controllers can see, and the namespace 526 * structure for each controller is chained of it. For private namespaces 527 * there is a 1:1 relation to our namespace structures, that is ->list 528 * only ever has a single entry for private namespaces. 529 */ 530 struct nvme_ns_head { 531 struct list_head list; 532 struct srcu_struct srcu; 533 struct nvme_subsystem *subsys; 534 struct nvme_ns_ids ids; 535 u8 lba_shift; 536 u16 ms; 537 u16 pi_size; 538 u8 pi_type; 539 u8 guard_type; 540 struct list_head entry; 541 struct kref ref; 542 bool shared; 543 bool rotational; 544 bool passthru_err_log_enabled; 545 struct nvme_effects_log *effects; 546 u64 nuse; 547 unsigned ns_id; 548 int instance; 549 #ifdef CONFIG_BLK_DEV_ZONED 550 u64 zsze; 551 #endif 552 unsigned long features; 553 554 struct ratelimit_state rs_nuse; 555 556 struct cdev cdev; 557 struct device cdev_device; 558 559 struct gendisk *disk; 560 561 u16 nr_plids; 562 u16 *plids; 563 #ifdef CONFIG_NVME_MULTIPATH 564 struct bio_list requeue_list; 565 spinlock_t requeue_lock; 566 struct work_struct requeue_work; 567 struct work_struct partition_scan_work; 568 struct mutex lock; 569 unsigned long flags; 570 struct delayed_work remove_work; 571 unsigned int delayed_removal_secs; 572 atomic_long_t io_requeue_no_usable_path_count; 573 atomic_long_t io_fail_no_available_path_count; 574 #define NVME_NSHEAD_DISK_LIVE 0 575 #define NVME_NSHEAD_QUEUE_IF_NO_PATH 1 576 #define NVME_NSHEAD_CDEV_LIVE 2 577 struct nvme_ns __rcu *current_path[]; 578 #endif 579 }; 580 581 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 582 { 583 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 584 } 585 586 enum nvme_ns_features { 587 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 588 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 589 NVME_NS_DEAC = 1 << 2, /* DEAC bit in Write Zeroes supported */ 590 }; 591 592 struct nvme_ns { 593 struct list_head list; 594 595 struct nvme_ctrl *ctrl; 596 struct request_queue *queue; 597 struct gendisk *disk; 598 #ifdef CONFIG_NVME_MULTIPATH 599 enum nvme_ana_state ana_state; 600 u32 ana_grpid; 601 atomic_long_t failover; 602 #endif 603 atomic_long_t retries; 604 atomic_long_t errors; 605 struct list_head siblings; 606 struct kref kref; 607 struct nvme_ns_head *head; 608 609 unsigned long flags; 610 #define NVME_NS_REMOVING 0 611 #define NVME_NS_ANA_PENDING 2 612 #define NVME_NS_FORCE_RO 3 613 #define NVME_NS_READY 4 614 #define NVME_NS_SYSFS_ATTR_LINK 5 615 #define NVME_NS_CDEV_LIVE 6 616 617 struct cdev cdev; 618 struct device cdev_device; 619 620 struct nvme_fault_inject fault_inject; 621 }; 622 623 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 624 static inline bool nvme_ns_has_pi(struct nvme_ns_head *head) 625 { 626 return head->pi_type && head->ms == head->pi_size; 627 } 628 629 static inline unsigned long nvme_get_virt_boundary(struct nvme_ctrl *ctrl, 630 bool is_admin) 631 { 632 return NVME_CTRL_PAGE_SIZE - 1; 633 } 634 635 struct nvme_ctrl_ops { 636 const char *name; 637 struct module *module; 638 unsigned int flags; 639 #define NVME_F_FABRICS (1 << 0) 640 #define NVME_F_METADATA_SUPPORTED (1 << 1) 641 #define NVME_F_BLOCKING (1 << 2) 642 643 const struct attribute_group **dev_attr_groups; 644 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 645 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 646 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 647 void (*free_ctrl)(struct nvme_ctrl *ctrl); 648 void (*submit_async_event)(struct nvme_ctrl *ctrl); 649 int (*subsystem_reset)(struct nvme_ctrl *ctrl); 650 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 651 void (*stop_ctrl)(struct nvme_ctrl *ctrl); 652 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 653 void (*print_device_info)(struct nvme_ctrl *ctrl); 654 bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl); 655 unsigned long (*get_virt_boundary)(struct nvme_ctrl *ctrl, bool is_admin); 656 }; 657 658 /* 659 * nvme command_id is constructed as such: 660 * | xxxx | xxxxxxxxxxxx | 661 * gen request tag 662 */ 663 #define nvme_genctr_mask(gen) (gen & 0xf) 664 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 665 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 666 #define nvme_tag_from_cid(cid) (cid & 0xfff) 667 668 static inline u16 nvme_cid(struct request *rq) 669 { 670 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 671 } 672 673 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 674 u16 command_id) 675 { 676 u8 genctr = nvme_genctr_from_cid(command_id); 677 u16 tag = nvme_tag_from_cid(command_id); 678 struct request *rq; 679 680 rq = blk_mq_tag_to_rq(tags, tag); 681 if (unlikely(!rq)) { 682 pr_err("could not locate request for tag %#x\n", 683 tag); 684 return NULL; 685 } 686 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 687 dev_err(nvme_req(rq)->ctrl->device, 688 "request %#x genctr mismatch (got %#x expected %#x)\n", 689 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 690 return NULL; 691 } 692 return rq; 693 } 694 695 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 696 u16 command_id) 697 { 698 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 699 } 700 701 /* 702 * Return the length of the string without the space padding 703 */ 704 static inline int nvme_strlen(char *s, int len) 705 { 706 while (s[len - 1] == ' ') 707 len--; 708 return len; 709 } 710 711 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 712 { 713 struct nvme_subsystem *subsys = ctrl->subsys; 714 715 if (ctrl->ops->print_device_info) { 716 ctrl->ops->print_device_info(ctrl); 717 return; 718 } 719 720 dev_err(ctrl->device, 721 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 722 nvme_strlen(subsys->model, sizeof(subsys->model)), 723 subsys->model, nvme_strlen(subsys->firmware_rev, 724 sizeof(subsys->firmware_rev)), 725 subsys->firmware_rev); 726 } 727 728 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 729 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 730 const char *dev_name); 731 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 732 void nvme_should_fail(struct request *req); 733 #else 734 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 735 const char *dev_name) 736 { 737 } 738 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 739 { 740 } 741 static inline void nvme_should_fail(struct request *req) {} 742 #endif 743 744 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 745 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 746 747 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 748 { 749 if (!ctrl->subsystem || !ctrl->ops->subsystem_reset) 750 return -ENOTTY; 751 return ctrl->ops->subsystem_reset(ctrl); 752 } 753 754 /* 755 * Convert a 512B sector number to a device logical block number. 756 */ 757 static inline u64 nvme_sect_to_lba(struct nvme_ns_head *head, sector_t sector) 758 { 759 return sector >> (head->lba_shift - SECTOR_SHIFT); 760 } 761 762 /* 763 * Convert a device logical block number to a 512B sector number. 764 */ 765 static inline sector_t nvme_lba_to_sect(struct nvme_ns_head *head, u64 lba) 766 { 767 return lba << (head->lba_shift - SECTOR_SHIFT); 768 } 769 770 /* 771 * Convert byte length to nvme's 0-based num dwords 772 */ 773 static inline u32 nvme_bytes_to_numd(size_t len) 774 { 775 return (len >> 2) - 1; 776 } 777 778 /* Decode a 2-byte "0's based"/"0-based" field */ 779 static inline u32 from0based(__le16 value) 780 { 781 return (u32)le16_to_cpu(value) + 1; 782 } 783 784 static inline bool nvme_is_ana_error(u16 status) 785 { 786 switch (status & NVME_SCT_SC_MASK) { 787 case NVME_SC_ANA_TRANSITION: 788 case NVME_SC_ANA_INACCESSIBLE: 789 case NVME_SC_ANA_PERSISTENT_LOSS: 790 return true; 791 default: 792 return false; 793 } 794 } 795 796 static inline bool nvme_is_path_error(u16 status) 797 { 798 /* check for a status code type of 'path related status' */ 799 return (status & NVME_SCT_MASK) == NVME_SCT_PATH; 800 } 801 802 /* 803 * Fill in the status and result information from the CQE, and then figure out 804 * if blk-mq will need to use IPI magic to complete the request, and if yes do 805 * so. If not let the caller complete the request without an indirect function 806 * call. 807 */ 808 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 809 union nvme_result result) 810 { 811 struct nvme_request *rq = nvme_req(req); 812 struct nvme_ctrl *ctrl = rq->ctrl; 813 814 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 815 rq->genctr++; 816 817 rq->status = le16_to_cpu(status) >> 1; 818 rq->result = result; 819 /* inject error when permitted by fault injection framework */ 820 nvme_should_fail(req); 821 if (unlikely(blk_should_fake_timeout(req->q))) 822 return true; 823 return blk_mq_complete_request_remote(req); 824 } 825 826 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 827 { 828 get_device(ctrl->device); 829 } 830 831 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 832 { 833 put_device(ctrl->device); 834 } 835 836 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 837 { 838 return !qid && 839 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 840 } 841 842 /* 843 * Returns true for sink states that can't ever transition back to live. 844 */ 845 static inline bool nvme_state_terminal(struct nvme_ctrl *ctrl) 846 { 847 switch (nvme_ctrl_state(ctrl)) { 848 case NVME_CTRL_NEW: 849 case NVME_CTRL_LIVE: 850 case NVME_CTRL_RESETTING: 851 case NVME_CTRL_CONNECTING: 852 return false; 853 case NVME_CTRL_DELETING: 854 case NVME_CTRL_DELETING_NOIO: 855 case NVME_CTRL_DEAD: 856 return true; 857 default: 858 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 859 return true; 860 } 861 } 862 863 void nvme_end_req(struct request *req); 864 void nvme_complete_rq(struct request *req); 865 void nvme_complete_batch_req(struct request *req); 866 867 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 868 void (*fn)(struct request *rq)) 869 { 870 struct request *req; 871 872 rq_list_for_each(&iob->req_list, req) { 873 fn(req); 874 nvme_complete_batch_req(req); 875 } 876 blk_mq_end_request_batch(iob); 877 } 878 879 blk_status_t nvme_host_path_error(struct request *req); 880 bool nvme_cancel_request(struct request *req, void *data); 881 void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 882 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 883 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 884 enum nvme_ctrl_state new_state); 885 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown); 886 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 887 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 888 const struct nvme_ctrl_ops *ops, unsigned long quirks); 889 int nvme_add_ctrl(struct nvme_ctrl *ctrl); 890 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 891 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 892 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 893 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended); 894 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 895 const struct blk_mq_ops *ops, unsigned int cmd_size); 896 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl); 897 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 898 const struct blk_mq_ops *ops, unsigned int nr_maps, 899 unsigned int cmd_size); 900 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl); 901 902 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 903 904 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 905 volatile union nvme_result *res); 906 907 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl); 908 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl); 909 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl); 910 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl); 911 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl); 912 void nvme_sync_queues(struct nvme_ctrl *ctrl); 913 void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 914 void nvme_unfreeze(struct nvme_ctrl *ctrl); 915 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 916 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl); 917 void nvme_start_freeze(struct nvme_ctrl *ctrl); 918 919 static inline enum req_op nvme_req_op(struct nvme_command *cmd) 920 { 921 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 922 } 923 924 #define NVME_QID_ANY -1 925 void nvme_init_request(struct request *req, struct nvme_command *cmd); 926 void nvme_cleanup_cmd(struct request *req); 927 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 928 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 929 struct request *req); 930 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 931 bool queue_live, enum nvme_ctrl_state state); 932 933 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 934 bool queue_live) 935 { 936 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 937 938 if (likely(state == NVME_CTRL_LIVE)) 939 return true; 940 if (ctrl->ops->flags & NVME_F_FABRICS && state == NVME_CTRL_DELETING) 941 return queue_live; 942 return __nvme_check_ready(ctrl, rq, queue_live, state); 943 } 944 945 /* 946 * NSID shall be unique for all shared namespaces, or if at least one of the 947 * following conditions is met: 948 * 1. Namespace Management is supported by the controller 949 * 2. ANA is supported by the controller 950 * 3. NVM Set are supported by the controller 951 * 952 * In other case, private namespace are not required to report a unique NSID. 953 */ 954 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 955 struct nvme_ns_head *head) 956 { 957 return head->shared || 958 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 959 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 960 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 961 } 962 963 /* 964 * Flags for __nvme_submit_sync_cmd() 965 */ 966 typedef __u32 __bitwise nvme_submit_flags_t; 967 968 enum { 969 /* Insert request at the head of the queue */ 970 NVME_SUBMIT_AT_HEAD = (__force nvme_submit_flags_t)(1 << 0), 971 /* Set BLK_MQ_REQ_NOWAIT when allocating request */ 972 NVME_SUBMIT_NOWAIT = (__force nvme_submit_flags_t)(1 << 1), 973 /* Set BLK_MQ_REQ_RESERVED when allocating request */ 974 NVME_SUBMIT_RESERVED = (__force nvme_submit_flags_t)(1 << 2), 975 /* Retry command when NVME_STATUS_DNR is not set in the result */ 976 NVME_SUBMIT_RETRY = (__force nvme_submit_flags_t)(1 << 3), 977 }; 978 979 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 980 void *buf, unsigned bufflen); 981 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 982 union nvme_result *result, void *buffer, unsigned bufflen, 983 int qid, nvme_submit_flags_t flags); 984 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 985 unsigned int dword11, void *buffer, size_t buflen, 986 void *result); 987 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 988 unsigned int dword11, void *buffer, size_t buflen, 989 void *result); 990 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 991 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 992 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 993 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 994 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 995 void nvme_queue_scan(struct nvme_ctrl *ctrl); 996 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 997 void *log, size_t size, u64 offset); 998 bool nvme_tryget_ns_head(struct nvme_ns_head *head); 999 void nvme_put_ns_head(struct nvme_ns_head *head); 1000 int nvme_cdev_add(const char *name, struct cdev *cdev, 1001 struct device *cdev_device, 1002 const struct file_operations *fops, struct module *owner); 1003 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 1004 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode, 1005 unsigned int cmd, unsigned long arg); 1006 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 1007 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode, 1008 unsigned int cmd, unsigned long arg); 1009 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 1010 unsigned long arg); 1011 long nvme_dev_ioctl(struct file *file, unsigned int cmd, 1012 unsigned long arg); 1013 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 1014 struct io_comp_batch *iob, unsigned int poll_flags); 1015 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 1016 unsigned int issue_flags); 1017 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 1018 unsigned int issue_flags); 1019 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1020 struct nvme_id_ns **id); 1021 int nvme_getgeo(struct gendisk *disk, struct hd_geometry *geo); 1022 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 1023 1024 extern const struct attribute_group *nvme_ns_attr_groups[]; 1025 extern const struct attribute_group nvme_ns_mpath_attr_group; 1026 extern const struct pr_ops nvme_pr_ops; 1027 extern const struct block_device_operations nvme_ns_head_ops; 1028 extern const struct attribute_group nvme_dev_attrs_group; 1029 extern const struct attribute_group nvme_dev_diag_attrs_group; 1030 extern const struct attribute_group *nvme_subsys_attrs_groups[]; 1031 extern const struct attribute_group *nvme_dev_attr_groups[]; 1032 extern const struct block_device_operations nvme_bdev_ops; 1033 1034 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 1035 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 1036 #ifdef CONFIG_NVME_MULTIPATH 1037 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 1038 { 1039 return ctrl->ana_log_buf != NULL; 1040 } 1041 1042 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 1043 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 1044 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 1045 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 1046 void nvme_failover_req(struct request *req); 1047 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 1048 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 1049 void nvme_mpath_add_sysfs_link(struct nvme_ns_head *ns); 1050 void nvme_mpath_remove_sysfs_link(struct nvme_ns *ns); 1051 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid); 1052 void nvme_mpath_put_disk(struct nvme_ns_head *head); 1053 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 1054 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 1055 void nvme_mpath_update(struct nvme_ctrl *ctrl); 1056 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 1057 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 1058 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 1059 void nvme_mpath_revalidate_paths(struct nvme_ns_head *head); 1060 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 1061 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 1062 void nvme_mpath_start_request(struct request *rq); 1063 void nvme_mpath_end_request(struct request *rq); 1064 1065 static inline void nvme_trace_bio_complete(struct request *req) 1066 { 1067 struct nvme_ns *ns = req->q->queuedata; 1068 1069 if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio) 1070 trace_block_bio_complete(ns->head->disk->queue, req->bio); 1071 } 1072 1073 extern bool multipath; 1074 extern struct device_attribute dev_attr_ana_grpid; 1075 extern struct device_attribute dev_attr_ana_state; 1076 extern struct device_attribute dev_attr_queue_depth; 1077 extern struct device_attribute dev_attr_numa_nodes; 1078 extern struct device_attribute dev_attr_delayed_removal_secs; 1079 extern struct device_attribute dev_attr_multipath_failover_count; 1080 extern struct device_attribute dev_attr_io_requeue_no_usable_path_count; 1081 extern struct device_attribute dev_attr_io_fail_no_available_path_count; 1082 extern struct device_attribute subsys_attr_iopolicy; 1083 1084 static inline bool nvme_disk_is_ns_head(struct gendisk *disk) 1085 { 1086 return disk->fops == &nvme_ns_head_ops; 1087 } 1088 static inline bool nvme_mpath_queue_if_no_path(struct nvme_ns_head *head) 1089 { 1090 if (test_bit(NVME_NSHEAD_QUEUE_IF_NO_PATH, &head->flags)) 1091 return true; 1092 return false; 1093 } 1094 #else 1095 #define multipath false 1096 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 1097 { 1098 return false; 1099 } 1100 static inline void nvme_failover_req(struct request *req) 1101 { 1102 } 1103 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 1104 { 1105 } 1106 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 1107 struct nvme_ns_head *head) 1108 { 1109 return 0; 1110 } 1111 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid) 1112 { 1113 } 1114 static inline void nvme_mpath_put_disk(struct nvme_ns_head *head) 1115 { 1116 } 1117 static inline void nvme_mpath_add_sysfs_link(struct nvme_ns *ns) 1118 { 1119 } 1120 static inline void nvme_mpath_remove_sysfs_link(struct nvme_ns *ns) 1121 { 1122 } 1123 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 1124 { 1125 return false; 1126 } 1127 static inline void nvme_mpath_revalidate_paths(struct nvme_ns_head *head) 1128 { 1129 } 1130 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 1131 { 1132 } 1133 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 1134 { 1135 } 1136 static inline void nvme_trace_bio_complete(struct request *req) 1137 { 1138 } 1139 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 1140 { 1141 } 1142 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 1143 struct nvme_id_ctrl *id) 1144 { 1145 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 1146 dev_warn(ctrl->device, 1147 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 1148 return 0; 1149 } 1150 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 1151 { 1152 } 1153 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 1154 { 1155 } 1156 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 1157 { 1158 } 1159 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 1160 { 1161 } 1162 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 1163 { 1164 } 1165 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 1166 { 1167 } 1168 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 1169 { 1170 } 1171 static inline void nvme_mpath_start_request(struct request *rq) 1172 { 1173 } 1174 static inline void nvme_mpath_end_request(struct request *rq) 1175 { 1176 } 1177 static inline bool nvme_disk_is_ns_head(struct gendisk *disk) 1178 { 1179 return false; 1180 } 1181 static inline bool nvme_mpath_queue_if_no_path(struct nvme_ns_head *head) 1182 { 1183 return false; 1184 } 1185 #endif /* CONFIG_NVME_MULTIPATH */ 1186 1187 int nvme_ns_get_unique_id(struct nvme_ns *ns, u8 id[16], 1188 enum blk_unique_id type); 1189 1190 struct nvme_zone_info { 1191 u64 zone_size; 1192 unsigned int max_open_zones; 1193 unsigned int max_active_zones; 1194 }; 1195 1196 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 1197 unsigned int nr_zones, struct blk_report_zones_args *args); 1198 int nvme_query_zone_info(struct nvme_ns *ns, unsigned lbaf, 1199 struct nvme_zone_info *zi); 1200 void nvme_update_zone_info(struct nvme_ns *ns, struct queue_limits *lim, 1201 struct nvme_zone_info *zi); 1202 #ifdef CONFIG_BLK_DEV_ZONED 1203 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 1204 struct nvme_command *cmnd, 1205 enum nvme_zone_mgmt_action action); 1206 #else 1207 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 1208 struct request *req, struct nvme_command *cmnd, 1209 enum nvme_zone_mgmt_action action) 1210 { 1211 return BLK_STS_NOTSUPP; 1212 } 1213 #endif 1214 1215 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 1216 { 1217 struct gendisk *disk = dev_to_disk(dev); 1218 1219 WARN_ON(nvme_disk_is_ns_head(disk)); 1220 return disk->private_data; 1221 } 1222 1223 #ifdef CONFIG_NVME_HWMON 1224 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 1225 void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 1226 #else 1227 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 1228 { 1229 return 0; 1230 } 1231 1232 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 1233 { 1234 } 1235 #endif 1236 1237 static inline void nvme_start_request(struct request *rq) 1238 { 1239 if (rq->cmd_flags & REQ_NVME_MPATH) 1240 nvme_mpath_start_request(rq); 1241 blk_mq_start_request(rq); 1242 } 1243 1244 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 1245 { 1246 return ctrl->sgls & (NVME_CTRL_SGLS_BYTE_ALIGNED | 1247 NVME_CTRL_SGLS_DWORD_ALIGNED); 1248 } 1249 1250 static inline bool nvme_ctrl_meta_sgl_supported(struct nvme_ctrl *ctrl) 1251 { 1252 if (ctrl->ops->flags & NVME_F_FABRICS) 1253 return true; 1254 return ctrl->sgls & NVME_CTRL_SGLS_MSDS; 1255 } 1256 1257 #ifdef CONFIG_NVME_HOST_AUTH 1258 int __init nvme_init_auth(void); 1259 void __exit nvme_exit_auth(void); 1260 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl); 1261 void nvme_auth_stop(struct nvme_ctrl *ctrl); 1262 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid); 1263 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid); 1264 void nvme_auth_free(struct nvme_ctrl *ctrl); 1265 void nvme_auth_revoke_tls_key(struct nvme_ctrl *ctrl); 1266 #else 1267 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) 1268 { 1269 return 0; 1270 } 1271 static inline int __init nvme_init_auth(void) 1272 { 1273 return 0; 1274 } 1275 static inline void __exit nvme_exit_auth(void) 1276 { 1277 } 1278 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {}; 1279 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid) 1280 { 1281 return -EPROTONOSUPPORT; 1282 } 1283 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid) 1284 { 1285 return -EPROTONOSUPPORT; 1286 } 1287 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {}; 1288 static inline void nvme_auth_revoke_tls_key(struct nvme_ctrl *ctrl) {}; 1289 #endif 1290 1291 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1292 u8 opcode); 1293 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode); 1294 int nvme_execute_rq(struct request *rq, bool at_head); 1295 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1296 struct nvme_command *cmd, int status); 1297 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 1298 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 1299 bool nvme_get_ns(struct nvme_ns *ns); 1300 void nvme_put_ns(struct nvme_ns *ns); 1301 1302 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 1303 { 1304 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 1305 } 1306 1307 #endif /* _NVME_H */ 1308