1 // SPDX-License-Identifier: GPL-2.0
2
3 /*
4 * Hyper-V stub IOMMU driver.
5 *
6 * Copyright (C) 2019, Microsoft, Inc.
7 *
8 * Author : Lan Tianyu <Tianyu.Lan@microsoft.com>
9 */
10
11 #include <linux/types.h>
12 #include <linux/interrupt.h>
13 #include <linux/irq.h>
14 #include <linux/iommu.h>
15 #include <linux/module.h>
16
17 #include <asm/apic.h>
18 #include <asm/cpu.h>
19 #include <asm/hw_irq.h>
20 #include <asm/io_apic.h>
21 #include <asm/irq_remapping.h>
22 #include <asm/hypervisor.h>
23 #include <asm/mshyperv.h>
24
25 #include "irq_remapping.h"
26
27 #ifdef CONFIG_IRQ_REMAP
28
29 /*
30 * According 82093AA IO-APIC spec , IO APIC has a 24-entry Interrupt
31 * Redirection Table. Hyper-V exposes one single IO-APIC and so define
32 * 24 IO APIC remmapping entries.
33 */
34 #define IOAPIC_REMAPPING_ENTRY 24
35
36 static cpumask_t ioapic_max_cpumask = { CPU_BITS_NONE };
37 static struct irq_domain *ioapic_ir_domain;
38
hyperv_ir_set_affinity(struct irq_data * data,const struct cpumask * mask,bool force)39 static int hyperv_ir_set_affinity(struct irq_data *data,
40 const struct cpumask *mask, bool force)
41 {
42 struct irq_data *parent = data->parent_data;
43 struct irq_cfg *cfg = irqd_cfg(data);
44 int ret;
45
46 /* Return error If new irq affinity is out of ioapic_max_cpumask. */
47 if (!cpumask_subset(mask, &ioapic_max_cpumask))
48 return -EINVAL;
49
50 ret = parent->chip->irq_set_affinity(parent, mask, force);
51 if (ret < 0 || ret == IRQ_SET_MASK_OK_DONE)
52 return ret;
53
54 vector_schedule_cleanup(cfg);
55
56 return 0;
57 }
58
59 static struct irq_chip hyperv_ir_chip = {
60 .name = "HYPERV-IR",
61 .irq_ack = apic_ack_irq,
62 .irq_set_affinity = hyperv_ir_set_affinity,
63 };
64
hyperv_irq_remapping_alloc(struct irq_domain * domain,unsigned int virq,unsigned int nr_irqs,void * arg)65 static int hyperv_irq_remapping_alloc(struct irq_domain *domain,
66 unsigned int virq, unsigned int nr_irqs,
67 void *arg)
68 {
69 struct irq_alloc_info *info = arg;
70 struct irq_data *irq_data;
71 int ret = 0;
72
73 if (!info || info->type != X86_IRQ_ALLOC_TYPE_IOAPIC || nr_irqs > 1)
74 return -EINVAL;
75
76 ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
77 if (ret < 0)
78 return ret;
79
80 irq_data = irq_domain_get_irq_data(domain, virq);
81 if (!irq_data) {
82 irq_domain_free_irqs_common(domain, virq, nr_irqs);
83 return -EINVAL;
84 }
85
86 irq_data->chip = &hyperv_ir_chip;
87
88 /*
89 * Hypver-V IO APIC irq affinity should be in the scope of
90 * ioapic_max_cpumask because no irq remapping support.
91 */
92 irq_data_update_affinity(irq_data, &ioapic_max_cpumask);
93
94 return 0;
95 }
96
hyperv_irq_remapping_free(struct irq_domain * domain,unsigned int virq,unsigned int nr_irqs)97 static void hyperv_irq_remapping_free(struct irq_domain *domain,
98 unsigned int virq, unsigned int nr_irqs)
99 {
100 irq_domain_free_irqs_common(domain, virq, nr_irqs);
101 }
102
hyperv_irq_remapping_select(struct irq_domain * d,struct irq_fwspec * fwspec,enum irq_domain_bus_token bus_token)103 static int hyperv_irq_remapping_select(struct irq_domain *d,
104 struct irq_fwspec *fwspec,
105 enum irq_domain_bus_token bus_token)
106 {
107 /* Claim the only I/O APIC emulated by Hyper-V */
108 return x86_fwspec_is_ioapic(fwspec);
109 }
110
111 static const struct irq_domain_ops hyperv_ir_domain_ops = {
112 .select = hyperv_irq_remapping_select,
113 .alloc = hyperv_irq_remapping_alloc,
114 .free = hyperv_irq_remapping_free,
115 };
116
117 static const struct irq_domain_ops hyperv_root_ir_domain_ops;
hyperv_prepare_irq_remapping(void)118 static int __init hyperv_prepare_irq_remapping(void)
119 {
120 struct fwnode_handle *fn;
121 int i;
122 const char *name;
123 const struct irq_domain_ops *ops;
124
125 /*
126 * For a Hyper-V root partition, ms_hyperv_msi_ext_dest_id()
127 * will always return false.
128 */
129 if (!hypervisor_is_type(X86_HYPER_MS_HYPERV) ||
130 x86_init.hyper.msi_ext_dest_id())
131 return -ENODEV;
132
133 if (hv_root_partition()) {
134 name = "HYPERV-ROOT-IR";
135 ops = &hyperv_root_ir_domain_ops;
136 } else {
137 name = "HYPERV-IR";
138 ops = &hyperv_ir_domain_ops;
139 }
140
141 fn = irq_domain_alloc_named_id_fwnode(name, 0);
142 if (!fn)
143 return -ENOMEM;
144
145 ioapic_ir_domain =
146 irq_domain_create_hierarchy(arch_get_ir_parent_domain(),
147 0, IOAPIC_REMAPPING_ENTRY, fn, ops, NULL);
148
149 if (!ioapic_ir_domain) {
150 irq_domain_free_fwnode(fn);
151 return -ENOMEM;
152 }
153
154 if (hv_root_partition())
155 return 0; /* The rest is only relevant to guests */
156
157 /*
158 * Hyper-V doesn't provide irq remapping function for
159 * IO-APIC and so IO-APIC only accepts 8-bit APIC ID.
160 * Cpu's APIC ID is read from ACPI MADT table and APIC IDs
161 * in the MADT table on Hyper-v are sorted monotonic increasingly.
162 * APIC ID reflects cpu topology. There maybe some APIC ID
163 * gaps when cpu number in a socket is not power of two. Prepare
164 * max cpu affinity for IOAPIC irqs. Scan cpu 0-255 and set cpu
165 * into ioapic_max_cpumask if its APIC ID is less than 256.
166 */
167 for (i = min_t(unsigned int, nr_cpu_ids - 1, 255); i >= 0; i--)
168 if (cpu_possible(i) && cpu_physical_id(i) < 256)
169 cpumask_set_cpu(i, &ioapic_max_cpumask);
170
171 return 0;
172 }
173
hyperv_enable_irq_remapping(void)174 static int __init hyperv_enable_irq_remapping(void)
175 {
176 if (x2apic_supported())
177 return IRQ_REMAP_X2APIC_MODE;
178 return IRQ_REMAP_XAPIC_MODE;
179 }
180
181 struct irq_remap_ops hyperv_irq_remap_ops = {
182 .prepare = hyperv_prepare_irq_remapping,
183 .enable = hyperv_enable_irq_remapping,
184 };
185
186 /* IRQ remapping domain when Linux runs as the root partition */
187 struct hyperv_root_ir_data {
188 u8 ioapic_id;
189 bool is_level;
190 struct hv_interrupt_entry entry;
191 };
192
193 static void
hyperv_root_ir_compose_msi_msg(struct irq_data * irq_data,struct msi_msg * msg)194 hyperv_root_ir_compose_msi_msg(struct irq_data *irq_data, struct msi_msg *msg)
195 {
196 struct hyperv_root_ir_data *data = irq_data->chip_data;
197 struct hv_interrupt_entry entry;
198 const struct cpumask *affinity;
199 struct IO_APIC_route_entry e;
200 struct irq_cfg *cfg;
201 int cpu, ioapic_id;
202 u32 vector;
203
204 cfg = irqd_cfg(irq_data);
205 affinity = irq_data_get_effective_affinity_mask(irq_data);
206 cpu = cpumask_first_and(affinity, cpu_online_mask);
207
208 vector = cfg->vector;
209 ioapic_id = data->ioapic_id;
210
211 if (data->entry.source == HV_DEVICE_TYPE_IOAPIC
212 && data->entry.ioapic_rte.as_uint64) {
213 entry = data->entry;
214
215 (void)hv_unmap_ioapic_interrupt(ioapic_id, &entry);
216
217 data->entry.ioapic_rte.as_uint64 = 0;
218 data->entry.source = 0; /* Invalid source */
219 }
220
221
222 if (hv_map_ioapic_interrupt(ioapic_id, data->is_level, cpu,
223 vector, &entry))
224 return;
225
226 data->entry = entry;
227
228 /* Turn it into an IO_APIC_route_entry, and generate MSI MSG. */
229 e.w1 = entry.ioapic_rte.low_uint32;
230 e.w2 = entry.ioapic_rte.high_uint32;
231
232 memset(msg, 0, sizeof(*msg));
233 msg->arch_data.vector = e.vector;
234 msg->arch_data.delivery_mode = e.delivery_mode;
235 msg->arch_addr_lo.dest_mode_logical = e.dest_mode_logical;
236 msg->arch_addr_lo.dmar_format = e.ir_format;
237 msg->arch_addr_lo.dmar_index_0_14 = e.ir_index_0_14;
238 }
239
hyperv_root_ir_set_affinity(struct irq_data * data,const struct cpumask * mask,bool force)240 static int hyperv_root_ir_set_affinity(struct irq_data *data,
241 const struct cpumask *mask, bool force)
242 {
243 struct irq_data *parent = data->parent_data;
244 struct irq_cfg *cfg = irqd_cfg(data);
245 int ret;
246
247 ret = parent->chip->irq_set_affinity(parent, mask, force);
248 if (ret < 0 || ret == IRQ_SET_MASK_OK_DONE)
249 return ret;
250
251 vector_schedule_cleanup(cfg);
252
253 return 0;
254 }
255
256 static struct irq_chip hyperv_root_ir_chip = {
257 .name = "HYPERV-ROOT-IR",
258 .irq_ack = apic_ack_irq,
259 .irq_set_affinity = hyperv_root_ir_set_affinity,
260 .irq_compose_msi_msg = hyperv_root_ir_compose_msi_msg,
261 };
262
hyperv_root_irq_remapping_alloc(struct irq_domain * domain,unsigned int virq,unsigned int nr_irqs,void * arg)263 static int hyperv_root_irq_remapping_alloc(struct irq_domain *domain,
264 unsigned int virq, unsigned int nr_irqs,
265 void *arg)
266 {
267 struct irq_alloc_info *info = arg;
268 struct irq_data *irq_data;
269 struct hyperv_root_ir_data *data;
270 int ret = 0;
271
272 if (!info || info->type != X86_IRQ_ALLOC_TYPE_IOAPIC || nr_irqs > 1)
273 return -EINVAL;
274
275 ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
276 if (ret < 0)
277 return ret;
278
279 data = kzalloc(sizeof(*data), GFP_KERNEL);
280 if (!data) {
281 irq_domain_free_irqs_common(domain, virq, nr_irqs);
282 return -ENOMEM;
283 }
284
285 irq_data = irq_domain_get_irq_data(domain, virq);
286 if (!irq_data) {
287 kfree(data);
288 irq_domain_free_irqs_common(domain, virq, nr_irqs);
289 return -EINVAL;
290 }
291
292 data->ioapic_id = info->devid;
293 data->is_level = info->ioapic.is_level;
294
295 irq_data->chip = &hyperv_root_ir_chip;
296 irq_data->chip_data = data;
297
298 return 0;
299 }
300
hyperv_root_irq_remapping_free(struct irq_domain * domain,unsigned int virq,unsigned int nr_irqs)301 static void hyperv_root_irq_remapping_free(struct irq_domain *domain,
302 unsigned int virq, unsigned int nr_irqs)
303 {
304 struct irq_data *irq_data;
305 struct hyperv_root_ir_data *data;
306 struct hv_interrupt_entry *e;
307 int i;
308
309 for (i = 0; i < nr_irqs; i++) {
310 irq_data = irq_domain_get_irq_data(domain, virq + i);
311
312 if (irq_data && irq_data->chip_data) {
313 data = irq_data->chip_data;
314 e = &data->entry;
315
316 if (e->source == HV_DEVICE_TYPE_IOAPIC &&
317 e->ioapic_rte.as_uint64)
318 (void)hv_unmap_ioapic_interrupt(data->ioapic_id,
319 &data->entry);
320
321 kfree(data);
322 }
323 }
324
325 irq_domain_free_irqs_common(domain, virq, nr_irqs);
326 }
327
328 static const struct irq_domain_ops hyperv_root_ir_domain_ops = {
329 .select = hyperv_irq_remapping_select,
330 .alloc = hyperv_root_irq_remapping_alloc,
331 .free = hyperv_root_irq_remapping_free,
332 };
333
334 #endif
335