1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * POWERNV cpufreq driver for the IBM POWER processors
4 *
5 * (C) Copyright IBM 2014
6 *
7 * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>
8 */
9
10 #define pr_fmt(fmt) "powernv-cpufreq: " fmt
11
12 #include <linux/kernel.h>
13 #include <linux/sysfs.h>
14 #include <linux/cpumask.h>
15 #include <linux/module.h>
16 #include <linux/cpufreq.h>
17 #include <linux/smp.h>
18 #include <linux/of.h>
19 #include <linux/reboot.h>
20 #include <linux/slab.h>
21 #include <linux/string_choices.h>
22 #include <linux/cpu.h>
23 #include <linux/hashtable.h>
24
25 #include <asm/cputhreads.h>
26 #include <asm/firmware.h>
27 #include <asm/reg.h>
28 #include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */
29 #include <asm/opal.h>
30 #include <linux/timer.h>
31
32 #define CREATE_TRACE_POINTS
33 #include "powernv-trace.h"
34
35 #define POWERNV_MAX_PSTATES_ORDER 8
36 #define POWERNV_MAX_PSTATES (1UL << (POWERNV_MAX_PSTATES_ORDER))
37 #define PMSR_PSAFE_ENABLE (1UL << 30)
38 #define PMSR_SPR_EM_DISABLE (1UL << 31)
39 #define MAX_PSTATE_SHIFT 32
40 #define LPSTATE_SHIFT 48
41 #define GPSTATE_SHIFT 56
42 #define MAX_NR_CHIPS 32
43
44 #define MAX_RAMP_DOWN_TIME 5120
45 /*
46 * On an idle system we want the global pstate to ramp-down from max value to
47 * min over a span of ~5 secs. Also we want it to initially ramp-down slowly and
48 * then ramp-down rapidly later on.
49 *
50 * This gives a percentage rampdown for time elapsed in milliseconds.
51 * ramp_down_percentage = ((ms * ms) >> 18)
52 * ~= 3.8 * (sec * sec)
53 *
54 * At 0 ms ramp_down_percent = 0
55 * At 5120 ms ramp_down_percent = 100
56 */
57 #define ramp_down_percent(time) ((time * time) >> 18)
58
59 /* Interval after which the timer is queued to bring down global pstate */
60 #define GPSTATE_TIMER_INTERVAL 2000
61
62 /**
63 * struct global_pstate_info - Per policy data structure to maintain history of
64 * global pstates
65 * @highest_lpstate_idx: The local pstate index from which we are
66 * ramping down
67 * @elapsed_time: Time in ms spent in ramping down from
68 * highest_lpstate_idx
69 * @last_sampled_time: Time from boot in ms when global pstates were
70 * last set
71 * @last_lpstate_idx: Last set value of local pstate and global
72 * @last_gpstate_idx: pstate in terms of cpufreq table index
73 * @timer: Is used for ramping down if cpu goes idle for
74 * a long time with global pstate held high
75 * @gpstate_lock: A spinlock to maintain synchronization between
76 * routines called by the timer handler and
77 * governer's target_index calls
78 * @policy: Associated CPUFreq policy
79 */
80 struct global_pstate_info {
81 int highest_lpstate_idx;
82 unsigned int elapsed_time;
83 unsigned int last_sampled_time;
84 int last_lpstate_idx;
85 int last_gpstate_idx;
86 spinlock_t gpstate_lock;
87 struct timer_list timer;
88 struct cpufreq_policy *policy;
89 };
90
91 static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
92
93 static DEFINE_HASHTABLE(pstate_revmap, POWERNV_MAX_PSTATES_ORDER);
94 /**
95 * struct pstate_idx_revmap_data: Entry in the hashmap pstate_revmap
96 * indexed by a function of pstate id.
97 *
98 * @pstate_id: pstate id for this entry.
99 *
100 * @cpufreq_table_idx: Index into the powernv_freqs
101 * cpufreq_frequency_table for frequency
102 * corresponding to pstate_id.
103 *
104 * @hentry: hlist_node that hooks this entry into the pstate_revmap
105 * hashtable
106 */
107 struct pstate_idx_revmap_data {
108 u8 pstate_id;
109 unsigned int cpufreq_table_idx;
110 struct hlist_node hentry;
111 };
112
113 static bool rebooting, throttled, occ_reset;
114
115 static const char * const throttle_reason[] = {
116 "No throttling",
117 "Power Cap",
118 "Processor Over Temperature",
119 "Power Supply Failure",
120 "Over Current",
121 "OCC Reset"
122 };
123
124 enum throttle_reason_type {
125 NO_THROTTLE = 0,
126 POWERCAP,
127 CPU_OVERTEMP,
128 POWER_SUPPLY_FAILURE,
129 OVERCURRENT,
130 OCC_RESET_THROTTLE,
131 OCC_MAX_REASON
132 };
133
134 static struct chip {
135 unsigned int id;
136 bool throttled;
137 bool restore;
138 u8 throttle_reason;
139 cpumask_t mask;
140 struct work_struct throttle;
141 int throttle_turbo;
142 int throttle_sub_turbo;
143 int reason[OCC_MAX_REASON];
144 } *chips;
145
146 static int nr_chips;
147 static DEFINE_PER_CPU(struct chip *, chip_info);
148
149 /*
150 * Note:
151 * The set of pstates consists of contiguous integers.
152 * powernv_pstate_info stores the index of the frequency table for
153 * max, min and nominal frequencies. It also stores number of
154 * available frequencies.
155 *
156 * powernv_pstate_info.nominal indicates the index to the highest
157 * non-turbo frequency.
158 */
159 static struct powernv_pstate_info {
160 unsigned int min;
161 unsigned int max;
162 unsigned int nominal;
163 unsigned int nr_pstates;
164 bool wof_enabled;
165 } powernv_pstate_info;
166
extract_pstate(u64 pmsr_val,unsigned int shift)167 static inline u8 extract_pstate(u64 pmsr_val, unsigned int shift)
168 {
169 return ((pmsr_val >> shift) & 0xFF);
170 }
171
172 #define extract_local_pstate(x) extract_pstate(x, LPSTATE_SHIFT)
173 #define extract_global_pstate(x) extract_pstate(x, GPSTATE_SHIFT)
174 #define extract_max_pstate(x) extract_pstate(x, MAX_PSTATE_SHIFT)
175
176 /* Use following functions for conversions between pstate_id and index */
177
178 /*
179 * idx_to_pstate : Returns the pstate id corresponding to the
180 * frequency in the cpufreq frequency table
181 * powernv_freqs indexed by @i.
182 *
183 * If @i is out of bound, this will return the pstate
184 * corresponding to the nominal frequency.
185 */
idx_to_pstate(unsigned int i)186 static inline u8 idx_to_pstate(unsigned int i)
187 {
188 if (unlikely(i >= powernv_pstate_info.nr_pstates)) {
189 pr_warn_once("idx_to_pstate: index %u is out of bound\n", i);
190 return powernv_freqs[powernv_pstate_info.nominal].driver_data;
191 }
192
193 return powernv_freqs[i].driver_data;
194 }
195
196 /*
197 * pstate_to_idx : Returns the index in the cpufreq frequencytable
198 * powernv_freqs for the frequency whose corresponding
199 * pstate id is @pstate.
200 *
201 * If no frequency corresponding to @pstate is found,
202 * this will return the index of the nominal
203 * frequency.
204 */
pstate_to_idx(u8 pstate)205 static unsigned int pstate_to_idx(u8 pstate)
206 {
207 unsigned int key = pstate % POWERNV_MAX_PSTATES;
208 struct pstate_idx_revmap_data *revmap_data;
209
210 hash_for_each_possible(pstate_revmap, revmap_data, hentry, key) {
211 if (revmap_data->pstate_id == pstate)
212 return revmap_data->cpufreq_table_idx;
213 }
214
215 pr_warn_once("pstate_to_idx: pstate 0x%x not found\n", pstate);
216 return powernv_pstate_info.nominal;
217 }
218
reset_gpstates(struct cpufreq_policy * policy)219 static inline void reset_gpstates(struct cpufreq_policy *policy)
220 {
221 struct global_pstate_info *gpstates = policy->driver_data;
222
223 gpstates->highest_lpstate_idx = 0;
224 gpstates->elapsed_time = 0;
225 gpstates->last_sampled_time = 0;
226 gpstates->last_lpstate_idx = 0;
227 gpstates->last_gpstate_idx = 0;
228 }
229
230 /*
231 * Initialize the freq table based on data obtained
232 * from the firmware passed via device-tree
233 */
init_powernv_pstates(void)234 static int init_powernv_pstates(void)
235 {
236 struct device_node *power_mgt;
237 int i, nr_pstates = 0;
238 const __be32 *pstate_ids, *pstate_freqs;
239 u32 len_ids, len_freqs;
240 u32 pstate_min, pstate_max, pstate_nominal;
241 u32 pstate_turbo, pstate_ultra_turbo;
242 int rc = -ENODEV;
243
244 power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
245 if (!power_mgt) {
246 pr_warn("power-mgt node not found\n");
247 return -ENODEV;
248 }
249
250 if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) {
251 pr_warn("ibm,pstate-min node not found\n");
252 goto out;
253 }
254
255 if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) {
256 pr_warn("ibm,pstate-max node not found\n");
257 goto out;
258 }
259
260 if (of_property_read_u32(power_mgt, "ibm,pstate-nominal",
261 &pstate_nominal)) {
262 pr_warn("ibm,pstate-nominal not found\n");
263 goto out;
264 }
265
266 if (of_property_read_u32(power_mgt, "ibm,pstate-ultra-turbo",
267 &pstate_ultra_turbo)) {
268 powernv_pstate_info.wof_enabled = false;
269 goto next;
270 }
271
272 if (of_property_read_u32(power_mgt, "ibm,pstate-turbo",
273 &pstate_turbo)) {
274 powernv_pstate_info.wof_enabled = false;
275 goto next;
276 }
277
278 if (pstate_turbo == pstate_ultra_turbo)
279 powernv_pstate_info.wof_enabled = false;
280 else
281 powernv_pstate_info.wof_enabled = true;
282
283 next:
284 pr_info("cpufreq pstate min 0x%x nominal 0x%x max 0x%x\n", pstate_min,
285 pstate_nominal, pstate_max);
286 pr_info("Workload Optimized Frequency is %s in the platform\n",
287 str_enabled_disabled(powernv_pstate_info.wof_enabled));
288
289 pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids);
290 if (!pstate_ids) {
291 pr_warn("ibm,pstate-ids not found\n");
292 goto out;
293 }
294
295 pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz",
296 &len_freqs);
297 if (!pstate_freqs) {
298 pr_warn("ibm,pstate-frequencies-mhz not found\n");
299 goto out;
300 }
301
302 if (len_ids != len_freqs) {
303 pr_warn("Entries in ibm,pstate-ids and "
304 "ibm,pstate-frequencies-mhz does not match\n");
305 }
306
307 nr_pstates = min(len_ids, len_freqs) / sizeof(u32);
308 if (!nr_pstates) {
309 pr_warn("No PStates found\n");
310 goto out;
311 }
312
313 powernv_pstate_info.nr_pstates = nr_pstates;
314 pr_debug("NR PStates %d\n", nr_pstates);
315
316 for (i = 0; i < nr_pstates; i++) {
317 u32 id = be32_to_cpu(pstate_ids[i]);
318 u32 freq = be32_to_cpu(pstate_freqs[i]);
319 struct pstate_idx_revmap_data *revmap_data;
320 unsigned int key;
321
322 pr_debug("PState id %d freq %d MHz\n", id, freq);
323 powernv_freqs[i].frequency = freq * 1000; /* kHz */
324 powernv_freqs[i].driver_data = id & 0xFF;
325
326 revmap_data = kmalloc(sizeof(*revmap_data), GFP_KERNEL);
327 if (!revmap_data) {
328 rc = -ENOMEM;
329 goto out;
330 }
331
332 revmap_data->pstate_id = id & 0xFF;
333 revmap_data->cpufreq_table_idx = i;
334 key = (revmap_data->pstate_id) % POWERNV_MAX_PSTATES;
335 hash_add(pstate_revmap, &revmap_data->hentry, key);
336
337 if (id == pstate_max)
338 powernv_pstate_info.max = i;
339 if (id == pstate_nominal)
340 powernv_pstate_info.nominal = i;
341 if (id == pstate_min)
342 powernv_pstate_info.min = i;
343
344 if (powernv_pstate_info.wof_enabled && id == pstate_turbo) {
345 int j;
346
347 for (j = i - 1; j >= (int)powernv_pstate_info.max; j--)
348 powernv_freqs[j].flags = CPUFREQ_BOOST_FREQ;
349 }
350 }
351
352 /* End of list marker entry */
353 powernv_freqs[i].frequency = CPUFREQ_TABLE_END;
354
355 of_node_put(power_mgt);
356 return 0;
357 out:
358 of_node_put(power_mgt);
359 return rc;
360 }
361
362 /* Returns the CPU frequency corresponding to the pstate_id. */
pstate_id_to_freq(u8 pstate_id)363 static unsigned int pstate_id_to_freq(u8 pstate_id)
364 {
365 int i;
366
367 i = pstate_to_idx(pstate_id);
368 if (i >= powernv_pstate_info.nr_pstates || i < 0) {
369 pr_warn("PState id 0x%x outside of PState table, reporting nominal id 0x%x instead\n",
370 pstate_id, idx_to_pstate(powernv_pstate_info.nominal));
371 i = powernv_pstate_info.nominal;
372 }
373
374 return powernv_freqs[i].frequency;
375 }
376
377 /*
378 * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by
379 * the firmware
380 */
cpuinfo_nominal_freq_show(struct cpufreq_policy * policy,char * buf)381 static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy,
382 char *buf)
383 {
384 return sprintf(buf, "%u\n",
385 powernv_freqs[powernv_pstate_info.nominal].frequency);
386 }
387
388 static struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq =
389 __ATTR_RO(cpuinfo_nominal_freq);
390
391 static struct freq_attr *powernv_cpu_freq_attr[] = {
392 &cpufreq_freq_attr_cpuinfo_nominal_freq,
393 NULL,
394 };
395
396 #define throttle_attr(name, member) \
397 static ssize_t name##_show(struct cpufreq_policy *policy, char *buf) \
398 { \
399 struct chip *chip = per_cpu(chip_info, policy->cpu); \
400 \
401 return sprintf(buf, "%u\n", chip->member); \
402 } \
403 \
404 static struct freq_attr throttle_attr_##name = __ATTR_RO(name) \
405
406 throttle_attr(unthrottle, reason[NO_THROTTLE]);
407 throttle_attr(powercap, reason[POWERCAP]);
408 throttle_attr(overtemp, reason[CPU_OVERTEMP]);
409 throttle_attr(supply_fault, reason[POWER_SUPPLY_FAILURE]);
410 throttle_attr(overcurrent, reason[OVERCURRENT]);
411 throttle_attr(occ_reset, reason[OCC_RESET_THROTTLE]);
412 throttle_attr(turbo_stat, throttle_turbo);
413 throttle_attr(sub_turbo_stat, throttle_sub_turbo);
414
415 static struct attribute *throttle_attrs[] = {
416 &throttle_attr_unthrottle.attr,
417 &throttle_attr_powercap.attr,
418 &throttle_attr_overtemp.attr,
419 &throttle_attr_supply_fault.attr,
420 &throttle_attr_overcurrent.attr,
421 &throttle_attr_occ_reset.attr,
422 &throttle_attr_turbo_stat.attr,
423 &throttle_attr_sub_turbo_stat.attr,
424 NULL,
425 };
426
427 static const struct attribute_group throttle_attr_grp = {
428 .name = "throttle_stats",
429 .attrs = throttle_attrs,
430 };
431
432 /* Helper routines */
433
434 /* Access helpers to power mgt SPR */
435
get_pmspr(unsigned long sprn)436 static inline unsigned long get_pmspr(unsigned long sprn)
437 {
438 switch (sprn) {
439 case SPRN_PMCR:
440 return mfspr(SPRN_PMCR);
441
442 case SPRN_PMICR:
443 return mfspr(SPRN_PMICR);
444
445 case SPRN_PMSR:
446 return mfspr(SPRN_PMSR);
447 }
448 BUG();
449 }
450
set_pmspr(unsigned long sprn,unsigned long val)451 static inline void set_pmspr(unsigned long sprn, unsigned long val)
452 {
453 switch (sprn) {
454 case SPRN_PMCR:
455 mtspr(SPRN_PMCR, val);
456 return;
457
458 case SPRN_PMICR:
459 mtspr(SPRN_PMICR, val);
460 return;
461 }
462 BUG();
463 }
464
465 /*
466 * Use objects of this type to query/update
467 * pstates on a remote CPU via smp_call_function.
468 */
469 struct powernv_smp_call_data {
470 unsigned int freq;
471 u8 pstate_id;
472 u8 gpstate_id;
473 };
474
475 /*
476 * powernv_read_cpu_freq: Reads the current frequency on this CPU.
477 *
478 * Called via smp_call_function.
479 *
480 * Note: The caller of the smp_call_function should pass an argument of
481 * the type 'struct powernv_smp_call_data *' along with this function.
482 *
483 * The current frequency on this CPU will be returned via
484 * ((struct powernv_smp_call_data *)arg)->freq;
485 */
powernv_read_cpu_freq(void * arg)486 static void powernv_read_cpu_freq(void *arg)
487 {
488 unsigned long pmspr_val;
489 struct powernv_smp_call_data *freq_data = arg;
490
491 pmspr_val = get_pmspr(SPRN_PMSR);
492 freq_data->pstate_id = extract_local_pstate(pmspr_val);
493 freq_data->freq = pstate_id_to_freq(freq_data->pstate_id);
494
495 pr_debug("cpu %d pmsr %016lX pstate_id 0x%x frequency %d kHz\n",
496 raw_smp_processor_id(), pmspr_val, freq_data->pstate_id,
497 freq_data->freq);
498 }
499
500 /*
501 * powernv_cpufreq_get: Returns the CPU frequency as reported by the
502 * firmware for CPU 'cpu'. This value is reported through the sysfs
503 * file cpuinfo_cur_freq.
504 */
powernv_cpufreq_get(unsigned int cpu)505 static unsigned int powernv_cpufreq_get(unsigned int cpu)
506 {
507 struct powernv_smp_call_data freq_data;
508
509 smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq,
510 &freq_data, 1);
511
512 return freq_data.freq;
513 }
514
515 /*
516 * set_pstate: Sets the pstate on this CPU.
517 *
518 * This is called via an smp_call_function.
519 *
520 * The caller must ensure that freq_data is of the type
521 * (struct powernv_smp_call_data *) and the pstate_id which needs to be set
522 * on this CPU should be present in freq_data->pstate_id.
523 */
set_pstate(void * data)524 static void set_pstate(void *data)
525 {
526 unsigned long val;
527 struct powernv_smp_call_data *freq_data = data;
528 unsigned long pstate_ul = freq_data->pstate_id;
529 unsigned long gpstate_ul = freq_data->gpstate_id;
530
531 val = get_pmspr(SPRN_PMCR);
532 val = val & 0x0000FFFFFFFFFFFFULL;
533
534 pstate_ul = pstate_ul & 0xFF;
535 gpstate_ul = gpstate_ul & 0xFF;
536
537 /* Set both global(bits 56..63) and local(bits 48..55) PStates */
538 val = val | (gpstate_ul << 56) | (pstate_ul << 48);
539
540 pr_debug("Setting cpu %d pmcr to %016lX\n",
541 raw_smp_processor_id(), val);
542 set_pmspr(SPRN_PMCR, val);
543 }
544
545 /*
546 * get_nominal_index: Returns the index corresponding to the nominal
547 * pstate in the cpufreq table
548 */
get_nominal_index(void)549 static inline unsigned int get_nominal_index(void)
550 {
551 return powernv_pstate_info.nominal;
552 }
553
powernv_cpufreq_throttle_check(void * data)554 static void powernv_cpufreq_throttle_check(void *data)
555 {
556 struct chip *chip;
557 unsigned int cpu = smp_processor_id();
558 unsigned long pmsr;
559 u8 pmsr_pmax;
560 unsigned int pmsr_pmax_idx;
561
562 pmsr = get_pmspr(SPRN_PMSR);
563 chip = this_cpu_read(chip_info);
564
565 /* Check for Pmax Capping */
566 pmsr_pmax = extract_max_pstate(pmsr);
567 pmsr_pmax_idx = pstate_to_idx(pmsr_pmax);
568 if (pmsr_pmax_idx != powernv_pstate_info.max) {
569 if (chip->throttled)
570 goto next;
571 chip->throttled = true;
572 if (pmsr_pmax_idx > powernv_pstate_info.nominal) {
573 pr_warn_once("CPU %d on Chip %u has Pmax(0x%x) reduced below that of nominal frequency(0x%x)\n",
574 cpu, chip->id, pmsr_pmax,
575 idx_to_pstate(powernv_pstate_info.nominal));
576 chip->throttle_sub_turbo++;
577 } else {
578 chip->throttle_turbo++;
579 }
580 trace_powernv_throttle(chip->id,
581 throttle_reason[chip->throttle_reason],
582 pmsr_pmax);
583 } else if (chip->throttled) {
584 chip->throttled = false;
585 trace_powernv_throttle(chip->id,
586 throttle_reason[chip->throttle_reason],
587 pmsr_pmax);
588 }
589
590 /* Check if Psafe_mode_active is set in PMSR. */
591 next:
592 if (pmsr & PMSR_PSAFE_ENABLE) {
593 throttled = true;
594 pr_info("Pstate set to safe frequency\n");
595 }
596
597 /* Check if SPR_EM_DISABLE is set in PMSR */
598 if (pmsr & PMSR_SPR_EM_DISABLE) {
599 throttled = true;
600 pr_info("Frequency Control disabled from OS\n");
601 }
602
603 if (throttled) {
604 pr_info("PMSR = %16lx\n", pmsr);
605 pr_warn("CPU Frequency could be throttled\n");
606 }
607 }
608
609 /**
610 * calc_global_pstate - Calculate global pstate
611 * @elapsed_time: Elapsed time in milliseconds
612 * @local_pstate_idx: New local pstate
613 * @highest_lpstate_idx: pstate from which its ramping down
614 *
615 * Finds the appropriate global pstate based on the pstate from which its
616 * ramping down and the time elapsed in ramping down. It follows a quadratic
617 * equation which ensures that it reaches ramping down to pmin in 5sec.
618 */
calc_global_pstate(unsigned int elapsed_time,int highest_lpstate_idx,int local_pstate_idx)619 static inline int calc_global_pstate(unsigned int elapsed_time,
620 int highest_lpstate_idx,
621 int local_pstate_idx)
622 {
623 int index_diff;
624
625 /*
626 * Using ramp_down_percent we get the percentage of rampdown
627 * that we are expecting to be dropping. Difference between
628 * highest_lpstate_idx and powernv_pstate_info.min will give a absolute
629 * number of how many pstates we will drop eventually by the end of
630 * 5 seconds, then just scale it get the number pstates to be dropped.
631 */
632 index_diff = ((int)ramp_down_percent(elapsed_time) *
633 (powernv_pstate_info.min - highest_lpstate_idx)) / 100;
634
635 /* Ensure that global pstate is >= to local pstate */
636 if (highest_lpstate_idx + index_diff >= local_pstate_idx)
637 return local_pstate_idx;
638 else
639 return highest_lpstate_idx + index_diff;
640 }
641
queue_gpstate_timer(struct global_pstate_info * gpstates)642 static inline void queue_gpstate_timer(struct global_pstate_info *gpstates)
643 {
644 unsigned int timer_interval;
645
646 /*
647 * Setting up timer to fire after GPSTATE_TIMER_INTERVAL ms, But
648 * if it exceeds MAX_RAMP_DOWN_TIME ms for ramp down time.
649 * Set timer such that it fires exactly at MAX_RAMP_DOWN_TIME
650 * seconds of ramp down time.
651 */
652 if ((gpstates->elapsed_time + GPSTATE_TIMER_INTERVAL)
653 > MAX_RAMP_DOWN_TIME)
654 timer_interval = MAX_RAMP_DOWN_TIME - gpstates->elapsed_time;
655 else
656 timer_interval = GPSTATE_TIMER_INTERVAL;
657
658 mod_timer(&gpstates->timer, jiffies + msecs_to_jiffies(timer_interval));
659 }
660
661 /**
662 * gpstate_timer_handler
663 *
664 * @t: Timer context used to fetch global pstate info struct
665 *
666 * This handler brings down the global pstate closer to the local pstate
667 * according quadratic equation. Queues a new timer if it is still not equal
668 * to local pstate
669 */
gpstate_timer_handler(struct timer_list * t)670 static void gpstate_timer_handler(struct timer_list *t)
671 {
672 struct global_pstate_info *gpstates = timer_container_of(gpstates, t,
673 timer);
674 struct cpufreq_policy *policy = gpstates->policy;
675 int gpstate_idx, lpstate_idx;
676 unsigned long val;
677 unsigned int time_diff = jiffies_to_msecs(jiffies)
678 - gpstates->last_sampled_time;
679 struct powernv_smp_call_data freq_data;
680
681 if (!spin_trylock(&gpstates->gpstate_lock))
682 return;
683 /*
684 * If the timer has migrated to the different cpu then bring
685 * it back to one of the policy->cpus
686 */
687 if (!cpumask_test_cpu(raw_smp_processor_id(), policy->cpus)) {
688 gpstates->timer.expires = jiffies + msecs_to_jiffies(1);
689 add_timer_on(&gpstates->timer, cpumask_first(policy->cpus));
690 spin_unlock(&gpstates->gpstate_lock);
691 return;
692 }
693
694 /*
695 * If PMCR was last updated was using fast_switch then
696 * We may have wrong in gpstate->last_lpstate_idx
697 * value. Hence, read from PMCR to get correct data.
698 */
699 val = get_pmspr(SPRN_PMCR);
700 freq_data.gpstate_id = extract_global_pstate(val);
701 freq_data.pstate_id = extract_local_pstate(val);
702 if (freq_data.gpstate_id == freq_data.pstate_id) {
703 reset_gpstates(policy);
704 spin_unlock(&gpstates->gpstate_lock);
705 return;
706 }
707
708 gpstates->last_sampled_time += time_diff;
709 gpstates->elapsed_time += time_diff;
710
711 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) {
712 gpstate_idx = pstate_to_idx(freq_data.pstate_id);
713 lpstate_idx = gpstate_idx;
714 reset_gpstates(policy);
715 gpstates->highest_lpstate_idx = gpstate_idx;
716 } else {
717 lpstate_idx = pstate_to_idx(freq_data.pstate_id);
718 gpstate_idx = calc_global_pstate(gpstates->elapsed_time,
719 gpstates->highest_lpstate_idx,
720 lpstate_idx);
721 }
722 freq_data.gpstate_id = idx_to_pstate(gpstate_idx);
723 gpstates->last_gpstate_idx = gpstate_idx;
724 gpstates->last_lpstate_idx = lpstate_idx;
725 /*
726 * If local pstate is equal to global pstate, rampdown is over
727 * So timer is not required to be queued.
728 */
729 if (gpstate_idx != gpstates->last_lpstate_idx)
730 queue_gpstate_timer(gpstates);
731
732 set_pstate(&freq_data);
733 spin_unlock(&gpstates->gpstate_lock);
734 }
735
736 /*
737 * powernv_cpufreq_target_index: Sets the frequency corresponding to
738 * the cpufreq table entry indexed by new_index on the cpus in the
739 * mask policy->cpus
740 */
powernv_cpufreq_target_index(struct cpufreq_policy * policy,unsigned int new_index)741 static int powernv_cpufreq_target_index(struct cpufreq_policy *policy,
742 unsigned int new_index)
743 {
744 struct powernv_smp_call_data freq_data;
745 unsigned int cur_msec, gpstate_idx;
746 struct global_pstate_info *gpstates = policy->driver_data;
747
748 if (unlikely(rebooting) && new_index != get_nominal_index())
749 return 0;
750
751 if (!throttled) {
752 /* we don't want to be preempted while
753 * checking if the CPU frequency has been throttled
754 */
755 preempt_disable();
756 powernv_cpufreq_throttle_check(NULL);
757 preempt_enable();
758 }
759
760 cur_msec = jiffies_to_msecs(get_jiffies_64());
761
762 freq_data.pstate_id = idx_to_pstate(new_index);
763 if (!gpstates) {
764 freq_data.gpstate_id = freq_data.pstate_id;
765 goto no_gpstate;
766 }
767
768 spin_lock(&gpstates->gpstate_lock);
769
770 if (!gpstates->last_sampled_time) {
771 gpstate_idx = new_index;
772 gpstates->highest_lpstate_idx = new_index;
773 goto gpstates_done;
774 }
775
776 if (gpstates->last_gpstate_idx < new_index) {
777 gpstates->elapsed_time += cur_msec -
778 gpstates->last_sampled_time;
779
780 /*
781 * If its has been ramping down for more than MAX_RAMP_DOWN_TIME
782 * we should be resetting all global pstate related data. Set it
783 * equal to local pstate to start fresh.
784 */
785 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) {
786 reset_gpstates(policy);
787 gpstates->highest_lpstate_idx = new_index;
788 gpstate_idx = new_index;
789 } else {
790 /* Elaspsed_time is less than 5 seconds, continue to rampdown */
791 gpstate_idx = calc_global_pstate(gpstates->elapsed_time,
792 gpstates->highest_lpstate_idx,
793 new_index);
794 }
795 } else {
796 reset_gpstates(policy);
797 gpstates->highest_lpstate_idx = new_index;
798 gpstate_idx = new_index;
799 }
800
801 /*
802 * If local pstate is equal to global pstate, rampdown is over
803 * So timer is not required to be queued.
804 */
805 if (gpstate_idx != new_index)
806 queue_gpstate_timer(gpstates);
807 else
808 timer_delete_sync(&gpstates->timer);
809
810 gpstates_done:
811 freq_data.gpstate_id = idx_to_pstate(gpstate_idx);
812 gpstates->last_sampled_time = cur_msec;
813 gpstates->last_gpstate_idx = gpstate_idx;
814 gpstates->last_lpstate_idx = new_index;
815
816 spin_unlock(&gpstates->gpstate_lock);
817
818 no_gpstate:
819 /*
820 * Use smp_call_function to send IPI and execute the
821 * mtspr on target CPU. We could do that without IPI
822 * if current CPU is within policy->cpus (core)
823 */
824 smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1);
825 return 0;
826 }
827
powernv_cpufreq_cpu_init(struct cpufreq_policy * policy)828 static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy)
829 {
830 int base, i;
831 struct kernfs_node *kn;
832 struct global_pstate_info *gpstates;
833
834 base = cpu_first_thread_sibling(policy->cpu);
835
836 for (i = 0; i < threads_per_core; i++)
837 cpumask_set_cpu(base + i, policy->cpus);
838
839 kn = kernfs_find_and_get(policy->kobj.sd, throttle_attr_grp.name);
840 if (!kn) {
841 int ret;
842
843 ret = sysfs_create_group(&policy->kobj, &throttle_attr_grp);
844 if (ret) {
845 pr_info("Failed to create throttle stats directory for cpu %d\n",
846 policy->cpu);
847 return ret;
848 }
849 } else {
850 kernfs_put(kn);
851 }
852
853 policy->freq_table = powernv_freqs;
854 policy->fast_switch_possible = true;
855
856 if (pvr_version_is(PVR_POWER9))
857 return 0;
858
859 /* Initialise Gpstate ramp-down timer only on POWER8 */
860 gpstates = kzalloc(sizeof(*gpstates), GFP_KERNEL);
861 if (!gpstates)
862 return -ENOMEM;
863
864 policy->driver_data = gpstates;
865
866 /* initialize timer */
867 gpstates->policy = policy;
868 timer_setup(&gpstates->timer, gpstate_timer_handler,
869 TIMER_PINNED | TIMER_DEFERRABLE);
870 gpstates->timer.expires = jiffies +
871 msecs_to_jiffies(GPSTATE_TIMER_INTERVAL);
872 spin_lock_init(&gpstates->gpstate_lock);
873
874 return 0;
875 }
876
powernv_cpufreq_cpu_exit(struct cpufreq_policy * policy)877 static void powernv_cpufreq_cpu_exit(struct cpufreq_policy *policy)
878 {
879 struct powernv_smp_call_data freq_data;
880 struct global_pstate_info *gpstates = policy->driver_data;
881
882 freq_data.pstate_id = idx_to_pstate(powernv_pstate_info.min);
883 freq_data.gpstate_id = idx_to_pstate(powernv_pstate_info.min);
884 smp_call_function_single(policy->cpu, set_pstate, &freq_data, 1);
885 if (gpstates)
886 timer_delete_sync(&gpstates->timer);
887
888 kfree(policy->driver_data);
889 }
890
powernv_cpufreq_reboot_notifier(struct notifier_block * nb,unsigned long action,void * unused)891 static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb,
892 unsigned long action, void *unused)
893 {
894 int cpu;
895 struct cpufreq_policy *cpu_policy;
896
897 rebooting = true;
898 for_each_online_cpu(cpu) {
899 cpu_policy = cpufreq_cpu_get(cpu);
900 if (!cpu_policy)
901 continue;
902 powernv_cpufreq_target_index(cpu_policy, get_nominal_index());
903 cpufreq_cpu_put(cpu_policy);
904 }
905
906 return NOTIFY_DONE;
907 }
908
909 static struct notifier_block powernv_cpufreq_reboot_nb = {
910 .notifier_call = powernv_cpufreq_reboot_notifier,
911 };
912
powernv_cpufreq_work_fn(struct work_struct * work)913 static void powernv_cpufreq_work_fn(struct work_struct *work)
914 {
915 struct chip *chip = container_of(work, struct chip, throttle);
916 struct cpufreq_policy *policy;
917 unsigned int cpu;
918 cpumask_t mask;
919
920 cpus_read_lock();
921 cpumask_and(&mask, &chip->mask, cpu_online_mask);
922 smp_call_function_any(&mask,
923 powernv_cpufreq_throttle_check, NULL, 0);
924
925 if (!chip->restore)
926 goto out;
927
928 chip->restore = false;
929 for_each_cpu(cpu, &mask) {
930 int index;
931
932 policy = cpufreq_cpu_get(cpu);
933 if (!policy)
934 continue;
935 index = cpufreq_table_find_index_c(policy, policy->cur, false);
936 powernv_cpufreq_target_index(policy, index);
937 cpumask_andnot(&mask, &mask, policy->cpus);
938 cpufreq_cpu_put(policy);
939 }
940 out:
941 cpus_read_unlock();
942 }
943
powernv_cpufreq_occ_msg(struct notifier_block * nb,unsigned long msg_type,void * _msg)944 static int powernv_cpufreq_occ_msg(struct notifier_block *nb,
945 unsigned long msg_type, void *_msg)
946 {
947 struct opal_msg *msg = _msg;
948 struct opal_occ_msg omsg;
949 int i;
950
951 if (msg_type != OPAL_MSG_OCC)
952 return 0;
953
954 omsg.type = be64_to_cpu(msg->params[0]);
955
956 switch (omsg.type) {
957 case OCC_RESET:
958 occ_reset = true;
959 pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n");
960 /*
961 * powernv_cpufreq_throttle_check() is called in
962 * target() callback which can detect the throttle state
963 * for governors like ondemand.
964 * But static governors will not call target() often thus
965 * report throttling here.
966 */
967 if (!throttled) {
968 throttled = true;
969 pr_warn("CPU frequency is throttled for duration\n");
970 }
971
972 break;
973 case OCC_LOAD:
974 pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n");
975 break;
976 case OCC_THROTTLE:
977 omsg.chip = be64_to_cpu(msg->params[1]);
978 omsg.throttle_status = be64_to_cpu(msg->params[2]);
979
980 if (occ_reset) {
981 occ_reset = false;
982 throttled = false;
983 pr_info("OCC Active, CPU frequency is no longer throttled\n");
984
985 for (i = 0; i < nr_chips; i++) {
986 chips[i].restore = true;
987 schedule_work(&chips[i].throttle);
988 }
989
990 return 0;
991 }
992
993 for (i = 0; i < nr_chips; i++)
994 if (chips[i].id == omsg.chip)
995 break;
996
997 if (omsg.throttle_status >= 0 &&
998 omsg.throttle_status <= OCC_MAX_THROTTLE_STATUS) {
999 chips[i].throttle_reason = omsg.throttle_status;
1000 chips[i].reason[omsg.throttle_status]++;
1001 }
1002
1003 if (!omsg.throttle_status)
1004 chips[i].restore = true;
1005
1006 schedule_work(&chips[i].throttle);
1007 }
1008 return 0;
1009 }
1010
1011 static struct notifier_block powernv_cpufreq_opal_nb = {
1012 .notifier_call = powernv_cpufreq_occ_msg,
1013 .next = NULL,
1014 .priority = 0,
1015 };
1016
powernv_fast_switch(struct cpufreq_policy * policy,unsigned int target_freq)1017 static unsigned int powernv_fast_switch(struct cpufreq_policy *policy,
1018 unsigned int target_freq)
1019 {
1020 int index;
1021 struct powernv_smp_call_data freq_data;
1022
1023 index = cpufreq_table_find_index_dl(policy, target_freq, false);
1024 freq_data.pstate_id = powernv_freqs[index].driver_data;
1025 freq_data.gpstate_id = powernv_freqs[index].driver_data;
1026 set_pstate(&freq_data);
1027
1028 return powernv_freqs[index].frequency;
1029 }
1030
1031 static struct cpufreq_driver powernv_cpufreq_driver = {
1032 .name = "powernv-cpufreq",
1033 .flags = CPUFREQ_CONST_LOOPS,
1034 .init = powernv_cpufreq_cpu_init,
1035 .exit = powernv_cpufreq_cpu_exit,
1036 .verify = cpufreq_generic_frequency_table_verify,
1037 .target_index = powernv_cpufreq_target_index,
1038 .fast_switch = powernv_fast_switch,
1039 .get = powernv_cpufreq_get,
1040 .attr = powernv_cpu_freq_attr,
1041 };
1042
init_chip_info(void)1043 static int init_chip_info(void)
1044 {
1045 unsigned int *chip;
1046 unsigned int cpu, i;
1047 unsigned int prev_chip_id = UINT_MAX;
1048 cpumask_t *chip_cpu_mask;
1049 int ret = 0;
1050
1051 chip = kcalloc(num_possible_cpus(), sizeof(*chip), GFP_KERNEL);
1052 if (!chip)
1053 return -ENOMEM;
1054
1055 /* Allocate a chip cpu mask large enough to fit mask for all chips */
1056 chip_cpu_mask = kcalloc(MAX_NR_CHIPS, sizeof(cpumask_t), GFP_KERNEL);
1057 if (!chip_cpu_mask) {
1058 ret = -ENOMEM;
1059 goto free_and_return;
1060 }
1061
1062 for_each_possible_cpu(cpu) {
1063 unsigned int id = cpu_to_chip_id(cpu);
1064
1065 if (prev_chip_id != id) {
1066 prev_chip_id = id;
1067 chip[nr_chips++] = id;
1068 }
1069 cpumask_set_cpu(cpu, &chip_cpu_mask[nr_chips-1]);
1070 }
1071
1072 chips = kcalloc(nr_chips, sizeof(struct chip), GFP_KERNEL);
1073 if (!chips) {
1074 ret = -ENOMEM;
1075 goto out_free_chip_cpu_mask;
1076 }
1077
1078 for (i = 0; i < nr_chips; i++) {
1079 chips[i].id = chip[i];
1080 cpumask_copy(&chips[i].mask, &chip_cpu_mask[i]);
1081 INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn);
1082 for_each_cpu(cpu, &chips[i].mask)
1083 per_cpu(chip_info, cpu) = &chips[i];
1084 }
1085
1086 out_free_chip_cpu_mask:
1087 kfree(chip_cpu_mask);
1088 free_and_return:
1089 kfree(chip);
1090 return ret;
1091 }
1092
clean_chip_info(void)1093 static inline void clean_chip_info(void)
1094 {
1095 int i;
1096
1097 /* flush any pending work items */
1098 if (chips)
1099 for (i = 0; i < nr_chips; i++)
1100 cancel_work_sync(&chips[i].throttle);
1101 kfree(chips);
1102 }
1103
unregister_all_notifiers(void)1104 static inline void unregister_all_notifiers(void)
1105 {
1106 opal_message_notifier_unregister(OPAL_MSG_OCC,
1107 &powernv_cpufreq_opal_nb);
1108 unregister_reboot_notifier(&powernv_cpufreq_reboot_nb);
1109 }
1110
powernv_cpufreq_init(void)1111 static int __init powernv_cpufreq_init(void)
1112 {
1113 int rc = 0;
1114
1115 /* Don't probe on pseries (guest) platforms */
1116 if (!firmware_has_feature(FW_FEATURE_OPAL))
1117 return -ENODEV;
1118
1119 /* Discover pstates from device tree and init */
1120 rc = init_powernv_pstates();
1121 if (rc)
1122 goto out;
1123
1124 /* Populate chip info */
1125 rc = init_chip_info();
1126 if (rc)
1127 goto out;
1128
1129 if (powernv_pstate_info.wof_enabled)
1130 powernv_cpufreq_driver.set_boost = cpufreq_boost_set_sw;
1131
1132 rc = cpufreq_register_driver(&powernv_cpufreq_driver);
1133 if (rc) {
1134 pr_info("Failed to register the cpufreq driver (%d)\n", rc);
1135 goto cleanup;
1136 }
1137
1138 register_reboot_notifier(&powernv_cpufreq_reboot_nb);
1139 opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb);
1140
1141 return 0;
1142 cleanup:
1143 clean_chip_info();
1144 out:
1145 pr_info("Platform driver disabled. System does not support PState control\n");
1146 return rc;
1147 }
1148 module_init(powernv_cpufreq_init);
1149
powernv_cpufreq_exit(void)1150 static void __exit powernv_cpufreq_exit(void)
1151 {
1152 cpufreq_unregister_driver(&powernv_cpufreq_driver);
1153 unregister_all_notifiers();
1154 clean_chip_info();
1155 }
1156 module_exit(powernv_cpufreq_exit);
1157
1158 MODULE_DESCRIPTION("cpufreq driver for IBM/OpenPOWER powernv systems");
1159 MODULE_LICENSE("GPL");
1160 MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>");
1161