1 /*
2 * Driver for the ST Microelectronics SPEAr300 pinmux
3 *
4 * Copyright (C) 2012 ST Microelectronics
5 * Viresh Kumar <vireshk@kernel.org>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12 #include <linux/err.h>
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include "pinctrl-spear3xx.h"
16
17 #define DRIVER_NAME "spear300-pinmux"
18
19 /* addresses */
20 #define PMX_CONFIG_REG 0x00
21 #define MODE_CONFIG_REG 0x04
22
23 /* modes */
24 #define NAND_MODE (1 << 0)
25 #define NOR_MODE (1 << 1)
26 #define PHOTO_FRAME_MODE (1 << 2)
27 #define LEND_IP_PHONE_MODE (1 << 3)
28 #define HEND_IP_PHONE_MODE (1 << 4)
29 #define LEND_WIFI_PHONE_MODE (1 << 5)
30 #define HEND_WIFI_PHONE_MODE (1 << 6)
31 #define ATA_PABX_WI2S_MODE (1 << 7)
32 #define ATA_PABX_I2S_MODE (1 << 8)
33 #define CAML_LCDW_MODE (1 << 9)
34 #define CAMU_LCD_MODE (1 << 10)
35 #define CAMU_WLCD_MODE (1 << 11)
36 #define CAML_LCD_MODE (1 << 12)
37
38 static struct spear_pmx_mode pmx_mode_nand = {
39 .name = "nand",
40 .mode = NAND_MODE,
41 .reg = MODE_CONFIG_REG,
42 .mask = 0x0000000F,
43 .val = 0x00,
44 };
45
46 static struct spear_pmx_mode pmx_mode_nor = {
47 .name = "nor",
48 .mode = NOR_MODE,
49 .reg = MODE_CONFIG_REG,
50 .mask = 0x0000000F,
51 .val = 0x01,
52 };
53
54 static struct spear_pmx_mode pmx_mode_photo_frame = {
55 .name = "photo frame mode",
56 .mode = PHOTO_FRAME_MODE,
57 .reg = MODE_CONFIG_REG,
58 .mask = 0x0000000F,
59 .val = 0x02,
60 };
61
62 static struct spear_pmx_mode pmx_mode_lend_ip_phone = {
63 .name = "lend ip phone mode",
64 .mode = LEND_IP_PHONE_MODE,
65 .reg = MODE_CONFIG_REG,
66 .mask = 0x0000000F,
67 .val = 0x03,
68 };
69
70 static struct spear_pmx_mode pmx_mode_hend_ip_phone = {
71 .name = "hend ip phone mode",
72 .mode = HEND_IP_PHONE_MODE,
73 .reg = MODE_CONFIG_REG,
74 .mask = 0x0000000F,
75 .val = 0x04,
76 };
77
78 static struct spear_pmx_mode pmx_mode_lend_wifi_phone = {
79 .name = "lend wifi phone mode",
80 .mode = LEND_WIFI_PHONE_MODE,
81 .reg = MODE_CONFIG_REG,
82 .mask = 0x0000000F,
83 .val = 0x05,
84 };
85
86 static struct spear_pmx_mode pmx_mode_hend_wifi_phone = {
87 .name = "hend wifi phone mode",
88 .mode = HEND_WIFI_PHONE_MODE,
89 .reg = MODE_CONFIG_REG,
90 .mask = 0x0000000F,
91 .val = 0x06,
92 };
93
94 static struct spear_pmx_mode pmx_mode_ata_pabx_wi2s = {
95 .name = "ata pabx wi2s mode",
96 .mode = ATA_PABX_WI2S_MODE,
97 .reg = MODE_CONFIG_REG,
98 .mask = 0x0000000F,
99 .val = 0x07,
100 };
101
102 static struct spear_pmx_mode pmx_mode_ata_pabx_i2s = {
103 .name = "ata pabx i2s mode",
104 .mode = ATA_PABX_I2S_MODE,
105 .reg = MODE_CONFIG_REG,
106 .mask = 0x0000000F,
107 .val = 0x08,
108 };
109
110 static struct spear_pmx_mode pmx_mode_caml_lcdw = {
111 .name = "caml lcdw mode",
112 .mode = CAML_LCDW_MODE,
113 .reg = MODE_CONFIG_REG,
114 .mask = 0x0000000F,
115 .val = 0x0C,
116 };
117
118 static struct spear_pmx_mode pmx_mode_camu_lcd = {
119 .name = "camu lcd mode",
120 .mode = CAMU_LCD_MODE,
121 .reg = MODE_CONFIG_REG,
122 .mask = 0x0000000F,
123 .val = 0x0D,
124 };
125
126 static struct spear_pmx_mode pmx_mode_camu_wlcd = {
127 .name = "camu wlcd mode",
128 .mode = CAMU_WLCD_MODE,
129 .reg = MODE_CONFIG_REG,
130 .mask = 0x0000000F,
131 .val = 0xE,
132 };
133
134 static struct spear_pmx_mode pmx_mode_caml_lcd = {
135 .name = "caml lcd mode",
136 .mode = CAML_LCD_MODE,
137 .reg = MODE_CONFIG_REG,
138 .mask = 0x0000000F,
139 .val = 0x0F,
140 };
141
142 static struct spear_pmx_mode *spear300_pmx_modes[] = {
143 &pmx_mode_nand,
144 &pmx_mode_nor,
145 &pmx_mode_photo_frame,
146 &pmx_mode_lend_ip_phone,
147 &pmx_mode_hend_ip_phone,
148 &pmx_mode_lend_wifi_phone,
149 &pmx_mode_hend_wifi_phone,
150 &pmx_mode_ata_pabx_wi2s,
151 &pmx_mode_ata_pabx_i2s,
152 &pmx_mode_caml_lcdw,
153 &pmx_mode_camu_lcd,
154 &pmx_mode_camu_wlcd,
155 &pmx_mode_caml_lcd,
156 };
157
158 /* fsmc_2chips_pins */
159 static const unsigned fsmc_2chips_pins[] = { 1, 97 };
160 static struct spear_muxreg fsmc_2chips_muxreg[] = {
161 {
162 .reg = PMX_CONFIG_REG,
163 .mask = PMX_FIRDA_MASK,
164 .val = 0,
165 },
166 };
167
168 static struct spear_modemux fsmc_2chips_modemux[] = {
169 {
170 .modes = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
171 ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
172 .muxregs = fsmc_2chips_muxreg,
173 .nmuxregs = ARRAY_SIZE(fsmc_2chips_muxreg),
174 },
175 };
176
177 static struct spear_pingroup fsmc_2chips_pingroup = {
178 .name = "fsmc_2chips_grp",
179 .pins = fsmc_2chips_pins,
180 .npins = ARRAY_SIZE(fsmc_2chips_pins),
181 .modemuxs = fsmc_2chips_modemux,
182 .nmodemuxs = ARRAY_SIZE(fsmc_2chips_modemux),
183 };
184
185 /* fsmc_4chips_pins */
186 static const unsigned fsmc_4chips_pins[] = { 1, 2, 3, 97 };
187 static struct spear_muxreg fsmc_4chips_muxreg[] = {
188 {
189 .reg = PMX_CONFIG_REG,
190 .mask = PMX_FIRDA_MASK | PMX_UART0_MASK,
191 .val = 0,
192 },
193 };
194
195 static struct spear_modemux fsmc_4chips_modemux[] = {
196 {
197 .modes = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
198 ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
199 .muxregs = fsmc_4chips_muxreg,
200 .nmuxregs = ARRAY_SIZE(fsmc_4chips_muxreg),
201 },
202 };
203
204 static struct spear_pingroup fsmc_4chips_pingroup = {
205 .name = "fsmc_4chips_grp",
206 .pins = fsmc_4chips_pins,
207 .npins = ARRAY_SIZE(fsmc_4chips_pins),
208 .modemuxs = fsmc_4chips_modemux,
209 .nmodemuxs = ARRAY_SIZE(fsmc_4chips_modemux),
210 };
211
212 static const char *const fsmc_grps[] = { "fsmc_2chips_grp", "fsmc_4chips_grp"
213 };
214 static struct spear_function fsmc_function = {
215 .name = "fsmc",
216 .groups = fsmc_grps,
217 .ngroups = ARRAY_SIZE(fsmc_grps),
218 };
219
220 /* clcd_lcdmode_pins */
221 static const unsigned clcd_lcdmode_pins[] = { 49, 50 };
222 static struct spear_muxreg clcd_lcdmode_muxreg[] = {
223 {
224 .reg = PMX_CONFIG_REG,
225 .mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,
226 .val = 0,
227 },
228 };
229
230 static struct spear_modemux clcd_lcdmode_modemux[] = {
231 {
232 .modes = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE |
233 CAMU_LCD_MODE | CAML_LCD_MODE,
234 .muxregs = clcd_lcdmode_muxreg,
235 .nmuxregs = ARRAY_SIZE(clcd_lcdmode_muxreg),
236 },
237 };
238
239 static struct spear_pingroup clcd_lcdmode_pingroup = {
240 .name = "clcd_lcdmode_grp",
241 .pins = clcd_lcdmode_pins,
242 .npins = ARRAY_SIZE(clcd_lcdmode_pins),
243 .modemuxs = clcd_lcdmode_modemux,
244 .nmodemuxs = ARRAY_SIZE(clcd_lcdmode_modemux),
245 };
246
247 /* clcd_pfmode_pins */
248 static const unsigned clcd_pfmode_pins[] = { 47, 48, 49, 50 };
249 static struct spear_muxreg clcd_pfmode_muxreg[] = {
250 {
251 .reg = PMX_CONFIG_REG,
252 .mask = PMX_TIMER_2_3_MASK,
253 .val = 0,
254 },
255 };
256
257 static struct spear_modemux clcd_pfmode_modemux[] = {
258 {
259 .modes = PHOTO_FRAME_MODE,
260 .muxregs = clcd_pfmode_muxreg,
261 .nmuxregs = ARRAY_SIZE(clcd_pfmode_muxreg),
262 },
263 };
264
265 static struct spear_pingroup clcd_pfmode_pingroup = {
266 .name = "clcd_pfmode_grp",
267 .pins = clcd_pfmode_pins,
268 .npins = ARRAY_SIZE(clcd_pfmode_pins),
269 .modemuxs = clcd_pfmode_modemux,
270 .nmodemuxs = ARRAY_SIZE(clcd_pfmode_modemux),
271 };
272
273 static const char *const clcd_grps[] = { "clcd_lcdmode_grp", "clcd_pfmode_grp"
274 };
275 static struct spear_function clcd_function = {
276 .name = "clcd",
277 .groups = clcd_grps,
278 .ngroups = ARRAY_SIZE(clcd_grps),
279 };
280
281 /* tdm_pins */
282 static const unsigned tdm_pins[] = { 34, 35, 36, 37, 38 };
283 static struct spear_muxreg tdm_muxreg[] = {
284 {
285 .reg = PMX_CONFIG_REG,
286 .mask = PMX_UART0_MODEM_MASK | PMX_SSP_CS_MASK,
287 .val = 0,
288 },
289 };
290
291 static struct spear_modemux tdm_modemux[] = {
292 {
293 .modes = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
294 HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE
295 | HEND_WIFI_PHONE_MODE | ATA_PABX_WI2S_MODE
296 | ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
297 | CAMU_WLCD_MODE | CAML_LCD_MODE,
298 .muxregs = tdm_muxreg,
299 .nmuxregs = ARRAY_SIZE(tdm_muxreg),
300 },
301 };
302
303 static struct spear_pingroup tdm_pingroup = {
304 .name = "tdm_grp",
305 .pins = tdm_pins,
306 .npins = ARRAY_SIZE(tdm_pins),
307 .modemuxs = tdm_modemux,
308 .nmodemuxs = ARRAY_SIZE(tdm_modemux),
309 };
310
311 static const char *const tdm_grps[] = { "tdm_grp" };
312 static struct spear_function tdm_function = {
313 .name = "tdm",
314 .groups = tdm_grps,
315 .ngroups = ARRAY_SIZE(tdm_grps),
316 };
317
318 /* i2c_clk_pins */
319 static const unsigned i2c_clk_pins[] = { 45, 46, 47, 48 };
320 static struct spear_muxreg i2c_clk_muxreg[] = {
321 {
322 .reg = PMX_CONFIG_REG,
323 .mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,
324 .val = 0,
325 },
326 };
327
328 static struct spear_modemux i2c_clk_modemux[] = {
329 {
330 .modes = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
331 LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
332 ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE | CAML_LCDW_MODE
333 | CAML_LCD_MODE,
334 .muxregs = i2c_clk_muxreg,
335 .nmuxregs = ARRAY_SIZE(i2c_clk_muxreg),
336 },
337 };
338
339 static struct spear_pingroup i2c_clk_pingroup = {
340 .name = "i2c_clk_grp_grp",
341 .pins = i2c_clk_pins,
342 .npins = ARRAY_SIZE(i2c_clk_pins),
343 .modemuxs = i2c_clk_modemux,
344 .nmodemuxs = ARRAY_SIZE(i2c_clk_modemux),
345 };
346
347 static const char *const i2c_grps[] = { "i2c_clk_grp" };
348 static struct spear_function i2c_function = {
349 .name = "i2c1",
350 .groups = i2c_grps,
351 .ngroups = ARRAY_SIZE(i2c_grps),
352 };
353
354 /* caml_pins */
355 static const unsigned caml_pins[] = { 12, 13, 14, 15, 16, 17, 18, 19, 20, 21 };
356 static struct spear_muxreg caml_muxreg[] = {
357 {
358 .reg = PMX_CONFIG_REG,
359 .mask = PMX_MII_MASK,
360 .val = 0,
361 },
362 };
363
364 static struct spear_modemux caml_modemux[] = {
365 {
366 .modes = CAML_LCDW_MODE | CAML_LCD_MODE,
367 .muxregs = caml_muxreg,
368 .nmuxregs = ARRAY_SIZE(caml_muxreg),
369 },
370 };
371
372 static struct spear_pingroup caml_pingroup = {
373 .name = "caml_grp",
374 .pins = caml_pins,
375 .npins = ARRAY_SIZE(caml_pins),
376 .modemuxs = caml_modemux,
377 .nmodemuxs = ARRAY_SIZE(caml_modemux),
378 };
379
380 /* camu_pins */
381 static const unsigned camu_pins[] = { 16, 17, 18, 19, 20, 21, 45, 46, 47, 48 };
382 static struct spear_muxreg camu_muxreg[] = {
383 {
384 .reg = PMX_CONFIG_REG,
385 .mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK | PMX_MII_MASK,
386 .val = 0,
387 },
388 };
389
390 static struct spear_modemux camu_modemux[] = {
391 {
392 .modes = CAMU_LCD_MODE | CAMU_WLCD_MODE,
393 .muxregs = camu_muxreg,
394 .nmuxregs = ARRAY_SIZE(camu_muxreg),
395 },
396 };
397
398 static struct spear_pingroup camu_pingroup = {
399 .name = "camu_grp",
400 .pins = camu_pins,
401 .npins = ARRAY_SIZE(camu_pins),
402 .modemuxs = camu_modemux,
403 .nmodemuxs = ARRAY_SIZE(camu_modemux),
404 };
405
406 static const char *const cam_grps[] = { "caml_grp", "camu_grp" };
407 static struct spear_function cam_function = {
408 .name = "cam",
409 .groups = cam_grps,
410 .ngroups = ARRAY_SIZE(cam_grps),
411 };
412
413 /* dac_pins */
414 static const unsigned dac_pins[] = { 43, 44 };
415 static struct spear_muxreg dac_muxreg[] = {
416 {
417 .reg = PMX_CONFIG_REG,
418 .mask = PMX_TIMER_0_1_MASK,
419 .val = 0,
420 },
421 };
422
423 static struct spear_modemux dac_modemux[] = {
424 {
425 .modes = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
426 | CAMU_WLCD_MODE | CAML_LCD_MODE,
427 .muxregs = dac_muxreg,
428 .nmuxregs = ARRAY_SIZE(dac_muxreg),
429 },
430 };
431
432 static struct spear_pingroup dac_pingroup = {
433 .name = "dac_grp",
434 .pins = dac_pins,
435 .npins = ARRAY_SIZE(dac_pins),
436 .modemuxs = dac_modemux,
437 .nmodemuxs = ARRAY_SIZE(dac_modemux),
438 };
439
440 static const char *const dac_grps[] = { "dac_grp" };
441 static struct spear_function dac_function = {
442 .name = "dac",
443 .groups = dac_grps,
444 .ngroups = ARRAY_SIZE(dac_grps),
445 };
446
447 /* i2s_pins */
448 static const unsigned i2s_pins[] = { 39, 40, 41, 42 };
449 static struct spear_muxreg i2s_muxreg[] = {
450 {
451 .reg = PMX_CONFIG_REG,
452 .mask = PMX_UART0_MODEM_MASK,
453 .val = 0,
454 },
455 };
456
457 static struct spear_modemux i2s_modemux[] = {
458 {
459 .modes = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE
460 | LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
461 ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
462 | CAMU_WLCD_MODE | CAML_LCD_MODE,
463 .muxregs = i2s_muxreg,
464 .nmuxregs = ARRAY_SIZE(i2s_muxreg),
465 },
466 };
467
468 static struct spear_pingroup i2s_pingroup = {
469 .name = "i2s_grp",
470 .pins = i2s_pins,
471 .npins = ARRAY_SIZE(i2s_pins),
472 .modemuxs = i2s_modemux,
473 .nmodemuxs = ARRAY_SIZE(i2s_modemux),
474 };
475
476 static const char *const i2s_grps[] = { "i2s_grp" };
477 static struct spear_function i2s_function = {
478 .name = "i2s",
479 .groups = i2s_grps,
480 .ngroups = ARRAY_SIZE(i2s_grps),
481 };
482
483 /* sdhci_4bit_pins */
484 static const unsigned sdhci_4bit_pins[] = { 28, 29, 30, 31, 32, 33 };
485 static struct spear_muxreg sdhci_4bit_muxreg[] = {
486 {
487 .reg = PMX_CONFIG_REG,
488 .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
489 PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
490 PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK,
491 .val = 0,
492 },
493 };
494
495 static struct spear_modemux sdhci_4bit_modemux[] = {
496 {
497 .modes = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
498 HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
499 HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
500 CAMU_WLCD_MODE | CAML_LCD_MODE | ATA_PABX_WI2S_MODE,
501 .muxregs = sdhci_4bit_muxreg,
502 .nmuxregs = ARRAY_SIZE(sdhci_4bit_muxreg),
503 },
504 };
505
506 static struct spear_pingroup sdhci_4bit_pingroup = {
507 .name = "sdhci_4bit_grp",
508 .pins = sdhci_4bit_pins,
509 .npins = ARRAY_SIZE(sdhci_4bit_pins),
510 .modemuxs = sdhci_4bit_modemux,
511 .nmodemuxs = ARRAY_SIZE(sdhci_4bit_modemux),
512 };
513
514 /* sdhci_8bit_pins */
515 static const unsigned sdhci_8bit_pins[] = { 24, 25, 26, 27, 28, 29, 30, 31, 32,
516 33 };
517 static struct spear_muxreg sdhci_8bit_muxreg[] = {
518 {
519 .reg = PMX_CONFIG_REG,
520 .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
521 PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
522 PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK | PMX_MII_MASK,
523 .val = 0,
524 },
525 };
526
527 static struct spear_modemux sdhci_8bit_modemux[] = {
528 {
529 .modes = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
530 HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
531 HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
532 CAMU_WLCD_MODE | CAML_LCD_MODE,
533 .muxregs = sdhci_8bit_muxreg,
534 .nmuxregs = ARRAY_SIZE(sdhci_8bit_muxreg),
535 },
536 };
537
538 static struct spear_pingroup sdhci_8bit_pingroup = {
539 .name = "sdhci_8bit_grp",
540 .pins = sdhci_8bit_pins,
541 .npins = ARRAY_SIZE(sdhci_8bit_pins),
542 .modemuxs = sdhci_8bit_modemux,
543 .nmodemuxs = ARRAY_SIZE(sdhci_8bit_modemux),
544 };
545
546 static const char *const sdhci_grps[] = { "sdhci_4bit_grp", "sdhci_8bit_grp" };
547 static struct spear_function sdhci_function = {
548 .name = "sdhci",
549 .groups = sdhci_grps,
550 .ngroups = ARRAY_SIZE(sdhci_grps),
551 };
552
553 /* gpio1_0_to_3_pins */
554 static const unsigned gpio1_0_to_3_pins[] = { 39, 40, 41, 42 };
555 static struct spear_muxreg gpio1_0_to_3_muxreg[] = {
556 {
557 .reg = PMX_CONFIG_REG,
558 .mask = PMX_UART0_MODEM_MASK,
559 .val = 0,
560 },
561 };
562
563 static struct spear_modemux gpio1_0_to_3_modemux[] = {
564 {
565 .modes = PHOTO_FRAME_MODE,
566 .muxregs = gpio1_0_to_3_muxreg,
567 .nmuxregs = ARRAY_SIZE(gpio1_0_to_3_muxreg),
568 },
569 };
570
571 static struct spear_pingroup gpio1_0_to_3_pingroup = {
572 .name = "gpio1_0_to_3_grp",
573 .pins = gpio1_0_to_3_pins,
574 .npins = ARRAY_SIZE(gpio1_0_to_3_pins),
575 .modemuxs = gpio1_0_to_3_modemux,
576 .nmodemuxs = ARRAY_SIZE(gpio1_0_to_3_modemux),
577 };
578
579 /* gpio1_4_to_7_pins */
580 static const unsigned gpio1_4_to_7_pins[] = { 43, 44, 45, 46 };
581
582 static struct spear_muxreg gpio1_4_to_7_muxreg[] = {
583 {
584 .reg = PMX_CONFIG_REG,
585 .mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,
586 .val = 0,
587 },
588 };
589
590 static struct spear_modemux gpio1_4_to_7_modemux[] = {
591 {
592 .modes = PHOTO_FRAME_MODE,
593 .muxregs = gpio1_4_to_7_muxreg,
594 .nmuxregs = ARRAY_SIZE(gpio1_4_to_7_muxreg),
595 },
596 };
597
598 static struct spear_pingroup gpio1_4_to_7_pingroup = {
599 .name = "gpio1_4_to_7_grp",
600 .pins = gpio1_4_to_7_pins,
601 .npins = ARRAY_SIZE(gpio1_4_to_7_pins),
602 .modemuxs = gpio1_4_to_7_modemux,
603 .nmodemuxs = ARRAY_SIZE(gpio1_4_to_7_modemux),
604 };
605
606 static const char *const gpio1_grps[] = { "gpio1_0_to_3_grp", "gpio1_4_to_7_grp"
607 };
608 static struct spear_function gpio1_function = {
609 .name = "gpio1",
610 .groups = gpio1_grps,
611 .ngroups = ARRAY_SIZE(gpio1_grps),
612 };
613
614 /* pingroups */
615 static struct spear_pingroup *spear300_pingroups[] = {
616 SPEAR3XX_COMMON_PINGROUPS,
617 &fsmc_2chips_pingroup,
618 &fsmc_4chips_pingroup,
619 &clcd_lcdmode_pingroup,
620 &clcd_pfmode_pingroup,
621 &tdm_pingroup,
622 &i2c_clk_pingroup,
623 &caml_pingroup,
624 &camu_pingroup,
625 &dac_pingroup,
626 &i2s_pingroup,
627 &sdhci_4bit_pingroup,
628 &sdhci_8bit_pingroup,
629 &gpio1_0_to_3_pingroup,
630 &gpio1_4_to_7_pingroup,
631 };
632
633 /* functions */
634 static struct spear_function *spear300_functions[] = {
635 SPEAR3XX_COMMON_FUNCTIONS,
636 &fsmc_function,
637 &clcd_function,
638 &tdm_function,
639 &i2c_function,
640 &cam_function,
641 &dac_function,
642 &i2s_function,
643 &sdhci_function,
644 &gpio1_function,
645 };
646
647 static const struct of_device_id spear300_pinctrl_of_match[] = {
648 {
649 .compatible = "st,spear300-pinmux",
650 },
651 {},
652 };
653
spear300_pinctrl_probe(struct platform_device * pdev)654 static int spear300_pinctrl_probe(struct platform_device *pdev)
655 {
656 spear3xx_machdata.groups = spear300_pingroups;
657 spear3xx_machdata.ngroups = ARRAY_SIZE(spear300_pingroups);
658 spear3xx_machdata.functions = spear300_functions;
659 spear3xx_machdata.nfunctions = ARRAY_SIZE(spear300_functions);
660 spear3xx_machdata.gpio_pingroups = NULL;
661 spear3xx_machdata.ngpio_pingroups = 0;
662
663 spear3xx_machdata.modes_supported = true;
664 spear3xx_machdata.pmx_modes = spear300_pmx_modes;
665 spear3xx_machdata.npmx_modes = ARRAY_SIZE(spear300_pmx_modes);
666
667 pmx_init_addr(&spear3xx_machdata, PMX_CONFIG_REG);
668
669 return spear_pinctrl_probe(pdev, &spear3xx_machdata);
670 }
671
672 static struct platform_driver spear300_pinctrl_driver = {
673 .driver = {
674 .name = DRIVER_NAME,
675 .of_match_table = spear300_pinctrl_of_match,
676 },
677 .probe = spear300_pinctrl_probe,
678 };
679
spear300_pinctrl_init(void)680 static int __init spear300_pinctrl_init(void)
681 {
682 return platform_driver_register(&spear300_pinctrl_driver);
683 }
684 arch_initcall(spear300_pinctrl_init);
685