1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2009-2010 Advanced Micro Devices, Inc.
4 * Author: Joerg Roedel <jroedel@suse.de>
5 */
6
7 #ifndef AMD_IOMMU_H
8 #define AMD_IOMMU_H
9
10 #include <linux/iommu.h>
11
12 #include "amd_iommu_types.h"
13
14 irqreturn_t amd_iommu_int_thread(int irq, void *data);
15 irqreturn_t amd_iommu_int_thread_evtlog(int irq, void *data);
16 irqreturn_t amd_iommu_int_thread_pprlog(int irq, void *data);
17 irqreturn_t amd_iommu_int_thread_galog(int irq, void *data);
18 irqreturn_t amd_iommu_int_handler(int irq, void *data);
19 void amd_iommu_restart_log(struct amd_iommu *iommu, const char *evt_type,
20 u8 cntrl_intr, u8 cntrl_log,
21 u32 status_run_mask, u32 status_overflow_mask);
22 void amd_iommu_restart_event_logging(struct amd_iommu *iommu);
23 void amd_iommu_restart_ga_log(struct amd_iommu *iommu);
24 void amd_iommu_restart_ppr_log(struct amd_iommu *iommu);
25 void amd_iommu_set_rlookup_table(struct amd_iommu *iommu, u16 devid);
26 void iommu_feature_enable(struct amd_iommu *iommu, u8 bit);
27 void *__init iommu_alloc_4k_pages(struct amd_iommu *iommu,
28 gfp_t gfp, size_t size);
29
30 #ifdef CONFIG_AMD_IOMMU_DEBUGFS
31 void amd_iommu_debugfs_setup(void);
32 #else
amd_iommu_debugfs_setup(void)33 static inline void amd_iommu_debugfs_setup(void) {}
34 #endif
35
36 /* Needed for interrupt remapping */
37 int amd_iommu_prepare(void);
38 int amd_iommu_enable(void);
39 void amd_iommu_disable(void);
40 int amd_iommu_reenable(int mode);
41 int amd_iommu_enable_faulting(unsigned int cpu);
42 extern int amd_iommu_guest_ir;
43 extern enum protection_domain_mode amd_iommu_pgtable;
44 extern int amd_iommu_gpt_level;
45 extern u8 amd_iommu_hpt_level;
46 extern unsigned long amd_iommu_pgsize_bitmap;
47 extern bool amd_iommu_hatdis;
48
49 /* Protection domain ops */
50 void amd_iommu_init_identity_domain(void);
51 struct protection_domain *protection_domain_alloc(void);
52 struct iommu_domain *amd_iommu_domain_alloc_sva(struct device *dev,
53 struct mm_struct *mm);
54 void amd_iommu_domain_free(struct iommu_domain *dom);
55 int iommu_sva_set_dev_pasid(struct iommu_domain *domain,
56 struct device *dev, ioasid_t pasid,
57 struct iommu_domain *old);
58 void amd_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid,
59 struct iommu_domain *domain);
60
61 /* SVA/PASID */
62 bool amd_iommu_pasid_supported(void);
63
64 /* IOPF */
65 int amd_iommu_iopf_init(struct amd_iommu *iommu);
66 void amd_iommu_iopf_uninit(struct amd_iommu *iommu);
67 void amd_iommu_page_response(struct device *dev, struct iopf_fault *evt,
68 struct iommu_page_response *resp);
69 int amd_iommu_iopf_add_device(struct amd_iommu *iommu,
70 struct iommu_dev_data *dev_data);
71 void amd_iommu_iopf_remove_device(struct amd_iommu *iommu,
72 struct iommu_dev_data *dev_data);
73
74 /* GCR3 setup */
75 int amd_iommu_set_gcr3(struct iommu_dev_data *dev_data,
76 ioasid_t pasid, unsigned long gcr3);
77 int amd_iommu_clear_gcr3(struct iommu_dev_data *dev_data, ioasid_t pasid);
78
79 /* PPR */
80 int __init amd_iommu_alloc_ppr_log(struct amd_iommu *iommu);
81 void __init amd_iommu_free_ppr_log(struct amd_iommu *iommu);
82 void amd_iommu_enable_ppr_log(struct amd_iommu *iommu);
83 void amd_iommu_poll_ppr_log(struct amd_iommu *iommu);
84 int amd_iommu_complete_ppr(struct device *dev, u32 pasid, int status, int tag);
85
86 /*
87 * This function flushes all internal caches of
88 * the IOMMU used by this driver.
89 */
90 void amd_iommu_flush_all_caches(struct amd_iommu *iommu);
91 void amd_iommu_update_and_flush_device_table(struct protection_domain *domain);
92 void amd_iommu_domain_flush_pages(struct protection_domain *domain,
93 u64 address, size_t size);
94 void amd_iommu_dev_flush_pasid_pages(struct iommu_dev_data *dev_data,
95 ioasid_t pasid, u64 address, size_t size);
96
97 #ifdef CONFIG_IRQ_REMAP
98 int amd_iommu_create_irq_domain(struct amd_iommu *iommu);
99 #else
amd_iommu_create_irq_domain(struct amd_iommu * iommu)100 static inline int amd_iommu_create_irq_domain(struct amd_iommu *iommu)
101 {
102 return 0;
103 }
104 #endif
105
is_rd890_iommu(struct pci_dev * pdev)106 static inline bool is_rd890_iommu(struct pci_dev *pdev)
107 {
108 return (pdev->vendor == PCI_VENDOR_ID_ATI) &&
109 (pdev->device == PCI_DEVICE_ID_RD890_IOMMU);
110 }
111
check_feature(u64 mask)112 static inline bool check_feature(u64 mask)
113 {
114 return (amd_iommu_efr & mask);
115 }
116
check_feature2(u64 mask)117 static inline bool check_feature2(u64 mask)
118 {
119 return (amd_iommu_efr2 & mask);
120 }
121
amd_iommu_v2_pgtbl_supported(void)122 static inline bool amd_iommu_v2_pgtbl_supported(void)
123 {
124 return (check_feature(FEATURE_GIOSUP) && check_feature(FEATURE_GT));
125 }
126
amd_iommu_gt_ppr_supported(void)127 static inline bool amd_iommu_gt_ppr_supported(void)
128 {
129 return (amd_iommu_v2_pgtbl_supported() &&
130 check_feature(FEATURE_PPR) &&
131 check_feature(FEATURE_EPHSUP));
132 }
133
iommu_virt_to_phys(void * vaddr)134 static inline u64 iommu_virt_to_phys(void *vaddr)
135 {
136 return (u64)__sme_set(virt_to_phys(vaddr));
137 }
138
iommu_phys_to_virt(unsigned long paddr)139 static inline void *iommu_phys_to_virt(unsigned long paddr)
140 {
141 return phys_to_virt(__sme_clr(paddr));
142 }
143
get_pci_sbdf_id(struct pci_dev * pdev)144 static inline int get_pci_sbdf_id(struct pci_dev *pdev)
145 {
146 int seg = pci_domain_nr(pdev->bus);
147 u16 devid = pci_dev_id(pdev);
148
149 return PCI_SEG_DEVID_TO_SBDF(seg, devid);
150 }
151
152 bool amd_iommu_ht_range_ignore(void);
153
154 /*
155 * This must be called after device probe completes. During probe
156 * use rlookup_amd_iommu() get the iommu.
157 */
get_amd_iommu_from_dev(struct device * dev)158 static inline struct amd_iommu *get_amd_iommu_from_dev(struct device *dev)
159 {
160 return iommu_get_iommu_dev(dev, struct amd_iommu, iommu);
161 }
162
163 /* This must be called after device probe completes. */
get_amd_iommu_from_dev_data(struct iommu_dev_data * dev_data)164 static inline struct amd_iommu *get_amd_iommu_from_dev_data(struct iommu_dev_data *dev_data)
165 {
166 return iommu_get_iommu_dev(dev_data->dev, struct amd_iommu, iommu);
167 }
168
to_pdomain(struct iommu_domain * dom)169 static inline struct protection_domain *to_pdomain(struct iommu_domain *dom)
170 {
171 return container_of(dom, struct protection_domain, domain);
172 }
173
174 bool translation_pre_enabled(struct amd_iommu *iommu);
175 int __init add_special_device(u8 type, u8 id, u32 *devid, bool cmd_line);
176
177 #ifdef CONFIG_DMI
178 void amd_iommu_apply_ivrs_quirks(void);
179 #else
amd_iommu_apply_ivrs_quirks(void)180 static inline void amd_iommu_apply_ivrs_quirks(void) { }
181 #endif
182 struct dev_table_entry *amd_iommu_get_ivhd_dte_flags(u16 segid, u16 devid);
183
184 void amd_iommu_domain_set_pgtable(struct protection_domain *domain,
185 u64 *root, int mode);
186 struct dev_table_entry *get_dev_table(struct amd_iommu *iommu);
187 struct iommu_dev_data *search_dev_data(struct amd_iommu *iommu, u16 devid);
188
189 #endif /* AMD_IOMMU_H */
190