1 /* SPDX-License-Identifier: MIT */
2 #ifndef __NVKM_GSP_PRIV_H__
3 #define __NVKM_GSP_PRIV_H__
4 #include <subdev/gsp.h>
5 #include <rm/gpu.h>
6 enum nvkm_acr_lsf_id;
7
8 int nvkm_gsp_fwsec_frts(struct nvkm_gsp *);
9
10 int nvkm_gsp_fwsec_sb(struct nvkm_gsp *);
11 int nvkm_gsp_fwsec_sb_init(struct nvkm_gsp *gsp);
12
13 struct nvkm_gsp_fwif {
14 int version;
15 int (*load)(struct nvkm_gsp *, int ver, const struct nvkm_gsp_fwif *);
16 const struct nvkm_gsp_func *func;
17 const struct nvkm_rm_impl *rm;
18 const char *ver;
19 };
20
21 int nvkm_gsp_load_fw(struct nvkm_gsp *, const char *name, const char *ver,
22 const struct firmware **);
23 void nvkm_gsp_dtor_fws(struct nvkm_gsp *);
24
25 int gv100_gsp_nofw(struct nvkm_gsp *, int, const struct nvkm_gsp_fwif *);
26
27 int tu102_gsp_load(struct nvkm_gsp *, int, const struct nvkm_gsp_fwif *);
28 int tu102_gsp_load_rm(struct nvkm_gsp *, const struct nvkm_gsp_fwif *);
29
30 int gh100_gsp_load(struct nvkm_gsp *, int, const struct nvkm_gsp_fwif *);
31
32 #define NVKM_GSP_FIRMWARE_BOOTER(chip,vers) \
33 MODULE_FIRMWARE("nvidia/"#chip"/gsp/booter_load-"#vers".bin"); \
34 MODULE_FIRMWARE("nvidia/"#chip"/gsp/booter_unload-"#vers".bin"); \
35 MODULE_FIRMWARE("nvidia/"#chip"/gsp/bootloader-"#vers".bin"); \
36 MODULE_FIRMWARE("nvidia/"#chip"/gsp/gsp-"#vers".bin")
37
38 #define NVKM_GSP_FIRMWARE_FMC(chip,vers) \
39 MODULE_FIRMWARE("nvidia/"#chip"/gsp/fmc-"#vers".bin"); \
40 MODULE_FIRMWARE("nvidia/"#chip"/gsp/bootloader-"#vers".bin"); \
41 MODULE_FIRMWARE("nvidia/"#chip"/gsp/gsp-"#vers".bin")
42
43 struct nvkm_gsp_func {
44 const struct nvkm_falcon_func *flcn;
45 const struct nvkm_falcon_fw_func *fwsec;
46
47 char *sig_section;
48
49 struct {
50 int (*ctor)(struct nvkm_gsp *, const char *name, const struct firmware *,
51 struct nvkm_falcon *, struct nvkm_falcon_fw *);
52 } booter;
53
54 struct {
55 int (*ctor)(struct nvkm_gsp *);
56 void (*dtor)(struct nvkm_gsp *);
57 } fwsec_sb;
58
59 void (*dtor)(struct nvkm_gsp *);
60 int (*oneinit)(struct nvkm_gsp *);
61 int (*init)(struct nvkm_gsp *);
62 int (*fini)(struct nvkm_gsp *, bool suspend);
63 int (*reset)(struct nvkm_gsp *);
64
65 struct {
66 const struct nvkm_rm_gpu *gpu;
67 } rm;
68 };
69
70 extern const struct nvkm_falcon_func tu102_gsp_flcn;
71 extern const struct nvkm_falcon_fw_func tu102_gsp_fwsec;
72 int tu102_gsp_booter_ctor(struct nvkm_gsp *, const char *, const struct firmware *,
73 struct nvkm_falcon *, struct nvkm_falcon_fw *);
74 int tu102_gsp_fwsec_sb_ctor(struct nvkm_gsp *);
75 void tu102_gsp_fwsec_sb_dtor(struct nvkm_gsp *);
76 int tu102_gsp_oneinit(struct nvkm_gsp *);
77 int tu102_gsp_init(struct nvkm_gsp *);
78 int tu102_gsp_fini(struct nvkm_gsp *, bool suspend);
79 int tu102_gsp_reset(struct nvkm_gsp *);
80 u64 tu102_gsp_wpr_heap_size(struct nvkm_gsp *);
81
82 extern const struct nvkm_falcon_func ga102_gsp_flcn;
83 extern const struct nvkm_falcon_fw_func ga102_gsp_fwsec;
84 int ga102_gsp_booter_ctor(struct nvkm_gsp *, const char *, const struct firmware *,
85 struct nvkm_falcon *, struct nvkm_falcon_fw *);
86 int ga102_gsp_reset(struct nvkm_gsp *);
87
88 int gh100_gsp_oneinit(struct nvkm_gsp *);
89 int gh100_gsp_init(struct nvkm_gsp *);
90 int gh100_gsp_fini(struct nvkm_gsp *, bool suspend);
91
92 void r535_gsp_dtor(struct nvkm_gsp *);
93 int r535_gsp_oneinit(struct nvkm_gsp *);
94 int r535_gsp_init(struct nvkm_gsp *);
95 int r535_gsp_fini(struct nvkm_gsp *, bool suspend);
96
97 int nvkm_gsp_new_(const struct nvkm_gsp_fwif *, struct nvkm_device *, enum nvkm_subdev_type, int,
98 struct nvkm_gsp **);
99
nvkm_gsp_fwsec_sb_ctor(struct nvkm_gsp * gsp)100 static inline int nvkm_gsp_fwsec_sb_ctor(struct nvkm_gsp *gsp)
101 {
102 if (gsp->func->fwsec_sb.ctor)
103 return gsp->func->fwsec_sb.ctor(gsp);
104 return 0;
105 }
106
nvkm_gsp_fwsec_sb_dtor(struct nvkm_gsp * gsp)107 static inline void nvkm_gsp_fwsec_sb_dtor(struct nvkm_gsp *gsp)
108 {
109 if (gsp->func->fwsec_sb.dtor)
110 gsp->func->fwsec_sb.dtor(gsp);
111 }
112
113 extern const struct nvkm_gsp_func gv100_gsp;
114 #endif
115