1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // CS42L43 SPI Controller Driver 4 // 5 // Copyright (C) 2022-2023 Cirrus Logic, Inc. and 6 // Cirrus Logic International Semiconductor Ltd. 7 8 #include <linux/acpi.h> 9 #include <linux/array_size.h> 10 #include <linux/bits.h> 11 #include <linux/bitfield.h> 12 #include <linux/cleanup.h> 13 #include <linux/device.h> 14 #include <linux/dmi.h> 15 #include <linux/errno.h> 16 #include <linux/gpio/consumer.h> 17 #include <linux/gpio/machine.h> 18 #include <linux/gpio/property.h> 19 #include <linux/mfd/cs42l43.h> 20 #include <linux/mfd/cs42l43-regs.h> 21 #include <linux/module.h> 22 #include <linux/of.h> 23 #include <linux/platform_device.h> 24 #include <linux/pm_runtime.h> 25 #include <linux/property.h> 26 #include <linux/regmap.h> 27 #include <linux/spi/spi.h> 28 #include <linux/units.h> 29 30 #define CS42L43_FIFO_SIZE 16 31 #define CS42L43_SPI_ROOT_HZ 49152000 32 #define CS42L43_SPI_MAX_LENGTH 65532 33 34 enum cs42l43_spi_cmd { 35 CS42L43_WRITE, 36 CS42L43_READ 37 }; 38 39 struct cs42l43_spi { 40 struct device *dev; 41 struct regmap *regmap; 42 struct spi_controller *ctlr; 43 }; 44 45 static const unsigned int cs42l43_clock_divs[] = { 46 2, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30 47 }; 48 49 static struct spi_board_info amp_info_template = { 50 .modalias = "cs35l56", 51 .max_speed_hz = 11 * HZ_PER_MHZ, 52 .mode = SPI_MODE_0, 53 }; 54 55 static int cs42l43_spi_tx(struct regmap *regmap, const u8 *buf, unsigned int len) 56 { 57 const u8 *end = buf + len; 58 u32 val = 0; 59 int ret; 60 61 while (buf < end) { 62 const u8 *block = min(buf + CS42L43_FIFO_SIZE, end); 63 64 while (buf < block) { 65 const u8 *word = min(buf + sizeof(u32), block); 66 int pad = (buf + sizeof(u32)) - word; 67 68 while (buf < word) { 69 val >>= BITS_PER_BYTE; 70 val |= FIELD_PREP(GENMASK(31, 24), *buf); 71 72 buf++; 73 } 74 75 val >>= pad * BITS_PER_BYTE; 76 77 regmap_write(regmap, CS42L43_TX_DATA, val); 78 } 79 80 regmap_write(regmap, CS42L43_TRAN_CONFIG8, CS42L43_SPI_TX_DONE_MASK); 81 82 ret = regmap_read_poll_timeout(regmap, CS42L43_TRAN_STATUS1, 83 val, (val & CS42L43_SPI_TX_REQUEST_MASK), 84 1000, 5000); 85 if (ret) 86 return ret; 87 } 88 89 return 0; 90 } 91 92 static int cs42l43_spi_rx(struct regmap *regmap, u8 *buf, unsigned int len) 93 { 94 u8 *end = buf + len; 95 u32 val; 96 int ret; 97 98 while (buf < end) { 99 u8 *block = min(buf + CS42L43_FIFO_SIZE, end); 100 101 ret = regmap_read_poll_timeout(regmap, CS42L43_TRAN_STATUS1, 102 val, (val & CS42L43_SPI_RX_REQUEST_MASK), 103 1000, 5000); 104 if (ret) 105 return ret; 106 107 while (buf < block) { 108 u8 *word = min(buf + sizeof(u32), block); 109 110 ret = regmap_read(regmap, CS42L43_RX_DATA, &val); 111 if (ret) 112 return ret; 113 114 while (buf < word) { 115 *buf = FIELD_GET(GENMASK(7, 0), val); 116 117 val >>= BITS_PER_BYTE; 118 buf++; 119 } 120 } 121 122 regmap_write(regmap, CS42L43_TRAN_CONFIG8, CS42L43_SPI_RX_DONE_MASK); 123 } 124 125 return 0; 126 } 127 128 static int cs42l43_transfer_one(struct spi_controller *ctlr, struct spi_device *spi, 129 struct spi_transfer *tfr) 130 { 131 struct cs42l43_spi *priv = spi_controller_get_devdata(spi->controller); 132 int i, ret = -EINVAL; 133 134 for (i = 0; i < ARRAY_SIZE(cs42l43_clock_divs); i++) { 135 if (CS42L43_SPI_ROOT_HZ / cs42l43_clock_divs[i] <= tfr->speed_hz) 136 break; 137 } 138 139 if (i == ARRAY_SIZE(cs42l43_clock_divs)) 140 return -EINVAL; 141 142 regmap_write(priv->regmap, CS42L43_SPI_CLK_CONFIG1, i); 143 144 if (tfr->tx_buf) { 145 regmap_write(priv->regmap, CS42L43_TRAN_CONFIG3, CS42L43_WRITE); 146 regmap_write(priv->regmap, CS42L43_TRAN_CONFIG4, tfr->len - 1); 147 } else if (tfr->rx_buf) { 148 regmap_write(priv->regmap, CS42L43_TRAN_CONFIG3, CS42L43_READ); 149 regmap_write(priv->regmap, CS42L43_TRAN_CONFIG5, tfr->len - 1); 150 } 151 152 regmap_write(priv->regmap, CS42L43_TRAN_CONFIG1, CS42L43_SPI_START_MASK); 153 154 if (tfr->tx_buf) 155 ret = cs42l43_spi_tx(priv->regmap, (const u8 *)tfr->tx_buf, tfr->len); 156 else if (tfr->rx_buf) 157 ret = cs42l43_spi_rx(priv->regmap, (u8 *)tfr->rx_buf, tfr->len); 158 159 return ret; 160 } 161 162 static void cs42l43_set_cs(struct spi_device *spi, bool is_high) 163 { 164 struct cs42l43_spi *priv = spi_controller_get_devdata(spi->controller); 165 166 regmap_write(priv->regmap, CS42L43_SPI_CONFIG2, !is_high); 167 } 168 169 static int cs42l43_prepare_message(struct spi_controller *ctlr, struct spi_message *msg) 170 { 171 struct cs42l43_spi *priv = spi_controller_get_devdata(ctlr); 172 struct spi_device *spi = msg->spi; 173 unsigned int spi_config1 = 0; 174 175 /* select another internal CS, which doesn't exist, so CS 0 is not used */ 176 if (spi_get_csgpiod(spi, 0)) 177 spi_config1 |= 1 << CS42L43_SPI_SS_SEL_SHIFT; 178 if (spi->mode & SPI_CPOL) 179 spi_config1 |= CS42L43_SPI_CPOL_MASK; 180 if (spi->mode & SPI_CPHA) 181 spi_config1 |= CS42L43_SPI_CPHA_MASK; 182 if (spi->mode & SPI_3WIRE) 183 spi_config1 |= CS42L43_SPI_THREE_WIRE_MASK; 184 185 regmap_write(priv->regmap, CS42L43_SPI_CONFIG1, spi_config1); 186 187 return 0; 188 } 189 190 static int cs42l43_prepare_transfer_hardware(struct spi_controller *ctlr) 191 { 192 struct cs42l43_spi *priv = spi_controller_get_devdata(ctlr); 193 int ret; 194 195 ret = regmap_write(priv->regmap, CS42L43_BLOCK_EN2, CS42L43_SPI_MSTR_EN_MASK); 196 if (ret) 197 dev_err(priv->dev, "Failed to enable SPI controller: %d\n", ret); 198 199 return ret; 200 } 201 202 static int cs42l43_unprepare_transfer_hardware(struct spi_controller *ctlr) 203 { 204 struct cs42l43_spi *priv = spi_controller_get_devdata(ctlr); 205 int ret; 206 207 ret = regmap_write(priv->regmap, CS42L43_BLOCK_EN2, 0); 208 if (ret) 209 dev_err(priv->dev, "Failed to disable SPI controller: %d\n", ret); 210 211 return ret; 212 } 213 214 static size_t cs42l43_spi_max_length(struct spi_device *spi) 215 { 216 return CS42L43_SPI_MAX_LENGTH; 217 } 218 219 /* 220 * Workaround needed for two speaker ID pins in one ACPI GpioIo() but 221 * the Linux-specific _DSD property only contains one pin. 222 * Create a temporary acpi_gpio_mapping pointing at both pins. 223 */ 224 static const struct acpi_gpio_params cs42l43_2bit_speaker_id_from_one_gpioio_params[] = { 225 [0] = { 226 .crs_entry_index = 0, 227 .line_index = 0, 228 }, 229 [1] = { 230 .crs_entry_index = 0, 231 .line_index = 1, 232 }, 233 }; 234 235 static const struct acpi_gpio_mapping cs42l43_2bit_speaker_id_from_one_gpioio_mapping[] = { 236 { 237 .name = "spk-id-quirk-gpios", 238 .data = cs42l43_2bit_speaker_id_from_one_gpioio_params, 239 .size = ARRAY_SIZE(cs42l43_2bit_speaker_id_from_one_gpioio_params), 240 }, 241 { } 242 }; 243 244 static int cs42l43_get_2bit_speaker_id_from_one_gpioio(struct cs42l43_spi *priv, int *result) 245 { 246 struct fwnode_reference_args args; 247 struct acpi_device *adev; 248 struct gpio_desc *desc; 249 u32 spkid = 0; 250 int i, ret; 251 252 /* Use the _DSD property to get the node containing the GpioIo() */ 253 ret = fwnode_property_get_reference_args(dev_fwnode(priv->dev), "spk-id-gpios", 254 NULL, 3, 0, &args); 255 if (ret) 256 return ret; 257 258 struct fwnode_handle *fwnode __free(fwnode_handle) = args.fwnode; 259 260 /* An acpi_gpio_mapping must be added to the node that contains the GpioIo() */ 261 adev = to_acpi_device_node(fwnode); 262 if (!adev) 263 return -EINVAL; 264 265 ret = acpi_dev_add_driver_gpios(adev, cs42l43_2bit_speaker_id_from_one_gpioio_mapping); 266 if (ret) 267 return ret; 268 269 /* gpiod_get_array() can't read from a mapping in a child node */ 270 for (i = 0; i < ARRAY_SIZE(cs42l43_2bit_speaker_id_from_one_gpioio_params); i++) { 271 desc = fwnode_gpiod_get_index(fwnode, "spk-id-quirk", i, GPIOD_IN, 272 dev_name(priv->dev)); 273 if (IS_ERR(desc)) { 274 ret = PTR_ERR(desc); 275 goto out; 276 } 277 278 ret = gpiod_get_value_cansleep(desc); 279 gpiod_put(desc); 280 if (ret < 0) 281 goto out; 282 283 spkid |= (u32)ret << i; 284 } 285 286 dev_dbg(priv->dev, "spk-id-gpios = %u\n", spkid); 287 *result = spkid; 288 ret = 0; 289 out: 290 acpi_dev_remove_driver_gpios(adev); 291 292 return ret; 293 } 294 295 static const struct dmi_system_id cs42l43_spk_id_quirks[] = { 296 { 297 .ident = "Dell XPS 13 DX13260", 298 .matches = { 299 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"), 300 DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "0E53"), 301 }, 302 .driver_data = cs42l43_get_2bit_speaker_id_from_one_gpioio, 303 }, 304 { } 305 }; 306 307 static int cs42l43_get_speaker_id_gpios(struct cs42l43_spi *priv, int *result) 308 { 309 const struct dmi_system_id *dmi_id; 310 struct gpio_descs *descs; 311 u32 spkid; 312 int i, ret; 313 314 dmi_id = dmi_first_match(cs42l43_spk_id_quirks); 315 if (dmi_id) { 316 int (*get_speaker_id)(struct cs42l43_spi *priv, int *result) = dmi_id->driver_data; 317 318 return get_speaker_id(priv, result); 319 } 320 321 descs = gpiod_get_array_optional(priv->dev, "spk-id", GPIOD_IN); 322 if (!descs) 323 return 0; 324 else if (IS_ERR(descs)) 325 return PTR_ERR(descs); 326 327 spkid = 0; 328 for (i = 0; i < descs->ndescs; i++) { 329 ret = gpiod_get_value_cansleep(descs->desc[i]); 330 if (ret < 0) 331 goto err; 332 333 spkid |= (ret << i); 334 } 335 336 dev_dbg(priv->dev, "spk-id-gpios = %d\n", spkid); 337 *result = spkid; 338 err: 339 gpiod_put_array(descs); 340 341 return ret; 342 } 343 344 static struct fwnode_handle *cs42l43_find_xu_node(struct fwnode_handle *fwnode) 345 { 346 static const u32 func_smart_amp = 0x1; 347 struct fwnode_handle *child_fwnode, *ext_fwnode; 348 u32 function; 349 int ret; 350 351 fwnode_for_each_child_node(fwnode, child_fwnode) { 352 acpi_handle handle = ACPI_HANDLE_FWNODE(child_fwnode); 353 354 ret = acpi_get_local_address(handle, &function); 355 if (ret || function != func_smart_amp) 356 continue; 357 358 ext_fwnode = fwnode_get_named_child_node(child_fwnode, 359 "mipi-sdca-function-expansion-subproperties"); 360 if (!ext_fwnode) 361 continue; 362 363 fwnode_handle_put(child_fwnode); 364 365 return ext_fwnode; 366 } 367 368 return NULL; 369 } 370 371 static struct spi_board_info *cs42l43_create_bridge_amp(struct cs42l43_spi *priv, 372 const char * const name, 373 int cs, int spkid) 374 { 375 struct property_entry *props = NULL; 376 struct software_node *swnode; 377 struct spi_board_info *info; 378 379 if (spkid >= 0) { 380 props = devm_kcalloc(priv->dev, 2, sizeof(*props), GFP_KERNEL); 381 if (!props) 382 return NULL; 383 384 *props = PROPERTY_ENTRY_U32("cirrus,speaker-id", spkid); 385 } 386 387 swnode = devm_kmalloc(priv->dev, sizeof(*swnode), GFP_KERNEL); 388 if (!swnode) 389 return NULL; 390 391 *swnode = SOFTWARE_NODE(name, props, NULL); 392 393 info = devm_kmemdup(priv->dev, &_info_template, 394 sizeof(amp_info_template), GFP_KERNEL); 395 if (!info) 396 return NULL; 397 398 info->chip_select = cs; 399 info->swnode = swnode; 400 401 return info; 402 } 403 404 static void cs42l43_release_of_node(void *data) 405 { 406 fwnode_handle_put(data); 407 } 408 409 static int cs42l43_spi_probe(struct platform_device *pdev) 410 { 411 struct cs42l43 *cs42l43 = dev_get_drvdata(pdev->dev.parent); 412 struct cs42l43_spi *priv; 413 struct fwnode_handle *fwnode = dev_fwnode(cs42l43->dev); 414 struct fwnode_handle *xu_fwnode __free(fwnode_handle) = cs42l43_find_xu_node(fwnode); 415 int nsidecars = 0; 416 int spkid = -EINVAL; 417 int ret; 418 419 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 420 if (!priv) 421 return -ENOMEM; 422 423 priv->ctlr = devm_spi_alloc_host(&pdev->dev, sizeof(*priv->ctlr)); 424 if (!priv->ctlr) 425 return -ENOMEM; 426 427 spi_controller_set_devdata(priv->ctlr, priv); 428 429 priv->dev = &pdev->dev; 430 priv->regmap = cs42l43->regmap; 431 432 priv->ctlr->prepare_message = cs42l43_prepare_message; 433 priv->ctlr->prepare_transfer_hardware = cs42l43_prepare_transfer_hardware; 434 priv->ctlr->unprepare_transfer_hardware = cs42l43_unprepare_transfer_hardware; 435 priv->ctlr->transfer_one = cs42l43_transfer_one; 436 priv->ctlr->set_cs = cs42l43_set_cs; 437 priv->ctlr->max_transfer_size = cs42l43_spi_max_length; 438 priv->ctlr->mode_bits = SPI_3WIRE | SPI_MODE_X_MASK; 439 priv->ctlr->flags = SPI_CONTROLLER_HALF_DUPLEX; 440 priv->ctlr->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) | 441 SPI_BPW_MASK(32); 442 priv->ctlr->min_speed_hz = CS42L43_SPI_ROOT_HZ / 443 cs42l43_clock_divs[ARRAY_SIZE(cs42l43_clock_divs) - 1]; 444 priv->ctlr->max_speed_hz = CS42L43_SPI_ROOT_HZ / cs42l43_clock_divs[0]; 445 priv->ctlr->use_gpio_descriptors = true; 446 priv->ctlr->auto_runtime_pm = true; 447 448 ret = devm_pm_runtime_enable(priv->dev); 449 if (ret) 450 return ret; 451 452 pm_runtime_idle(priv->dev); 453 454 regmap_write(priv->regmap, CS42L43_TRAN_CONFIG6, CS42L43_FIFO_SIZE - 1); 455 regmap_write(priv->regmap, CS42L43_TRAN_CONFIG7, CS42L43_FIFO_SIZE - 1); 456 457 // Disable Watchdog timer and enable stall 458 regmap_write(priv->regmap, CS42L43_SPI_CONFIG3, 0); 459 regmap_write(priv->regmap, CS42L43_SPI_CONFIG4, CS42L43_SPI_STALL_ENA_MASK); 460 461 if (is_of_node(fwnode)) { 462 fwnode = fwnode_get_named_child_node(fwnode, "spi"); 463 ret = devm_add_action_or_reset(priv->dev, cs42l43_release_of_node, fwnode); 464 if (ret) 465 return ret; 466 } else { 467 fwnode_property_read_u32(xu_fwnode, "01fa-sidecar-instances", &nsidecars); 468 } 469 470 /* 471 * Depending on the value of nsidecars we either create a software node 472 * or assign an fwnode. We don't want software node to be attached to 473 * the default one. That's why we need to clear the SPI controller fwnode 474 * first. 475 */ 476 device_set_node(&priv->ctlr->dev, NULL); 477 478 if (nsidecars) { 479 struct software_node_ref_args args[] = { 480 SOFTWARE_NODE_REFERENCE(fwnode, 0, GPIO_ACTIVE_LOW), 481 SOFTWARE_NODE_REFERENCE(&swnode_gpio_undefined), 482 }; 483 struct property_entry props[] = { 484 PROPERTY_ENTRY_REF_ARRAY("cs-gpios", args), 485 { } 486 }; 487 488 ret = fwnode_property_read_u32(xu_fwnode, "01fa-spk-id-val", &spkid); 489 if (!ret) { 490 dev_dbg(priv->dev, "01fa-spk-id-val = %d\n", spkid); 491 } else if (ret != -EINVAL) { 492 return dev_err_probe(priv->dev, ret, "Failed to get spk-id-val\n"); 493 } else { 494 ret = cs42l43_get_speaker_id_gpios(priv, &spkid); 495 if (ret < 0) 496 return dev_err_probe(priv->dev, ret, 497 "Failed to get spk-id-gpios\n"); 498 } 499 500 ret = device_create_managed_software_node(&priv->ctlr->dev, props, NULL); 501 if (ret) 502 return dev_err_probe(priv->dev, ret, "Failed to add swnode\n"); 503 } else { 504 device_set_node(&priv->ctlr->dev, fwnode); 505 } 506 507 ret = devm_spi_register_controller(priv->dev, priv->ctlr); 508 if (ret) 509 return dev_err_probe(priv->dev, ret, 510 "Failed to register SPI controller\n"); 511 512 if (nsidecars) { 513 struct spi_board_info *ampl_info; 514 struct spi_board_info *ampr_info; 515 516 ampl_info = cs42l43_create_bridge_amp(priv, "cs35l56-left", 0, spkid); 517 if (!ampl_info) 518 return -ENOMEM; 519 520 ampr_info = cs42l43_create_bridge_amp(priv, "cs35l56-right", 1, spkid); 521 if (!ampr_info) 522 return -ENOMEM; 523 524 if (!spi_new_device(priv->ctlr, ampl_info)) 525 return dev_err_probe(priv->dev, -ENODEV, 526 "Failed to create left amp slave\n"); 527 528 if (!spi_new_device(priv->ctlr, ampr_info)) 529 return dev_err_probe(priv->dev, -ENODEV, 530 "Failed to create right amp slave\n"); 531 } 532 533 return 0; 534 } 535 536 static const struct platform_device_id cs42l43_spi_id_table[] = { 537 { .name = "cs42l43-spi" }, 538 { } 539 }; 540 MODULE_DEVICE_TABLE(platform, cs42l43_spi_id_table); 541 542 static struct platform_driver cs42l43_spi_driver = { 543 .driver = { 544 .name = "cs42l43-spi", 545 }, 546 .probe = cs42l43_spi_probe, 547 .id_table = cs42l43_spi_id_table, 548 }; 549 module_platform_driver(cs42l43_spi_driver); 550 551 MODULE_IMPORT_NS("GPIO_SWNODE"); 552 MODULE_DESCRIPTION("CS42L43 SPI Driver"); 553 MODULE_AUTHOR("Lucas Tanure <tanureal@opensource.cirrus.com>"); 554 MODULE_AUTHOR("Maciej Strozek <mstrozek@opensource.cirrus.com>"); 555 MODULE_LICENSE("GPL"); 556