1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2022 Intel Corporation 4 */ 5 6 #ifndef _XE_VM_TYPES_H_ 7 #define _XE_VM_TYPES_H_ 8 9 #include <drm/drm_gpusvm.h> 10 #include <drm/drm_gpuvm.h> 11 12 #include <linux/dma-resv.h> 13 #include <linux/kref.h> 14 #include <linux/mmu_notifier.h> 15 #include <linux/scatterlist.h> 16 17 #include "xe_device_types.h" 18 #include "xe_pt_types.h" 19 #include "xe_range_fence.h" 20 21 struct xe_bo; 22 struct xe_svm_range; 23 struct xe_sync_entry; 24 struct xe_user_fence; 25 struct xe_vm; 26 struct xe_vm_pgtable_update_op; 27 28 #if IS_ENABLED(CONFIG_DRM_XE_DEBUG) 29 #define TEST_VM_OPS_ERROR 30 #define FORCE_OP_ERROR BIT(31) 31 32 #define FORCE_OP_ERROR_LOCK 0 33 #define FORCE_OP_ERROR_PREPARE 1 34 #define FORCE_OP_ERROR_RUN 2 35 #define FORCE_OP_ERROR_COUNT 3 36 #endif 37 38 #define XE_VMA_READ_ONLY DRM_GPUVA_USERBITS 39 #define XE_VMA_DESTROYED (DRM_GPUVA_USERBITS << 1) 40 #define XE_VMA_ATOMIC_PTE_BIT (DRM_GPUVA_USERBITS << 2) 41 #define XE_VMA_PTE_4K (DRM_GPUVA_USERBITS << 3) 42 #define XE_VMA_PTE_2M (DRM_GPUVA_USERBITS << 4) 43 #define XE_VMA_PTE_1G (DRM_GPUVA_USERBITS << 5) 44 #define XE_VMA_PTE_64K (DRM_GPUVA_USERBITS << 6) 45 #define XE_VMA_PTE_COMPACT (DRM_GPUVA_USERBITS << 7) 46 #define XE_VMA_DUMPABLE (DRM_GPUVA_USERBITS << 8) 47 #define XE_VMA_SYSTEM_ALLOCATOR (DRM_GPUVA_USERBITS << 9) 48 49 /** struct xe_userptr - User pointer */ 50 struct xe_userptr { 51 /** @invalidate_link: Link for the vm::userptr.invalidated list */ 52 struct list_head invalidate_link; 53 /** @userptr: link into VM repin list if userptr. */ 54 struct list_head repin_link; 55 /** 56 * @notifier: MMU notifier for user pointer (invalidation call back) 57 */ 58 struct mmu_interval_notifier notifier; 59 /** @sgt: storage for a scatter gather table */ 60 struct sg_table sgt; 61 /** @sg: allocated scatter gather table */ 62 struct sg_table *sg; 63 /** @notifier_seq: notifier sequence number */ 64 unsigned long notifier_seq; 65 /** @unmap_mutex: Mutex protecting dma-unmapping */ 66 struct mutex unmap_mutex; 67 /** 68 * @initial_bind: user pointer has been bound at least once. 69 * write: vm->userptr.notifier_lock in read mode and vm->resv held. 70 * read: vm->userptr.notifier_lock in write mode or vm->resv held. 71 */ 72 bool initial_bind; 73 /** @mapped: Whether the @sgt sg-table is dma-mapped. Protected by @unmap_mutex. */ 74 bool mapped; 75 #if IS_ENABLED(CONFIG_DRM_XE_USERPTR_INVAL_INJECT) 76 u32 divisor; 77 #endif 78 }; 79 80 struct xe_vma { 81 /** @gpuva: Base GPUVA object */ 82 struct drm_gpuva gpuva; 83 84 /** 85 * @combined_links: links into lists which are mutually exclusive. 86 * Locking: vm lock in write mode OR vm lock in read mode and the vm's 87 * resv. 88 */ 89 union { 90 /** @rebind: link into VM if this VMA needs rebinding. */ 91 struct list_head rebind; 92 /** @destroy: link to contested list when VM is being closed. */ 93 struct list_head destroy; 94 } combined_links; 95 96 union { 97 /** @destroy_cb: callback to destroy VMA when unbind job is done */ 98 struct dma_fence_cb destroy_cb; 99 /** @destroy_work: worker to destroy this BO */ 100 struct work_struct destroy_work; 101 }; 102 103 /** 104 * @tile_invalidated: Tile mask of binding are invalidated for this VMA. 105 * protected by BO's resv and for userptrs, vm->userptr.notifier_lock in 106 * write mode for writing or vm->userptr.notifier_lock in read mode and 107 * the vm->resv. For stable reading, BO's resv or userptr 108 * vm->userptr.notifier_lock in read mode is required. Can be 109 * opportunistically read with READ_ONCE outside of locks. 110 */ 111 u8 tile_invalidated; 112 113 /** @tile_mask: Tile mask of where to create binding for this VMA */ 114 u8 tile_mask; 115 116 /** 117 * @tile_present: Tile mask of binding are present for this VMA. 118 * protected by vm->lock, vm->resv and for userptrs, 119 * vm->userptr.notifier_lock for writing. Needs either for reading, 120 * but if reading is done under the vm->lock only, it needs to be held 121 * in write mode. 122 */ 123 u8 tile_present; 124 125 /** @tile_staged: bind is staged for this VMA */ 126 u8 tile_staged; 127 128 /** 129 * @pat_index: The pat index to use when encoding the PTEs for this vma. 130 */ 131 u16 pat_index; 132 133 /** 134 * @ufence: The user fence that was provided with MAP. 135 * Needs to be signalled before UNMAP can be processed. 136 */ 137 struct xe_user_fence *ufence; 138 }; 139 140 /** 141 * struct xe_userptr_vma - A userptr vma subclass 142 * @vma: The vma. 143 * @userptr: Additional userptr information. 144 */ 145 struct xe_userptr_vma { 146 struct xe_vma vma; 147 struct xe_userptr userptr; 148 }; 149 150 struct xe_device; 151 152 struct xe_vm { 153 /** @gpuvm: base GPUVM used to track VMAs */ 154 struct drm_gpuvm gpuvm; 155 156 /** @svm: Shared virtual memory state */ 157 struct { 158 /** @svm.gpusvm: base GPUSVM used to track fault allocations */ 159 struct drm_gpusvm gpusvm; 160 /** 161 * @svm.garbage_collector: Garbage collector which is used unmap 162 * SVM range's GPU bindings and destroy the ranges. 163 */ 164 struct { 165 /** @svm.garbage_collector.lock: Protect's range list */ 166 spinlock_t lock; 167 /** 168 * @svm.garbage_collector.range_list: List of SVM ranges 169 * in the garbage collector. 170 */ 171 struct list_head range_list; 172 /** 173 * @svm.garbage_collector.work: Worker which the 174 * garbage collector runs on. 175 */ 176 struct work_struct work; 177 } garbage_collector; 178 } svm; 179 180 struct xe_device *xe; 181 182 /* exec queue used for (un)binding vma's */ 183 struct xe_exec_queue *q[XE_MAX_TILES_PER_DEVICE]; 184 185 /** @lru_bulk_move: Bulk LRU move list for this VM's BOs */ 186 struct ttm_lru_bulk_move lru_bulk_move; 187 188 u64 size; 189 190 struct xe_pt *pt_root[XE_MAX_TILES_PER_DEVICE]; 191 struct xe_pt *scratch_pt[XE_MAX_TILES_PER_DEVICE][XE_VM_MAX_LEVEL]; 192 193 /** 194 * @flags: flags for this VM, statically setup a creation time aside 195 * from XE_VM_FLAG_BANNED which requires vm->lock to set / read safely 196 */ 197 #define XE_VM_FLAG_64K BIT(0) 198 #define XE_VM_FLAG_LR_MODE BIT(1) 199 #define XE_VM_FLAG_MIGRATION BIT(2) 200 #define XE_VM_FLAG_SCRATCH_PAGE BIT(3) 201 #define XE_VM_FLAG_FAULT_MODE BIT(4) 202 #define XE_VM_FLAG_BANNED BIT(5) 203 #define XE_VM_FLAG_TILE_ID(flags) FIELD_GET(GENMASK(7, 6), flags) 204 #define XE_VM_FLAG_SET_TILE_ID(tile) FIELD_PREP(GENMASK(7, 6), (tile)->id) 205 #define XE_VM_FLAG_GSC BIT(8) 206 unsigned long flags; 207 208 /** @composite_fence_ctx: context composite fence */ 209 u64 composite_fence_ctx; 210 /** @composite_fence_seqno: seqno for composite fence */ 211 u32 composite_fence_seqno; 212 213 /** 214 * @lock: outer most lock, protects objects of anything attached to this 215 * VM 216 */ 217 struct rw_semaphore lock; 218 /** 219 * @snap_mutex: Mutex used to guard insertions and removals from gpuva, 220 * so we can take a snapshot safely from devcoredump. 221 */ 222 struct mutex snap_mutex; 223 224 /** 225 * @rebind_list: list of VMAs that need rebinding. Protected by the 226 * vm->lock in write mode, OR (the vm->lock in read mode and the 227 * vm resv). 228 */ 229 struct list_head rebind_list; 230 231 /** 232 * @destroy_work: worker to destroy VM, needed as a dma_fence signaling 233 * from an irq context can be last put and the destroy needs to be able 234 * to sleep. 235 */ 236 struct work_struct destroy_work; 237 238 /** 239 * @rftree: range fence tree to track updates to page table structure. 240 * Used to implement conflict tracking between independent bind engines. 241 */ 242 struct xe_range_fence_tree rftree[XE_MAX_TILES_PER_DEVICE]; 243 244 const struct xe_pt_ops *pt_ops; 245 246 /** @userptr: user pointer state */ 247 struct { 248 /** 249 * @userptr.repin_list: list of VMAs which are user pointers, 250 * and needs repinning. Protected by @lock. 251 */ 252 struct list_head repin_list; 253 /** 254 * @notifier_lock: protects notifier in write mode and 255 * submission in read mode. 256 */ 257 struct rw_semaphore notifier_lock; 258 /** 259 * @userptr.invalidated_lock: Protects the 260 * @userptr.invalidated list. 261 */ 262 spinlock_t invalidated_lock; 263 /** 264 * @userptr.invalidated: List of invalidated userptrs, not yet 265 * picked 266 * up for revalidation. Protected from access with the 267 * @invalidated_lock. Removing items from the list 268 * additionally requires @lock in write mode, and adding 269 * items to the list requires either the @userptr.notifer_lock in 270 * write mode, OR @lock in write mode. 271 */ 272 struct list_head invalidated; 273 } userptr; 274 275 /** @preempt: preempt state */ 276 struct { 277 /** 278 * @min_run_period_ms: The minimum run period before preempting 279 * an engine again 280 */ 281 s64 min_run_period_ms; 282 /** @exec_queues: list of exec queues attached to this VM */ 283 struct list_head exec_queues; 284 /** @num_exec_queues: number exec queues attached to this VM */ 285 int num_exec_queues; 286 /** 287 * @rebind_deactivated: Whether rebind has been temporarily deactivated 288 * due to no work available. Protected by the vm resv. 289 */ 290 bool rebind_deactivated; 291 /** 292 * @rebind_work: worker to rebind invalidated userptrs / evicted 293 * BOs 294 */ 295 struct work_struct rebind_work; 296 } preempt; 297 298 /** @um: unified memory state */ 299 struct { 300 /** @asid: address space ID, unique to each VM */ 301 u32 asid; 302 /** 303 * @last_fault_vma: Last fault VMA, used for fast lookup when we 304 * get a flood of faults to the same VMA 305 */ 306 struct xe_vma *last_fault_vma; 307 } usm; 308 309 /** @error_capture: allow to track errors */ 310 struct { 311 /** @capture_once: capture only one error per VM */ 312 bool capture_once; 313 } error_capture; 314 315 /** 316 * @tlb_flush_seqno: Required TLB flush seqno for the next exec. 317 * protected by the vm resv. 318 */ 319 u64 tlb_flush_seqno; 320 /** 321 * @validating: The task that is currently making bos resident for this vm. 322 * Protected by the VM's resv for writing. Opportunistic reading can be done 323 * using READ_ONCE. Note: This is a workaround for the 324 * TTM eviction_valuable() callback not being passed a struct 325 * ttm_operation_context(). Future work might want to address this. 326 */ 327 struct task_struct *validating; 328 /** @batch_invalidate_tlb: Always invalidate TLB before batch start */ 329 bool batch_invalidate_tlb; 330 /** @xef: XE file handle for tracking this VM's drm client */ 331 struct xe_file *xef; 332 }; 333 334 /** struct xe_vma_op_map - VMA map operation */ 335 struct xe_vma_op_map { 336 /** @vma: VMA to map */ 337 struct xe_vma *vma; 338 /** @immediate: Immediate bind */ 339 bool immediate; 340 /** @read_only: Read only */ 341 bool read_only; 342 /** @is_null: is NULL binding */ 343 bool is_null; 344 /** @is_cpu_addr_mirror: is CPU address mirror binding */ 345 bool is_cpu_addr_mirror; 346 /** @dumpable: whether BO is dumped on GPU hang */ 347 bool dumpable; 348 /** @invalidate: invalidate the VMA before bind */ 349 bool invalidate_on_bind; 350 /** @pat_index: The pat index to use for this operation. */ 351 u16 pat_index; 352 }; 353 354 /** struct xe_vma_op_remap - VMA remap operation */ 355 struct xe_vma_op_remap { 356 /** @prev: VMA preceding part of a split mapping */ 357 struct xe_vma *prev; 358 /** @next: VMA subsequent part of a split mapping */ 359 struct xe_vma *next; 360 /** @start: start of the VMA unmap */ 361 u64 start; 362 /** @range: range of the VMA unmap */ 363 u64 range; 364 /** @skip_prev: skip prev rebind */ 365 bool skip_prev; 366 /** @skip_next: skip next rebind */ 367 bool skip_next; 368 /** @unmap_done: unmap operation in done */ 369 bool unmap_done; 370 }; 371 372 /** struct xe_vma_op_prefetch - VMA prefetch operation */ 373 struct xe_vma_op_prefetch { 374 /** @region: memory region to prefetch to */ 375 u32 region; 376 }; 377 378 /** struct xe_vma_op_map_range - VMA map range operation */ 379 struct xe_vma_op_map_range { 380 /** @vma: VMA to map (system allocator VMA) */ 381 struct xe_vma *vma; 382 /** @range: SVM range to map */ 383 struct xe_svm_range *range; 384 }; 385 386 /** struct xe_vma_op_unmap_range - VMA unmap range operation */ 387 struct xe_vma_op_unmap_range { 388 /** @range: SVM range to unmap */ 389 struct xe_svm_range *range; 390 }; 391 392 /** struct xe_vma_op_prefetch_range - VMA prefetch range operation */ 393 struct xe_vma_op_prefetch_range { 394 /** @range: xarray for SVM ranges data */ 395 struct xarray range; 396 /** @ranges_count: number of svm ranges to map */ 397 u32 ranges_count; 398 /** @region: memory region to prefetch to */ 399 u32 region; 400 }; 401 402 /** enum xe_vma_op_flags - flags for VMA operation */ 403 enum xe_vma_op_flags { 404 /** @XE_VMA_OP_COMMITTED: VMA operation committed */ 405 XE_VMA_OP_COMMITTED = BIT(0), 406 /** @XE_VMA_OP_PREV_COMMITTED: Previous VMA operation committed */ 407 XE_VMA_OP_PREV_COMMITTED = BIT(1), 408 /** @XE_VMA_OP_NEXT_COMMITTED: Next VMA operation committed */ 409 XE_VMA_OP_NEXT_COMMITTED = BIT(2), 410 }; 411 412 /** enum xe_vma_subop - VMA sub-operation */ 413 enum xe_vma_subop { 414 /** @XE_VMA_SUBOP_MAP_RANGE: Map range */ 415 XE_VMA_SUBOP_MAP_RANGE, 416 /** @XE_VMA_SUBOP_UNMAP_RANGE: Unmap range */ 417 XE_VMA_SUBOP_UNMAP_RANGE, 418 }; 419 420 /** struct xe_vma_op - VMA operation */ 421 struct xe_vma_op { 422 /** @base: GPUVA base operation */ 423 struct drm_gpuva_op base; 424 /** @link: async operation link */ 425 struct list_head link; 426 /** @flags: operation flags */ 427 enum xe_vma_op_flags flags; 428 /** @subop: user defined sub-operation */ 429 enum xe_vma_subop subop; 430 /** @tile_mask: Tile mask for operation */ 431 u8 tile_mask; 432 433 union { 434 /** @map: VMA map operation specific data */ 435 struct xe_vma_op_map map; 436 /** @remap: VMA remap operation specific data */ 437 struct xe_vma_op_remap remap; 438 /** @prefetch: VMA prefetch operation specific data */ 439 struct xe_vma_op_prefetch prefetch; 440 /** @map_range: VMA map range operation specific data */ 441 struct xe_vma_op_map_range map_range; 442 /** @unmap_range: VMA unmap range operation specific data */ 443 struct xe_vma_op_unmap_range unmap_range; 444 /** @prefetch_range: VMA prefetch range operation specific data */ 445 struct xe_vma_op_prefetch_range prefetch_range; 446 }; 447 }; 448 449 /** struct xe_vma_ops - VMA operations */ 450 struct xe_vma_ops { 451 /** @list: list of VMA operations */ 452 struct list_head list; 453 /** @vm: VM */ 454 struct xe_vm *vm; 455 /** @q: exec queue for VMA operations */ 456 struct xe_exec_queue *q; 457 /** @syncs: syncs these operation */ 458 struct xe_sync_entry *syncs; 459 /** @num_syncs: number of syncs */ 460 u32 num_syncs; 461 /** @pt_update_ops: page table update operations */ 462 struct xe_vm_pgtable_update_ops pt_update_ops[XE_MAX_TILES_PER_DEVICE]; 463 /** @flag: signify the properties within xe_vma_ops*/ 464 #define XE_VMA_OPS_FLAG_HAS_SVM_PREFETCH BIT(0) 465 u32 flags; 466 #ifdef TEST_VM_OPS_ERROR 467 /** @inject_error: inject error to test error handling */ 468 bool inject_error; 469 #endif 470 }; 471 472 #endif 473