1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /*
3 * Copyright (C) 2012-2014, 2018-2026 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
7 #include <net/mac80211.h>
8 #include <linux/netdevice.h>
9 #include <linux/dmi.h>
10
11 #include "iwl-trans.h"
12 #include "iwl-op-mode.h"
13 #include "fw/img.h"
14 #include "iwl-debug.h"
15 #include "iwl-prph.h"
16 #include "fw/acpi.h"
17 #include "fw/pnvm.h"
18 #include "fw/uefi.h"
19 #include "fw/regulatory.h"
20
21 #include "mvm.h"
22 #include "fw/dbg.h"
23 #include "iwl-phy-db.h"
24 #include "iwl-modparams.h"
25 #include "iwl-nvm-parse.h"
26 #include "time-sync.h"
27
28 #define MVM_UCODE_ALIVE_TIMEOUT (2 * HZ)
29 #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ)
30
31 struct iwl_mvm_alive_data {
32 __le32 sku_id[3];
33 bool valid;
34 };
35
iwl_send_tx_ant_cfg(struct iwl_mvm * mvm,u8 valid_tx_ant)36 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
37 {
38 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
39 .valid = cpu_to_le32(valid_tx_ant),
40 };
41
42 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
43 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
44 sizeof(tx_ant_cmd), &tx_ant_cmd);
45 }
46
iwl_send_rss_cfg_cmd(struct iwl_mvm * mvm)47 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
48 {
49 int i;
50 struct iwl_rss_config_cmd cmd = {
51 .flags = cpu_to_le32(IWL_RSS_ENABLE),
52 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
53 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
54 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
55 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
56 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
57 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
58 };
59
60 if (mvm->trans->info.num_rxqs == 1)
61 return 0;
62
63 /* Do not direct RSS traffic to Q 0 which is our fallback queue */
64 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
65 cmd.indirection_table[i] =
66 1 + (i % (mvm->trans->info.num_rxqs - 1));
67 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
68
69 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
70 }
71
iwl_mvm_send_dqa_cmd(struct iwl_mvm * mvm)72 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
73 {
74 struct iwl_dqa_enable_cmd dqa_cmd = {
75 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
76 };
77 u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD);
78 int ret;
79
80 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
81 if (ret)
82 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
83 else
84 IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
85
86 return ret;
87 }
88
iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm * mvm,struct iwl_rx_cmd_buffer * rxb)89 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
90 struct iwl_rx_cmd_buffer *rxb)
91 {
92 struct iwl_rx_packet *pkt = rxb_addr(rxb);
93 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
94
95 if (mfu_dump_notif->index_num == 0)
96 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
97 le32_to_cpu(mfu_dump_notif->assert_id));
98 }
99
iwl_alive_fn(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)100 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
101 struct iwl_rx_packet *pkt, void *data)
102 {
103 unsigned int pkt_len = iwl_rx_packet_payload_len(pkt);
104 struct iwl_mvm *mvm =
105 container_of(notif_wait, struct iwl_mvm, notif_wait);
106 struct iwl_mvm_alive_data *alive_data = data;
107 struct iwl_umac_alive *umac;
108 struct iwl_lmac_alive *lmac1;
109 struct iwl_lmac_alive *lmac2 = NULL;
110 u16 status;
111 u32 lmac_error_event_table, umac_error_table;
112 u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP,
113 UCODE_ALIVE_NTFY, 0);
114 u32 i;
115
116
117 if (version >= 6) {
118 struct iwl_alive_ntf_v7 *palive;
119
120 if (pkt_len < sizeof(*palive))
121 return false;
122
123 palive = (void *)pkt->data;
124
125 umac = &palive->umac_data;
126 lmac1 = &palive->lmac_data[0];
127 lmac2 = &palive->lmac_data[1];
128 status = le16_to_cpu(palive->status);
129
130 BUILD_BUG_ON(sizeof(palive->sku_id.data) !=
131 sizeof(alive_data->sku_id));
132 memcpy(alive_data->sku_id, palive->sku_id.data,
133 sizeof(palive->sku_id.data));
134
135 IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n",
136 le32_to_cpu(alive_data->sku_id[0]),
137 le32_to_cpu(alive_data->sku_id[1]),
138 le32_to_cpu(alive_data->sku_id[2]));
139
140 mvm->trans->dbg.imr_data.imr_enable =
141 le32_to_cpu(palive->imr.enabled);
142 mvm->trans->dbg.imr_data.imr_size =
143 le32_to_cpu(palive->imr.size);
144 mvm->trans->dbg.imr_data.imr2sram_remainbyte =
145 mvm->trans->dbg.imr_data.imr_size;
146 mvm->trans->dbg.imr_data.imr_base_addr =
147 palive->imr.base_addr;
148 mvm->trans->dbg.imr_data.imr_curr_addr =
149 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr);
150 IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x size 0x0%x Address 0x%016llx\n",
151 mvm->trans->dbg.imr_data.imr_enable,
152 mvm->trans->dbg.imr_data.imr_size,
153 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr));
154
155 if (!mvm->trans->dbg.imr_data.imr_enable) {
156 for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) {
157 struct iwl_ucode_tlv *reg_tlv;
158 struct iwl_fw_ini_region_tlv *reg;
159
160 reg_tlv = mvm->trans->dbg.active_regions[i];
161 if (!reg_tlv)
162 continue;
163
164 reg = (void *)reg_tlv->data;
165 /*
166 * We have only one DRAM IMR region, so we
167 * can break as soon as we find the first
168 * one.
169 */
170 if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) {
171 mvm->trans->dbg.unsupported_region_msk |= BIT(i);
172 break;
173 }
174 }
175 }
176
177 if (version >= 8) {
178 const struct iwl_alive_ntf *palive_v8 =
179 (void *)pkt->data;
180
181 if (pkt_len < sizeof(*palive_v8))
182 return false;
183
184 IWL_DEBUG_FW(mvm, "platform id: 0x%llx\n",
185 palive_v8->platform_id);
186 }
187 } else if (iwl_rx_packet_payload_len(pkt) ==
188 sizeof(struct iwl_alive_ntf_v3)) {
189 struct iwl_alive_ntf_v3 *palive3;
190
191 if (pkt_len < sizeof(*palive3))
192 return false;
193
194 palive3 = (void *)pkt->data;
195 umac = &palive3->umac_data;
196 lmac1 = &palive3->lmac_data;
197 status = le16_to_cpu(palive3->status);
198 } else {
199 WARN(1, "unsupported alive notification (size %d)\n",
200 iwl_rx_packet_payload_len(pkt));
201 /* get timeout later */
202 return false;
203 }
204
205 lmac_error_event_table =
206 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
207 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
208
209 if (lmac2)
210 mvm->trans->dbg.lmac_error_event_table[1] =
211 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
212
213 umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) &
214 ~FW_ADDR_CACHE_CONTROL;
215
216 if (umac_error_table) {
217 iwl_fw_umac_set_alive_err_table(mvm->trans,
218 umac_error_table);
219 }
220
221 alive_data->valid = status == IWL_ALIVE_STATUS_OK;
222
223 IWL_DEBUG_FW(mvm,
224 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
225 status, lmac1->ver_type, lmac1->ver_subtype);
226
227 if (lmac2)
228 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
229
230 IWL_DEBUG_FW(mvm,
231 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
232 le32_to_cpu(umac->umac_major),
233 le32_to_cpu(umac->umac_minor));
234
235 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
236
237 return true;
238 }
239
iwl_wait_init_complete(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)240 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
241 struct iwl_rx_packet *pkt, void *data)
242 {
243 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
244
245 return true;
246 }
247
iwl_wait_phy_db_entry(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)248 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
249 struct iwl_rx_packet *pkt, void *data)
250 {
251 struct iwl_phy_db *phy_db = data;
252
253 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
254 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
255 return true;
256 }
257
258 WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
259
260 return false;
261 }
262
iwl_mvm_print_pd_notification(struct iwl_mvm * mvm)263 static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm)
264 {
265 #define IWL_FW_PRINT_REG_INFO(reg_name) \
266 IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name))
267
268 struct iwl_trans *trans = mvm->trans;
269 enum iwl_device_family device_family = trans->mac_cfg->device_family;
270
271 if (device_family < IWL_DEVICE_FAMILY_8000)
272 return;
273
274 if (device_family <= IWL_DEVICE_FAMILY_9000)
275 IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION);
276 else
277 IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION);
278
279 IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE);
280
281 /* print OPT info */
282 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR);
283 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA);
284 }
285
iwl_mvm_load_ucode_wait_alive(struct iwl_mvm * mvm,enum iwl_ucode_type ucode_type)286 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
287 enum iwl_ucode_type ucode_type)
288 {
289 struct iwl_notification_wait alive_wait;
290 struct iwl_mvm_alive_data alive_data = {};
291 int ret;
292 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
293 static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY };
294 bool run_in_rfkill =
295 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
296 u8 count;
297 struct iwl_pc_data *pc_data;
298
299 if (ucode_type == IWL_UCODE_REGULAR &&
300 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
301 !(fw_has_capa(&mvm->fw->ucode_capa,
302 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
303 ucode_type = IWL_UCODE_REGULAR_USNIFFER;
304 iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
305 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
306
307 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
308 alive_cmd, ARRAY_SIZE(alive_cmd),
309 iwl_alive_fn, &alive_data);
310
311 /*
312 * We want to load the INIT firmware even in RFKILL
313 * For the unified firmware case, the ucode_type is not
314 * INIT, but we still need to run it.
315 */
316 ret = iwl_trans_start_fw(mvm->trans, mvm->fw, ucode_type,
317 run_in_rfkill);
318 if (ret) {
319 iwl_fw_set_current_image(&mvm->fwrt, old_type);
320 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
321 return ret;
322 }
323
324 /*
325 * Some things may run in the background now, but we
326 * just wait for the ALIVE notification here.
327 */
328 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
329 MVM_UCODE_ALIVE_TIMEOUT);
330
331 if (mvm->trans->mac_cfg->device_family ==
332 IWL_DEVICE_FAMILY_AX210) {
333 /* print these registers regardless of alive fail/success */
334 IWL_INFO(mvm, "WFPM_UMAC_PD_NOTIFICATION: 0x%x\n",
335 iwl_read_umac_prph(mvm->trans, WFPM_ARC1_PD_NOTIFICATION));
336 IWL_INFO(mvm, "WFPM_LMAC2_PD_NOTIFICATION: 0x%x\n",
337 iwl_read_umac_prph(mvm->trans, WFPM_LMAC2_PD_NOTIFICATION));
338 IWL_INFO(mvm, "WFPM_AUTH_KEY_0: 0x%x\n",
339 iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG));
340 IWL_INFO(mvm, "CNVI_SCU_SEQ_DATA_DW9: 0x%x\n",
341 iwl_read_prph(mvm->trans, CNVI_SCU_SEQ_DATA_DW9));
342 }
343
344 if (ret) {
345 struct iwl_trans *trans = mvm->trans;
346
347 /* SecBoot info */
348 if (trans->mac_cfg->device_family >=
349 IWL_DEVICE_FAMILY_22000) {
350 IWL_ERR(mvm,
351 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
352 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
353 iwl_read_umac_prph(trans,
354 UMAG_SB_CPU_2_STATUS));
355 } else if (trans->mac_cfg->device_family >=
356 IWL_DEVICE_FAMILY_8000) {
357 IWL_ERR(mvm,
358 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
359 iwl_read_prph(trans, SB_CPU_1_STATUS),
360 iwl_read_prph(trans, SB_CPU_2_STATUS));
361 }
362
363 iwl_mvm_print_pd_notification(mvm);
364
365 /* LMAC/UMAC PC info */
366 if (trans->mac_cfg->device_family >=
367 IWL_DEVICE_FAMILY_22000) {
368 pc_data = trans->dbg.pc_data;
369 for (count = 0; count < trans->dbg.num_pc;
370 count++, pc_data++)
371 IWL_ERR(mvm, "%s: 0x%x\n",
372 pc_data->pc_name,
373 pc_data->pc_address);
374 } else if (trans->mac_cfg->device_family >=
375 IWL_DEVICE_FAMILY_9000) {
376 IWL_ERR(mvm, "UMAC PC: 0x%x\n",
377 iwl_read_umac_prph(trans,
378 UREG_UMAC_CURRENT_PC));
379 IWL_ERR(mvm, "LMAC PC: 0x%x\n",
380 iwl_read_umac_prph(trans,
381 UREG_LMAC1_CURRENT_PC));
382 if (iwl_mvm_is_cdb_supported(mvm))
383 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
384 iwl_read_umac_prph(trans,
385 UREG_LMAC2_CURRENT_PC));
386 }
387
388 if (ret == -ETIMEDOUT && !mvm->fw_product_reset)
389 iwl_fw_dbg_error_collect(&mvm->fwrt,
390 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
391
392 iwl_fw_set_current_image(&mvm->fwrt, old_type);
393 return ret;
394 }
395
396 if (!alive_data.valid) {
397 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
398 iwl_fw_set_current_image(&mvm->fwrt, old_type);
399 return -EIO;
400 }
401
402 /* if reached this point, Alive notification was received */
403 iwl_mei_alive_notif(true);
404
405 iwl_trans_fw_alive(mvm->trans);
406
407 ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait,
408 mvm->fw, alive_data.sku_id);
409 if (ret) {
410 IWL_ERR(mvm, "Timeout waiting for PNVM load!\n");
411 iwl_fw_set_current_image(&mvm->fwrt, old_type);
412 return ret;
413 }
414
415 /*
416 * Note: all the queues are enabled as part of the interface
417 * initialization, but in firmware restart scenarios they
418 * could be stopped, so wake them up. In firmware restart,
419 * mac80211 will have the queues stopped as well until the
420 * reconfiguration completes. During normal startup, they
421 * will be empty.
422 */
423
424 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
425 /*
426 * Set a 'fake' TID for the command queue, since we use the
427 * hweight() of the tid_bitmap as a refcount now. Not that
428 * we ever even consider the command queue as one we might
429 * want to reuse, but be safe nevertheless.
430 */
431 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
432 BIT(IWL_MAX_TID_COUNT + 2);
433
434 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
435 #ifdef CONFIG_IWLWIFI_DEBUGFS
436 iwl_fw_set_dbg_rec_on(&mvm->fwrt);
437 #endif
438
439 /*
440 * For pre-MLD API (MLD API doesn't use the timestamps):
441 * All the BSSes in the BSS table include the GP2 in the system
442 * at the beacon Rx time, this is of course no longer relevant
443 * since we are resetting the firmware.
444 * Purge all the BSS table.
445 */
446 if (!mvm->mld_api_is_used)
447 cfg80211_bss_flush(mvm->hw->wiphy);
448
449 return 0;
450 }
451
iwl_mvm_phy_filter_init(struct iwl_mvm * mvm,struct iwl_phy_specific_cfg * phy_filters)452 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
453 struct iwl_phy_specific_cfg *phy_filters)
454 {
455 #ifdef CONFIG_ACPI
456 *phy_filters = mvm->fwrt.phy_filters;
457 #endif /* CONFIG_ACPI */
458 }
459
iwl_mvm_uats_init(struct iwl_mvm * mvm)460 static void iwl_mvm_uats_init(struct iwl_mvm *mvm)
461 {
462 struct iwl_mcc_allowed_ap_type_cmd_v1 *cmd __free(kfree) = NULL;
463 int cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
464 MCC_ALLOWED_AP_TYPE_CMD);
465 struct iwl_host_cmd hcmd = {
466 .id = cmd_id,
467 .len[0] = sizeof(*cmd),
468 .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
469 };
470 u8 cmd_ver;
471 int ret;
472
473 if (mvm->trans->mac_cfg->device_family < IWL_DEVICE_FAMILY_AX210 ||
474 !mvm->trans->cfg->uhb_supported) {
475 IWL_DEBUG_RADIO(mvm, "UATS feature is not supported\n");
476 return;
477 }
478
479 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
480 IWL_FW_CMD_VER_UNKNOWN);
481 if (cmd_ver != 1) {
482 IWL_DEBUG_RADIO(mvm,
483 "MCC_ALLOWED_AP_TYPE_CMD ver %d not supported\n",
484 cmd_ver);
485 return;
486 }
487
488 iwl_uefi_get_uats_table(mvm->trans, &mvm->fwrt);
489
490 if (!mvm->fwrt.ap_type_cmd_valid)
491 return;
492
493 /* Since we free the command immediately after iwl_mvm_send_cmd, we
494 * must send this command in SYNC mode.
495 */
496 lockdep_assert_held(&mvm->mutex);
497
498 cmd = kzalloc_obj(*cmd);
499 if (!cmd)
500 return;
501
502 BUILD_BUG_ON(sizeof(mvm->fwrt.ap_type_cmd.mcc_to_ap_type_map) !=
503 sizeof(cmd->mcc_to_ap_type_map));
504
505 memcpy(cmd->mcc_to_ap_type_map,
506 mvm->fwrt.ap_type_cmd.mcc_to_ap_type_map,
507 sizeof(mvm->fwrt.ap_type_cmd.mcc_to_ap_type_map));
508
509 hcmd.data[0] = cmd;
510
511 ret = iwl_mvm_send_cmd(mvm, &hcmd);
512 if (ret < 0)
513 IWL_ERR(mvm, "failed to send MCC_ALLOWED_AP_TYPE_CMD (%d)\n",
514 ret);
515 else
516 IWL_DEBUG_RADIO(mvm, "MCC_ALLOWED_AP_TYPE_CMD sent to FW\n");
517 }
518
iwl_mvm_sgom_init(struct iwl_mvm * mvm)519 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
520 {
521 u8 cmd_ver;
522 int ret;
523 struct iwl_host_cmd cmd = {
524 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
525 SAR_OFFSET_MAPPING_TABLE_CMD),
526 .flags = 0,
527 .data[0] = &mvm->fwrt.sgom_table,
528 .len[0] = sizeof(mvm->fwrt.sgom_table),
529 .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
530 };
531
532 if (!mvm->fwrt.sgom_enabled) {
533 IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n");
534 return 0;
535 }
536
537 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
538 IWL_FW_CMD_VER_UNKNOWN);
539
540 if (cmd_ver != 2) {
541 IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n",
542 cmd_ver);
543 return 0;
544 }
545
546 ret = iwl_mvm_send_cmd(mvm, &cmd);
547 if (ret < 0)
548 IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret);
549
550 return ret;
551 }
552
iwl_send_phy_cfg_cmd(struct iwl_mvm * mvm)553 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
554 {
555 u32 cmd_id = PHY_CONFIGURATION_CMD;
556 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd;
557 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
558 u8 cmd_ver;
559 size_t cmd_size;
560
561 if (iwl_mvm_has_unified_ucode(mvm) &&
562 !mvm->trans->cfg->tx_with_siso_diversity)
563 return 0;
564
565 if (mvm->trans->cfg->tx_with_siso_diversity) {
566 /*
567 * TODO: currently we don't set the antenna but letting the NIC
568 * to decide which antenna to use. This should come from BIOS.
569 */
570 phy_cfg_cmd.phy_cfg =
571 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED);
572 }
573
574 /* Set parameters */
575 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
576
577 /* set flags extra PHY configuration flags from the device's cfg */
578 phy_cfg_cmd.phy_cfg |=
579 cpu_to_le32(mvm->trans->mac_cfg->extra_phy_cfg_flags);
580
581 phy_cfg_cmd.calib_control.event_trigger =
582 mvm->fw->default_calib[ucode_type].event_trigger;
583 phy_cfg_cmd.calib_control.flow_trigger =
584 mvm->fw->default_calib[ucode_type].flow_trigger;
585
586 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
587 IWL_FW_CMD_VER_UNKNOWN);
588 if (cmd_ver >= 3)
589 iwl_mvm_phy_filter_init(mvm, &phy_cfg_cmd.phy_specific_cfg);
590
591 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
592 phy_cfg_cmd.phy_cfg);
593 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) :
594 sizeof(struct iwl_phy_cfg_cmd_v1);
595 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd);
596 }
597
iwl_run_unified_mvm_ucode(struct iwl_mvm * mvm)598 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm)
599 {
600 struct iwl_notification_wait init_wait;
601 struct iwl_nvm_access_complete_cmd nvm_complete = {};
602 struct iwl_init_extended_cfg_cmd init_cfg = {
603 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
604 };
605 static const u16 init_complete[] = {
606 INIT_COMPLETE_NOTIF,
607 };
608 u32 sb_cfg;
609 int ret;
610
611 if (mvm->trans->cfg->tx_with_siso_diversity)
612 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
613
614 lockdep_assert_held(&mvm->mutex);
615
616 mvm->rfkill_safe_init_done = false;
617
618 if (mvm->trans->mac_cfg->device_family == IWL_DEVICE_FAMILY_AX210) {
619 sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG);
620 /* if needed, we'll reset this on our way out later */
621 mvm->fw_product_reset = sb_cfg == SB_CFG_RESIDES_IN_ROM;
622 if (mvm->fw_product_reset && iwl_mei_pldr_req())
623 return -EBUSY;
624 }
625
626 iwl_init_notification_wait(&mvm->notif_wait,
627 &init_wait,
628 init_complete,
629 ARRAY_SIZE(init_complete),
630 iwl_wait_init_complete,
631 NULL);
632
633 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
634
635 /* Will also start the device */
636 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
637 if (ret) {
638 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
639
640 /* if we needed reset then fail here, but notify and remove */
641 if (mvm->fw_product_reset) {
642 iwl_mei_alive_notif(false);
643 iwl_trans_pcie_reset(mvm->trans,
644 IWL_RESET_MODE_RESCAN);
645 }
646
647 goto error;
648 }
649 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
650 NULL);
651
652 /* Send init config command to mark that we are sending NVM access
653 * commands
654 */
655 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
656 INIT_EXTENDED_CFG_CMD),
657 CMD_SEND_IN_RFKILL,
658 sizeof(init_cfg), &init_cfg);
659 if (ret) {
660 IWL_ERR(mvm, "Failed to run init config command: %d\n",
661 ret);
662 goto error;
663 }
664
665 /* Load NVM to NIC if needed */
666 if (mvm->nvm_file_name) {
667 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
668 mvm->nvm_sections);
669 if (ret)
670 goto error;
671 ret = iwl_mvm_load_nvm_to_nic(mvm);
672 if (ret)
673 goto error;
674 }
675
676 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
677 NVM_ACCESS_COMPLETE),
678 CMD_SEND_IN_RFKILL,
679 sizeof(nvm_complete), &nvm_complete);
680 if (ret) {
681 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
682 ret);
683 goto error;
684 }
685
686 ret = iwl_send_phy_cfg_cmd(mvm);
687 if (ret) {
688 IWL_ERR(mvm, "Failed to run PHY configuration: %d\n",
689 ret);
690 goto error;
691 }
692
693 /* We wait for the INIT complete notification */
694 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
695 MVM_UCODE_ALIVE_TIMEOUT);
696 if (ret)
697 return ret;
698
699 /* Read the NVM only at driver load time, no need to do this twice */
700 if (!mvm->nvm_data) {
701 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw,
702 mvm->set_tx_ant, mvm->set_rx_ant);
703 if (IS_ERR(mvm->nvm_data)) {
704 ret = PTR_ERR(mvm->nvm_data);
705 mvm->nvm_data = NULL;
706 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
707 return ret;
708 }
709 }
710
711 mvm->rfkill_safe_init_done = true;
712
713 return 0;
714
715 error:
716 iwl_remove_notification(&mvm->notif_wait, &init_wait);
717 return ret;
718 }
719
iwl_run_init_mvm_ucode(struct iwl_mvm * mvm)720 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm)
721 {
722 struct iwl_notification_wait calib_wait;
723 static const u16 init_complete[] = {
724 INIT_COMPLETE_NOTIF,
725 CALIB_RES_NOTIF_PHY_DB
726 };
727 int ret;
728
729 if (iwl_mvm_has_unified_ucode(mvm))
730 return iwl_run_unified_mvm_ucode(mvm);
731
732 lockdep_assert_held(&mvm->mutex);
733
734 mvm->rfkill_safe_init_done = false;
735
736 iwl_init_notification_wait(&mvm->notif_wait,
737 &calib_wait,
738 init_complete,
739 ARRAY_SIZE(init_complete),
740 iwl_wait_phy_db_entry,
741 mvm->phy_db);
742
743 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
744
745 /* Will also start the device */
746 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
747 if (ret) {
748 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
749 goto remove_notif;
750 }
751
752 if (mvm->trans->mac_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
753 ret = iwl_mvm_send_bt_init_conf(mvm);
754 if (ret)
755 goto remove_notif;
756 }
757
758 /* Read the NVM only at driver load time, no need to do this twice */
759 if (!mvm->nvm_data) {
760 ret = iwl_nvm_init(mvm);
761 if (ret) {
762 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
763 goto remove_notif;
764 }
765 }
766
767 /* In case we read the NVM from external file, load it to the NIC */
768 if (mvm->nvm_file_name) {
769 ret = iwl_mvm_load_nvm_to_nic(mvm);
770 if (ret)
771 goto remove_notif;
772 }
773
774 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
775 "Too old NVM version (0x%0x, required = 0x%0x)",
776 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
777
778 /*
779 * abort after reading the nvm in case RF Kill is on, we will complete
780 * the init seq later when RF kill will switch to off
781 */
782 if (iwl_mvm_is_radio_hw_killed(mvm)) {
783 IWL_DEBUG_RF_KILL(mvm,
784 "jump over all phy activities due to RF kill\n");
785 goto remove_notif;
786 }
787
788 mvm->rfkill_safe_init_done = true;
789
790 /* Send TX valid antennas before triggering calibrations */
791 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
792 if (ret)
793 goto remove_notif;
794
795 ret = iwl_send_phy_cfg_cmd(mvm);
796 if (ret) {
797 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
798 ret);
799 goto remove_notif;
800 }
801
802 /*
803 * Some things may run in the background now, but we
804 * just wait for the calibration complete notification.
805 */
806 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
807 MVM_UCODE_CALIB_TIMEOUT);
808 if (!ret)
809 goto out;
810
811 if (iwl_mvm_is_radio_hw_killed(mvm)) {
812 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
813 ret = 0;
814 } else {
815 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
816 ret);
817 }
818
819 goto out;
820
821 remove_notif:
822 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
823 out:
824 mvm->rfkill_safe_init_done = false;
825 if (!mvm->nvm_data) {
826 /* we want to debug INIT and we have no NVM - fake */
827 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
828 sizeof(struct ieee80211_channel) +
829 sizeof(struct ieee80211_rate),
830 GFP_KERNEL);
831 if (!mvm->nvm_data)
832 return -ENOMEM;
833 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
834 mvm->nvm_data->bands[0].n_channels = 1;
835 mvm->nvm_data->bands[0].n_bitrates = 1;
836 mvm->nvm_data->bands[0].bitrates =
837 (void *)(mvm->nvm_data->channels + 1);
838 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
839 }
840
841 return ret;
842 }
843
iwl_mvm_config_ltr(struct iwl_mvm * mvm)844 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
845 {
846 struct iwl_ltr_config_cmd cmd = {
847 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
848 };
849
850 if (!iwl_trans_is_ltr_enabled(mvm->trans))
851 return 0;
852
853 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
854 sizeof(cmd), &cmd);
855 }
856
iwl_mvm_sar_select_profile(struct iwl_mvm * mvm,int prof_a,int prof_b)857 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
858 {
859 u32 cmd_id = REDUCE_TX_POWER_CMD;
860 struct iwl_dev_tx_power_cmd_v3_v8 cmd = {
861 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
862 };
863 struct iwl_dev_tx_power_cmd cmd_v9_v10 = {
864 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
865 };
866 __le16 *per_chain;
867 int ret;
868 u16 len = 0;
869 u32 n_subbands;
870 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 3);
871 void *cmd_data = &cmd;
872
873 if (cmd_ver == 10) {
874 len = sizeof(cmd_v9_v10.v10);
875 n_subbands = IWL_NUM_SUB_BANDS_V2;
876 per_chain = &cmd_v9_v10.v10.per_chain[0][0][0];
877 cmd_v9_v10.v10.flags =
878 cpu_to_le32(mvm->fwrt.reduced_power_flags);
879 } else if (cmd_ver == 9) {
880 len = sizeof(cmd_v9_v10.v9);
881 n_subbands = IWL_NUM_SUB_BANDS_V1;
882 per_chain = &cmd_v9_v10.v9.per_chain[0][0];
883 } else if (cmd_ver == 8) {
884 len = sizeof(cmd.v8);
885 n_subbands = IWL_NUM_SUB_BANDS_V2;
886 per_chain = cmd.v8.per_chain[0][0];
887 cmd.v8.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags);
888 } else if (fw_has_api(&mvm->fw->ucode_capa,
889 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) {
890 len = sizeof(cmd.v5);
891 n_subbands = IWL_NUM_SUB_BANDS_V1;
892 per_chain = cmd.v5.per_chain[0][0];
893 } else if (fw_has_capa(&mvm->fw->ucode_capa,
894 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) {
895 len = sizeof(cmd.v4);
896 n_subbands = IWL_NUM_SUB_BANDS_V1;
897 per_chain = cmd.v4.per_chain[0][0];
898 } else {
899 len = sizeof(cmd.v3);
900 n_subbands = IWL_NUM_SUB_BANDS_V1;
901 per_chain = cmd.v3.per_chain[0][0];
902 }
903
904 /* all structs have the same common part, add its length */
905 len += sizeof(cmd.common);
906
907 if (cmd_ver < 9)
908 len += sizeof(cmd.per_band);
909 else
910 cmd_data = &cmd_v9_v10;
911
912 ret = iwl_sar_fill_profile(&mvm->fwrt, per_chain,
913 IWL_NUM_CHAIN_TABLES,
914 n_subbands, prof_a, prof_b);
915
916 /* return on error or if the profile is disabled (positive number) */
917 if (ret)
918 return ret;
919
920 iwl_mei_set_power_limit(per_chain);
921
922 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
923 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, cmd_data);
924 }
925
iwl_mvm_get_sar_geo_profile(struct iwl_mvm * mvm)926 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
927 {
928 union iwl_geo_tx_power_profiles_cmd geo_tx_cmd = {};
929 struct iwl_geo_tx_power_profiles_resp *resp;
930 u16 len;
931 int ret;
932 struct iwl_host_cmd cmd = {
933 .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD),
934 .flags = CMD_WANT_SKB,
935 .data = { &geo_tx_cmd },
936 };
937 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
938 IWL_FW_CMD_VER_UNKNOWN);
939
940 /* the ops field is at the same spot for all versions, so set in v1 */
941 geo_tx_cmd.v1.ops =
942 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
943
944 if (cmd_ver == 5)
945 len = sizeof(geo_tx_cmd.v5);
946 else if (cmd_ver == 4)
947 len = sizeof(geo_tx_cmd.v4);
948 else if (cmd_ver == 3)
949 len = sizeof(geo_tx_cmd.v3);
950 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
951 IWL_UCODE_TLV_API_SAR_TABLE_VER))
952 len = sizeof(geo_tx_cmd.v2);
953 else
954 len = sizeof(geo_tx_cmd.v1);
955
956 if (!iwl_sar_geo_support(&mvm->fwrt))
957 return -EOPNOTSUPP;
958
959 cmd.len[0] = len;
960
961 ret = iwl_mvm_send_cmd(mvm, &cmd);
962 if (ret) {
963 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
964 return ret;
965 }
966
967 resp = (void *)cmd.resp_pkt->data;
968 ret = le32_to_cpu(resp->profile_idx);
969
970 if (WARN_ON(ret > BIOS_GEO_MAX_PROFILE_NUM))
971 ret = -EIO;
972
973 iwl_free_resp(&cmd);
974 return ret;
975 }
976
iwl_mvm_sar_geo_init(struct iwl_mvm * mvm)977 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
978 {
979 u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD);
980 union iwl_geo_tx_power_profiles_cmd cmd = {};
981 u16 len;
982 u32 n_bands;
983 u32 n_profiles;
984 __le32 sk = cpu_to_le32(0);
985 int ret;
986 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
987 IWL_FW_CMD_VER_UNKNOWN);
988
989 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) !=
990 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) ||
991 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) !=
992 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) ||
993 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) !=
994 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) ||
995 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) !=
996 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops));
997
998 /* the ops field is at the same spot for all versions, so set in v1 */
999 cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES);
1000
1001 /* Only set to South Korea if the table revision is 1 */
1002 if (mvm->fwrt.geo_rev == 1)
1003 sk = cpu_to_le32(1);
1004
1005 if (cmd_ver == 5) {
1006 len = sizeof(cmd.v5);
1007 n_bands = ARRAY_SIZE(cmd.v5.table[0]);
1008 n_profiles = BIOS_GEO_MAX_PROFILE_NUM;
1009 cmd.v5.table_revision = sk;
1010 } else if (cmd_ver == 4) {
1011 len = sizeof(cmd.v4);
1012 n_bands = ARRAY_SIZE(cmd.v4.table[0]);
1013 n_profiles = BIOS_GEO_MAX_PROFILE_NUM;
1014 cmd.v4.table_revision = sk;
1015 } else if (cmd_ver == 3) {
1016 len = sizeof(cmd.v3);
1017 n_bands = ARRAY_SIZE(cmd.v3.table[0]);
1018 n_profiles = BIOS_GEO_MIN_PROFILE_NUM;
1019 cmd.v3.table_revision = sk;
1020 } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
1021 IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
1022 len = sizeof(cmd.v2);
1023 n_bands = ARRAY_SIZE(cmd.v2.table[0]);
1024 n_profiles = BIOS_GEO_MIN_PROFILE_NUM;
1025 cmd.v2.table_revision = sk;
1026 } else {
1027 len = sizeof(cmd.v1);
1028 n_bands = ARRAY_SIZE(cmd.v1.table[0]);
1029 n_profiles = BIOS_GEO_MIN_PROFILE_NUM;
1030 }
1031
1032 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) !=
1033 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) ||
1034 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) !=
1035 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) ||
1036 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) !=
1037 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) ||
1038 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) !=
1039 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table));
1040 /* the table is at the same position for all versions, so set use v1 */
1041 ret = iwl_sar_geo_fill_table(&mvm->fwrt, &cmd.v1.table[0][0],
1042 n_bands, n_profiles);
1043
1044 /*
1045 * It is a valid scenario to not support SAR, or miss wgds table,
1046 * but in that case there is no need to send the command.
1047 */
1048 if (ret)
1049 return 0;
1050
1051 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd);
1052 }
1053
iwl_mvm_ppag_value_valid(struct iwl_fw_runtime * fwrt,int chain,int subband)1054 static bool iwl_mvm_ppag_value_valid(struct iwl_fw_runtime *fwrt, int chain,
1055 int subband)
1056 {
1057 s8 ppag_val = fwrt->ppag_chains[chain].subbands[subband];
1058
1059 if ((subband == 0 &&
1060 (ppag_val > IWL_PPAG_MAX_LB || ppag_val < IWL_PPAG_MIN_LB)) ||
1061 (subband != 0 &&
1062 (ppag_val > IWL_PPAG_MAX_HB || ppag_val < IWL_PPAG_MIN_HB))) {
1063 IWL_DEBUG_RADIO(fwrt, "Invalid PPAG value: %d\n", ppag_val);
1064 return false;
1065 }
1066 return true;
1067 }
1068
iwl_mvm_fill_ppag_table(struct iwl_fw_runtime * fwrt,union iwl_ppag_table_cmd * cmd,int * cmd_size)1069 static int iwl_mvm_fill_ppag_table(struct iwl_fw_runtime *fwrt,
1070 union iwl_ppag_table_cmd *cmd,
1071 int *cmd_size)
1072 {
1073 u8 cmd_ver;
1074 int i, j, num_sub_bands;
1075 s8 *gain;
1076 bool send_ppag_always;
1077
1078 /* many firmware images for JF lie about this */
1079 if (CSR_HW_RFID_TYPE(fwrt->trans->info.hw_rf_id) ==
1080 CSR_HW_RFID_TYPE(CSR_HW_RF_ID_TYPE_JF))
1081 return -EOPNOTSUPP;
1082
1083 if (!fw_has_capa(&fwrt->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) {
1084 IWL_DEBUG_RADIO(fwrt,
1085 "PPAG capability not supported by FW, command not sent.\n");
1086 return -EINVAL;
1087 }
1088
1089 cmd_ver = iwl_fw_lookup_cmd_ver(fwrt->fw,
1090 WIDE_ID(PHY_OPS_GROUP,
1091 PER_PLATFORM_ANT_GAIN_CMD), 1);
1092 /*
1093 * Starting from ver 4, driver needs to send the PPAG CMD regardless
1094 * if PPAG is enabled/disabled or valid/invalid.
1095 */
1096 send_ppag_always = cmd_ver > 3;
1097
1098 /* Don't send PPAG if it is disabled */
1099 if (!send_ppag_always && !fwrt->ppag_flags) {
1100 IWL_DEBUG_RADIO(fwrt, "PPAG not enabled, command not sent.\n");
1101 return -EINVAL;
1102 }
1103
1104 IWL_DEBUG_RADIO(fwrt, "PPAG cmd ver is %d\n", cmd_ver);
1105 if (cmd_ver == 1) {
1106 num_sub_bands = IWL_NUM_SUB_BANDS_V1;
1107 gain = cmd->v1.gain[0];
1108 *cmd_size = sizeof(cmd->v1);
1109 cmd->v1.flags =
1110 cpu_to_le32(fwrt->ppag_flags & IWL_PPAG_CMD_V1_MASK);
1111 if (fwrt->ppag_bios_rev >= 1) {
1112 /* in this case FW supports revision 0 */
1113 IWL_DEBUG_RADIO(fwrt,
1114 "PPAG table rev is %d, send truncated table\n",
1115 fwrt->ppag_bios_rev);
1116 }
1117 } else if (cmd_ver == 5) {
1118 num_sub_bands = IWL_NUM_SUB_BANDS_V2;
1119 gain = cmd->v5.gain[0];
1120 *cmd_size = sizeof(cmd->v5);
1121 cmd->v5.flags =
1122 cpu_to_le32(fwrt->ppag_flags & IWL_PPAG_CMD_V5_MASK);
1123 if (fwrt->ppag_bios_rev == 0) {
1124 /* in this case FW supports revisions 1,2 or 3 */
1125 IWL_DEBUG_RADIO(fwrt,
1126 "PPAG table rev is 0, send padded table\n");
1127 }
1128 } else if (cmd_ver == 7) {
1129 num_sub_bands = IWL_NUM_SUB_BANDS_V2;
1130 gain = cmd->v7.gain[0];
1131 *cmd_size = sizeof(cmd->v7);
1132 cmd->v7.ppag_config_info.hdr.table_source =
1133 fwrt->ppag_bios_source;
1134 cmd->v7.ppag_config_info.hdr.table_revision =
1135 fwrt->ppag_bios_rev;
1136 cmd->v7.ppag_config_info.value = cpu_to_le32(fwrt->ppag_flags);
1137 } else {
1138 IWL_DEBUG_RADIO(fwrt, "Unsupported PPAG command version\n");
1139 return -EINVAL;
1140 }
1141
1142 /* ppag mode */
1143 IWL_DEBUG_RADIO(fwrt,
1144 "PPAG MODE bits were read from bios: %d\n",
1145 fwrt->ppag_flags);
1146
1147 if (cmd_ver == 1 &&
1148 !fw_has_capa(&fwrt->fw->ucode_capa,
1149 IWL_UCODE_TLV_CAPA_PPAG_CHINA_BIOS_SUPPORT)) {
1150 cmd->v1.flags &= cpu_to_le32(IWL_PPAG_ETSI_MASK);
1151 IWL_DEBUG_RADIO(fwrt, "masking ppag China bit\n");
1152 } else {
1153 IWL_DEBUG_RADIO(fwrt, "isn't masking ppag China bit\n");
1154 }
1155
1156 /* The 'flags' field is the same in v1 and v5 so we can just
1157 * use v1 to access it.
1158 */
1159 IWL_DEBUG_RADIO(fwrt,
1160 "PPAG MODE bits going to be sent: %d\n",
1161 (cmd_ver < 7) ? le32_to_cpu(cmd->v1.flags) :
1162 le32_to_cpu(cmd->v7.ppag_config_info.value));
1163
1164 for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
1165 for (j = 0; j < num_sub_bands; j++) {
1166 if (!send_ppag_always &&
1167 !iwl_mvm_ppag_value_valid(fwrt, i, j))
1168 return -EINVAL;
1169
1170 gain[i * num_sub_bands + j] =
1171 fwrt->ppag_chains[i].subbands[j];
1172 IWL_DEBUG_RADIO(fwrt,
1173 "PPAG table: chain[%d] band[%d]: gain = %d\n",
1174 i, j, gain[i * num_sub_bands + j]);
1175 }
1176 }
1177
1178 return 0;
1179 }
1180
iwl_mvm_ppag_send_cmd(struct iwl_mvm * mvm)1181 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1182 {
1183 union iwl_ppag_table_cmd cmd;
1184 int ret, cmd_size;
1185
1186 ret = iwl_mvm_fill_ppag_table(&mvm->fwrt, &cmd, &cmd_size);
1187 /* Not supporting PPAG table is a valid scenario */
1188 if (ret < 0)
1189 return 0;
1190
1191 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
1192 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
1193 PER_PLATFORM_ANT_GAIN_CMD),
1194 0, cmd_size, &cmd);
1195 if (ret < 0)
1196 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
1197 ret);
1198
1199 return ret;
1200 }
1201
iwl_mvm_ppag_init(struct iwl_mvm * mvm)1202 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1203 {
1204 /* no need to read the table, done in INIT stage */
1205 if (!(iwl_is_ppag_approved(&mvm->fwrt)))
1206 return 0;
1207
1208 return iwl_mvm_ppag_send_cmd(mvm);
1209 }
1210
iwl_mvm_tas_init(struct iwl_mvm * mvm)1211 static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1212 {
1213 u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG);
1214 int fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
1215 IWL_FW_CMD_VER_UNKNOWN);
1216 struct iwl_tas_selection_data selection_data = {};
1217 struct iwl_tas_config_cmd_v2_v4 cmd_v2_v4 = {};
1218 struct iwl_tas_config_cmd cmd_v5 = {};
1219 struct iwl_tas_data data = {};
1220 void *cmd_data = &cmd_v2_v4;
1221 int cmd_size;
1222 int ret;
1223
1224 BUILD_BUG_ON(ARRAY_SIZE(data.block_list_array) !=
1225 IWL_WTAS_BLACK_LIST_MAX);
1226 BUILD_BUG_ON(ARRAY_SIZE(cmd_v2_v4.common.block_list_array) !=
1227 IWL_WTAS_BLACK_LIST_MAX);
1228 BUILD_BUG_ON(ARRAY_SIZE(cmd_v5.block_list_array) !=
1229 IWL_WTAS_BLACK_LIST_MAX);
1230
1231 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) {
1232 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n");
1233 return;
1234 }
1235
1236 ret = iwl_bios_get_tas_table(&mvm->fwrt, &data);
1237 if (ret < 0) {
1238 IWL_DEBUG_RADIO(mvm,
1239 "TAS table invalid or unavailable. (%d)\n",
1240 ret);
1241 return;
1242 }
1243
1244 if (ret == 0 && fw_ver < 5)
1245 return;
1246
1247 if (!iwl_is_tas_approved()) {
1248 IWL_DEBUG_RADIO(mvm,
1249 "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n",
1250 dmi_get_system_info(DMI_SYS_VENDOR) ?: "<unknown>");
1251 if ((!iwl_add_mcc_to_tas_block_list(data.block_list_array,
1252 &data.block_list_size,
1253 IWL_MCC_US)) ||
1254 (!iwl_add_mcc_to_tas_block_list(data.block_list_array,
1255 &data.block_list_size,
1256 IWL_MCC_CANADA))) {
1257 IWL_DEBUG_RADIO(mvm,
1258 "Unable to add US/Canada to TAS block list, disabling TAS\n");
1259 return;
1260 }
1261 } else {
1262 IWL_DEBUG_RADIO(mvm,
1263 "System vendor '%s' is in the approved list.\n",
1264 dmi_get_system_info(DMI_SYS_VENDOR) ?: "<unknown>");
1265 }
1266
1267 if (fw_ver < 5) {
1268 selection_data = iwl_parse_tas_selection(data.tas_selection,
1269 data.table_revision);
1270 cmd_v2_v4.common.block_list_size =
1271 cpu_to_le32(data.block_list_size);
1272 for (u8 i = 0; i < data.block_list_size; i++)
1273 cmd_v2_v4.common.block_list_array[i] =
1274 cpu_to_le32(data.block_list_array[i]);
1275 }
1276
1277 if (fw_ver == 5) {
1278 cmd_size = sizeof(cmd_v5);
1279 cmd_data = &cmd_v5;
1280 cmd_v5.block_list_size = cpu_to_le16(data.block_list_size);
1281 for (u16 i = 0; i < data.block_list_size; i++)
1282 cmd_v5.block_list_array[i] =
1283 cpu_to_le16(data.block_list_array[i]);
1284 cmd_v5.tas_config_info.hdr.table_source = data.table_source;
1285 cmd_v5.tas_config_info.hdr.table_revision =
1286 data.table_revision;
1287 cmd_v5.tas_config_info.value = cpu_to_le32(data.tas_selection);
1288 } else if (fw_ver == 4) {
1289 cmd_size = sizeof(cmd_v2_v4.common) + sizeof(cmd_v2_v4.v4);
1290 cmd_v2_v4.v4.override_tas_iec = selection_data.override_tas_iec;
1291 cmd_v2_v4.v4.enable_tas_iec = selection_data.enable_tas_iec;
1292 cmd_v2_v4.v4.usa_tas_uhb_allowed =
1293 selection_data.usa_tas_uhb_allowed;
1294 if (fw_has_capa(&mvm->fw->ucode_capa,
1295 IWL_UCODE_TLV_CAPA_UHB_CANADA_TAS_SUPPORT) &&
1296 selection_data.canada_tas_uhb_allowed)
1297 cmd_v2_v4.v4.uhb_allowed_flags = TAS_UHB_ALLOWED_CANADA;
1298 } else if (fw_ver == 3) {
1299 cmd_size = sizeof(cmd_v2_v4.common) + sizeof(cmd_v2_v4.v3);
1300 cmd_v2_v4.v3.override_tas_iec =
1301 cpu_to_le16(selection_data.override_tas_iec);
1302 cmd_v2_v4.v3.enable_tas_iec =
1303 cpu_to_le16(selection_data.enable_tas_iec);
1304 } else if (fw_ver == 2) {
1305 cmd_size = sizeof(cmd_v2_v4.common);
1306 } else {
1307 return;
1308 }
1309
1310 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, cmd_data);
1311 if (ret < 0)
1312 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret);
1313 }
1314
iwl_mvm_get_lari_config_bitmap(struct iwl_fw_runtime * fwrt)1315 static __le32 iwl_mvm_get_lari_config_bitmap(struct iwl_fw_runtime *fwrt)
1316 {
1317 int ret;
1318 u32 val;
1319 __le32 config_bitmap = 0;
1320
1321 switch (CSR_HW_RFID_TYPE(fwrt->trans->info.hw_rf_id)) {
1322 case IWL_CFG_RF_TYPE_HR1:
1323 case IWL_CFG_RF_TYPE_HR2:
1324 case IWL_CFG_RF_TYPE_JF1:
1325 case IWL_CFG_RF_TYPE_JF2:
1326 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_INDONESIA_5G2,
1327 &val);
1328
1329 if (!ret && val == DSM_VALUE_INDONESIA_ENABLE)
1330 config_bitmap |=
1331 cpu_to_le32(LARI_CONFIG_ENABLE_5G2_IN_INDONESIA_MSK);
1332 break;
1333 default:
1334 break;
1335 }
1336
1337 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_DISABLE_SRD, &val);
1338 if (!ret) {
1339 if (val == DSM_VALUE_SRD_PASSIVE)
1340 config_bitmap |=
1341 cpu_to_le32(LARI_CONFIG_CHANGE_ETSI_TO_PASSIVE_MSK);
1342 else if (val == DSM_VALUE_SRD_DISABLE)
1343 config_bitmap |=
1344 cpu_to_le32(LARI_CONFIG_CHANGE_ETSI_TO_DISABLED_MSK);
1345 }
1346
1347 if (fw_has_capa(&fwrt->fw->ucode_capa,
1348 IWL_UCODE_TLV_CAPA_CHINA_22_REG_SUPPORT)) {
1349 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_REGULATORY_CONFIG,
1350 &val);
1351 /*
1352 * China 2022 enable if the BIOS object does not exist or
1353 * if it is enabled in BIOS.
1354 */
1355 if (ret < 0 || val & DSM_MASK_CHINA_22_REG)
1356 config_bitmap |=
1357 cpu_to_le32(LARI_CONFIG_ENABLE_CHINA_22_REG_SUPPORT_MSK);
1358 }
1359
1360 return config_bitmap;
1361 }
1362
iwl_mvm_get_lari_config_cmd_size(u8 cmd_ver)1363 static size_t iwl_mvm_get_lari_config_cmd_size(u8 cmd_ver)
1364 {
1365 size_t cmd_size;
1366
1367 switch (cmd_ver) {
1368 case 12:
1369 cmd_size = offsetof(struct iwl_lari_config_change_cmd,
1370 oem_11bn_allow_bitmap);
1371 break;
1372 case 8:
1373 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v8);
1374 break;
1375 case 6:
1376 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v6);
1377 break;
1378 default:
1379 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1);
1380 break;
1381 }
1382 return cmd_size;
1383 }
1384
iwl_mvm_fill_lari_config(struct iwl_fw_runtime * fwrt,struct iwl_lari_config_change_cmd * cmd,size_t * cmd_size)1385 static int iwl_mvm_fill_lari_config(struct iwl_fw_runtime *fwrt,
1386 struct iwl_lari_config_change_cmd *cmd,
1387 size_t *cmd_size)
1388 {
1389 int ret;
1390 u32 value;
1391 bool has_raw_dsm_capa = fw_has_capa(&fwrt->fw->ucode_capa,
1392 IWL_UCODE_TLV_CAPA_FW_ACCEPTS_RAW_DSM_TABLE);
1393 u8 cmd_ver = iwl_fw_lookup_cmd_ver(fwrt->fw,
1394 WIDE_ID(REGULATORY_AND_NVM_GROUP,
1395 LARI_CONFIG_CHANGE), 1);
1396
1397 memset(cmd, 0, sizeof(*cmd));
1398 *cmd_size = iwl_mvm_get_lari_config_cmd_size(cmd_ver);
1399
1400 cmd->config_bitmap = iwl_mvm_get_lari_config_bitmap(fwrt);
1401
1402 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_11AX_ENABLEMENT, &value);
1403 if (!ret) {
1404 if (!has_raw_dsm_capa)
1405 value &= DSM_11AX_ALLOW_BITMAP;
1406 cmd->oem_11ax_allow_bitmap = cpu_to_le32(value);
1407 }
1408
1409 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_UNII4_CHAN, &value);
1410 if (!ret) {
1411 if (!has_raw_dsm_capa)
1412 value &= DSM_UNII4_ALLOW_BITMAP;
1413
1414 /* Since version 12, bits 4 and 5 are supported
1415 * regardless of this capability, By pass this masking
1416 * if firmware has capability of accepting raw DSM table.
1417 */
1418 if (!has_raw_dsm_capa && cmd_ver < 12 &&
1419 !fw_has_capa(&fwrt->fw->ucode_capa,
1420 IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_5G9_FOR_CA))
1421 value &= ~(DSM_VALUE_UNII4_CANADA_OVERRIDE_MSK |
1422 DSM_VALUE_UNII4_CANADA_EN_MSK);
1423
1424 cmd->oem_unii4_allow_bitmap = cpu_to_le32(value);
1425 }
1426
1427 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ACTIVATE_CHANNEL, &value);
1428 if (!ret) {
1429 if (!has_raw_dsm_capa)
1430 value &= CHAN_STATE_ACTIVE_BITMAP_CMD_V12;
1431
1432 if (!has_raw_dsm_capa && cmd_ver < 8)
1433 value &= ~ACTIVATE_5G2_IN_WW_MASK;
1434
1435 /* Since version 12, bits 5 and 6 are supported
1436 * regardless of this capability, By pass this masking
1437 * if firmware has capability of accepting raw DSM table.
1438 */
1439 if (!has_raw_dsm_capa && cmd_ver < 12 &&
1440 !fw_has_capa(&fwrt->fw->ucode_capa,
1441 IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_UNII4_US_CA))
1442 value &= CHAN_STATE_ACTIVE_BITMAP_CMD_V8;
1443
1444 cmd->chan_state_active_bitmap = cpu_to_le32(value);
1445 }
1446
1447 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_6E, &value);
1448 if (!ret)
1449 cmd->oem_uhb_allow_bitmap = cpu_to_le32(value);
1450
1451 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_FORCE_DISABLE_CHANNELS, &value);
1452 if (!ret) {
1453 if (!has_raw_dsm_capa)
1454 value &= DSM_FORCE_DISABLE_CHANNELS_ALLOWED_BITMAP;
1455 cmd->force_disable_channels_bitmap = cpu_to_le32(value);
1456 }
1457
1458 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENERGY_DETECTION_THRESHOLD,
1459 &value);
1460 if (!ret) {
1461 if (!has_raw_dsm_capa)
1462 value &= DSM_EDT_ALLOWED_BITMAP;
1463 cmd->edt_bitmap = cpu_to_le32(value);
1464 }
1465
1466 ret = iwl_bios_get_wbem(fwrt, &value);
1467 if (!ret)
1468 cmd->oem_320mhz_allow_bitmap = cpu_to_le32(value);
1469
1470 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_11BE, &value);
1471 if (!ret)
1472 cmd->oem_11be_allow_bitmap = cpu_to_le32(value);
1473
1474 if (cmd->config_bitmap ||
1475 cmd->oem_uhb_allow_bitmap ||
1476 cmd->oem_11ax_allow_bitmap ||
1477 cmd->oem_unii4_allow_bitmap ||
1478 cmd->chan_state_active_bitmap ||
1479 cmd->force_disable_channels_bitmap ||
1480 cmd->edt_bitmap ||
1481 cmd->oem_320mhz_allow_bitmap ||
1482 cmd->oem_11be_allow_bitmap) {
1483 IWL_DEBUG_RADIO(fwrt,
1484 "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n",
1485 le32_to_cpu(cmd->config_bitmap),
1486 le32_to_cpu(cmd->oem_11ax_allow_bitmap));
1487 IWL_DEBUG_RADIO(fwrt,
1488 "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n",
1489 le32_to_cpu(cmd->oem_unii4_allow_bitmap),
1490 le32_to_cpu(cmd->chan_state_active_bitmap),
1491 cmd_ver);
1492 IWL_DEBUG_RADIO(fwrt,
1493 "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n",
1494 le32_to_cpu(cmd->oem_uhb_allow_bitmap),
1495 le32_to_cpu(cmd->force_disable_channels_bitmap));
1496 IWL_DEBUG_RADIO(fwrt,
1497 "sending LARI_CONFIG_CHANGE, edt_bitmap=0x%x, oem_320mhz_allow_bitmap=0x%x\n",
1498 le32_to_cpu(cmd->edt_bitmap),
1499 le32_to_cpu(cmd->oem_320mhz_allow_bitmap));
1500 IWL_DEBUG_RADIO(fwrt,
1501 "sending LARI_CONFIG_CHANGE, oem_11be_allow_bitmap=0x%x\n",
1502 le32_to_cpu(cmd->oem_11be_allow_bitmap));
1503 } else {
1504 return 1;
1505 }
1506
1507 return 0;
1508 }
1509
iwl_mvm_lari_cfg(struct iwl_mvm * mvm)1510 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1511 {
1512 struct iwl_lari_config_change_cmd cmd;
1513 size_t cmd_size;
1514 int ret;
1515
1516 ret = iwl_mvm_fill_lari_config(&mvm->fwrt, &cmd, &cmd_size);
1517 if (!ret) {
1518 ret = iwl_mvm_send_cmd_pdu(mvm,
1519 WIDE_ID(REGULATORY_AND_NVM_GROUP,
1520 LARI_CONFIG_CHANGE),
1521 0, cmd_size, &cmd);
1522 if (ret < 0)
1523 IWL_DEBUG_RADIO(mvm,
1524 "Failed to send LARI_CONFIG_CHANGE (%d)\n",
1525 ret);
1526 }
1527 }
1528
iwl_mvm_get_bios_tables(struct iwl_mvm * mvm)1529 void iwl_mvm_get_bios_tables(struct iwl_mvm *mvm)
1530 {
1531 int ret;
1532
1533 iwl_acpi_get_guid_lock_status(&mvm->fwrt);
1534
1535 /* read PPAG table */
1536 ret = iwl_bios_get_ppag_table(&mvm->fwrt);
1537 if (ret < 0) {
1538 IWL_DEBUG_RADIO(mvm,
1539 "PPAG BIOS table invalid or unavailable. (%d)\n",
1540 ret);
1541 }
1542
1543 /* read SAR tables */
1544 ret = iwl_bios_get_wrds_table(&mvm->fwrt);
1545 if (ret < 0) {
1546 IWL_DEBUG_RADIO(mvm,
1547 "WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1548 ret);
1549 /*
1550 * If not available, don't fail and don't bother with EWRD and
1551 * WGDS */
1552
1553 if (!iwl_bios_get_wgds_table(&mvm->fwrt)) {
1554 /*
1555 * If basic SAR is not available, we check for WGDS,
1556 * which should *not* be available either. If it is
1557 * available, issue an error, because we can't use SAR
1558 * Geo without basic SAR.
1559 */
1560 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
1561 }
1562
1563 } else {
1564 ret = iwl_bios_get_ewrd_table(&mvm->fwrt);
1565 /* if EWRD is not available, we can still use
1566 * WRDS, so don't fail */
1567 if (ret < 0)
1568 IWL_DEBUG_RADIO(mvm,
1569 "EWRD SAR BIOS table invalid or unavailable. (%d)\n",
1570 ret);
1571
1572 /* read geo SAR table */
1573 if (iwl_sar_geo_support(&mvm->fwrt)) {
1574 ret = iwl_bios_get_wgds_table(&mvm->fwrt);
1575 if (ret < 0)
1576 IWL_DEBUG_RADIO(mvm,
1577 "Geo SAR BIOS table invalid or unavailable. (%d)\n",
1578 ret);
1579 /* we don't fail if the table is not available */
1580 }
1581 }
1582
1583 iwl_acpi_get_phy_filters(&mvm->fwrt);
1584
1585 if (iwl_bios_get_eckv(&mvm->fwrt, &mvm->ext_clock_valid))
1586 IWL_DEBUG_RADIO(mvm, "ECKV table doesn't exist in BIOS\n");
1587 }
1588
iwl_mvm_disconnect_iterator(void * data,u8 * mac,struct ieee80211_vif * vif)1589 static void iwl_mvm_disconnect_iterator(void *data, u8 *mac,
1590 struct ieee80211_vif *vif)
1591 {
1592 if (vif->type == NL80211_IFTYPE_STATION)
1593 ieee80211_hw_restart_disconnect(vif);
1594 }
1595
iwl_mvm_send_recovery_cmd(struct iwl_mvm * mvm,u32 flags)1596 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1597 {
1598 u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1599 u32 status = 0;
1600 int ret;
1601
1602 struct iwl_fw_error_recovery_cmd recovery_cmd = {
1603 .flags = cpu_to_le32(flags),
1604 .buf_size = 0,
1605 };
1606 struct iwl_host_cmd host_cmd = {
1607 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1608 .data = {&recovery_cmd, },
1609 .len = {sizeof(recovery_cmd), },
1610 };
1611
1612 /* no error log was defined in TLV */
1613 if (!error_log_size)
1614 return;
1615
1616 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1617 /* no buf was allocated while HW reset */
1618 if (!mvm->error_recovery_buf)
1619 return;
1620
1621 host_cmd.data[1] = mvm->error_recovery_buf;
1622 host_cmd.len[1] = error_log_size;
1623 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1624 recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1625 }
1626
1627 ret = iwl_mvm_send_cmd_status(mvm, &host_cmd, &status);
1628 kfree(mvm->error_recovery_buf);
1629 mvm->error_recovery_buf = NULL;
1630
1631 if (ret) {
1632 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1633 return;
1634 }
1635
1636 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1637 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1638 if (status) {
1639 IWL_ERR(mvm,
1640 "Failed to send recovery cmd blob was invalid %d\n",
1641 status);
1642
1643 ieee80211_iterate_interfaces(mvm->hw, 0,
1644 iwl_mvm_disconnect_iterator,
1645 mvm);
1646 }
1647 }
1648 }
1649
iwl_mvm_sar_init(struct iwl_mvm * mvm)1650 static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1651 {
1652 return iwl_mvm_sar_select_profile(mvm, 1, 1);
1653 }
1654
iwl_mvm_load_rt_fw(struct iwl_mvm * mvm)1655 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
1656 {
1657 int ret;
1658
1659 if (iwl_mvm_has_unified_ucode(mvm))
1660 return iwl_run_unified_mvm_ucode(mvm);
1661
1662 ret = iwl_run_init_mvm_ucode(mvm);
1663
1664 if (ret) {
1665 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1666 return ret;
1667 }
1668
1669 iwl_fw_dbg_stop_sync(&mvm->fwrt);
1670 iwl_trans_stop_device(mvm->trans);
1671 ret = iwl_trans_start_hw(mvm->trans);
1672 if (ret)
1673 return ret;
1674
1675 mvm->rfkill_safe_init_done = false;
1676 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1677 if (ret)
1678 return ret;
1679
1680 mvm->rfkill_safe_init_done = true;
1681
1682 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1683 NULL);
1684
1685 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
1686 }
1687
iwl_mvm_up(struct iwl_mvm * mvm)1688 int iwl_mvm_up(struct iwl_mvm *mvm)
1689 {
1690 int ret, i;
1691 struct ieee80211_supported_band *sband = NULL;
1692
1693 lockdep_assert_wiphy(mvm->hw->wiphy);
1694 lockdep_assert_held(&mvm->mutex);
1695
1696 ret = iwl_trans_start_hw(mvm->trans);
1697 if (ret)
1698 return ret;
1699
1700 ret = iwl_mvm_load_rt_fw(mvm);
1701 if (ret) {
1702 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
1703 if (ret != -ERFKILL && !mvm->fw_product_reset)
1704 iwl_fw_dbg_error_collect(&mvm->fwrt,
1705 FW_DBG_TRIGGER_DRIVER);
1706 goto error;
1707 }
1708
1709 /* FW loaded successfully */
1710 mvm->fw_product_reset = false;
1711
1712 iwl_fw_disable_dbg_asserts(&mvm->fwrt);
1713 iwl_get_shared_mem_conf(&mvm->fwrt);
1714
1715 ret = iwl_mvm_sf_update(mvm, NULL, false);
1716 if (ret)
1717 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1718
1719 if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
1720 mvm->fwrt.dump.conf = FW_DBG_INVALID;
1721 /* if we have a destination, assume EARLY START */
1722 if (mvm->fw->dbg.dest_tlv)
1723 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
1724 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
1725 }
1726
1727 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1728 if (ret)
1729 goto error;
1730
1731 if (!iwl_mvm_has_unified_ucode(mvm)) {
1732 /* Send phy db control command and then phy db calibration */
1733 ret = iwl_send_phy_db_data(mvm->phy_db);
1734 if (ret)
1735 goto error;
1736 ret = iwl_send_phy_cfg_cmd(mvm);
1737 if (ret)
1738 goto error;
1739 }
1740
1741 ret = iwl_mvm_send_bt_init_conf(mvm);
1742 if (ret)
1743 goto error;
1744
1745 if (fw_has_capa(&mvm->fw->ucode_capa,
1746 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) {
1747 ret = iwl_set_soc_latency(&mvm->fwrt);
1748 if (ret)
1749 goto error;
1750 }
1751
1752 iwl_mvm_lari_cfg(mvm);
1753
1754 /* Init RSS configuration */
1755 ret = iwl_configure_rxq(&mvm->fwrt);
1756 if (ret)
1757 goto error;
1758
1759 if (iwl_mvm_has_new_rx_api(mvm)) {
1760 ret = iwl_send_rss_cfg_cmd(mvm);
1761 if (ret) {
1762 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1763 ret);
1764 goto error;
1765 }
1766 }
1767
1768 /* init the fw <-> mac80211 STA mapping */
1769 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
1770 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1771 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL);
1772 }
1773
1774 mvm->tdls_cs.peer.sta_id = IWL_INVALID_STA;
1775
1776 /* reset quota debouncing buffer - 0xff will yield invalid data */
1777 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1778
1779 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
1780 ret = iwl_mvm_send_dqa_cmd(mvm);
1781 if (ret)
1782 goto error;
1783 }
1784
1785 /*
1786 * Add auxiliary station for scanning.
1787 * Newer versions of this command implies that the fw uses
1788 * internal aux station for all aux activities that don't
1789 * requires a dedicated data queue.
1790 */
1791 if (!iwl_mvm_has_new_station_api(mvm->fw)) {
1792 /*
1793 * In old version the aux station uses mac id like other
1794 * station and not lmac id
1795 */
1796 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1797 if (ret)
1798 goto error;
1799 }
1800
1801 /* Add all the PHY contexts */
1802 i = 0;
1803 while (!sband && i < NUM_NL80211_BANDS)
1804 sband = mvm->hw->wiphy->bands[i++];
1805
1806 if (WARN_ON_ONCE(!sband)) {
1807 ret = -ENODEV;
1808 goto error;
1809 }
1810
1811 if (iwl_mvm_is_tt_in_fw(mvm)) {
1812 /* in order to give the responsibility of ct-kill and
1813 * TX backoff to FW we need to send empty temperature reporting
1814 * cmd during init time
1815 */
1816 iwl_mvm_send_temp_report_ths_cmd(mvm);
1817 } else {
1818 /* Initialize tx backoffs to the minimal possible */
1819 iwl_mvm_tt_tx_backoff(mvm, 0);
1820 }
1821
1822 #ifdef CONFIG_THERMAL
1823 /* TODO: read the budget from BIOS / Platform NVM */
1824
1825 /*
1826 * In case there is no budget from BIOS / Platform NVM the default
1827 * budget should be 2000mW (cooling state 0).
1828 */
1829 if (iwl_mvm_is_ctdp_supported(mvm)) {
1830 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1831 mvm->cooling_dev.cur_state);
1832 if (ret)
1833 goto error;
1834 }
1835 #endif
1836
1837 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1838 WARN_ON(iwl_mvm_config_ltr(mvm));
1839
1840 ret = iwl_mvm_power_update_device(mvm);
1841 if (ret)
1842 goto error;
1843
1844 /*
1845 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1846 * anyway, so don't init MCC.
1847 */
1848 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1849 ret = iwl_mvm_init_mcc(mvm);
1850 if (ret)
1851 goto error;
1852 }
1853
1854 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
1855 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1856 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1857 ret = iwl_mvm_config_scan(mvm);
1858 if (ret)
1859 goto error;
1860 }
1861
1862 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) {
1863 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1864
1865 if (mvm->time_sync.active)
1866 iwl_mvm_time_sync_config(mvm, mvm->time_sync.peer_addr,
1867 IWL_TIME_SYNC_PROTOCOL_TM |
1868 IWL_TIME_SYNC_PROTOCOL_FTM);
1869 }
1870
1871 if (!mvm->ptp_data.ptp_clock)
1872 iwl_mvm_ptp_init(mvm);
1873
1874 ret = iwl_mvm_ppag_init(mvm);
1875 if (ret)
1876 goto error;
1877
1878 ret = iwl_mvm_sar_init(mvm);
1879 if (ret == 0)
1880 ret = iwl_mvm_sar_geo_init(mvm);
1881 if (ret < 0)
1882 goto error;
1883
1884 ret = iwl_mvm_sgom_init(mvm);
1885 if (ret)
1886 goto error;
1887
1888 iwl_mvm_tas_init(mvm);
1889 iwl_mvm_leds_sync(mvm);
1890 iwl_mvm_uats_init(mvm);
1891
1892 if (iwl_rfi_supported(mvm)) {
1893 if (iwl_rfi_is_enabled_in_bios(&mvm->fwrt))
1894 iwl_rfi_send_config_cmd(mvm, NULL);
1895 }
1896
1897 iwl_mvm_mei_device_state(mvm, true);
1898
1899 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1900 return 0;
1901 error:
1902 iwl_mvm_stop_device(mvm);
1903 return ret;
1904 }
1905
iwl_mvm_load_d3_fw(struct iwl_mvm * mvm)1906 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1907 {
1908 int ret, i;
1909
1910 lockdep_assert_wiphy(mvm->hw->wiphy);
1911 lockdep_assert_held(&mvm->mutex);
1912
1913 ret = iwl_trans_start_hw(mvm->trans);
1914 if (ret)
1915 return ret;
1916
1917 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1918 if (ret) {
1919 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1920 goto error;
1921 }
1922
1923 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1924 if (ret)
1925 goto error;
1926
1927 /* Send phy db control command and then phy db calibration*/
1928 ret = iwl_send_phy_db_data(mvm->phy_db);
1929 if (ret)
1930 goto error;
1931
1932 ret = iwl_send_phy_cfg_cmd(mvm);
1933 if (ret)
1934 goto error;
1935
1936 /* init the fw <-> mac80211 STA mapping */
1937 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
1938 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1939 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL);
1940 }
1941
1942 if (!iwl_mvm_has_new_station_api(mvm->fw)) {
1943 /*
1944 * Add auxiliary station for scanning.
1945 * Newer versions of this command implies that the fw uses
1946 * internal aux station for all aux activities that don't
1947 * requires a dedicated data queue.
1948 * In old version the aux station uses mac id like other
1949 * station and not lmac id
1950 */
1951 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1952 if (ret)
1953 goto error;
1954 }
1955
1956 return 0;
1957 error:
1958 iwl_mvm_stop_device(mvm);
1959 return ret;
1960 }
1961
iwl_mvm_rx_mfuart_notif(struct iwl_mvm * mvm,struct iwl_rx_cmd_buffer * rxb)1962 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1963 struct iwl_rx_cmd_buffer *rxb)
1964 {
1965 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1966 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1967
1968 IWL_DEBUG_INFO(mvm,
1969 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1970 le32_to_cpu(mfuart_notif->installed_ver),
1971 le32_to_cpu(mfuart_notif->external_ver),
1972 le32_to_cpu(mfuart_notif->status),
1973 le32_to_cpu(mfuart_notif->duration));
1974
1975 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
1976 IWL_DEBUG_INFO(mvm,
1977 "MFUART: image size: 0x%08x\n",
1978 le32_to_cpu(mfuart_notif->image_size));
1979 }
1980