1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs
4 *
5 * Copyright (C) 2015 Intel Corporation
6 * Author: Heikki Krogerus <heikki.krogerus@linux.intel.com>
7 */
8
9 #include <linux/bitops.h>
10 #include <linux/module.h>
11 #include <linux/pci.h>
12 #include <linux/rational.h>
13 #include <linux/util_macros.h>
14
15 #include <linux/dma/hsu.h>
16
17 #include "8250.h"
18
19 #define PCI_DEVICE_ID_INTEL_PNW_UART1 0x081b
20 #define PCI_DEVICE_ID_INTEL_PNW_UART2 0x081c
21 #define PCI_DEVICE_ID_INTEL_PNW_UART3 0x081d
22 #define PCI_DEVICE_ID_INTEL_TNG_UART 0x1191
23 #define PCI_DEVICE_ID_INTEL_CDF_UART 0x18d8
24 #define PCI_DEVICE_ID_INTEL_DNV_UART 0x19d8
25
26 /* Intel MID Specific registers */
27 #define INTEL_MID_UART_FISR 0x08
28 #define INTEL_MID_UART_PS 0x30
29 #define INTEL_MID_UART_MUL 0x34
30 #define INTEL_MID_UART_DIV 0x38
31
32 struct mid8250;
33
34 struct mid8250_board {
35 unsigned long freq;
36 unsigned int base_baud;
37 unsigned int bar;
38 int (*setup)(struct mid8250 *, struct uart_port *p);
39 void (*exit)(struct mid8250 *);
40 };
41
42 struct mid8250 {
43 int line;
44 int dma_index;
45 struct pci_dev *dma_dev;
46 struct uart_8250_dma dma;
47 struct mid8250_board *board;
48 struct hsu_dma_chip dma_chip;
49 };
50
51 /*****************************************************************************/
52
pnw_setup(struct mid8250 * mid,struct uart_port * p)53 static int pnw_setup(struct mid8250 *mid, struct uart_port *p)
54 {
55 struct pci_dev *pdev = to_pci_dev(p->dev);
56
57 switch (pdev->device) {
58 case PCI_DEVICE_ID_INTEL_PNW_UART1:
59 mid->dma_index = 0;
60 break;
61 case PCI_DEVICE_ID_INTEL_PNW_UART2:
62 mid->dma_index = 1;
63 break;
64 case PCI_DEVICE_ID_INTEL_PNW_UART3:
65 mid->dma_index = 2;
66 break;
67 default:
68 return -EINVAL;
69 }
70
71 mid->dma_dev = pci_get_slot(pdev->bus,
72 PCI_DEVFN(PCI_SLOT(pdev->devfn), 3));
73 return 0;
74 }
75
pnw_exit(struct mid8250 * mid)76 static void pnw_exit(struct mid8250 *mid)
77 {
78 pci_dev_put(mid->dma_dev);
79 }
80
tng_handle_irq(struct uart_port * p)81 static int tng_handle_irq(struct uart_port *p)
82 {
83 struct mid8250 *mid = p->private_data;
84 struct uart_8250_port *up = up_to_u8250p(p);
85 struct hsu_dma_chip *chip;
86 u32 status;
87 int ret = 0;
88 int err;
89
90 chip = pci_get_drvdata(mid->dma_dev);
91
92 /* Rx DMA */
93 err = hsu_dma_get_status(chip, mid->dma_index * 2 + 1, &status);
94 if (err > 0) {
95 serial8250_rx_dma_flush(up);
96 ret |= 1;
97 } else if (err == 0)
98 ret |= hsu_dma_do_irq(chip, mid->dma_index * 2 + 1, status);
99
100 /* Tx DMA */
101 err = hsu_dma_get_status(chip, mid->dma_index * 2, &status);
102 if (err > 0)
103 ret |= 1;
104 else if (err == 0)
105 ret |= hsu_dma_do_irq(chip, mid->dma_index * 2, status);
106
107 /* UART */
108 ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
109 return IRQ_RETVAL(ret);
110 }
111
tng_setup(struct mid8250 * mid,struct uart_port * p)112 static int tng_setup(struct mid8250 *mid, struct uart_port *p)
113 {
114 struct pci_dev *pdev = to_pci_dev(p->dev);
115 int index = PCI_FUNC(pdev->devfn);
116
117 /*
118 * Device 0000:00:04.0 is not a real HSU port. It provides a global
119 * register set for all HSU ports, although it has the same PCI ID.
120 * Skip it here.
121 */
122 if (index-- == 0)
123 return -ENODEV;
124
125 mid->dma_index = index;
126 mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0));
127
128 p->handle_irq = tng_handle_irq;
129 return 0;
130 }
131
tng_exit(struct mid8250 * mid)132 static void tng_exit(struct mid8250 *mid)
133 {
134 pci_dev_put(mid->dma_dev);
135 }
136
dnv_handle_irq(struct uart_port * p)137 static int dnv_handle_irq(struct uart_port *p)
138 {
139 struct mid8250 *mid = p->private_data;
140 struct uart_8250_port *up = up_to_u8250p(p);
141 unsigned int fisr = serial_port_in(p, INTEL_MID_UART_FISR);
142 u32 status;
143 int ret = 0;
144 int err;
145
146 if (fisr & BIT(2)) {
147 err = hsu_dma_get_status(&mid->dma_chip, 1, &status);
148 if (err > 0) {
149 serial8250_rx_dma_flush(up);
150 ret |= 1;
151 } else if (err == 0)
152 ret |= hsu_dma_do_irq(&mid->dma_chip, 1, status);
153 }
154 if (fisr & BIT(1)) {
155 err = hsu_dma_get_status(&mid->dma_chip, 0, &status);
156 if (err > 0)
157 ret |= 1;
158 else if (err == 0)
159 ret |= hsu_dma_do_irq(&mid->dma_chip, 0, status);
160 }
161 if (fisr & BIT(0))
162 ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
163 return IRQ_RETVAL(ret);
164 }
165
166 #define DNV_DMA_CHAN_OFFSET 0x80
167
dnv_setup(struct mid8250 * mid,struct uart_port * p)168 static int dnv_setup(struct mid8250 *mid, struct uart_port *p)
169 {
170 struct hsu_dma_chip *chip = &mid->dma_chip;
171 struct pci_dev *pdev = to_pci_dev(p->dev);
172 int ret;
173
174 pci_set_master(pdev);
175
176 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
177 if (ret < 0)
178 return ret;
179
180 p->irq = pci_irq_vector(pdev, 0);
181
182 chip->dev = &pdev->dev;
183 chip->irq = pci_irq_vector(pdev, 0);
184 chip->regs = p->membase;
185 chip->length = pci_resource_len(pdev, mid->board->bar);
186 chip->offset = DNV_DMA_CHAN_OFFSET;
187
188 /* Falling back to PIO mode if DMA probing fails */
189 ret = hsu_dma_probe(chip);
190 if (ret)
191 return 0;
192
193 mid->dma_dev = pdev;
194
195 p->handle_irq = dnv_handle_irq;
196 return 0;
197 }
198
dnv_exit(struct mid8250 * mid)199 static void dnv_exit(struct mid8250 *mid)
200 {
201 if (!mid->dma_dev)
202 return;
203 hsu_dma_remove(&mid->dma_chip);
204 }
205
206 /*****************************************************************************/
207
mid8250_set_termios(struct uart_port * p,struct ktermios * termios,const struct ktermios * old)208 static void mid8250_set_termios(struct uart_port *p, struct ktermios *termios,
209 const struct ktermios *old)
210 {
211 unsigned int baud = tty_termios_baud_rate(termios);
212 struct mid8250 *mid = p->private_data;
213 unsigned short ps = 16;
214 unsigned long fuart = baud * ps;
215 unsigned long w = BIT(24) - 1;
216 unsigned long mul, div;
217
218 /* Gracefully handle the B0 case: fall back to B9600 */
219 fuart = fuart ? fuart : 9600 * 16;
220
221 if (mid->board->freq < fuart) {
222 /* Find prescaler value that satisfies Fuart < Fref */
223 if (mid->board->freq > baud)
224 ps = mid->board->freq / baud; /* baud rate too high */
225 else
226 ps = 1; /* PLL case */
227 fuart = baud * ps;
228 } else {
229 /* Get Fuart closer to Fref */
230 fuart *= rounddown_pow_of_two(mid->board->freq / fuart);
231 }
232
233 rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div);
234 p->uartclk = fuart * 16 / ps; /* core uses ps = 16 always */
235
236 writel(ps, p->membase + INTEL_MID_UART_PS); /* set PS */
237 writel(mul, p->membase + INTEL_MID_UART_MUL); /* set MUL */
238 writel(div, p->membase + INTEL_MID_UART_DIV);
239
240 serial8250_do_set_termios(p, termios, old);
241 }
242
mid8250_dma_filter(struct dma_chan * chan,void * param)243 static bool mid8250_dma_filter(struct dma_chan *chan, void *param)
244 {
245 struct hsu_dma_slave *s = param;
246
247 if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id)
248 return false;
249
250 chan->private = s;
251 return true;
252 }
253
mid8250_dma_setup(struct mid8250 * mid,struct uart_8250_port * port)254 static int mid8250_dma_setup(struct mid8250 *mid, struct uart_8250_port *port)
255 {
256 struct uart_8250_dma *dma = &mid->dma;
257 struct device *dev = port->port.dev;
258 struct hsu_dma_slave *rx_param;
259 struct hsu_dma_slave *tx_param;
260
261 if (!mid->dma_dev)
262 return 0;
263
264 rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
265 if (!rx_param)
266 return -ENOMEM;
267
268 tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
269 if (!tx_param)
270 return -ENOMEM;
271
272 rx_param->chan_id = mid->dma_index * 2 + 1;
273 tx_param->chan_id = mid->dma_index * 2;
274
275 dma->rxconf.src_maxburst = 64;
276 dma->txconf.dst_maxburst = 64;
277
278 rx_param->dma_dev = &mid->dma_dev->dev;
279 tx_param->dma_dev = &mid->dma_dev->dev;
280
281 dma->fn = mid8250_dma_filter;
282 dma->rx_param = rx_param;
283 dma->tx_param = tx_param;
284
285 port->dma = dma;
286 return 0;
287 }
288
mid8250_probe(struct pci_dev * pdev,const struct pci_device_id * id)289 static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
290 {
291 struct uart_8250_port uart;
292 struct mid8250 *mid;
293 int ret;
294
295 ret = pcim_enable_device(pdev);
296 if (ret)
297 return ret;
298
299 mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL);
300 if (!mid)
301 return -ENOMEM;
302
303 mid->board = (struct mid8250_board *)id->driver_data;
304
305 memset(&uart, 0, sizeof(struct uart_8250_port));
306
307 uart.port.dev = &pdev->dev;
308 uart.port.irq = pdev->irq;
309 uart.port.private_data = mid;
310 uart.port.type = PORT_16750;
311 uart.port.iotype = UPIO_MEM;
312 uart.port.uartclk = mid->board->base_baud * 16;
313 uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
314 uart.port.set_termios = mid8250_set_termios;
315
316 uart.port.mapbase = pci_resource_start(pdev, mid->board->bar);
317 uart.port.membase = pcim_iomap(pdev, mid->board->bar, 0);
318 if (!uart.port.membase)
319 return -ENOMEM;
320
321 if (mid->board->setup) {
322 ret = mid->board->setup(mid, &uart.port);
323 if (ret)
324 return ret;
325 }
326
327 ret = mid8250_dma_setup(mid, &uart);
328 if (ret)
329 goto err;
330
331 ret = serial8250_register_8250_port(&uart);
332 if (ret < 0)
333 goto err;
334
335 mid->line = ret;
336
337 pci_set_drvdata(pdev, mid);
338 return 0;
339
340 err:
341 if (mid->board->exit)
342 mid->board->exit(mid);
343 return ret;
344 }
345
mid8250_remove(struct pci_dev * pdev)346 static void mid8250_remove(struct pci_dev *pdev)
347 {
348 struct mid8250 *mid = pci_get_drvdata(pdev);
349
350 serial8250_unregister_port(mid->line);
351
352 if (mid->board->exit)
353 mid->board->exit(mid);
354 }
355
356 static const struct mid8250_board pnw_board = {
357 .freq = 50000000,
358 .base_baud = 115200,
359 .bar = 0,
360 .setup = pnw_setup,
361 .exit = pnw_exit,
362 };
363
364 static const struct mid8250_board tng_board = {
365 .freq = 38400000,
366 .base_baud = 1843200,
367 .bar = 0,
368 .setup = tng_setup,
369 .exit = tng_exit,
370 };
371
372 static const struct mid8250_board dnv_board = {
373 .freq = 133333333,
374 .base_baud = 115200,
375 .bar = 1,
376 /*
377 * Errata:
378 * HSUART May Stop Functioning when DMA is Active.
379 *
380 * - Denverton document #572409, rev 3.4, DNV60
381 * - Ice Lake Xeon D document #714070, ICXD65
382 * - Snowridge document #731931, SNR44
383 */
384 .setup = PTR_IF(false, dnv_setup),
385 .exit = PTR_IF(false, dnv_exit),
386 };
387
388 static const struct pci_device_id pci_ids[] = {
389 { PCI_DEVICE_DATA(INTEL, PNW_UART1, &pnw_board) },
390 { PCI_DEVICE_DATA(INTEL, PNW_UART2, &pnw_board) },
391 { PCI_DEVICE_DATA(INTEL, PNW_UART3, &pnw_board) },
392 { PCI_DEVICE_DATA(INTEL, TNG_UART, &tng_board) },
393 { PCI_DEVICE_DATA(INTEL, CDF_UART, &dnv_board) },
394 { PCI_DEVICE_DATA(INTEL, DNV_UART, &dnv_board) },
395 { }
396 };
397 MODULE_DEVICE_TABLE(pci, pci_ids);
398
399 static struct pci_driver mid8250_pci_driver = {
400 .name = "8250_mid",
401 .id_table = pci_ids,
402 .probe = mid8250_probe,
403 .remove = mid8250_remove,
404 };
405
406 module_pci_driver(mid8250_pci_driver);
407
408 MODULE_AUTHOR("Intel Corporation");
409 MODULE_LICENSE("GPL v2");
410 MODULE_DESCRIPTION("Intel MID UART driver");
411