1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
3
4 #ifndef __SOUNDWIRE_H
5 #define __SOUNDWIRE_H
6
7 #include <linux/bitfield.h>
8 #include <linux/bug.h>
9 #include <linux/completion.h>
10 #include <linux/device.h>
11 #include <linux/idr.h>
12 #include <linux/irq.h>
13 #include <linux/irqdomain.h>
14 #include <linux/jiffies.h>
15 #include <linux/lockdep_types.h>
16 #include <linux/device-id/sdw.h>
17 #include <linux/mutex.h>
18 #include <linux/types.h>
19 #include <sound/sdca.h>
20
21 struct dentry;
22 struct fwnode_handle;
23 struct device_node;
24
25 struct sdw_bus;
26 struct sdw_slave;
27
28 /* SDW spec defines and enums, as defined by MIPI 1.1. Spec */
29
30 /* SDW Broadcast Device Number */
31 #define SDW_BROADCAST_DEV_NUM 15
32
33 /* SDW Enumeration Device Number */
34 #define SDW_ENUM_DEV_NUM 0
35
36 /* SDW Group Device Numbers */
37 #define SDW_GROUP12_DEV_NUM 12
38 #define SDW_GROUP13_DEV_NUM 13
39
40 /* SDW Master Device Number, not supported yet */
41 #define SDW_MASTER_DEV_NUM 14
42
43 #define SDW_NUM_DEV_ID_REGISTERS 6
44 /* frame shape defines */
45
46 /*
47 * Note: The maximum row define in SoundWire spec 1.1 is 23. In order to
48 * fill hole with 0, one more dummy entry is added
49 */
50 #define SDW_FRAME_ROWS 24
51 #define SDW_FRAME_COLS 8
52 #define SDW_FRAME_ROW_COLS (SDW_FRAME_ROWS * SDW_FRAME_COLS)
53
54 #define SDW_FRAME_CTRL_BITS 48
55 #define SDW_MAX_DEVICES 11
56 #define SDW_FW_MAX_DEVICES 16
57
58 #define SDW_MAX_PORTS 15
59 #define SDW_VALID_PORT_RANGE(n) ((n) < SDW_MAX_PORTS && (n) >= 1)
60
61 #define SDW_MAX_LANES 8
62
63 enum {
64 SDW_PORT_DIRN_SINK = 0,
65 SDW_PORT_DIRN_SOURCE,
66 SDW_PORT_DIRN_MAX,
67 };
68
69 /*
70 * constants for flow control, ports and transport
71 *
72 * these are bit masks as devices can have multiple capabilities
73 */
74
75 /*
76 * flow modes for SDW port. These can be isochronous, tx controlled,
77 * rx controlled or async
78 */
79 #define SDW_PORT_FLOW_MODE_ISOCH 0
80 #define SDW_PORT_FLOW_MODE_TX_CNTRL BIT(0)
81 #define SDW_PORT_FLOW_MODE_RX_CNTRL BIT(1)
82 #define SDW_PORT_FLOW_MODE_ASYNC GENMASK(1, 0)
83
84 /* sample packaging for block. It can be per port or per channel */
85 #define SDW_BLOCK_PACKG_PER_PORT BIT(0)
86 #define SDW_BLOCK_PACKG_PER_CH BIT(1)
87
88 /**
89 * enum sdw_slave_status - Slave status
90 * @SDW_SLAVE_UNATTACHED: Slave is not attached with the bus.
91 * @SDW_SLAVE_ATTACHED: Slave is attached with bus.
92 * @SDW_SLAVE_ALERT: Some alert condition on the Slave
93 * @SDW_SLAVE_RESERVED: Reserved for future use
94 */
95 enum sdw_slave_status {
96 SDW_SLAVE_UNATTACHED = 0,
97 SDW_SLAVE_ATTACHED = 1,
98 SDW_SLAVE_ALERT = 2,
99 SDW_SLAVE_RESERVED = 3,
100 };
101
102 /**
103 * enum sdw_clk_stop_type: clock stop operations
104 *
105 * @SDW_CLK_PRE_PREPARE: pre clock stop prepare
106 * @SDW_CLK_POST_PREPARE: post clock stop prepare
107 * @SDW_CLK_PRE_DEPREPARE: pre clock stop de-prepare
108 * @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
109 */
110 enum sdw_clk_stop_type {
111 SDW_CLK_PRE_PREPARE = 0,
112 SDW_CLK_POST_PREPARE,
113 SDW_CLK_PRE_DEPREPARE,
114 SDW_CLK_POST_DEPREPARE,
115 };
116
117 /**
118 * enum sdw_command_response - Command response as defined by SDW spec
119 * @SDW_CMD_OK: cmd was successful
120 * @SDW_CMD_IGNORED: cmd was ignored
121 * @SDW_CMD_FAIL: cmd was NACKed
122 * @SDW_CMD_TIMEOUT: cmd timedout
123 * @SDW_CMD_FAIL_OTHER: cmd failed due to other reason than above
124 *
125 * NOTE: The enum is different than actual Spec as response in the Spec is
126 * combination of ACK/NAK bits
127 *
128 * SDW_CMD_TIMEOUT/FAIL_OTHER is defined for SW use, not in spec
129 */
130 enum sdw_command_response {
131 SDW_CMD_OK = 0,
132 SDW_CMD_IGNORED = 1,
133 SDW_CMD_FAIL = 2,
134 SDW_CMD_TIMEOUT = 3,
135 SDW_CMD_FAIL_OTHER = 4,
136 };
137
138 /* block group count enum */
139 enum sdw_dpn_grouping {
140 SDW_BLK_GRP_CNT_1 = 0,
141 SDW_BLK_GRP_CNT_2 = 1,
142 SDW_BLK_GRP_CNT_3 = 2,
143 SDW_BLK_GRP_CNT_4 = 3,
144 };
145
146 /* block packing mode enum */
147 enum sdw_dpn_pkg_mode {
148 SDW_BLK_PKG_PER_PORT = 0,
149 SDW_BLK_PKG_PER_CHANNEL = 1
150 };
151
152 /**
153 * enum sdw_stream_type: data stream type
154 *
155 * @SDW_STREAM_PCM: PCM data stream
156 * @SDW_STREAM_PDM: PDM data stream
157 * @SDW_STREAM_BPT: BPT data stream
158 *
159 * spec doesn't define this, but is used in implementation
160 */
161 enum sdw_stream_type {
162 SDW_STREAM_PCM = 0,
163 SDW_STREAM_PDM = 1,
164 SDW_STREAM_BPT = 2,
165 };
166
167 /**
168 * enum sdw_data_direction: Data direction
169 *
170 * @SDW_DATA_DIR_RX: Data into Port
171 * @SDW_DATA_DIR_TX: Data out of Port
172 */
173 enum sdw_data_direction {
174 SDW_DATA_DIR_RX = 0,
175 SDW_DATA_DIR_TX = 1,
176 };
177
178 /**
179 * enum sdw_port_data_mode: Data Port mode
180 *
181 * @SDW_PORT_DATA_MODE_NORMAL: Normal data mode where audio data is received
182 * and transmitted.
183 * @SDW_PORT_DATA_MODE_PRBS: Test mode which uses a PRBS generator to produce
184 * a pseudo random data pattern that is transferred
185 * @SDW_PORT_DATA_MODE_STATIC_0: Simple test mode which uses static value of
186 * logic 0. The encoding will result in no signal transitions
187 * @SDW_PORT_DATA_MODE_STATIC_1: Simple test mode which uses static value of
188 * logic 1. The encoding will result in signal transitions at every bitslot
189 * owned by this Port
190 */
191 enum sdw_port_data_mode {
192 SDW_PORT_DATA_MODE_NORMAL = 0,
193 SDW_PORT_DATA_MODE_PRBS = 1,
194 SDW_PORT_DATA_MODE_STATIC_0 = 2,
195 SDW_PORT_DATA_MODE_STATIC_1 = 3,
196 };
197
198 /*
199 * SDW properties, defined in MIPI DisCo spec v1.0
200 */
201 enum sdw_clk_stop_reset_behave {
202 SDW_CLK_STOP_KEEP_STATUS = 1,
203 };
204
205 /**
206 * enum sdw_p15_behave - Slave Port 15 behaviour when the Master attempts a
207 * read
208 * @SDW_P15_READ_IGNORED: Read is ignored
209 * @SDW_P15_CMD_OK: Command is ok
210 */
211 enum sdw_p15_behave {
212 SDW_P15_READ_IGNORED = 0,
213 SDW_P15_CMD_OK = 1,
214 };
215
216 /**
217 * enum sdw_dpn_type - Data port types
218 * @SDW_DPN_FULL: Full Data Port is supported
219 * @SDW_DPN_SIMPLE: Simplified Data Port as defined in spec.
220 * DPN_SampleCtrl2, DPN_OffsetCtrl2, DPN_HCtrl and DPN_BlockCtrl3
221 * are not implemented.
222 * @SDW_DPN_REDUCED: Reduced Data Port as defined in spec.
223 * DPN_SampleCtrl2, DPN_HCtrl are not implemented.
224 */
225 enum sdw_dpn_type {
226 SDW_DPN_FULL = 0,
227 SDW_DPN_SIMPLE = 1,
228 SDW_DPN_REDUCED = 2,
229 };
230
231 /**
232 * enum sdw_clk_stop_mode - Clock Stop modes
233 * @SDW_CLK_STOP_MODE0: Slave can continue operation seamlessly on clock
234 * restart
235 * @SDW_CLK_STOP_MODE1: Slave may have entered a deeper power-saving mode,
236 * not capable of continuing operation seamlessly when the clock restarts
237 */
238 enum sdw_clk_stop_mode {
239 SDW_CLK_STOP_MODE0 = 0,
240 SDW_CLK_STOP_MODE1 = 1,
241 };
242
243 /**
244 * struct sdw_dp0_prop - DP0 properties
245 * @words: wordlengths supported
246 * @max_word: Maximum number of bits in a Payload Channel Sample, 1 to 64
247 * (inclusive)
248 * @min_word: Minimum number of bits in a Payload Channel Sample, 1 to 64
249 * (inclusive)
250 * @num_words: number of wordlengths supported
251 * @ch_prep_timeout: Port-specific timeout value, in milliseconds
252 * @BRA_flow_controlled: Slave implementation results in an OK_NotReady
253 * response
254 * @simple_ch_prep_sm: If channel prepare sequence is required
255 * @imp_def_interrupts: If set, each bit corresponds to support for
256 * implementation-defined interrupts
257 * @num_lanes: array size of @lane_list
258 * @lane_list: indicates which Lanes can be used by DP0
259 *
260 * The wordlengths are specified by Spec as max, min AND number of
261 * discrete values, implementation can define based on the wordlengths they
262 * support
263 */
264 struct sdw_dp0_prop {
265 u32 *words;
266 u32 max_word;
267 u32 min_word;
268 u32 num_words;
269 u32 ch_prep_timeout;
270 bool BRA_flow_controlled;
271 bool simple_ch_prep_sm;
272 bool imp_def_interrupts;
273 int num_lanes;
274 u32 *lane_list;
275 };
276
277 /**
278 * struct sdw_dpn_prop - Data Port DPn properties
279 * @num: port number
280 * @max_word: Maximum number of bits in a Payload Channel Sample, 1 to 64
281 * (inclusive)
282 * @min_word: Minimum number of bits in a Payload Channel Sample, 1 to 64
283 * (inclusive)
284 * @num_words: Number of discrete supported wordlengths
285 * @words: Discrete supported wordlength
286 * @type: Data port type. Full, Simplified or Reduced
287 * @max_grouping: Maximum number of samples that can be grouped together for
288 * a full data port
289 * @ch_prep_timeout: Port-specific timeout value, in milliseconds
290 * @imp_def_interrupts: If set, each bit corresponds to support for
291 * implementation-defined interrupts
292 * @max_ch: Maximum channels supported
293 * @min_ch: Minimum channels supported
294 * @num_channels: Number of discrete channels supported
295 * @num_ch_combinations: Number of channel combinations supported
296 * @channels: Discrete channels supported
297 * @ch_combinations: Channel combinations supported
298 * @lane_list: indicates which Lanes can be used by DPn
299 * @num_lanes: array size of @lane_list
300 * @modes: SDW mode supported
301 * @max_async_buffer: Number of samples that this port can buffer in
302 * asynchronous modes
303 * @port_encoding: Payload Channel Sample encoding schemes supported
304 * @block_pack_mode: Type of block port mode supported
305 * @read_only_wordlength: Read Only wordlength field in DPN_BlockCtrl1 register
306 * @simple_ch_prep_sm: If the port supports simplified channel prepare state
307 * machine
308 */
309 struct sdw_dpn_prop {
310 u32 num;
311 u32 max_word;
312 u32 min_word;
313 u32 num_words;
314 u32 *words;
315 enum sdw_dpn_type type;
316 u32 max_grouping;
317 u32 ch_prep_timeout;
318 u32 imp_def_interrupts;
319 u32 max_ch;
320 u32 min_ch;
321 u32 num_channels;
322 u32 num_ch_combinations;
323 u32 *channels;
324 u32 *ch_combinations;
325 u32 *lane_list;
326 int num_lanes;
327 u32 modes;
328 u32 max_async_buffer;
329 u32 port_encoding;
330 bool block_pack_mode;
331 bool read_only_wordlength;
332 bool simple_ch_prep_sm;
333 };
334
335 /**
336 * struct sdw_slave_prop - SoundWire Slave properties
337 * @dp0_prop: Data Port 0 properties
338 * @src_dpn_prop: Source Data Port N properties
339 * @sink_dpn_prop: Sink Data Port N properties
340 * @mipi_revision: Spec version of the implementation
341 * @wake_capable: Wake-up events are supported
342 * @test_mode_capable: If test mode is supported
343 * @clk_stop_mode1: Clock-Stop Mode 1 is supported
344 * @simple_clk_stop_capable: Simple clock mode is supported
345 * @clk_stop_timeout: Worst-case latency of the Clock Stop Prepare State
346 * Machine transitions, in milliseconds
347 * @ch_prep_timeout: Worst-case latency of the Channel Prepare State Machine
348 * transitions, in milliseconds
349 * @reset_behave: Slave keeps the status of the SlaveStopClockPrepare
350 * state machine (P=1 SCSP_SM) after exit from clock-stop mode1
351 * @high_PHY_capable: Slave is HighPHY capable
352 * @paging_support: Slave implements paging registers SCP_AddrPage1 and
353 * SCP_AddrPage2
354 * @bank_delay_support: Slave implements bank delay/bridge support registers
355 * SCP_BankDelay and SCP_NextFrame
356 * @lane_control_support: Slave supports lane control
357 * @p15_behave: Slave behavior when the Master attempts a read to the Port15
358 * alias
359 * @master_count: Number of Masters present on this Slave
360 * @source_ports: Bitmap identifying source ports
361 * @sink_ports: Bitmap identifying sink ports
362 * @quirks: bitmask identifying deltas from the MIPI specification
363 * @sdca_interrupt_register_list: indicates which sets of SDCA interrupt status
364 * and masks are supported
365 * @commit_register_supported: is PCP_Commit register supported
366 * @scp_int1_mask: SCP_INT1_MASK desired settings
367 * @lane_maps: Lane mapping for the slave, only valid if lane_control_support is set
368 * @bra_block_alignment: If non-zero the length of data in a BRA frame must be
369 * a multiple of this number of bytes.
370 * @bra_max_data_per_frame: If non-zero the maximum data payload size (in bytes per
371 * frame excluding header, CRC, and footer) for this BRA Mode
372 * @clock_reg_supported: the Peripheral implements the clock base and scale
373 * registers introduced with the SoundWire 1.2 specification. SDCA devices
374 * do not need to set this boolean property as the registers are required.
375 * @use_domain_irq: call actual IRQ handler on slave, as well as callback
376 */
377 struct sdw_slave_prop {
378 struct sdw_dp0_prop *dp0_prop;
379 struct sdw_dpn_prop *src_dpn_prop;
380 struct sdw_dpn_prop *sink_dpn_prop;
381 u32 mipi_revision;
382 bool wake_capable;
383 bool test_mode_capable;
384 bool clk_stop_mode1;
385 bool simple_clk_stop_capable;
386 u32 clk_stop_timeout;
387 u32 ch_prep_timeout;
388 enum sdw_clk_stop_reset_behave reset_behave;
389 bool high_PHY_capable;
390 bool paging_support;
391 bool bank_delay_support;
392 bool lane_control_support;
393 enum sdw_p15_behave p15_behave;
394 u32 master_count;
395 u32 source_ports;
396 u32 sink_ports;
397 u32 quirks;
398 u32 sdca_interrupt_register_list;
399 u8 commit_register_supported;
400 u8 scp_int1_mask;
401 u8 lane_maps[SDW_MAX_LANES];
402 u32 bra_block_alignment;
403 u32 bra_max_data_per_frame;
404 bool clock_reg_supported;
405 bool use_domain_irq;
406 };
407
408 #define SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY BIT(0)
409
410 /**
411 * struct sdw_master_prop - Master properties
412 * @clk_gears: Clock gears supported
413 * @clk_freq: Clock frequencies supported, in Hz
414 * @quirks: bitmask identifying optional behavior beyond the scope of the MIPI specification
415 * @revision: MIPI spec version of the implementation
416 * @clk_stop_modes: Bitmap, bit N set when clock-stop-modeN supported
417 * @max_clk_freq: Maximum Bus clock frequency, in Hz
418 * @num_clk_gears: Number of clock gears supported
419 * @num_clk_freq: Number of clock frequencies supported, in Hz
420 * @default_frame_rate: Controller default Frame rate, in Hz
421 * @default_row: Number of rows
422 * @default_col: Number of columns
423 * @dynamic_frame: Dynamic frame shape supported
424 * @err_threshold: Number of times that software may retry sending a single
425 * command
426 * @mclk_freq: clock reference passed to SoundWire Master, in Hz.
427 * @hw_disabled: if true, the Master is not functional, typically due to pin-mux
428 */
429 struct sdw_master_prop {
430 u32 *clk_gears;
431 u32 *clk_freq;
432 u64 quirks;
433 u32 revision;
434 u32 clk_stop_modes;
435 u32 max_clk_freq;
436 u32 num_clk_gears;
437 u32 num_clk_freq;
438 u32 default_frame_rate;
439 u32 default_row;
440 u32 default_col;
441 u32 err_threshold;
442 u32 mclk_freq;
443 bool dynamic_frame;
444 bool hw_disabled;
445 };
446
447 /* Definitions for Master quirks */
448
449 /*
450 * In a number of platforms bus clashes are reported after a hardware
451 * reset but without any explanations or evidence of a real problem.
452 * The following quirk will discard all initial bus clash interrupts
453 * but will leave the detection on should real bus clashes happen
454 */
455 #define SDW_MASTER_QUIRKS_CLEAR_INITIAL_CLASH BIT(0)
456
457 /*
458 * Some Slave devices have known issues with incorrect parity errors
459 * reported after a hardware reset. However during integration unexplained
460 * parity errors can be reported by Slave devices, possibly due to electrical
461 * issues at the Master level.
462 * The following quirk will discard all initial parity errors but will leave
463 * the detection on should real parity errors happen.
464 */
465 #define SDW_MASTER_QUIRKS_CLEAR_INITIAL_PARITY BIT(1)
466
467 int sdw_master_read_prop(struct sdw_bus *bus);
468 int sdw_slave_read_prop(struct sdw_slave *slave);
469 int sdw_slave_read_lane_mapping(struct sdw_slave *slave);
470
471 /*
472 * SDW Slave Structures and APIs
473 */
474
475 #define SDW_IGNORED_UNIQUE_ID 0xFF
476
477 /**
478 * struct sdw_slave_id - Slave ID
479 * @mfg_id: MIPI Manufacturer ID
480 * @part_id: Device Part ID
481 * @class_id: MIPI Class ID (defined starting with SoundWire 1.2 spec)
482 * @unique_id: Device unique ID
483 * @sdw_version: SDW version implemented
484 *
485 * The order of the IDs here does not follow the DisCo spec definitions
486 */
487 struct sdw_slave_id {
488 __u16 mfg_id;
489 __u16 part_id;
490 __u8 class_id;
491 __u8 unique_id;
492 __u8 sdw_version:4;
493 };
494
495 struct sdw_peripherals {
496 int num_peripherals;
497 struct sdw_slave *array[];
498 };
499
500 /*
501 * Helper macros to extract the MIPI-defined IDs
502 *
503 * Spec definition
504 * Register Bit Contents
505 * DevId_0 [7:4] 47:44 sdw_version
506 * DevId_0 [3:0] 43:40 unique_id
507 * DevId_1 39:32 mfg_id [15:8]
508 * DevId_2 31:24 mfg_id [7:0]
509 * DevId_3 23:16 part_id [15:8]
510 * DevId_4 15:08 part_id [7:0]
511 * DevId_5 07:00 class_id
512 *
513 * The MIPI DisCo for SoundWire defines in addition the link_id as bits 51:48
514 */
515 #define SDW_DISCO_LINK_ID_MASK GENMASK_ULL(51, 48)
516 #define SDW_VERSION_MASK GENMASK_ULL(47, 44)
517 #define SDW_UNIQUE_ID_MASK GENMASK_ULL(43, 40)
518 #define SDW_MFG_ID_MASK GENMASK_ULL(39, 24)
519 #define SDW_PART_ID_MASK GENMASK_ULL(23, 8)
520 #define SDW_CLASS_ID_MASK GENMASK_ULL(7, 0)
521
522 #define SDW_DISCO_LINK_ID(addr) FIELD_GET(SDW_DISCO_LINK_ID_MASK, addr)
523 #define SDW_VERSION(addr) FIELD_GET(SDW_VERSION_MASK, addr)
524 #define SDW_UNIQUE_ID(addr) FIELD_GET(SDW_UNIQUE_ID_MASK, addr)
525 #define SDW_MFG_ID(addr) FIELD_GET(SDW_MFG_ID_MASK, addr)
526 #define SDW_PART_ID(addr) FIELD_GET(SDW_PART_ID_MASK, addr)
527 #define SDW_CLASS_ID(addr) FIELD_GET(SDW_CLASS_ID_MASK, addr)
528
529 /**
530 * struct sdw_slave_intr_status - Slave interrupt status
531 * @sdca_cascade: set if the Slave device reports an SDCA interrupt
532 * @control_port: control port status
533 * @port: data port status
534 */
535 struct sdw_slave_intr_status {
536 bool sdca_cascade;
537 u8 control_port;
538 u8 port[15];
539 };
540
541 /**
542 * enum sdw_reg_bank - SoundWire register banks
543 * @SDW_BANK0: Soundwire register bank 0
544 * @SDW_BANK1: Soundwire register bank 1
545 */
546 enum sdw_reg_bank {
547 SDW_BANK0,
548 SDW_BANK1,
549 };
550
551 /**
552 * struct sdw_prepare_ch: Prepare/De-prepare Data Port channel
553 *
554 * @num: Port number
555 * @ch_mask: Active channel mask
556 * @prepare: Prepare (true) /de-prepare (false) channel
557 * @bank: Register bank, which bank Slave/Master driver should program for
558 * implementation defined registers. This is always updated to next_bank
559 * value read from bus params.
560 *
561 */
562 struct sdw_prepare_ch {
563 unsigned int num;
564 unsigned int ch_mask;
565 bool prepare;
566 unsigned int bank;
567 };
568
569 /**
570 * enum sdw_port_prep_ops: Prepare operations for Data Port
571 *
572 * @SDW_OPS_PORT_PRE_PREP: Pre prepare operation for the Port
573 * @SDW_OPS_PORT_PRE_DEPREP: Pre deprepare operation for the Port
574 * @SDW_OPS_PORT_POST_PREP: Post prepare operation for the Port
575 * @SDW_OPS_PORT_POST_DEPREP: Post deprepare operation for the Port
576 */
577 enum sdw_port_prep_ops {
578 SDW_OPS_PORT_PRE_PREP = 0,
579 SDW_OPS_PORT_PRE_DEPREP,
580 SDW_OPS_PORT_POST_PREP,
581 SDW_OPS_PORT_POST_DEPREP,
582 };
583
584 /**
585 * struct sdw_bus_params: Structure holding bus configuration
586 *
587 * @curr_bank: Current bank in use (BANK0/BANK1)
588 * @next_bank: Next bank to use (BANK0/BANK1). next_bank will always be
589 * set to !curr_bank
590 * @max_dr_freq: Maximum double rate clock frequency supported, in Hz
591 * @curr_dr_freq: Current double rate clock frequency, in Hz
592 * @bandwidth: Current bandwidth
593 * @col: Active columns
594 * @row: Active rows
595 * @s_data_mode: NORMAL, STATIC or PRBS mode for all Slave ports
596 * @m_data_mode: NORMAL, STATIC or PRBS mode for all Master ports. The value
597 * should be the same to detect transmission issues, but can be different to
598 * test the interrupt reports
599 */
600 struct sdw_bus_params {
601 enum sdw_reg_bank curr_bank;
602 enum sdw_reg_bank next_bank;
603 unsigned int max_dr_freq;
604 unsigned int curr_dr_freq;
605 unsigned int bandwidth;
606 unsigned int col;
607 unsigned int row;
608 int s_data_mode;
609 int m_data_mode;
610 };
611
612 /**
613 * struct sdw_slave_ops: Slave driver callback ops
614 *
615 * @read_prop: Read Slave properties
616 * @interrupt_callback: Device interrupt notification (invoked in thread
617 * context)
618 * @update_status: Update Slave status
619 * @bus_config: Update the bus config for Slave
620 * @port_prep: Prepare the port with parameters
621 * @clk_stop: handle imp-def sequences before and after prepare and de-prepare
622 */
623 struct sdw_slave_ops {
624 int (*read_prop)(struct sdw_slave *sdw);
625 int (*interrupt_callback)(struct sdw_slave *slave,
626 struct sdw_slave_intr_status *status);
627 int (*update_status)(struct sdw_slave *slave,
628 enum sdw_slave_status status);
629 int (*bus_config)(struct sdw_slave *slave,
630 struct sdw_bus_params *params);
631 int (*port_prep)(struct sdw_slave *slave,
632 struct sdw_prepare_ch *prepare_ch,
633 enum sdw_port_prep_ops pre_ops);
634 int (*clk_stop)(struct sdw_slave *slave,
635 enum sdw_clk_stop_mode mode,
636 enum sdw_clk_stop_type type);
637 };
638
639 /**
640 * struct sdw_slave - SoundWire Slave
641 * @id: MIPI device ID
642 * @dev: Linux device
643 * @index: internal ID for this slave
644 * @irq: IRQ number
645 * @status: Status reported by the Slave
646 * @bus: Bus handle
647 * @prop: Slave properties
648 * @debugfs: Slave debugfs
649 * @node: node for bus list
650 * @port_ready: Port ready completion flag for each Slave port
651 * @m_port_map: static Master port map for each Slave port
652 * @dev_num: Current Device Number, values can be 0 or dev_num_sticky
653 * @dev_num_sticky: one-time static Device Number assigned by Bus
654 * @probed: boolean tracking driver state
655 * @enumeration_complete: completion utility to control potential races
656 * on startup between device enumeration and read/write access to the
657 * Slave device
658 * @initialization_complete: completion utility to control potential races
659 * on startup between device enumeration and settings being restored
660 * @unattach_request: mask field to keep track why the Slave re-attached and
661 * was re-initialized. This is useful to deal with potential race conditions
662 * between the Master suspending and the codec resuming, and make sure that
663 * when the Master triggered a reset the Slave is properly enumerated and
664 * initialized
665 * @first_interrupt_done: status flag tracking if the interrupt handling
666 * for a Slave happens for the first time after enumeration
667 * @is_mockup_device: status flag used to squelch errors in the command/control
668 * protocol for SoundWire mockup devices
669 * @sdw_dev_lock: mutex used to protect callbacks/remove races
670 * @sdca_data: structure containing all device data for SDCA helpers
671 */
672 struct sdw_slave {
673 struct sdw_slave_id id;
674 struct device dev;
675 int index;
676 int irq;
677 enum sdw_slave_status status;
678 struct sdw_bus *bus;
679 struct sdw_slave_prop prop;
680 #ifdef CONFIG_DEBUG_FS
681 struct dentry *debugfs;
682 #endif
683 struct list_head node;
684 struct completion port_ready[SDW_MAX_PORTS];
685 unsigned int m_port_map[SDW_MAX_PORTS];
686 u16 dev_num;
687 u16 dev_num_sticky;
688 bool probed;
689 struct completion enumeration_complete;
690 struct completion initialization_complete;
691 u32 unattach_request;
692 bool first_interrupt_done;
693 bool is_mockup_device;
694 struct mutex sdw_dev_lock; /* protect callbacks/remove races */
695 struct sdca_device_data sdca_data;
696 };
697
698 #define dev_to_sdw_dev(_dev) container_of(_dev, struct sdw_slave, dev)
699
700 /**
701 * struct sdw_master_device - SoundWire 'Master Device' representation
702 * @dev: Linux device for this Master
703 * @bus: Bus handle shortcut
704 */
705 struct sdw_master_device {
706 struct device dev;
707 struct sdw_bus *bus;
708 };
709
710 #define dev_to_sdw_master_device(d) \
711 container_of(d, struct sdw_master_device, dev)
712
713 struct sdw_driver {
714 int (*probe)(struct sdw_slave *sdw, const struct sdw_device_id *id);
715 void (*remove)(struct sdw_slave *sdw);
716 void (*shutdown)(struct sdw_slave *sdw);
717
718 const struct sdw_device_id *id_table;
719 const struct sdw_slave_ops *ops;
720
721 struct device_driver driver;
722 };
723
724 #define SDW_SLAVE_ENTRY_EXT(_mfg_id, _part_id, _version, _c_id, _drv_data) \
725 { .mfg_id = (_mfg_id), .part_id = (_part_id), \
726 .sdw_version = (_version), .class_id = (_c_id), \
727 .driver_data = (unsigned long)(_drv_data) }
728
729 #define SDW_SLAVE_ENTRY(_mfg_id, _part_id, _drv_data) \
730 SDW_SLAVE_ENTRY_EXT((_mfg_id), (_part_id), 0, 0, (_drv_data))
731
732 int sdw_handle_slave_status(struct sdw_bus *bus,
733 enum sdw_slave_status status[]);
734
735 /*
736 * SDW master structures and APIs
737 */
738
739 /**
740 * struct sdw_port_params: Data Port parameters
741 *
742 * @num: Port number
743 * @bps: Word length of the Port
744 * @flow_mode: Port Data flow mode
745 * @data_mode: Test modes or normal mode
746 *
747 * This is used to program the Data Port based on Data Port stream
748 * parameters.
749 */
750 struct sdw_port_params {
751 unsigned int num;
752 unsigned int bps;
753 unsigned int flow_mode;
754 unsigned int data_mode;
755 };
756
757 /**
758 * struct sdw_transport_params: Data Port Transport Parameters
759 *
760 * @blk_grp_ctrl_valid: Port implements block group control
761 * @port_num: Port number
762 * @blk_grp_ctrl: Block group control value
763 * @sample_interval: Sample interval
764 * @offset1: Blockoffset of the payload data
765 * @offset2: Blockoffset of the payload data
766 * @hstart: Horizontal start of the payload data
767 * @hstop: Horizontal stop of the payload data
768 * @blk_pkg_mode: Block per channel or block per port
769 * @lane_ctrl: Data lane Port uses for Data transfer. Currently only single
770 * data lane is supported in bus
771 *
772 * This is used to program the Data Port based on Data Port transport
773 * parameters. All these parameters are banked and can be modified
774 * during a bank switch without any artifacts in audio stream.
775 */
776 struct sdw_transport_params {
777 bool blk_grp_ctrl_valid;
778 unsigned int port_num;
779 unsigned int blk_grp_ctrl;
780 unsigned int sample_interval;
781 unsigned int offset1;
782 unsigned int offset2;
783 unsigned int hstart;
784 unsigned int hstop;
785 unsigned int blk_pkg_mode;
786 unsigned int lane_ctrl;
787 };
788
789 /**
790 * struct sdw_enable_ch: Enable/disable Data Port channel
791 *
792 * @port_num: Port number
793 * @ch_mask: Active channel mask
794 * @enable: Enable (true) /disable (false) channel
795 */
796 struct sdw_enable_ch {
797 unsigned int port_num;
798 unsigned int ch_mask;
799 bool enable;
800 };
801
802 /**
803 * struct sdw_master_port_ops: Callback functions from bus to Master
804 * driver to set Master Data ports.
805 *
806 * @dpn_set_port_params: Set the Port parameters for the Master Port.
807 * Mandatory callback
808 * @dpn_set_port_transport_params: Set transport parameters for the Master
809 * Port. Mandatory callback
810 * @dpn_port_prep: Port prepare operations for the Master Data Port.
811 * @dpn_port_enable_ch: Enable the channels of Master Port.
812 */
813 struct sdw_master_port_ops {
814 int (*dpn_set_port_params)(struct sdw_bus *bus,
815 struct sdw_port_params *port_params,
816 unsigned int bank);
817 int (*dpn_set_port_transport_params)(struct sdw_bus *bus,
818 struct sdw_transport_params *transport_params,
819 enum sdw_reg_bank bank);
820 int (*dpn_port_prep)(struct sdw_bus *bus, struct sdw_prepare_ch *prepare_ch);
821 int (*dpn_port_enable_ch)(struct sdw_bus *bus,
822 struct sdw_enable_ch *enable_ch, unsigned int bank);
823 };
824
825 struct sdw_msg;
826
827 /**
828 * struct sdw_defer - SDW deferred message
829 * @complete: message completion
830 * @msg: SDW message
831 * @length: message length
832 */
833 struct sdw_defer {
834 struct sdw_msg *msg;
835 int length;
836 struct completion complete;
837 };
838
839 /*
840 * Add a practical limit to BPT transfer sizes. BPT is typically used
841 * to transfer firmware, and larger firmware transfers will increase
842 * the cold latency beyond typical OS or user requirements.
843 */
844 #define SDW_BPT_MSG_MAX_BYTES (1024 * 1024)
845
846 /*
847 * According to mipi SoundWire DisCo Specification_v2-1,
848 * this maximum value shall not exceed 470.
849 * Note that the largest number of bytes accessible by a single BRA operation is limited to 470
850 * bytes when using lane 0, but goes up to 502 bytes when using one of the optional extra lanes.
851 */
852 #define SDW_BRA_MAX_BYTES_PER_FRAME 470
853
854 struct sdw_bpt_msg;
855
856 /**
857 * struct sdw_master_ops - Master driver ops
858 * @read_prop: Read Master properties
859 * @override_adr: Override value read from firmware (quirk for buggy firmware)
860 * @xfer_msg: Transfer message callback
861 * @xfer_msg_defer: Defer version of transfer message callback. The message is handled with the
862 * bus struct @sdw_defer
863 * @set_bus_conf: Set the bus configuration
864 * @pre_bank_switch: Callback for pre bank switch
865 * @post_bank_switch: Callback for post bank switch
866 * @read_ping_status: Read status from PING frames, reported with two bits per Device.
867 * Bits 31:24 are reserved.
868 * @get_device_num: Callback for vendor-specific device_number allocation
869 * @put_device_num: Callback for vendor-specific device_number release
870 * @new_peripheral_assigned: Callback to handle enumeration of new peripheral.
871 * @bpt_send_async: reserve resources for BPT stream and send message
872 * using BTP protocol
873 * @bpt_wait: wait for message completion using BTP protocol
874 * and release resources
875 */
876 struct sdw_master_ops {
877 int (*read_prop)(struct sdw_bus *bus);
878 u64 (*override_adr)(struct sdw_bus *bus, u64 addr);
879 enum sdw_command_response (*xfer_msg)(struct sdw_bus *bus, struct sdw_msg *msg);
880 enum sdw_command_response (*xfer_msg_defer)(struct sdw_bus *bus);
881 int (*set_bus_conf)(struct sdw_bus *bus,
882 struct sdw_bus_params *params);
883 int (*pre_bank_switch)(struct sdw_bus *bus);
884 int (*post_bank_switch)(struct sdw_bus *bus);
885 u32 (*read_ping_status)(struct sdw_bus *bus);
886 int (*get_device_num)(struct sdw_bus *bus, struct sdw_slave *slave);
887 void (*put_device_num)(struct sdw_bus *bus, struct sdw_slave *slave);
888 void (*new_peripheral_assigned)(struct sdw_bus *bus,
889 struct sdw_slave *slave,
890 int dev_num);
891 int (*bpt_send_async)(struct sdw_bus *bus, struct sdw_slave *slave,
892 struct sdw_bpt_msg *msg);
893 int (*bpt_wait)(struct sdw_bus *bus, struct sdw_slave *slave, struct sdw_bpt_msg *msg);
894 };
895
896 int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent,
897 struct fwnode_handle *fwnode);
898 void sdw_bus_master_delete(struct sdw_bus *bus);
899
900 void sdw_show_ping_status(struct sdw_bus *bus, bool sync_delay);
901
902 /**
903 * struct sdw_port_config: Master or Slave Port configuration
904 *
905 * @num: Port number
906 * @ch_mask: channels mask for port
907 */
908 struct sdw_port_config {
909 unsigned int num;
910 unsigned int ch_mask;
911 };
912
913 /**
914 * struct sdw_stream_config: Master or Slave stream configuration
915 *
916 * @frame_rate: Audio frame rate of the stream, in Hz
917 * @ch_count: Channel count of the stream
918 * @bps: Number of bits per audio sample
919 * @direction: Data direction
920 * @type: Stream type PCM, PDM or BPT
921 */
922 struct sdw_stream_config {
923 unsigned int frame_rate;
924 unsigned int ch_count;
925 unsigned int bps;
926 enum sdw_data_direction direction;
927 enum sdw_stream_type type;
928 };
929
930 /**
931 * enum sdw_stream_state: Stream states
932 *
933 * @SDW_STREAM_ALLOCATED: New stream allocated.
934 * @SDW_STREAM_CONFIGURED: Stream configured
935 * @SDW_STREAM_PREPARED: Stream prepared
936 * @SDW_STREAM_ENABLED: Stream enabled
937 * @SDW_STREAM_DISABLED: Stream disabled
938 * @SDW_STREAM_DEPREPARED: Stream de-prepared
939 * @SDW_STREAM_RELEASED: Stream released
940 */
941 enum sdw_stream_state {
942 SDW_STREAM_ALLOCATED = 0,
943 SDW_STREAM_CONFIGURED = 1,
944 SDW_STREAM_PREPARED = 2,
945 SDW_STREAM_ENABLED = 3,
946 SDW_STREAM_DISABLED = 4,
947 SDW_STREAM_DEPREPARED = 5,
948 SDW_STREAM_RELEASED = 6,
949 };
950
951 /**
952 * struct sdw_stream_params: Stream parameters
953 *
954 * @rate: Sampling frequency, in Hz
955 * @ch_count: Number of channels
956 * @bps: bits per channel sample
957 */
958 struct sdw_stream_params {
959 unsigned int rate;
960 unsigned int ch_count;
961 unsigned int bps;
962 };
963
964 /**
965 * struct sdw_stream_runtime: Runtime stream parameters
966 *
967 * @name: SoundWire stream name
968 * @params: Stream parameters
969 * @state: Current state of the stream
970 * @type: Stream type PCM, PDM or BPT
971 * @m_rt_count: Count of Master runtime(s) in this stream
972 * @master_list: List of Master runtime(s) in this stream.
973 * master_list can contain only one m_rt per Master instance
974 * for a stream
975 */
976 struct sdw_stream_runtime {
977 const char *name;
978 struct sdw_stream_params params;
979 enum sdw_stream_state state;
980 enum sdw_stream_type type;
981 int m_rt_count;
982 struct list_head master_list;
983 };
984
985 /**
986 * struct sdw_bus - SoundWire bus
987 * @dev: Shortcut to &bus->md->dev to avoid changing the entire code.
988 * @md: Master device
989 * @bus_lock_key: bus lock key associated to @bus_lock
990 * @bus_lock: bus lock
991 * @slave_ida: IDA for allocating internal slave IDs
992 * @slaves: list of Slaves on this bus
993 * @msg_lock_key: message lock key associated to @msg_lock
994 * @msg_lock: message lock
995 * @m_rt_list: List of Master instance of all stream(s) running on Bus. This
996 * is used to compute and program bus bandwidth, clock, frame shape,
997 * transport and port parameters
998 * @defer_msg: Defer message
999 * @params: Current bus parameters
1000 * @stream_refcount: number of streams currently using this bus
1001 * @bpt_stream_refcount: number of BTP streams currently using this bus (should
1002 * be zero or one, multiple streams per link is not supported).
1003 * @bpt_stream: pointer stored to handle BTP streams.
1004 * @ops: Master callback ops
1005 * @port_ops: Master port callback ops
1006 * @prop: Master properties
1007 * @vendor_specific_prop: pointer to non-standard properties
1008 * @hw_sync_min_links: Number of links used by a stream above which
1009 * hardware-based synchronization is required. This value is only
1010 * meaningful if multi_link is set. If set to 1, hardware-based
1011 * synchronization will be used even if a stream only uses a single
1012 * SoundWire segment.
1013 * @controller_id: system-unique controller ID. If set to -1, the bus @id will be used.
1014 * @link_id: Link id number, can be 0 to N, unique for each Controller
1015 * @id: bus system-wide unique id
1016 * @compute_params: points to Bus resource management implementation
1017 * @assigned: Bitmap for Slave device numbers.
1018 * Bit set implies used number, bit clear implies unused number.
1019 * @clk_stop_timeout: Clock stop timeout computed
1020 * @bank_switch_timeout: Bank switch timeout computed
1021 * @domain: IRQ domain
1022 * @irq_chip: IRQ chip
1023 * @debugfs: Bus debugfs (optional)
1024 * @multi_link: Store bus property that indicates if multi links
1025 * are supported. This flag is populated by drivers after reading
1026 * appropriate firmware (ACPI/DT).
1027 * @lane_used_bandwidth: how much bandwidth in bits per second is used by each lane
1028 */
1029 struct sdw_bus {
1030 struct device *dev;
1031 struct sdw_master_device *md;
1032 struct lock_class_key bus_lock_key;
1033 struct mutex bus_lock;
1034 struct ida slave_ida;
1035 struct list_head slaves;
1036 struct lock_class_key msg_lock_key;
1037 struct mutex msg_lock;
1038 struct list_head m_rt_list;
1039 struct sdw_defer defer_msg;
1040 struct sdw_bus_params params;
1041 int stream_refcount;
1042 int bpt_stream_refcount;
1043 struct sdw_stream_runtime *bpt_stream;
1044 const struct sdw_master_ops *ops;
1045 const struct sdw_master_port_ops *port_ops;
1046 struct sdw_master_prop prop;
1047 void *vendor_specific_prop;
1048 int hw_sync_min_links;
1049 int controller_id;
1050 unsigned int link_id;
1051 int id;
1052 int (*compute_params)(struct sdw_bus *bus, struct sdw_stream_runtime *stream);
1053 DECLARE_BITMAP(assigned, SDW_MAX_DEVICES);
1054 unsigned int clk_stop_timeout;
1055 u32 bank_switch_timeout;
1056 struct irq_chip irq_chip;
1057 struct irq_domain *domain;
1058 #ifdef CONFIG_DEBUG_FS
1059 struct dentry *debugfs;
1060 #endif
1061 bool multi_link;
1062 unsigned int lane_used_bandwidth[SDW_MAX_LANES];
1063 };
1064
1065 struct sdw_stream_runtime *sdw_alloc_stream(const char *stream_name, enum sdw_stream_type type);
1066 void sdw_release_stream(struct sdw_stream_runtime *stream);
1067
1068 int sdw_compute_params(struct sdw_bus *bus, struct sdw_stream_runtime *stream);
1069
1070 int sdw_stream_add_master(struct sdw_bus *bus,
1071 struct sdw_stream_config *stream_config,
1072 const struct sdw_port_config *port_config,
1073 unsigned int num_ports,
1074 struct sdw_stream_runtime *stream);
1075 int sdw_stream_remove_master(struct sdw_bus *bus,
1076 struct sdw_stream_runtime *stream);
1077 int sdw_startup_stream(void *sdw_substream);
1078 int sdw_prepare_stream(struct sdw_stream_runtime *stream);
1079 int sdw_enable_stream(struct sdw_stream_runtime *stream);
1080 int sdw_disable_stream(struct sdw_stream_runtime *stream);
1081 int sdw_deprepare_stream(struct sdw_stream_runtime *stream);
1082 void sdw_shutdown_stream(void *sdw_substream);
1083 int sdw_bus_prep_clk_stop(struct sdw_bus *bus);
1084 int sdw_bus_clk_stop(struct sdw_bus *bus);
1085 int sdw_bus_exit_clk_stop(struct sdw_bus *bus);
1086
1087 int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id);
1088 void sdw_extract_slave_id(struct sdw_bus *bus, u64 addr, struct sdw_slave_id *id);
1089 bool is_clock_scaling_supported_by_slave(struct sdw_slave *slave);
1090
1091 int sdw_bpt_send_async(struct sdw_bus *bus, struct sdw_slave *slave, struct sdw_bpt_msg *msg);
1092 int sdw_bpt_wait(struct sdw_bus *bus, struct sdw_slave *slave, struct sdw_bpt_msg *msg);
1093 int sdw_bpt_send_sync(struct sdw_bus *bus, struct sdw_slave *slave, struct sdw_bpt_msg *msg);
1094
1095 #if IS_ENABLED(CONFIG_SOUNDWIRE)
1096
1097 int sdw_stream_add_slave(struct sdw_slave *slave,
1098 struct sdw_stream_config *stream_config,
1099 const struct sdw_port_config *port_config,
1100 unsigned int num_ports,
1101 struct sdw_stream_runtime *stream);
1102 int sdw_stream_remove_slave(struct sdw_slave *slave,
1103 struct sdw_stream_runtime *stream);
1104
1105 struct device *of_sdw_find_device_by_node(struct device_node *np);
1106
1107 int sdw_slave_get_current_bank(struct sdw_slave *sdev);
1108
1109 int sdw_slave_get_scale_index(struct sdw_slave *slave, u8 *base);
1110
1111 /* messaging and data APIs */
1112 int sdw_read(struct sdw_slave *slave, u32 addr);
1113 int sdw_write(struct sdw_slave *slave, u32 addr, u8 value);
1114 int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value);
1115 int sdw_read_no_pm(struct sdw_slave *slave, u32 addr);
1116 int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val);
1117 int sdw_nread_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val);
1118 int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val);
1119 int sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val);
1120 int sdw_update(struct sdw_slave *slave, u32 addr, u8 mask, u8 val);
1121 int sdw_update_no_pm(struct sdw_slave *slave, u32 addr, u8 mask, u8 val);
1122
1123 #else
1124
sdw_stream_add_slave(struct sdw_slave * slave,struct sdw_stream_config * stream_config,const struct sdw_port_config * port_config,unsigned int num_ports,struct sdw_stream_runtime * stream)1125 static inline int sdw_stream_add_slave(struct sdw_slave *slave,
1126 struct sdw_stream_config *stream_config,
1127 const struct sdw_port_config *port_config,
1128 unsigned int num_ports,
1129 struct sdw_stream_runtime *stream)
1130 {
1131 WARN_ONCE(1, "SoundWire API is disabled");
1132 return -EINVAL;
1133 }
1134
sdw_stream_remove_slave(struct sdw_slave * slave,struct sdw_stream_runtime * stream)1135 static inline int sdw_stream_remove_slave(struct sdw_slave *slave,
1136 struct sdw_stream_runtime *stream)
1137 {
1138 WARN_ONCE(1, "SoundWire API is disabled");
1139 return -EINVAL;
1140 }
1141
of_sdw_find_device_by_node(struct device_node * np)1142 static inline struct device *of_sdw_find_device_by_node(struct device_node *np)
1143 {
1144 WARN_ONCE(1, "SoundWire API is disabled");
1145 return NULL;
1146 }
1147
sdw_slave_get_current_bank(struct sdw_slave * sdev)1148 static inline int sdw_slave_get_current_bank(struct sdw_slave *sdev)
1149 {
1150 WARN_ONCE(1, "SoundWire API is disabled");
1151 return -EINVAL;
1152 }
1153
1154 /* messaging and data APIs */
sdw_read(struct sdw_slave * slave,u32 addr)1155 static inline int sdw_read(struct sdw_slave *slave, u32 addr)
1156 {
1157 WARN_ONCE(1, "SoundWire API is disabled");
1158 return -EINVAL;
1159 }
1160
sdw_write(struct sdw_slave * slave,u32 addr,u8 value)1161 static inline int sdw_write(struct sdw_slave *slave, u32 addr, u8 value)
1162 {
1163 WARN_ONCE(1, "SoundWire API is disabled");
1164 return -EINVAL;
1165 }
1166
sdw_write_no_pm(struct sdw_slave * slave,u32 addr,u8 value)1167 static inline int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value)
1168 {
1169 WARN_ONCE(1, "SoundWire API is disabled");
1170 return -EINVAL;
1171 }
1172
sdw_read_no_pm(struct sdw_slave * slave,u32 addr)1173 static inline int sdw_read_no_pm(struct sdw_slave *slave, u32 addr)
1174 {
1175 WARN_ONCE(1, "SoundWire API is disabled");
1176 return -EINVAL;
1177 }
1178
sdw_nread(struct sdw_slave * slave,u32 addr,size_t count,u8 * val)1179 static inline int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
1180 {
1181 WARN_ONCE(1, "SoundWire API is disabled");
1182 return -EINVAL;
1183 }
1184
sdw_nread_no_pm(struct sdw_slave * slave,u32 addr,size_t count,u8 * val)1185 static inline int sdw_nread_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
1186 {
1187 WARN_ONCE(1, "SoundWire API is disabled");
1188 return -EINVAL;
1189 }
1190
sdw_nwrite(struct sdw_slave * slave,u32 addr,size_t count,const u8 * val)1191 static inline int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val)
1192 {
1193 WARN_ONCE(1, "SoundWire API is disabled");
1194 return -EINVAL;
1195 }
1196
sdw_nwrite_no_pm(struct sdw_slave * slave,u32 addr,size_t count,const u8 * val)1197 static inline int sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val)
1198 {
1199 WARN_ONCE(1, "SoundWire API is disabled");
1200 return -EINVAL;
1201 }
1202
sdw_update(struct sdw_slave * slave,u32 addr,u8 mask,u8 val)1203 static inline int sdw_update(struct sdw_slave *slave, u32 addr, u8 mask, u8 val)
1204 {
1205 WARN_ONCE(1, "SoundWire API is disabled");
1206 return -EINVAL;
1207 }
1208
sdw_update_no_pm(struct sdw_slave * slave,u32 addr,u8 mask,u8 val)1209 static inline int sdw_update_no_pm(struct sdw_slave *slave, u32 addr, u8 mask, u8 val)
1210 {
1211 WARN_ONCE(1, "SoundWire API is disabled");
1212 return -EINVAL;
1213 }
1214
1215 #endif /* CONFIG_SOUNDWIRE */
1216
1217 /**
1218 * sdw_slave_wait_for_init - Wait for device initialisation
1219 * @slave: Pointer to the SoundWire peripheral.
1220 * @timeout_ms: Timeout in milliseconds.
1221 *
1222 * Wait for a peripheral device to enumerate and be initialised by the
1223 * SoundWire core.
1224 *
1225 * Return: Zero on success, and a negative error code on failure.
1226 */
sdw_slave_wait_for_init(struct sdw_slave * slave,int timeout_ms)1227 static inline int sdw_slave_wait_for_init(struct sdw_slave *slave, int timeout_ms)
1228 {
1229 unsigned long time;
1230
1231 if (!slave)
1232 return 0;
1233
1234 time = wait_for_completion_timeout(&slave->initialization_complete,
1235 msecs_to_jiffies(timeout_ms));
1236 if (!time) {
1237 dev_err(&slave->dev, "Initialization not complete\n");
1238 return -ETIMEDOUT;
1239 }
1240
1241 slave->unattach_request = 0;
1242
1243 return 0;
1244 }
1245
1246 #endif /* __SOUNDWIRE_H */
1247