1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (C) 2022-2024, Advanced Micro Devices, Inc.
4 */
5
6 #ifndef _AMDXDNA_PCI_DRV_H_
7 #define _AMDXDNA_PCI_DRV_H_
8
9 #include <drm/amdxdna_accel.h>
10 #include <drm/drm_mm.h>
11 #include <drm/drm_print.h>
12 #include <linux/iommu.h>
13 #include <linux/iova.h>
14 #include <linux/workqueue.h>
15 #include <linux/xarray.h>
16
17 #define XDNA_INFO(xdna, fmt, args...) drm_info(&(xdna)->ddev, fmt, ##args)
18 #define XDNA_WARN(xdna, fmt, args...) drm_warn(&(xdna)->ddev, "%s: "fmt, __func__, ##args)
19 #define XDNA_ERR(xdna, fmt, args...) drm_err(&(xdna)->ddev, "%s: "fmt, __func__, ##args)
20 #define XDNA_DBG(xdna, fmt, args...) drm_dbg(&(xdna)->ddev, fmt, ##args)
21 #define XDNA_INFO_ONCE(xdna, fmt, args...) drm_info_once(&(xdna)->ddev, fmt, ##args)
22
23 #define XDNA_MBZ_DBG(xdna, ptr, sz) \
24 ({ \
25 int __i; \
26 int __ret = 0; \
27 u8 *__ptr = (u8 *)(ptr); \
28 for (__i = 0; __i < (sz); __i++) { \
29 if (__ptr[__i]) { \
30 XDNA_DBG(xdna, "MBZ check failed"); \
31 __ret = -EINVAL; \
32 break; \
33 } \
34 } \
35 __ret; \
36 })
37
38 #define to_xdna_dev(drm_dev) \
39 ((struct amdxdna_dev *)container_of(drm_dev, struct amdxdna_dev, ddev))
40
41 extern const struct drm_driver amdxdna_drm_drv;
42
43 struct amdxdna_client;
44 struct amdxdna_dev;
45 struct amdxdna_drm_get_info;
46 struct amdxdna_drm_set_state;
47 struct amdxdna_gem_obj;
48 struct amdxdna_hwctx;
49 struct amdxdna_sched_job;
50
51 /*
52 * struct amdxdna_dev_ops - Device hardware operation callbacks
53 */
54 struct amdxdna_dev_ops {
55 int (*init)(struct amdxdna_dev *xdna);
56 void (*fini)(struct amdxdna_dev *xdna);
57 int (*resume)(struct amdxdna_dev *xdna);
58 int (*suspend)(struct amdxdna_dev *xdna);
59 int (*sriov_configure)(struct amdxdna_dev *xdna, int num_vfs);
60 int (*mmap)(struct amdxdna_client *client, struct vm_area_struct *vma);
61 int (*hwctx_init)(struct amdxdna_hwctx *hwctx);
62 void (*hwctx_fini)(struct amdxdna_hwctx *hwctx);
63 int (*hwctx_config)(struct amdxdna_hwctx *hwctx, u32 type, u64 value, void *buf, u32 size);
64 int (*hwctx_sync_debug_bo)(struct amdxdna_hwctx *hwctx, u32 debug_bo_hdl);
65 int (*hwctx_heap_expand)(struct amdxdna_hwctx *hwctx, struct amdxdna_gem_obj *heap);
66 void (*hmm_invalidate)(struct amdxdna_gem_obj *abo, unsigned long cur_seq);
67 int (*cmd_submit)(struct amdxdna_hwctx *hwctx, struct amdxdna_sched_job *job, u64 *seq);
68 int (*cmd_wait)(struct amdxdna_hwctx *hwctx, u64 seq, u32 timeout);
69 int (*get_aie_info)(struct amdxdna_client *client, struct amdxdna_drm_get_info *args);
70 int (*set_aie_state)(struct amdxdna_client *client, struct amdxdna_drm_set_state *args);
71 int (*get_array)(struct amdxdna_client *client, struct amdxdna_drm_get_array *args);
72 int (*get_dev_revision)(struct amdxdna_dev *xdna, u32 *rev);
73 };
74
75 struct amdxdna_fw_feature_tbl {
76 u64 features;
77 u32 major;
78 u32 max_minor;
79 u32 min_minor;
80 };
81
82 /*
83 * struct amdxdna_dev_info - Device hardware information
84 * Record device static information, like reg, mbox, PSP, SMU bar index
85 */
86 struct amdxdna_dev_info {
87 int reg_bar;
88 int mbox_bar;
89 int sram_bar;
90 int psp_bar;
91 int smu_bar;
92 int doorbell_bar;
93 int device_type;
94 int first_col;
95 u32 dev_mem_buf_shift;
96 u64 dev_mem_base;
97 size_t dev_mem_size;
98 const char *default_vbnv;
99 const struct amdxdna_rev_vbnv *rev_vbnv_tbl;
100 size_t dev_heap_max_size;
101 const struct amdxdna_dev_priv *dev_priv;
102 const struct amdxdna_fw_feature_tbl *fw_feature_tbl;
103 const struct amdxdna_dev_ops *ops;
104 };
105
106 struct amdxdna_fw_ver {
107 u32 major;
108 u32 minor;
109 u32 sub;
110 u32 build;
111 };
112
113 struct amdxdna_carveout;
114
115 struct amdxdna_dev {
116 struct drm_device ddev;
117 struct amdxdna_dev_hdl *dev_handle;
118 const struct amdxdna_dev_info *dev_info;
119 void *xrs_hdl;
120
121 struct mutex dev_lock; /* per device lock */
122 struct list_head client_list;
123 struct mutex client_lock; /* client_list */
124 struct amdxdna_fw_ver fw_ver;
125 struct rw_semaphore notifier_lock; /* for mmu notifier*/
126 struct workqueue_struct *notifier_wq;
127
128 struct iommu_group *group;
129 struct iommu_domain *domain;
130 struct iova_domain iovad;
131 /* Accurate board name queried from firmware, or default_vbnv as fallback */
132 const char *vbnv;
133
134 struct amdxdna_carveout *carveout;
135 };
136
137 /*
138 * struct amdxdna_device_id - PCI device info
139 */
140 struct amdxdna_device_id {
141 unsigned short device;
142 u8 revision;
143 const struct amdxdna_dev_info *dev_info;
144 };
145
146 /*
147 * struct amdxdna_client - amdxdna client
148 * A per fd data structure for managing context and other user process stuffs.
149 */
150 struct amdxdna_client {
151 struct list_head node;
152 pid_t pid;
153 struct srcu_struct hwctx_srcu;
154 struct xarray hwctx_xa;
155 u32 next_hwctxid;
156 struct amdxdna_dev *xdna;
157 struct drm_file *filp;
158
159 struct mutex mm_lock; /* protect memory related */
160 struct xarray dev_heap_xa;
161 struct drm_mm dev_heap_mm;
162 u32 dev_heap_nid;
163 size_t total_heap_size;
164
165 struct iommu_sva *sva;
166 int pasid;
167 struct mm_struct *mm;
168
169 size_t heap_usage;
170 size_t total_bo_usage;
171 size_t total_int_bo_usage;
172 };
173
174 #define amdxdna_for_each_hwctx(client, hwctx_id, entry) \
175 xa_for_each(&(client)->hwctx_xa, hwctx_id, entry)
176
177 /* Add device info below */
178 extern const struct amdxdna_dev_info dev_npu1_info;
179 extern const struct amdxdna_dev_info dev_npu3_pf_info;
180 extern const struct amdxdna_dev_info dev_npu3_vf_info;
181 extern const struct amdxdna_dev_info dev_npu4_info;
182 extern const struct amdxdna_dev_info dev_npu5_info;
183 extern const struct amdxdna_dev_info dev_npu6_info;
184
185 int amdxdna_sysfs_init(struct amdxdna_dev *xdna);
186 void amdxdna_sysfs_fini(struct amdxdna_dev *xdna);
187
188 int amdxdna_iommu_init(struct amdxdna_dev *xdna);
189 void amdxdna_iommu_fini(struct amdxdna_dev *xdna);
190 void *amdxdna_iommu_alloc(struct amdxdna_dev *xdna, size_t size, dma_addr_t *dma_addr);
191 void amdxdna_iommu_free(struct amdxdna_dev *xdna, size_t size,
192 void *cpu_addr, dma_addr_t dma_addr);
193 int amdxdna_dma_map_bo(struct amdxdna_dev *xdna, struct amdxdna_gem_obj *abo);
194 void amdxdna_dma_unmap_bo(struct amdxdna_dev *xdna, struct amdxdna_gem_obj *abo);
195
amdxdna_iova_on(struct amdxdna_dev * xdna)196 static inline bool amdxdna_iova_on(struct amdxdna_dev *xdna)
197 {
198 return !!xdna->domain;
199 }
200
amdxdna_pasid_on(struct amdxdna_client * client)201 static inline bool amdxdna_pasid_on(struct amdxdna_client *client)
202 {
203 return client->pasid != IOMMU_PASID_INVALID;
204 }
205 #endif /* _AMDXDNA_PCI_DRV_H_ */
206