xref: /linux/arch/arm/boot/dts/ti/keystone/keystone-k2g.dtsi (revision 483872c9385c9726b056428adbaaf213623ab5a3)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for K2G SOC
4 *
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
6 */
7
8#include <dt-bindings/interrupt-controller/arm-gic.h>
9#include <dt-bindings/pinctrl/keystone.h>
10#include <dt-bindings/gpio/gpio.h>
11
12/ {
13	compatible = "ti,k2g","ti,keystone";
14	model = "Texas Instruments K2G SoC";
15	#address-cells = <2>;
16	#size-cells = <2>;
17	interrupt-parent = <&gic>;
18
19	chosen { };
20
21	aliases {
22		serial0 = &uart0;
23		serial1 = &uart1;
24		serial2 = &uart2;
25		i2c0 = &i2c0;
26		i2c1 = &i2c1;
27		i2c2 = &i2c2;
28		rproc0 = &dsp0;
29	};
30
31	cpus {
32		#address-cells = <1>;
33		#size-cells = <0>;
34
35		cpu@0 {
36			compatible = "arm,cortex-a15";
37			device_type = "cpu";
38			reg = <0>;
39		};
40	};
41
42	gic: interrupt-controller@2561000 {
43		compatible = "arm,gic-400", "arm,cortex-a15-gic";
44		#interrupt-cells = <3>;
45		interrupt-controller;
46		reg = <0x0 0x02561000 0x0 0x1000>,
47		      <0x0 0x02562000 0x0 0x2000>,
48		      <0x0 0x02564000 0x0 0x2000>,
49		      <0x0 0x02566000 0x0 0x2000>;
50		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
51				IRQ_TYPE_LEVEL_HIGH)>;
52	};
53
54	timer {
55		compatible = "arm,armv7-timer";
56		interrupts =
57			<GIC_PPI 13
58				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
59			<GIC_PPI 14
60				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
61			<GIC_PPI 11
62				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
63			<GIC_PPI 10
64				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
65	};
66
67	pmu {
68		compatible = "arm,cortex-a15-pmu";
69		interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
70	};
71
72	usb0_phy: usb0-phy {
73		compatible = "usb-nop-xceiv";
74		#phy-cells = <0>;
75		status = "disabled";
76	};
77
78	usb1_phy: usb1-phy {
79		compatible = "usb-nop-xceiv";
80		#phy-cells = <0>;
81		status = "disabled";
82	};
83
84	soc0: soc@0 {
85		#address-cells = <1>;
86		#size-cells = <1>;
87		#pinctrl-cells = <1>;
88		compatible = "ti,keystone","simple-bus";
89		ranges = <0x0 0x0 0x0 0xc0000000>;
90		dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
91
92		msm_ram: sram@c000000 {
93			compatible = "mmio-sram";
94			reg = <0x0c000000 0x100000>;
95			ranges = <0x0 0x0c000000 0x100000>;
96			#address-cells = <1>;
97			#size-cells = <1>;
98
99			bm-sram@f7000 {
100				reg = <0x000f7000 0x8000>;
101			};
102		};
103
104		k2g_pinctrl: pinmux@2621000 {
105			compatible = "pinctrl-single";
106			reg = <0x02621000 0x410>;
107			pinctrl-single,register-width = <32>;
108			pinctrl-single,function-mask = <0x001b0007>;
109		};
110
111		devctrl: device-state-control@2620000 {
112			compatible = "ti,keystone-devctrl", "syscon", "simple-mfd";
113			reg = <0x02620000 0x1000>;
114			#address-cells = <1>;
115			#size-cells = <1>;
116			ranges = <0x0 0x02620000 0x1000>;
117
118			kirq0: interrupt-controller@2a0 {
119				compatible = "ti,keystone-irq";
120				reg = <0x2a0 0x10>;
121				interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
122				interrupt-controller;
123				#interrupt-cells = <1>;
124				ti,syscon-dev = <&devctrl 0x2a0>;
125			};
126
127			dspgpio0: gpio@240 {
128				compatible = "ti,keystone-dsp-gpio";
129				reg = <0x240 0x4>;
130				gpio-controller;
131				#gpio-cells = <2>;
132				gpio,syscon-dev = <&devctrl 0x240>;
133			};
134		};
135
136		uart0: serial@2530c00 {
137			compatible = "ti,da830-uart", "ns16550a";
138			current-speed = <115200>;
139			reg-shift = <2>;
140			reg-io-width = <4>;
141			reg = <0x02530c00 0x100>;
142			interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
143			clocks = <&k2g_clks 0x2c 0>;
144			power-domains = <&k2g_pds 0x2c>;
145			status = "disabled";
146		};
147
148		uart1: serial@2531000 {
149			compatible = "ti,da830-uart", "ns16550a";
150			current-speed = <115200>;
151			reg-shift = <2>;
152			reg-io-width = <4>;
153			reg = <0x02531000 0x100>;
154			interrupts = <GIC_SPI 165 IRQ_TYPE_EDGE_RISING>;
155			clocks = <&k2g_clks 0x2d 0>;
156			power-domains = <&k2g_pds 0x2d>;
157			status = "disabled";
158		};
159
160		uart2: serial@2531400 {
161			compatible = "ti,da830-uart", "ns16550a";
162			current-speed = <115200>;
163			reg-shift = <2>;
164			reg-io-width = <4>;
165			reg = <0x02531400 0x100>;
166			interrupts = <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>;
167			clocks = <&k2g_clks 0x2e 0>;
168			power-domains = <&k2g_pds 0x2e>;
169			status = "disabled";
170		};
171
172		dcan0: can@260b200 {
173			compatible = "ti,am4372-d_can", "ti,am3352-d_can";
174			reg = <0x0260b200 0x200>;
175			interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
176			status = "disabled";
177			power-domains = <&k2g_pds 0x0008>;
178			clocks = <&k2g_clks 0x0008 1>;
179		};
180
181		dcan1: can@260b400 {
182			compatible = "ti,am4372-d_can", "ti,am3352-d_can";
183			reg = <0x0260b400 0x200>;
184			interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
185			status = "disabled";
186			power-domains = <&k2g_pds 0x0009>;
187			clocks = <&k2g_clks 0x0009 1>;
188		};
189
190		i2c0: i2c@2530000 {
191			compatible = "ti,keystone-i2c";
192			reg = <0x02530000 0x400>;
193			clocks = <&k2g_clks 0x003a 0>;
194			power-domains = <&k2g_pds 0x003a>;
195			interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
196			#address-cells = <1>;
197			#size-cells = <0>;
198			status = "disabled";
199		};
200
201		i2c1: i2c@2530400 {
202			compatible = "ti,keystone-i2c";
203			reg = <0x02530400 0x400>;
204			clocks = <&k2g_clks 0x003b 0>;
205			power-domains = <&k2g_pds 0x003b>;
206			interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
207			#address-cells = <1>;
208			#size-cells = <0>;
209			status = "disabled";
210		};
211
212		i2c2: i2c@2530800 {
213			compatible = "ti,keystone-i2c";
214			reg = <0x02530800 0x400>;
215			clocks = <&k2g_clks 0x003c 0>;
216			power-domains = <&k2g_pds 0x003c>;
217			interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
218			#address-cells = <1>;
219			#size-cells = <0>;
220			status = "disabled";
221		};
222
223		dsp0: dsp@10800000 {
224			compatible = "ti,k2g-dsp";
225			reg = <0x10800000 0x00100000>,
226			      <0x10e00000 0x00008000>,
227			      <0x10f00000 0x00008000>;
228			reg-names = "l2sram", "l1pram", "l1dram";
229			power-domains = <&k2g_pds 0x0046>;
230			ti,syscon-dev = <&devctrl 0x844>;
231			resets = <&k2g_reset 0x0046 0x1>;
232			interrupt-parent = <&kirq0>;
233			interrupts = <0 8>;
234			interrupt-names = "vring", "exception";
235			kick-gpios = <&dspgpio0 27 0>;
236			status = "disabled";
237		};
238
239		msgmgr: mailbox@2a00000 {
240			compatible = "ti,k2g-message-manager";
241			#mbox-cells = <2>;
242			reg-names = "queue_proxy_region",
243				    "queue_state_debug_region";
244			reg = <0x02a00000 0x400000>, <0x028c3400 0x400>;
245			interrupt-names = "rx_005",
246					  "rx_057";
247			interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
248				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
249		};
250
251		pmmc: system-controller@2921c00 {
252			compatible = "ti,k2g-sci";
253			mbox-names = "rx", "tx";
254			mboxes = <&msgmgr 5 2>,
255				<&msgmgr 0 0>;
256			reg-names = "debug_messages";
257			reg = <0x02921c00 0x400>;
258
259			k2g_pds: power-controller {
260				compatible = "ti,sci-pm-domain";
261				#power-domain-cells = <1>;
262			};
263
264			k2g_clks: clock-controller {
265				compatible = "ti,k2g-sci-clk";
266				#clock-cells = <2>;
267			};
268
269			k2g_reset: reset-controller {
270				compatible = "ti,sci-reset";
271				#reset-cells = <2>;
272			};
273		};
274
275		gpio0: gpio@2603000 {
276			compatible = "ti,k2g-gpio", "ti,keystone-gpio";
277			reg = <0x02603000 0x100>;
278			gpio-controller;
279			#gpio-cells = <2>;
280
281			interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>,
282					<GIC_SPI 433 IRQ_TYPE_EDGE_RISING>,
283					<GIC_SPI 434 IRQ_TYPE_EDGE_RISING>,
284					<GIC_SPI 435 IRQ_TYPE_EDGE_RISING>,
285					<GIC_SPI 436 IRQ_TYPE_EDGE_RISING>,
286					<GIC_SPI 437 IRQ_TYPE_EDGE_RISING>,
287					<GIC_SPI 438 IRQ_TYPE_EDGE_RISING>,
288					<GIC_SPI 439 IRQ_TYPE_EDGE_RISING>,
289					<GIC_SPI 440 IRQ_TYPE_EDGE_RISING>;
290			interrupt-controller;
291			#interrupt-cells = <2>;
292			ti,ngpio = <144>;
293			ti,davinci-gpio-unbanked = <0>;
294			clocks = <&k2g_clks 0x001b 0x0>;
295			clock-names = "gpio";
296		};
297
298		gpio1: gpio@260a000 {
299			compatible = "ti,k2g-gpio", "ti,keystone-gpio";
300			reg = <0x0260a000 0x100>;
301			gpio-controller;
302			#gpio-cells = <2>;
303			interrupts = <GIC_SPI 442 IRQ_TYPE_EDGE_RISING>,
304					<GIC_SPI 443 IRQ_TYPE_EDGE_RISING>,
305					<GIC_SPI 444 IRQ_TYPE_EDGE_RISING>,
306					<GIC_SPI 445 IRQ_TYPE_EDGE_RISING>,
307					<GIC_SPI 446 IRQ_TYPE_EDGE_RISING>;
308			interrupt-controller;
309			#interrupt-cells = <2>;
310			ti,ngpio = <68>;
311			ti,davinci-gpio-unbanked = <0>;
312			clocks = <&k2g_clks 0x001c 0x0>;
313			clock-names = "gpio";
314		};
315
316		dss: dss@02540000 {
317			compatible = "ti,k2g-dss";
318			reg = <0x02540000 0x400>,
319				<0x02550000 0x1000>,
320				<0x02557000 0x1000>,
321				<0x0255a800 0x100>,
322				<0x0255ac00 0x100>;
323			reg-names = "cfg", "common", "vid1", "ovr1", "vp1";
324			clocks = <&k2g_clks 0x2 0>,
325					<&k2g_clks 0x2 1>;
326			clock-names = "fck", "vp1";
327			interrupts = <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>;
328
329			power-domains = <&k2g_pds 0x2>;
330			status = "disabled";
331			#address-cells = <1>;
332			#size-cells = <1>;
333			ranges;
334
335			max-memory-bandwidth = <230000000>;
336		};
337
338		edma0: edma@2700000 {
339			compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
340			reg = <0x02700000 0x8000>;
341			reg-names = "edma3_cc";
342			interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>,
343					<GIC_SPI 216 IRQ_TYPE_EDGE_RISING>,
344					<GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
345			interrupt-names = "edma3_ccint", "emda3_mperr",
346					  "edma3_ccerrint";
347			dma-requests = <64>;
348			#dma-cells = <2>;
349
350			ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
351
352			ti,edma-memcpy-channels = <32 33 34 35>;
353
354			power-domains = <&k2g_pds 0x3f>;
355		};
356
357		edma0_tptc0: tptc@2760000 {
358			compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
359			reg = <0x02760000 0x400>;
360			power-domains = <&k2g_pds 0x3f>;
361		};
362
363		edma0_tptc1: tptc@2768000 {
364			compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
365			reg = <0x02768000 0x400>;
366			power-domains = <&k2g_pds 0x3f>;
367		};
368
369		edma1: edma@2728000 {
370			compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
371			reg = <0x02728000 0x8000>;
372			reg-names = "edma3_cc";
373			interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
374					<GIC_SPI 219 IRQ_TYPE_EDGE_RISING>,
375					<GIC_SPI 220 IRQ_TYPE_EDGE_RISING>;
376			interrupt-names = "edma3_ccint", "emda3_mperr",
377					  "edma3_ccerrint";
378			dma-requests = <64>;
379			#dma-cells = <2>;
380
381			ti,tptcs = <&edma1_tptc0 7>, <&edma1_tptc1 0>;
382
383			/*
384			 * memcpy is disabled, can be enabled with:
385			 * ti,edma-memcpy-channels = <12 13 14 15>;
386			 * for example.
387			 */
388
389			power-domains = <&k2g_pds 0x4f>;
390		};
391
392		edma1_tptc0: tptc@27b0000 {
393			compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
394			reg = <0x027b0000 0x400>;
395			power-domains = <&k2g_pds 0x4f>;
396		};
397
398		edma1_tptc1: tptc@27b8000 {
399			compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
400			reg = <0x027b8000 0x400>;
401			power-domains = <&k2g_pds 0x4f>;
402		};
403
404		mmc0: mmc@23000000 {
405			compatible = "ti,k2g-sdhci";
406			reg = <0x23000000 0x400>;
407			interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
408			bus-width = <4>;
409			no-1-8-v;
410			max-frequency = <96000000>;
411			power-domains = <&k2g_pds 0xb>;
412			clocks = <&k2g_clks 0xb 1>, <&k2g_clks 0xb 2>;
413			clock-names = "fck", "mmchsdb_fck";
414			status = "disabled";
415		};
416
417		mmc1: mmc@23100000 {
418			compatible = "ti,k2g-sdhci";
419			reg = <0x23100000 0x400>;
420			interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
421			bus-width = <8>;
422			no-1-8-v;
423			non-removable;
424			max-frequency = <96000000>;
425			power-domains = <&k2g_pds 0xc>;
426			clocks = <&k2g_clks 0xc 1>, <&k2g_clks 0xc 2>;
427			clock-names = "fck", "mmchsdb_fck";
428		};
429
430		qspi: spi@2940000 {
431			compatible = "ti,k2g-qspi", "cdns,qspi-nor";
432			#address-cells = <1>;
433			#size-cells = <0>;
434			reg = <0x02940000 0x1000>,
435			      <0x24000000 0x4000000>;
436			interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
437			cdns,fifo-depth = <256>;
438			cdns,fifo-width = <4>;
439			cdns,trigger-address = <0x24000000>;
440			clocks = <&k2g_clks 0x43 0x0>;
441			power-domains = <&k2g_pds 0x43>;
442			status = "disabled";
443		};
444
445		mcasp0: mcasp@2340000 {
446			compatible = "ti,am33xx-mcasp-audio";
447			reg = <0x02340000 0x2000>,
448			      <0x21804000 0x1000>;
449			reg-names = "mpu","dat";
450			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
451				     <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
452			interrupt-names = "tx", "rx";
453			dmas = <&edma0 24 1>, <&edma0 25 1>;
454			dma-names = "tx", "rx";
455			power-domains = <&k2g_pds 0x4>;
456			clocks = <&k2g_clks 0x4 0>;
457			clock-names = "fck";
458			status = "disabled";
459		};
460
461		mcasp1: mcasp@2342000 {
462			compatible = "ti,am33xx-mcasp-audio";
463			reg = <0x02342000 0x2000>,
464			      <0x21804400 0x1000>;
465			reg-names = "mpu","dat";
466			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
467				     <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
468			interrupt-names = "tx", "rx";
469			dmas = <&edma1 48 1>, <&edma1 49 1>;
470			dma-names = "tx", "rx";
471			power-domains = <&k2g_pds 0x5>;
472			clocks = <&k2g_clks 0x5 0>;
473			clock-names = "fck";
474			status = "disabled";
475		};
476
477		mcasp2: mcasp@2344000 {
478			compatible = "ti,am33xx-mcasp-audio";
479			reg = <0x02344000 0x2000>,
480			      <0x21804800 0x1000>;
481			reg-names = "mpu","dat";
482			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
483				     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
484			interrupt-names = "tx", "rx";
485			dmas = <&edma1 50 1>, <&edma1 51 1>;
486			dma-names = "tx", "rx";
487			power-domains = <&k2g_pds 0x6>;
488			clocks = <&k2g_clks 0x6 0>;
489			clock-names = "fck";
490			status = "disabled";
491		};
492
493		keystone_usb0: keystone-dwc3@2680000 {
494			compatible = "ti,keystone-dwc3";
495			#address-cells = <1>;
496			#size-cells = <1>;
497			reg = <0x2680000 0x10000>;
498			interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>;
499			ranges;
500			dma-coherent;
501			dma-ranges;
502			status = "disabled";
503			power-domains = <&k2g_pds 0x0016>;
504
505			usb0: usb@2690000 {
506				compatible = "snps,dwc3";
507				reg = <0x2690000 0x10000>;
508				interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>;
509				maximum-speed = "high-speed";
510				dr_mode = "otg";
511				usb-phy = <&usb0_phy>;
512				status = "disabled";
513			};
514		};
515
516		keystone_usb1: keystone-dwc3@2580000 {
517			compatible = "ti,keystone-dwc3";
518			#address-cells = <1>;
519			#size-cells = <1>;
520			reg = <0x2580000 0x10000>;
521			interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>;
522			ranges;
523			dma-coherent;
524			dma-ranges;
525			status = "disabled";
526			power-domains = <&k2g_pds 0x0017>;
527
528			usb1: usb@2590000 {
529				compatible = "snps,dwc3";
530				reg = <0x2590000 0x10000>;
531				interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>;
532				maximum-speed = "high-speed";
533				dr_mode = "otg";
534				usb-phy = <&usb1_phy>;
535				status = "disabled";
536			};
537		};
538
539		ecap0: pwm@21d1800 {
540			compatible = "ti,k2g-ecap", "ti,am3352-ecap";
541			#pwm-cells = <3>;
542			reg = <0x021d1800 0x60>;
543			power-domains = <&k2g_pds 0x38>;
544			clocks = <&k2g_clks 0x38 0>;
545			clock-names = "fck";
546			status = "disabled";
547		};
548
549		ecap1: pwm@21d1c00 {
550			compatible = "ti,k2g-ecap", "ti,am3352-ecap";
551			#pwm-cells = <3>;
552			reg = <0x021d1c00 0x60>;
553			power-domains = <&k2g_pds 0x39>;
554			clocks = <&k2g_clks 0x39 0x0>;
555			clock-names = "fck";
556			status = "disabled";
557		};
558
559		spi0: spi@21805400 {
560			compatible = "ti,keystone-spi";
561			reg = <0x21805400 0x200>;
562			num-cs = <4>;
563			ti,davinci-spi-intr-line = <0>;
564			interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>;
565			#address-cells = <1>;
566			#size-cells = <0>;
567			power-domains = <&k2g_pds 0x0010>;
568			clocks = <&k2g_clks 0x0010 0>;
569		};
570
571		spi1: spi@21805800 {
572			compatible = "ti,keystone-spi";
573			reg = <0x21805800 0x200>;
574			num-cs = <4>;
575			ti,davinci-spi-intr-line = <0>;
576			interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>;
577			#address-cells = <1>;
578			#size-cells = <0>;
579			power-domains = <&k2g_pds 0x0011>;
580			clocks = <&k2g_clks 0x0011 0>;
581		};
582
583		spi2: spi@21805c00 {
584			compatible = "ti,keystone-spi";
585			reg = <0x21805c00 0x200>;
586			num-cs = <4>;
587			ti,davinci-spi-intr-line = <0>;
588			interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>;
589			#address-cells = <1>;
590			#size-cells = <0>;
591			power-domains = <&k2g_pds 0x0012>;
592			clocks = <&k2g_clks 0x0012 0>;
593		};
594
595		spi3: spi@21806000 {
596			compatible = "ti,keystone-spi";
597			reg = <0x21806000 0x200>;
598			num-cs = <4>;
599			ti,davinci-spi-intr-line = <0>;
600			interrupts = <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>;
601			#address-cells = <1>;
602			#size-cells = <0>;
603			power-domains = <&k2g_pds 0x0013>;
604			clocks = <&k2g_clks 0x0013 0>;
605		};
606
607		wdt: wdt@02250000 {
608			compatible = "ti,keystone-wdt", "ti,davinci-wdt";
609			reg = <0x02250000 0x80>;
610			power-domains = <&k2g_pds 0x22>;
611			clocks = <&k2g_clks 0x22 0>;
612		};
613
614		emif: emif@21010000 {
615			compatible = "ti,emif-keystone";
616			reg = <0x21010000 0x200>;
617			interrupts = <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>;
618		};
619
620		mdio: mdio@4200f00 {
621			compatible = "ti,keystone_mdio", "ti,davinci_mdio";
622			reg = <0x04200f00 0x100>;
623			#address-cells = <1>;
624			#size-cells = <0>;
625			clocks = <&k2g_clks 0x0018 3>;
626			clock-names = "fck";
627			power-domains = <&k2g_pds 0x0018>;
628			status = "disabled";
629			bus_freq = <2500000>;
630		};
631		#include "keystone-k2g-netcp.dtsi"
632	};
633};
634