1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Asus Armoury (WMI) attributes driver.
4 *
5 * This driver uses the fw_attributes class to expose various WMI functions
6 * that are present in many gaming and some non-gaming ASUS laptops.
7 *
8 * These typically don't fit anywhere else in the sysfs such as under LED class,
9 * hwmon or others, and are set in Windows using the ASUS Armoury Crate tool.
10 *
11 * Copyright(C) 2024 Luke Jones <luke@ljones.dev>
12 */
13
14 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
16 #include <linux/acpi.h>
17 #include <linux/array_size.h>
18 #include <linux/bitfield.h>
19 #include <linux/device.h>
20 #include <linux/dmi.h>
21 #include <linux/err.h>
22 #include <linux/errno.h>
23 #include <linux/fs.h>
24 #include <linux/kernel.h>
25 #include <linux/kmod.h>
26 #include <linux/kobject.h>
27 #include <linux/kstrtox.h>
28 #include <linux/module.h>
29 #include <linux/mutex.h>
30 #include <linux/pci.h>
31 #include <linux/platform_data/x86/asus-wmi.h>
32 #include <linux/printk.h>
33 #include <linux/power_supply.h>
34 #include <linux/sysfs.h>
35
36 #include "asus-armoury.h"
37 #include "firmware_attributes_class.h"
38
39 #define ASUS_NB_WMI_EVENT_GUID "0B3CBB35-E3C2-45ED-91C2-4C5A6D195D1C"
40
41 #define ASUS_MINI_LED_MODE_MASK GENMASK(1, 0)
42 /* Standard modes for devices with only on/off */
43 #define ASUS_MINI_LED_OFF 0x00
44 #define ASUS_MINI_LED_ON 0x01
45 /* Like "on" but the effect is more vibrant or brighter */
46 #define ASUS_MINI_LED_STRONG_MODE 0x02
47 /* New modes for devices with 3 mini-led mode types */
48 #define ASUS_MINI_LED_2024_WEAK 0x00
49 #define ASUS_MINI_LED_2024_STRONG 0x01
50 #define ASUS_MINI_LED_2024_OFF 0x02
51
52 /* Power tunable attribute name defines */
53 #define ATTR_PPT_PL1_SPL "ppt_pl1_spl"
54 #define ATTR_PPT_PL2_SPPT "ppt_pl2_sppt"
55 #define ATTR_PPT_PL3_FPPT "ppt_pl3_fppt"
56 #define ATTR_PPT_APU_SPPT "ppt_apu_sppt"
57 #define ATTR_PPT_PLATFORM_SPPT "ppt_platform_sppt"
58 #define ATTR_NV_DYNAMIC_BOOST "nv_dynamic_boost"
59 #define ATTR_NV_TEMP_TARGET "nv_temp_target"
60 #define ATTR_NV_BASE_TGP "nv_base_tgp"
61 #define ATTR_NV_TGP "nv_tgp"
62
63 #define ASUS_ROG_TUNABLE_DC 0
64 #define ASUS_ROG_TUNABLE_AC 1
65
66 struct rog_tunables {
67 const struct power_limits *power_limits;
68 u32 ppt_pl1_spl; // cpu
69 u32 ppt_pl2_sppt; // cpu
70 u32 ppt_pl3_fppt; // cpu
71 u32 ppt_apu_sppt; // plat
72 u32 ppt_platform_sppt; // plat
73
74 u32 nv_dynamic_boost;
75 u32 nv_temp_target;
76 u32 nv_tgp;
77 };
78
79 struct asus_armoury_priv {
80 struct device *fw_attr_dev;
81 struct kset *fw_attr_kset;
82
83 /*
84 * Mutex to protect eGPU activation/deactivation
85 * sequences and dGPU connection status:
86 * do not allow concurrent changes or changes
87 * before a reboot if dGPU got disabled.
88 */
89 struct mutex egpu_mutex;
90
91 /* Index 0 for DC, 1 for AC */
92 struct rog_tunables *rog_tunables[2];
93
94 u32 mini_led_dev_id;
95 u32 gpu_mux_dev_id;
96 };
97
98 static struct asus_armoury_priv asus_armoury = {
99 .egpu_mutex = __MUTEX_INITIALIZER(asus_armoury.egpu_mutex),
100 };
101
102 struct fw_attrs_group {
103 bool pending_reboot;
104 };
105
106 static struct fw_attrs_group fw_attrs = {
107 .pending_reboot = false,
108 };
109
110 struct asus_attr_group {
111 const struct attribute_group *attr_group;
112 u32 wmi_devid;
113 };
114
asus_set_reboot_and_signal_event(void)115 static void asus_set_reboot_and_signal_event(void)
116 {
117 fw_attrs.pending_reboot = true;
118 kobject_uevent(&asus_armoury.fw_attr_dev->kobj, KOBJ_CHANGE);
119 }
120
pending_reboot_show(struct kobject * kobj,struct kobj_attribute * attr,char * buf)121 static ssize_t pending_reboot_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf)
122 {
123 return sysfs_emit(buf, "%d\n", fw_attrs.pending_reboot);
124 }
125
126 static struct kobj_attribute pending_reboot = __ATTR_RO(pending_reboot);
127
asus_bios_requires_reboot(struct kobj_attribute * attr)128 static bool asus_bios_requires_reboot(struct kobj_attribute *attr)
129 {
130 return !strcmp(attr->attr.name, "gpu_mux_mode") ||
131 !strcmp(attr->attr.name, "panel_hd_mode");
132 }
133
134 /**
135 * armoury_has_devstate() - Check presence of the WMI function state.
136 *
137 * @dev_id: The WMI method ID to check for presence.
138 *
139 * Returns: true iif method is supported.
140 */
armoury_has_devstate(u32 dev_id)141 static bool armoury_has_devstate(u32 dev_id)
142 {
143 u32 retval;
144 int status;
145
146 status = asus_wmi_evaluate_method(ASUS_WMI_METHODID_DSTS, dev_id, 0, &retval);
147 pr_debug("%s called (0x%08x), retval: 0x%08x\n", __func__, dev_id, retval);
148
149 return status == 0 && (retval & ASUS_WMI_DSTS_PRESENCE_BIT);
150 }
151
152 /**
153 * armoury_get_devstate() - Get the WMI function state.
154 * @attr: NULL or the kobj_attribute associated to called WMI function.
155 * @dev_id: The WMI method ID to call.
156 * @retval:
157 * * non-NULL pointer to where to store the value returned from WMI
158 * * with the function presence bit cleared.
159 *
160 * Intended usage is from sysfs attribute checking associated WMI function.
161 *
162 * Returns:
163 * * %-ENODEV - method ID is unsupported.
164 * * %0 - successful and retval is filled.
165 * * %other - error from WMI call.
166 */
armoury_get_devstate(struct kobj_attribute * attr,u32 * retval,u32 dev_id)167 static int armoury_get_devstate(struct kobj_attribute *attr, u32 *retval, u32 dev_id)
168 {
169 int err;
170
171 err = asus_wmi_get_devstate_dsts(dev_id, retval);
172 if (err) {
173 if (attr)
174 pr_err("Failed to get %s: %d\n", attr->attr.name, err);
175 else
176 pr_err("Failed to get devstate for 0x%x: %d\n", dev_id, err);
177
178 return err;
179 }
180
181 /*
182 * asus_wmi_get_devstate_dsts will populate retval with WMI return, but
183 * the true value is expressed when ASUS_WMI_DSTS_PRESENCE_BIT is clear.
184 */
185 *retval &= ~ASUS_WMI_DSTS_PRESENCE_BIT;
186
187 return 0;
188 }
189
190 /**
191 * armoury_set_devstate() - Set the WMI function state.
192 * @attr: The kobj_attribute associated to called WMI function.
193 * @dev_id: The WMI method ID to call.
194 * @value: The new value to be set.
195 * @retval: Where to store the value returned from WMI or NULL.
196 *
197 * Intended usage is from sysfs attribute setting associated WMI function.
198 * Before calling the presence of the function should be checked.
199 *
200 * Every WMI write MUST go through this function to enforce safety checks.
201 *
202 * Results !1 is usually considered a fail by ASUS, but some WMI methods
203 * (like eGPU or CPU cores) do use > 1 to return a status code or similar:
204 * in these cases caller is interested in the actual return value
205 * and should perform relevant checks.
206 *
207 * Returns:
208 * * %-EINVAL - attempt to set a dangerous or unsupported value.
209 * * %-EIO - WMI function returned an error.
210 * * %0 - successful and retval is filled.
211 * * %other - error from WMI call.
212 */
armoury_set_devstate(struct kobj_attribute * attr,u32 value,u32 * retval,u32 dev_id)213 static int armoury_set_devstate(struct kobj_attribute *attr,
214 u32 value, u32 *retval, u32 dev_id)
215 {
216 u32 result;
217 int err;
218
219 /*
220 * Prevent developers from bricking devices or issuing dangerous
221 * commands that can be difficult or impossible to recover from.
222 */
223 switch (dev_id) {
224 case ASUS_WMI_DEVID_APU_MEM:
225 /*
226 * A hard reset might suffice to save the device,
227 * but there is no value in sending these commands.
228 */
229 if (value == 0x100 || value == 0x101) {
230 pr_err("Refusing to set APU memory to unsafe value: 0x%x\n", value);
231 return -EINVAL;
232 }
233 break;
234 default:
235 /* No problems are known for this dev_id */
236 break;
237 }
238
239 err = asus_wmi_set_devstate(dev_id, value, retval ? retval : &result);
240 if (err) {
241 if (attr)
242 pr_err("Failed to set %s: %d\n", attr->attr.name, err);
243 else
244 pr_err("Failed to set devstate for 0x%x: %d\n", dev_id, err);
245
246 return err;
247 }
248
249 /*
250 * If retval == NULL caller is uninterested in return value:
251 * perform the most common result check here.
252 */
253 if ((retval == NULL) && (result == 0)) {
254 pr_err("Failed to set %s: (result): 0x%x\n", attr->attr.name, result);
255 return -EIO;
256 }
257
258 return 0;
259 }
260
armoury_attr_enum_list(char * buf,size_t enum_values)261 static int armoury_attr_enum_list(char *buf, size_t enum_values)
262 {
263 size_t i;
264 int len = 0;
265
266 for (i = 0; i < enum_values; i++) {
267 if (i == 0)
268 len += sysfs_emit_at(buf, len, "%zu", i);
269 else
270 len += sysfs_emit_at(buf, len, ";%zu", i);
271 }
272 len += sysfs_emit_at(buf, len, "\n");
273
274 return len;
275 }
276
armoury_attr_uint_store(struct kobject * kobj,struct kobj_attribute * attr,const char * buf,size_t count,u32 min,u32 max,u32 * store_value,u32 wmi_dev)277 ssize_t armoury_attr_uint_store(struct kobject *kobj, struct kobj_attribute *attr,
278 const char *buf, size_t count, u32 min, u32 max,
279 u32 *store_value, u32 wmi_dev)
280 {
281 u32 value;
282 int err;
283
284 err = kstrtou32(buf, 10, &value);
285 if (err)
286 return err;
287
288 if (value < min || value > max)
289 return -EINVAL;
290
291 err = armoury_set_devstate(attr, value, NULL, wmi_dev);
292 if (err)
293 return err;
294
295 if (store_value != NULL)
296 *store_value = value;
297 sysfs_notify(kobj, NULL, attr->attr.name);
298
299 if (asus_bios_requires_reboot(attr))
300 asus_set_reboot_and_signal_event();
301
302 return count;
303 }
304
armoury_attr_uint_show(struct kobject * kobj,struct kobj_attribute * attr,char * buf,u32 wmi_dev)305 ssize_t armoury_attr_uint_show(struct kobject *kobj, struct kobj_attribute *attr,
306 char *buf, u32 wmi_dev)
307 {
308 u32 result;
309 int err;
310
311 err = armoury_get_devstate(attr, &result, wmi_dev);
312 if (err)
313 return err;
314
315 return sysfs_emit(buf, "%u\n", result);
316 }
317
enum_type_show(struct kobject * kobj,struct kobj_attribute * attr,char * buf)318 static ssize_t enum_type_show(struct kobject *kobj, struct kobj_attribute *attr,
319 char *buf)
320 {
321 return sysfs_emit(buf, "enumeration\n");
322 }
323
int_type_show(struct kobject * kobj,struct kobj_attribute * attr,char * buf)324 static ssize_t int_type_show(struct kobject *kobj, struct kobj_attribute *attr,
325 char *buf)
326 {
327 return sysfs_emit(buf, "integer\n");
328 }
329
330 /* Mini-LED mode **************************************************************/
331
332 /* Values map for mini-led modes on 2023 and earlier models. */
333 static u32 mini_led_mode1_map[] = {
334 [0] = ASUS_MINI_LED_OFF,
335 [1] = ASUS_MINI_LED_ON,
336 };
337
338 /* Values map for mini-led modes on 2024 and later models. */
339 static u32 mini_led_mode2_map[] = {
340 [0] = ASUS_MINI_LED_2024_OFF,
341 [1] = ASUS_MINI_LED_2024_WEAK,
342 [2] = ASUS_MINI_LED_2024_STRONG,
343 };
344
mini_led_mode_current_value_show(struct kobject * kobj,struct kobj_attribute * attr,char * buf)345 static ssize_t mini_led_mode_current_value_show(struct kobject *kobj,
346 struct kobj_attribute *attr, char *buf)
347 {
348 u32 *mini_led_mode_map;
349 size_t mini_led_mode_map_size;
350 u32 i, mode;
351 int err;
352
353 switch (asus_armoury.mini_led_dev_id) {
354 case ASUS_WMI_DEVID_MINI_LED_MODE:
355 mini_led_mode_map = mini_led_mode1_map;
356 mini_led_mode_map_size = ARRAY_SIZE(mini_led_mode1_map);
357 break;
358
359 case ASUS_WMI_DEVID_MINI_LED_MODE2:
360 mini_led_mode_map = mini_led_mode2_map;
361 mini_led_mode_map_size = ARRAY_SIZE(mini_led_mode2_map);
362 break;
363
364 default:
365 pr_err("Unrecognized mini-LED device: %u\n", asus_armoury.mini_led_dev_id);
366 return -ENODEV;
367 }
368
369 err = armoury_get_devstate(attr, &mode, asus_armoury.mini_led_dev_id);
370 if (err)
371 return err;
372
373 mode = FIELD_GET(ASUS_MINI_LED_MODE_MASK, mode);
374
375 for (i = 0; i < mini_led_mode_map_size; i++)
376 if (mode == mini_led_mode_map[i])
377 return sysfs_emit(buf, "%u\n", i);
378
379 pr_warn("Unrecognized mini-LED mode: %u", mode);
380 return -EINVAL;
381 }
382
mini_led_mode_current_value_store(struct kobject * kobj,struct kobj_attribute * attr,const char * buf,size_t count)383 static ssize_t mini_led_mode_current_value_store(struct kobject *kobj,
384 struct kobj_attribute *attr,
385 const char *buf, size_t count)
386 {
387 u32 *mini_led_mode_map;
388 size_t mini_led_mode_map_size;
389 char mapped_value[12];
390 u32 mode;
391 int err;
392
393 err = kstrtou32(buf, 10, &mode);
394 if (err)
395 return err;
396
397 switch (asus_armoury.mini_led_dev_id) {
398 case ASUS_WMI_DEVID_MINI_LED_MODE:
399 mini_led_mode_map = mini_led_mode1_map;
400 mini_led_mode_map_size = ARRAY_SIZE(mini_led_mode1_map);
401 break;
402
403 case ASUS_WMI_DEVID_MINI_LED_MODE2:
404 mini_led_mode_map = mini_led_mode2_map;
405 mini_led_mode_map_size = ARRAY_SIZE(mini_led_mode2_map);
406 break;
407
408 default:
409 pr_err("Unrecognized mini-LED devid: %u\n", asus_armoury.mini_led_dev_id);
410 return -EINVAL;
411 }
412
413 if (mode >= mini_led_mode_map_size) {
414 pr_warn("mini-LED mode unrecognized device: %u\n", mode);
415 return -ENODEV;
416 }
417
418 /*
419 * armoury_attr_uint_store() parses and sends the value from the
420 * passed buffer; hand it the mapped firmware value so the device
421 * receives the translated mode instead of the raw index.
422 */
423 snprintf(mapped_value, sizeof(mapped_value), "%u", mini_led_mode_map[mode]);
424
425 return armoury_attr_uint_store(kobj, attr, mapped_value, count, 0,
426 mini_led_mode_map[mode], NULL,
427 asus_armoury.mini_led_dev_id);
428 }
429
mini_led_mode_possible_values_show(struct kobject * kobj,struct kobj_attribute * attr,char * buf)430 static ssize_t mini_led_mode_possible_values_show(struct kobject *kobj,
431 struct kobj_attribute *attr, char *buf)
432 {
433 switch (asus_armoury.mini_led_dev_id) {
434 case ASUS_WMI_DEVID_MINI_LED_MODE:
435 return armoury_attr_enum_list(buf, ARRAY_SIZE(mini_led_mode1_map));
436 case ASUS_WMI_DEVID_MINI_LED_MODE2:
437 return armoury_attr_enum_list(buf, ARRAY_SIZE(mini_led_mode2_map));
438 default:
439 return -ENODEV;
440 }
441 }
442 ASUS_ATTR_GROUP_ENUM(mini_led_mode, "mini_led_mode", "Set the mini-LED backlight mode");
443
gpu_mux_mode_current_value_store(struct kobject * kobj,struct kobj_attribute * attr,const char * buf,size_t count)444 static ssize_t gpu_mux_mode_current_value_store(struct kobject *kobj,
445 struct kobj_attribute *attr,
446 const char *buf, size_t count)
447 {
448 int result, err;
449 bool optimus;
450
451 err = kstrtobool(buf, &optimus);
452 if (err)
453 return err;
454
455 if (armoury_has_devstate(ASUS_WMI_DEVID_DGPU)) {
456 err = armoury_get_devstate(NULL, &result, ASUS_WMI_DEVID_DGPU);
457 if (err)
458 return err;
459 if (result && !optimus) {
460 pr_warn("Cannot switch MUX to dGPU mode when dGPU is disabled: %02X\n",
461 result);
462 return -ENODEV;
463 }
464 }
465
466 if (armoury_has_devstate(ASUS_WMI_DEVID_EGPU)) {
467 err = armoury_get_devstate(NULL, &result, ASUS_WMI_DEVID_EGPU);
468 if (err)
469 return err;
470 if (result && !optimus) {
471 pr_warn("Cannot switch MUX to dGPU mode when eGPU is enabled\n");
472 return -EBUSY;
473 }
474 }
475
476 err = armoury_set_devstate(attr, optimus ? 1 : 0, NULL, asus_armoury.gpu_mux_dev_id);
477 if (err)
478 return err;
479
480 sysfs_notify(kobj, NULL, attr->attr.name);
481 asus_set_reboot_and_signal_event();
482
483 return count;
484 }
485 ASUS_WMI_SHOW_INT(gpu_mux_mode_current_value, asus_armoury.gpu_mux_dev_id);
486 ASUS_ATTR_GROUP_BOOL(gpu_mux_mode, "gpu_mux_mode", "Set the GPU display MUX mode");
487
dgpu_disable_current_value_store(struct kobject * kobj,struct kobj_attribute * attr,const char * buf,size_t count)488 static ssize_t dgpu_disable_current_value_store(struct kobject *kobj,
489 struct kobj_attribute *attr, const char *buf,
490 size_t count)
491 {
492 int result, err;
493 bool disable;
494
495 err = kstrtobool(buf, &disable);
496 if (err)
497 return err;
498
499 if (asus_armoury.gpu_mux_dev_id) {
500 err = armoury_get_devstate(NULL, &result, asus_armoury.gpu_mux_dev_id);
501 if (err)
502 return err;
503 if (!result && disable) {
504 pr_warn("Cannot disable dGPU when the MUX is in dGPU mode\n");
505 return -EBUSY;
506 }
507 }
508
509 scoped_guard(mutex, &asus_armoury.egpu_mutex) {
510 err = armoury_set_devstate(attr, disable ? 1 : 0, NULL, ASUS_WMI_DEVID_DGPU);
511 if (err)
512 return err;
513 }
514
515 sysfs_notify(kobj, NULL, attr->attr.name);
516
517 return count;
518 }
519 ASUS_WMI_SHOW_INT(dgpu_disable_current_value, ASUS_WMI_DEVID_DGPU);
520 ASUS_ATTR_GROUP_BOOL(dgpu_disable, "dgpu_disable", "Disable the dGPU");
521
522 /* Values map for eGPU activation requests. */
523 static u32 egpu_status_map[] = {
524 [0] = 0x00000000U,
525 [1] = 0x00000001U,
526 [2] = 0x00000101U,
527 [3] = 0x00000201U,
528 };
529
530 /*
531 * armoury_pci_rescan() - Performs a PCI rescan
532 *
533 * Bring up any GPU that has been hotplugged in the system.
534 */
armoury_pci_rescan(void)535 static void armoury_pci_rescan(void)
536 {
537 struct pci_bus *b = NULL;
538
539 pci_lock_rescan_remove();
540 while ((b = pci_find_next_bus(b)) != NULL)
541 pci_rescan_bus(b);
542 pci_unlock_rescan_remove();
543 }
544
545 /*
546 * The ACPI call to enable the eGPU might also disable the internal dGPU,
547 * but this is not always the case and on certain models enabling the eGPU
548 * when the dGPU is either still active or has been disabled without rebooting
549 * will make both GPUs malfunction and the kernel will detect many
550 * PCI AER unrecoverable errors.
551 */
egpu_enable_current_value_store(struct kobject * kobj,struct kobj_attribute * attr,const char * buf,size_t count)552 static ssize_t egpu_enable_current_value_store(struct kobject *kobj, struct kobj_attribute *attr,
553 const char *buf, size_t count)
554 {
555 int err;
556 u32 requested, enable, result;
557
558 err = kstrtou32(buf, 10, &requested);
559 if (err)
560 return err;
561
562 if (requested >= ARRAY_SIZE(egpu_status_map))
563 return -EINVAL;
564 enable = egpu_status_map[requested];
565
566 scoped_guard(mutex, &asus_armoury.egpu_mutex) {
567 /* Ensure the eGPU is connected before attempting to activate it. */
568 if (enable) {
569 err = armoury_get_devstate(NULL, &result, ASUS_WMI_DEVID_EGPU_CONNECTED);
570 if (err) {
571 pr_warn("Failed to get eGPU connection status: %d\n", err);
572 return err;
573 }
574 if (!result) {
575 pr_warn("Cannot activate eGPU while undetected\n");
576 return -ENOENT;
577 }
578 }
579
580 if (asus_armoury.gpu_mux_dev_id) {
581 err = armoury_get_devstate(NULL, &result, asus_armoury.gpu_mux_dev_id);
582 if (err)
583 return err;
584
585 if (!result && enable) {
586 pr_warn("Cannot enable eGPU when the MUX is in dGPU mode\n");
587 return -ENODEV;
588 }
589 }
590
591 err = armoury_set_devstate(attr, enable, &result, ASUS_WMI_DEVID_EGPU);
592 if (err) {
593 pr_err("Failed to set %s: %d\n", attr->attr.name, err);
594 return err;
595 }
596
597 /*
598 * ACPI returns value 0x01 on success and 0x02 on a partial activation:
599 * performing a pci rescan will bring up the device in pci-e 3.0 speed,
600 * after a reboot the device will work at full speed.
601 */
602 switch (result) {
603 case 0x01:
604 /*
605 * When a GPU is in use it does not get disconnected even if
606 * the ACPI call returns a success.
607 */
608 if (!enable) {
609 err = armoury_get_devstate(attr, &result, ASUS_WMI_DEVID_EGPU);
610 if (err) {
611 pr_warn("Failed to ensure eGPU is deactivated: %d\n", err);
612 return err;
613 }
614
615 if (result != 0)
616 return -EBUSY;
617 }
618
619 pr_debug("Success changing the eGPU status\n");
620 break;
621 case 0x02:
622 pr_info("Success changing the eGPU status, a reboot is strongly advised\n");
623 asus_set_reboot_and_signal_event();
624 break;
625 default:
626 pr_err("Failed to change the eGPU status: wmi result is 0x%x\n", result);
627 return -EIO;
628 }
629 }
630
631 /*
632 * Perform a PCI rescan: on every tested model this is necessary
633 * to make the eGPU visible on the bus without rebooting.
634 */
635 armoury_pci_rescan();
636
637 sysfs_notify(kobj, NULL, attr->attr.name);
638
639 return count;
640 }
641
egpu_enable_current_value_show(struct kobject * kobj,struct kobj_attribute * attr,char * buf)642 static ssize_t egpu_enable_current_value_show(struct kobject *kobj, struct kobj_attribute *attr,
643 char *buf)
644 {
645 int i, err;
646 u32 status;
647
648 scoped_guard(mutex, &asus_armoury.egpu_mutex) {
649 err = armoury_get_devstate(attr, &status, ASUS_WMI_DEVID_EGPU);
650 if (err)
651 return err;
652 }
653
654 for (i = 0; i < ARRAY_SIZE(egpu_status_map); i++) {
655 if (egpu_status_map[i] == status)
656 return sysfs_emit(buf, "%u\n", i);
657 }
658
659 return -EIO;
660 }
661
egpu_enable_possible_values_show(struct kobject * kobj,struct kobj_attribute * attr,char * buf)662 static ssize_t egpu_enable_possible_values_show(struct kobject *kobj, struct kobj_attribute *attr,
663 char *buf)
664 {
665 return armoury_attr_enum_list(buf, ARRAY_SIZE(egpu_status_map));
666 }
667 ASUS_ATTR_GROUP_ENUM(egpu_enable, "egpu_enable", "Enable the eGPU (also disables dGPU)");
668
669 /* Device memory available to APU */
670
671 /*
672 * Values map for APU reserved memory (index + 1 number of GB).
673 * Some looks out of order, but are actually correct.
674 */
675 static u32 apu_mem_map[] = {
676 [0] = 0x000, /* called "AUTO" on the BIOS, is the minimum available */
677 [1] = 0x102,
678 [2] = 0x103,
679 [3] = 0x104,
680 [4] = 0x105,
681 [5] = 0x107,
682 [6] = 0x108,
683 [7] = 0x109,
684 [8] = 0x106,
685 };
686
apu_mem_current_value_show(struct kobject * kobj,struct kobj_attribute * attr,char * buf)687 static ssize_t apu_mem_current_value_show(struct kobject *kobj, struct kobj_attribute *attr,
688 char *buf)
689 {
690 int err;
691 u32 mem;
692
693 err = armoury_get_devstate(attr, &mem, ASUS_WMI_DEVID_APU_MEM);
694 if (err)
695 return err;
696
697 /* After 0x000 is set, a read will return 0x100 */
698 if (mem == 0x100)
699 return sysfs_emit(buf, "0\n");
700
701 for (unsigned int i = 0; i < ARRAY_SIZE(apu_mem_map); i++) {
702 if (apu_mem_map[i] == mem)
703 return sysfs_emit(buf, "%u\n", i);
704 }
705
706 pr_warn("Unrecognised value for APU mem 0x%08x\n", mem);
707 return -EIO;
708 }
709
apu_mem_current_value_store(struct kobject * kobj,struct kobj_attribute * attr,const char * buf,size_t count)710 static ssize_t apu_mem_current_value_store(struct kobject *kobj, struct kobj_attribute *attr,
711 const char *buf, size_t count)
712 {
713 int result, err;
714 u32 requested, mem;
715
716 result = kstrtou32(buf, 10, &requested);
717 if (result)
718 return result;
719
720 if (requested >= ARRAY_SIZE(apu_mem_map))
721 return -EINVAL;
722 mem = apu_mem_map[requested];
723
724 err = armoury_set_devstate(attr, mem, NULL, ASUS_WMI_DEVID_APU_MEM);
725 if (err) {
726 pr_warn("Failed to set apu_mem 0x%x: %d\n", mem, err);
727 return err;
728 }
729
730 pr_info("APU memory changed to %uGB, reboot required\n", requested + 1);
731 sysfs_notify(kobj, NULL, attr->attr.name);
732
733 asus_set_reboot_and_signal_event();
734
735 return count;
736 }
737
apu_mem_possible_values_show(struct kobject * kobj,struct kobj_attribute * attr,char * buf)738 static ssize_t apu_mem_possible_values_show(struct kobject *kobj, struct kobj_attribute *attr,
739 char *buf)
740 {
741 return armoury_attr_enum_list(buf, ARRAY_SIZE(apu_mem_map));
742 }
743 ASUS_ATTR_GROUP_ENUM(apu_mem, "apu_mem", "Set available system RAM (in GB) for the APU to use");
744
745 /* Define helper to access the current power mode tunable values */
get_current_tunables(void)746 static inline struct rog_tunables *get_current_tunables(void)
747 {
748 if (power_supply_is_system_supplied())
749 return asus_armoury.rog_tunables[ASUS_ROG_TUNABLE_AC];
750
751 return asus_armoury.rog_tunables[ASUS_ROG_TUNABLE_DC];
752 }
753
754 /* Simple attribute creation */
755 ASUS_ATTR_GROUP_ENUM_INT_RO(charge_mode, "charge_mode", ASUS_WMI_DEVID_CHARGE_MODE, "0;1;2\n",
756 "Show the current mode of charging");
757 ASUS_ATTR_GROUP_BOOL_RW(boot_sound, "boot_sound", ASUS_WMI_DEVID_BOOT_SOUND,
758 "Set the boot POST sound");
759 ASUS_ATTR_GROUP_BOOL_RW(mcu_powersave, "mcu_powersave", ASUS_WMI_DEVID_MCU_POWERSAVE,
760 "Set MCU powersaving mode");
761 ASUS_ATTR_GROUP_BOOL_RW(panel_od, "panel_overdrive", ASUS_WMI_DEVID_PANEL_OD,
762 "Set the panel refresh overdrive");
763 ASUS_ATTR_GROUP_BOOL_RW(panel_hd_mode, "panel_hd_mode", ASUS_WMI_DEVID_PANEL_HD,
764 "Set the panel HD mode to UHD<0> or FHD<1>");
765 ASUS_ATTR_GROUP_BOOL_RW(screen_auto_brightness, "screen_auto_brightness",
766 ASUS_WMI_DEVID_SCREEN_AUTO_BRIGHTNESS,
767 "Set the panel brightness to Off<0> or On<1>");
768 ASUS_ATTR_GROUP_BOOL_RO(egpu_connected, "egpu_connected", ASUS_WMI_DEVID_EGPU_CONNECTED,
769 "Show the eGPU connection status");
770 ASUS_ATTR_GROUP_ROG_TUNABLE(ppt_pl1_spl, ATTR_PPT_PL1_SPL, ASUS_WMI_DEVID_PPT_PL1_SPL,
771 "Set the CPU slow package limit");
772 ASUS_ATTR_GROUP_ROG_TUNABLE(ppt_pl2_sppt, ATTR_PPT_PL2_SPPT, ASUS_WMI_DEVID_PPT_PL2_SPPT,
773 "Set the CPU fast package limit");
774 ASUS_ATTR_GROUP_ROG_TUNABLE(ppt_pl3_fppt, ATTR_PPT_PL3_FPPT, ASUS_WMI_DEVID_PPT_PL3_FPPT,
775 "Set the CPU fastest package limit");
776 ASUS_ATTR_GROUP_ROG_TUNABLE(ppt_apu_sppt, ATTR_PPT_APU_SPPT, ASUS_WMI_DEVID_PPT_APU_SPPT,
777 "Set the APU package limit");
778 ASUS_ATTR_GROUP_ROG_TUNABLE(ppt_platform_sppt, ATTR_PPT_PLATFORM_SPPT, ASUS_WMI_DEVID_PPT_PLAT_SPPT,
779 "Set the platform package limit");
780 ASUS_ATTR_GROUP_ROG_TUNABLE(nv_dynamic_boost, ATTR_NV_DYNAMIC_BOOST, ASUS_WMI_DEVID_NV_DYN_BOOST,
781 "Set the Nvidia dynamic boost limit");
782 ASUS_ATTR_GROUP_ROG_TUNABLE(nv_temp_target, ATTR_NV_TEMP_TARGET, ASUS_WMI_DEVID_NV_THERM_TARGET,
783 "Set the Nvidia max thermal limit");
784 ASUS_ATTR_GROUP_ROG_TUNABLE(nv_tgp, "nv_tgp", ASUS_WMI_DEVID_DGPU_SET_TGP,
785 "Set the additional TGP on top of the base TGP");
786 ASUS_ATTR_GROUP_INT_VALUE_ONLY_RO(nv_base_tgp, ATTR_NV_BASE_TGP, ASUS_WMI_DEVID_DGPU_BASE_TGP,
787 "Read the base TGP value");
788
789 /* If an attribute does not require any special case handling add it here */
790 static const struct asus_attr_group armoury_attr_groups[] = {
791 { &egpu_connected_attr_group, ASUS_WMI_DEVID_EGPU_CONNECTED },
792 { &egpu_enable_attr_group, ASUS_WMI_DEVID_EGPU },
793 { &dgpu_disable_attr_group, ASUS_WMI_DEVID_DGPU },
794 { &apu_mem_attr_group, ASUS_WMI_DEVID_APU_MEM },
795
796 { &ppt_pl1_spl_attr_group, ASUS_WMI_DEVID_PPT_PL1_SPL },
797 { &ppt_pl2_sppt_attr_group, ASUS_WMI_DEVID_PPT_PL2_SPPT },
798 { &ppt_pl3_fppt_attr_group, ASUS_WMI_DEVID_PPT_PL3_FPPT },
799 { &ppt_apu_sppt_attr_group, ASUS_WMI_DEVID_PPT_APU_SPPT },
800 { &ppt_platform_sppt_attr_group, ASUS_WMI_DEVID_PPT_PLAT_SPPT },
801 { &nv_dynamic_boost_attr_group, ASUS_WMI_DEVID_NV_DYN_BOOST },
802 { &nv_temp_target_attr_group, ASUS_WMI_DEVID_NV_THERM_TARGET },
803 { &nv_base_tgp_attr_group, ASUS_WMI_DEVID_DGPU_BASE_TGP },
804 { &nv_tgp_attr_group, ASUS_WMI_DEVID_DGPU_SET_TGP },
805
806 { &charge_mode_attr_group, ASUS_WMI_DEVID_CHARGE_MODE },
807 { &boot_sound_attr_group, ASUS_WMI_DEVID_BOOT_SOUND },
808 { &mcu_powersave_attr_group, ASUS_WMI_DEVID_MCU_POWERSAVE },
809 { &panel_od_attr_group, ASUS_WMI_DEVID_PANEL_OD },
810 { &panel_hd_mode_attr_group, ASUS_WMI_DEVID_PANEL_HD },
811 { &screen_auto_brightness_attr_group, ASUS_WMI_DEVID_SCREEN_AUTO_BRIGHTNESS },
812 };
813
814 /**
815 * is_power_tunable_attr - Determines if an attribute is a power-related tunable
816 * @name: The name of the attribute to check
817 *
818 * This function checks if the given attribute name is related to power tuning.
819 *
820 * Return: true if the attribute is a power-related tunable, false otherwise
821 */
is_power_tunable_attr(const char * name)822 static bool is_power_tunable_attr(const char *name)
823 {
824 static const char * const power_tunable_attrs[] = {
825 ATTR_PPT_PL1_SPL, ATTR_PPT_PL2_SPPT,
826 ATTR_PPT_PL3_FPPT, ATTR_PPT_APU_SPPT,
827 ATTR_PPT_PLATFORM_SPPT, ATTR_NV_DYNAMIC_BOOST,
828 ATTR_NV_TEMP_TARGET, ATTR_NV_BASE_TGP,
829 ATTR_NV_TGP
830 };
831
832 for (unsigned int i = 0; i < ARRAY_SIZE(power_tunable_attrs); i++) {
833 if (!strcmp(name, power_tunable_attrs[i]))
834 return true;
835 }
836
837 return false;
838 }
839
840 /**
841 * has_valid_limit - Checks if a power-related attribute has a valid limit value
842 * @name: The name of the attribute to check
843 * @limits: Pointer to the power_limits structure containing limit values
844 *
845 * This function checks if a power-related attribute has a valid limit value.
846 * It returns false if limits is NULL or if the corresponding limit value is zero.
847 *
848 * Return: true if the attribute has a valid limit value, false otherwise
849 */
has_valid_limit(const char * name,const struct power_limits * limits)850 static bool has_valid_limit(const char *name, const struct power_limits *limits)
851 {
852 u32 limit_value = 0;
853
854 if (!limits)
855 return false;
856
857 if (!strcmp(name, ATTR_PPT_PL1_SPL))
858 limit_value = limits->ppt_pl1_spl_max;
859 else if (!strcmp(name, ATTR_PPT_PL2_SPPT))
860 limit_value = limits->ppt_pl2_sppt_max;
861 else if (!strcmp(name, ATTR_PPT_PL3_FPPT))
862 limit_value = limits->ppt_pl3_fppt_max;
863 else if (!strcmp(name, ATTR_PPT_APU_SPPT))
864 limit_value = limits->ppt_apu_sppt_max;
865 else if (!strcmp(name, ATTR_PPT_PLATFORM_SPPT))
866 limit_value = limits->ppt_platform_sppt_max;
867 else if (!strcmp(name, ATTR_NV_DYNAMIC_BOOST))
868 limit_value = limits->nv_dynamic_boost_max;
869 else if (!strcmp(name, ATTR_NV_TEMP_TARGET))
870 limit_value = limits->nv_temp_target_max;
871 else if (!strcmp(name, ATTR_NV_BASE_TGP) ||
872 !strcmp(name, ATTR_NV_TGP))
873 limit_value = limits->nv_tgp_max;
874
875 return limit_value > 0;
876 }
877
asus_fw_attr_add(void)878 static int asus_fw_attr_add(void)
879 {
880 const struct rog_tunables *const ac_rog_tunables =
881 asus_armoury.rog_tunables[ASUS_ROG_TUNABLE_AC];
882 const struct power_limits *limits;
883 bool should_create;
884 const char *name;
885 int err, i;
886
887 asus_armoury.fw_attr_dev = device_create(&firmware_attributes_class, NULL, MKDEV(0, 0),
888 NULL, "%s", DRIVER_NAME);
889 if (IS_ERR(asus_armoury.fw_attr_dev)) {
890 err = PTR_ERR(asus_armoury.fw_attr_dev);
891 goto fail_class_get;
892 }
893
894 asus_armoury.fw_attr_kset = kset_create_and_add("attributes", NULL,
895 &asus_armoury.fw_attr_dev->kobj);
896 if (!asus_armoury.fw_attr_kset) {
897 err = -ENOMEM;
898 goto err_destroy_classdev;
899 }
900
901 err = sysfs_create_file(&asus_armoury.fw_attr_kset->kobj, &pending_reboot.attr);
902 if (err) {
903 pr_err("Failed to create sysfs level attributes\n");
904 goto err_destroy_kset;
905 }
906
907 asus_armoury.mini_led_dev_id = 0;
908 if (armoury_has_devstate(ASUS_WMI_DEVID_MINI_LED_MODE))
909 asus_armoury.mini_led_dev_id = ASUS_WMI_DEVID_MINI_LED_MODE;
910 else if (armoury_has_devstate(ASUS_WMI_DEVID_MINI_LED_MODE2))
911 asus_armoury.mini_led_dev_id = ASUS_WMI_DEVID_MINI_LED_MODE2;
912
913 if (asus_armoury.mini_led_dev_id) {
914 err = sysfs_create_group(&asus_armoury.fw_attr_kset->kobj,
915 &mini_led_mode_attr_group);
916 if (err) {
917 pr_err("Failed to create sysfs-group for mini_led\n");
918 goto err_remove_file;
919 }
920 }
921
922 asus_armoury.gpu_mux_dev_id = 0;
923 if (armoury_has_devstate(ASUS_WMI_DEVID_GPU_MUX))
924 asus_armoury.gpu_mux_dev_id = ASUS_WMI_DEVID_GPU_MUX;
925 else if (armoury_has_devstate(ASUS_WMI_DEVID_GPU_MUX_VIVO))
926 asus_armoury.gpu_mux_dev_id = ASUS_WMI_DEVID_GPU_MUX_VIVO;
927
928 if (asus_armoury.gpu_mux_dev_id) {
929 err = sysfs_create_group(&asus_armoury.fw_attr_kset->kobj,
930 &gpu_mux_mode_attr_group);
931 if (err) {
932 pr_err("Failed to create sysfs-group for gpu_mux\n");
933 goto err_remove_mini_led_group;
934 }
935 }
936
937 for (i = 0; i < ARRAY_SIZE(armoury_attr_groups); i++) {
938 if (!armoury_has_devstate(armoury_attr_groups[i].wmi_devid))
939 continue;
940
941 /* Always create by default, unless PPT is not present */
942 should_create = true;
943 name = armoury_attr_groups[i].attr_group->name;
944
945 /* Check if this is a power-related tunable requiring limits */
946 if (ac_rog_tunables && ac_rog_tunables->power_limits &&
947 is_power_tunable_attr(name)) {
948 limits = ac_rog_tunables->power_limits;
949 /* Check only AC: if not present then DC won't be either */
950 should_create = has_valid_limit(name, limits);
951 if (!should_create)
952 pr_debug("Missing max value for tunable %s\n", name);
953 }
954
955 if (should_create) {
956 err = sysfs_create_group(&asus_armoury.fw_attr_kset->kobj,
957 armoury_attr_groups[i].attr_group);
958 if (err) {
959 pr_err("Failed to create sysfs-group for %s\n",
960 armoury_attr_groups[i].attr_group->name);
961 goto err_remove_groups;
962 }
963 }
964 }
965
966 return 0;
967
968 err_remove_groups:
969 while (i--) {
970 if (armoury_has_devstate(armoury_attr_groups[i].wmi_devid))
971 sysfs_remove_group(&asus_armoury.fw_attr_kset->kobj,
972 armoury_attr_groups[i].attr_group);
973 }
974 if (asus_armoury.gpu_mux_dev_id)
975 sysfs_remove_group(&asus_armoury.fw_attr_kset->kobj, &gpu_mux_mode_attr_group);
976 err_remove_mini_led_group:
977 if (asus_armoury.mini_led_dev_id)
978 sysfs_remove_group(&asus_armoury.fw_attr_kset->kobj, &mini_led_mode_attr_group);
979 err_remove_file:
980 sysfs_remove_file(&asus_armoury.fw_attr_kset->kobj, &pending_reboot.attr);
981 err_destroy_kset:
982 kset_unregister(asus_armoury.fw_attr_kset);
983 err_destroy_classdev:
984 fail_class_get:
985 device_destroy(&firmware_attributes_class, MKDEV(0, 0));
986 return err;
987 }
988
989 /* Init / exit ****************************************************************/
990
991 /* Set up the min/max and defaults for ROG tunables */
init_rog_tunables(void)992 static void init_rog_tunables(void)
993 {
994 const struct power_limits *ac_limits, *dc_limits;
995 struct rog_tunables *ac_rog_tunables = NULL, *dc_rog_tunables = NULL;
996 const struct power_data *power_data;
997 const struct dmi_system_id *dmi_id;
998
999 /* Match the system against the power_limits table */
1000 dmi_id = dmi_first_match(power_limits);
1001 if (!dmi_id) {
1002 pr_warn("No matching power limits found for this system\n");
1003 return;
1004 }
1005
1006 /* Get the power data for this system */
1007 power_data = dmi_id->driver_data;
1008 if (!power_data) {
1009 pr_info("No power data available for this system\n");
1010 return;
1011 }
1012
1013 /* Initialize AC power tunables */
1014 ac_limits = power_data->ac_data;
1015 if (ac_limits) {
1016 ac_rog_tunables = kzalloc_obj(*asus_armoury.rog_tunables[ASUS_ROG_TUNABLE_AC]);
1017 if (!ac_rog_tunables)
1018 goto err_nomem;
1019
1020 asus_armoury.rog_tunables[ASUS_ROG_TUNABLE_AC] = ac_rog_tunables;
1021 ac_rog_tunables->power_limits = ac_limits;
1022
1023 /* Set initial AC values */
1024 ac_rog_tunables->ppt_pl1_spl =
1025 ac_limits->ppt_pl1_spl_def ?
1026 ac_limits->ppt_pl1_spl_def :
1027 ac_limits->ppt_pl1_spl_max;
1028
1029 ac_rog_tunables->ppt_pl2_sppt =
1030 ac_limits->ppt_pl2_sppt_def ?
1031 ac_limits->ppt_pl2_sppt_def :
1032 ac_limits->ppt_pl2_sppt_max;
1033
1034 ac_rog_tunables->ppt_pl3_fppt =
1035 ac_limits->ppt_pl3_fppt_def ?
1036 ac_limits->ppt_pl3_fppt_def :
1037 ac_limits->ppt_pl3_fppt_max;
1038
1039 ac_rog_tunables->ppt_apu_sppt =
1040 ac_limits->ppt_apu_sppt_def ?
1041 ac_limits->ppt_apu_sppt_def :
1042 ac_limits->ppt_apu_sppt_max;
1043
1044 ac_rog_tunables->ppt_platform_sppt =
1045 ac_limits->ppt_platform_sppt_def ?
1046 ac_limits->ppt_platform_sppt_def :
1047 ac_limits->ppt_platform_sppt_max;
1048
1049 ac_rog_tunables->nv_dynamic_boost =
1050 ac_limits->nv_dynamic_boost_max;
1051 ac_rog_tunables->nv_temp_target =
1052 ac_limits->nv_temp_target_max;
1053 ac_rog_tunables->nv_tgp = ac_limits->nv_tgp_max;
1054
1055 pr_debug("AC power limits initialized for %s\n", dmi_id->matches[0].substr);
1056 } else {
1057 pr_debug("No AC PPT limits defined\n");
1058 }
1059
1060 /* Initialize DC power tunables */
1061 dc_limits = power_data->dc_data;
1062 if (dc_limits) {
1063 dc_rog_tunables = kzalloc_obj(*asus_armoury.rog_tunables[ASUS_ROG_TUNABLE_DC]);
1064 if (!dc_rog_tunables) {
1065 kfree(ac_rog_tunables);
1066 goto err_nomem;
1067 }
1068
1069 asus_armoury.rog_tunables[ASUS_ROG_TUNABLE_DC] = dc_rog_tunables;
1070 dc_rog_tunables->power_limits = dc_limits;
1071
1072 /* Set initial DC values */
1073 dc_rog_tunables->ppt_pl1_spl =
1074 dc_limits->ppt_pl1_spl_def ?
1075 dc_limits->ppt_pl1_spl_def :
1076 dc_limits->ppt_pl1_spl_max;
1077
1078 dc_rog_tunables->ppt_pl2_sppt =
1079 dc_limits->ppt_pl2_sppt_def ?
1080 dc_limits->ppt_pl2_sppt_def :
1081 dc_limits->ppt_pl2_sppt_max;
1082
1083 dc_rog_tunables->ppt_pl3_fppt =
1084 dc_limits->ppt_pl3_fppt_def ?
1085 dc_limits->ppt_pl3_fppt_def :
1086 dc_limits->ppt_pl3_fppt_max;
1087
1088 dc_rog_tunables->ppt_apu_sppt =
1089 dc_limits->ppt_apu_sppt_def ?
1090 dc_limits->ppt_apu_sppt_def :
1091 dc_limits->ppt_apu_sppt_max;
1092
1093 dc_rog_tunables->ppt_platform_sppt =
1094 dc_limits->ppt_platform_sppt_def ?
1095 dc_limits->ppt_platform_sppt_def :
1096 dc_limits->ppt_platform_sppt_max;
1097
1098 dc_rog_tunables->nv_dynamic_boost =
1099 dc_limits->nv_dynamic_boost_max;
1100 dc_rog_tunables->nv_temp_target =
1101 dc_limits->nv_temp_target_max;
1102 dc_rog_tunables->nv_tgp = dc_limits->nv_tgp_max;
1103
1104 pr_debug("DC power limits initialized for %s\n", dmi_id->matches[0].substr);
1105 } else {
1106 pr_debug("No DC PPT limits defined\n");
1107 }
1108
1109 return;
1110
1111 err_nomem:
1112 pr_err("Failed to allocate memory for tunables\n");
1113 }
1114
asus_fw_init(void)1115 static int __init asus_fw_init(void)
1116 {
1117 char *wmi_uid;
1118
1119 wmi_uid = wmi_get_acpi_device_uid(ASUS_WMI_MGMT_GUID);
1120 if (!wmi_uid)
1121 return -ENODEV;
1122
1123 /*
1124 * if equal to "ASUSWMI" then it's DCTS that can't be used for this
1125 * driver, DSTS is required.
1126 */
1127 if (!strcmp(wmi_uid, ASUS_ACPI_UID_ASUSWMI))
1128 return -ENODEV;
1129
1130 init_rog_tunables();
1131
1132 /* Must always be last step to ensure data is available */
1133 return asus_fw_attr_add();
1134 }
1135
asus_fw_exit(void)1136 static void __exit asus_fw_exit(void)
1137 {
1138 int i;
1139
1140 for (i = ARRAY_SIZE(armoury_attr_groups) - 1; i >= 0; i--) {
1141 if (armoury_has_devstate(armoury_attr_groups[i].wmi_devid))
1142 sysfs_remove_group(&asus_armoury.fw_attr_kset->kobj,
1143 armoury_attr_groups[i].attr_group);
1144 }
1145
1146 if (asus_armoury.gpu_mux_dev_id)
1147 sysfs_remove_group(&asus_armoury.fw_attr_kset->kobj, &gpu_mux_mode_attr_group);
1148
1149 if (asus_armoury.mini_led_dev_id)
1150 sysfs_remove_group(&asus_armoury.fw_attr_kset->kobj, &mini_led_mode_attr_group);
1151
1152 sysfs_remove_file(&asus_armoury.fw_attr_kset->kobj, &pending_reboot.attr);
1153 kset_unregister(asus_armoury.fw_attr_kset);
1154 device_destroy(&firmware_attributes_class, MKDEV(0, 0));
1155
1156 kfree(asus_armoury.rog_tunables[ASUS_ROG_TUNABLE_AC]);
1157 kfree(asus_armoury.rog_tunables[ASUS_ROG_TUNABLE_DC]);
1158 }
1159
1160 module_init(asus_fw_init);
1161 module_exit(asus_fw_exit);
1162
1163 MODULE_IMPORT_NS("ASUS_WMI");
1164 MODULE_AUTHOR("Luke Jones <luke@ljones.dev>");
1165 MODULE_DESCRIPTION("ASUS BIOS Configuration Driver");
1166 MODULE_LICENSE("GPL");
1167 MODULE_ALIAS("wmi:" ASUS_NB_WMI_EVENT_GUID);
1168