xref: /linux/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts (revision 0cac5ce06e524755b3dac1e0a060b05992076d93) 
1// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/regulator/st,stm32mp25-regulator.h>
11#include "stm32mp257.dtsi"
12#include "stm32mp25xf.dtsi"
13#include "stm32mp25-pinctrl.dtsi"
14#include "stm32mp25xxai-pinctrl.dtsi"
15
16/ {
17	model = "STMicroelectronics STM32MP257F-EV1 Evaluation Board";
18	compatible = "st,stm32mp257f-ev1", "st,stm32mp257";
19
20	aliases {
21		ethernet0 = &ethernet2;
22		ethernet1 = &ethernet1;
23		serial0 = &usart2;
24		serial1 = &usart6;
25	};
26
27	chosen {
28		stdout-path = "serial0:115200n8";
29	};
30
31	clocks {
32		clk_ext_camera: clk-ext-camera {
33			#clock-cells = <0>;
34			compatible = "fixed-clock";
35			clock-frequency = <24000000>;
36		};
37
38		pad_clk: pad-clk {
39			#clock-cells = <0>;
40			compatible = "fixed-clock";
41			clock-frequency = <100000000>;
42		};
43	};
44
45	imx335_2v9: regulator-2v9 {
46		compatible = "regulator-fixed";
47		regulator-name = "imx335-avdd";
48		regulator-min-microvolt = <2900000>;
49		regulator-max-microvolt = <2900000>;
50		regulator-always-on;
51	};
52
53	imx335_1v8: regulator-1v8 {
54		compatible = "regulator-fixed";
55		regulator-name = "imx335-ovdd";
56		regulator-min-microvolt = <1800000>;
57		regulator-max-microvolt = <1800000>;
58		regulator-always-on;
59	};
60
61	imx335_1v2: regulator-1v2 {
62		compatible = "regulator-fixed";
63		regulator-name = "imx335-dvdd";
64		regulator-min-microvolt = <1200000>;
65		regulator-max-microvolt = <1200000>;
66		regulator-always-on;
67	};
68
69	memory@80000000 {
70		device_type = "memory";
71		reg = <0x0 0x80000000 0x1 0x0>;
72	};
73
74	panel_lvds: display {
75		compatible = "edt,etml0700z9ndha", "panel-lvds";
76		enable-gpios = <&gpiog 15 GPIO_ACTIVE_HIGH>;
77		backlight = <&panel_lvds_backlight>;
78		power-supply = <&scmi_v3v3>;
79		width-mm = <156>;
80		height-mm = <92>;
81		data-mapping = "vesa-24";
82		status = "okay";
83
84		panel-timing {
85			clock-frequency = <54000000>;
86			hactive = <1024>;
87			vactive = <600>;
88			hfront-porch = <150>;
89			hback-porch = <150>;
90			hsync-len = <21>;
91			vfront-porch = <24>;
92			vback-porch = <24>;
93			vsync-len = <21>;
94		};
95
96		port {
97			lvds_panel_in: endpoint {
98				remote-endpoint = <&lvds_out0>;
99			};
100		};
101	};
102
103	panel_lvds_backlight: backlight {
104		compatible = "gpio-backlight";
105		gpios = <&gpioi 5 GPIO_ACTIVE_HIGH>;
106		default-on;
107		status = "okay";
108	};
109
110	reserved-memory {
111		#address-cells = <2>;
112		#size-cells = <2>;
113		ranges;
114
115		fw@80000000 {
116			compatible = "shared-dma-pool";
117			reg = <0x0 0x80000000 0x0 0x4000000>;
118			no-map;
119		};
120
121		mm_ospi1: mm-ospi@60000000 {
122			reg = <0x0 0x60000000 0x0 0x10000000>;
123			no-map;
124		};
125	};
126};
127
128&arm_wdt {
129	timeout-sec = <32>;
130	status = "okay";
131};
132
133&combophy {
134	clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>, <&pad_clk>;
135	clock-names = "apb", "ker", "pad";
136	status = "okay";
137};
138
139&csi {
140	vdd-supply = <&scmi_vddcore>;
141	vdda18-supply = <&scmi_v1v8>;
142	status = "okay";
143	ports {
144		#address-cells = <1>;
145		#size-cells = <0>;
146		port@0 {
147			reg = <0>;
148			csi_sink: endpoint {
149				remote-endpoint = <&imx335_ep>;
150				data-lanes = <1 2>;
151				bus-type = <4>;
152			};
153		};
154		port@1 {
155			reg = <1>;
156			csi_source: endpoint {
157				remote-endpoint = <&dcmipp_0>;
158			};
159		};
160	};
161};
162
163&dcmipp {
164	status = "okay";
165	port {
166		dcmipp_0: endpoint {
167			remote-endpoint = <&csi_source>;
168			bus-type = <4>;
169		};
170	};
171};
172
173&ethernet1 {
174	pinctrl-0 = <&eth1_rgmii_pins_a &eth1_mdio_pins_a>;
175	pinctrl-1 = <&eth1_rgmii_sleep_pins_a &eth1_mdio_sleep_pins_a>;
176	pinctrl-names = "default", "sleep";
177	phy-handle = <&phy1_eth1>;
178	phy-mode = "rgmii-id";
179	st,ext-phyclk;
180	status = "okay";
181
182	mdio {
183		#address-cells = <1>;
184		#size-cells = <0>;
185		compatible = "snps,dwmac-mdio";
186		phy1_eth1: ethernet-phy@4 {
187			compatible = "ethernet-phy-id001c.c916";
188			reg = <4>;
189			reset-gpios =  <&gpioj 9 GPIO_ACTIVE_LOW>;
190			reset-assert-us = <10000>;
191			reset-deassert-us = <80000>;
192		};
193	};
194};
195
196&ethernet2 {
197	pinctrl-names = "default", "sleep";
198	pinctrl-0 = <&eth2_rgmii_pins_a>;
199	pinctrl-1 = <&eth2_rgmii_sleep_pins_a>;
200	max-speed = <1000>;
201	phy-handle = <&phy0_eth2>;
202	phy-mode = "rgmii-id";
203	status = "okay";
204
205	mdio {
206		#address-cells = <1>;
207		#size-cells = <0>;
208		compatible = "snps,dwmac-mdio";
209		phy0_eth2: ethernet-phy@1 {
210			compatible = "ethernet-phy-id001c.c916";
211			reg = <1>;
212			reset-assert-us = <10000>;
213			reset-deassert-us = <300>;
214			reset-gpios = <&gpiog 6 GPIO_ACTIVE_LOW>;
215		};
216	};
217};
218
219&i2c2 {
220	pinctrl-names = "default", "sleep";
221	pinctrl-0 = <&i2c2_pins_a>;
222	pinctrl-1 = <&i2c2_sleep_pins_a>;
223	i2c-scl-rising-time-ns = <100>;
224	i2c-scl-falling-time-ns = <13>;
225	clock-frequency = <400000>;
226	status = "okay";
227
228	imx335: camera@1a {
229		compatible = "sony,imx335";
230		reg = <0x1a>;
231		clocks = <&clk_ext_camera>;
232		avdd-supply = <&imx335_2v9>;
233		ovdd-supply = <&imx335_1v8>;
234		dvdd-supply = <&imx335_1v2>;
235		reset-gpios = <&gpioi 7 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
236
237		port {
238			imx335_ep: endpoint {
239				remote-endpoint = <&csi_sink>;
240				clock-lanes = <0>;
241				data-lanes = <1 2>;
242				link-frequencies = /bits/ 64 <594000000>;
243			};
244		};
245	};
246
247	ili2511: ili2511@41 {
248		compatible = "ilitek,ili251x";
249		reg = <0x41>;
250		interrupt-parent = <&gpioi>;
251		interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
252		reset-gpios = <&gpiog 14 GPIO_ACTIVE_LOW>;
253		status = "okay";
254	};
255};
256
257&i2c8 {
258	pinctrl-names = "default", "sleep";
259	pinctrl-0 = <&i2c8_pins_a>;
260	pinctrl-1 = <&i2c8_sleep_pins_a>;
261	i2c-scl-rising-time-ns = <57>;
262	i2c-scl-falling-time-ns = <7>;
263	clock-frequency = <400000>;
264	status = "disabled";
265};
266
267&ommanager {
268	memory-region = <&mm_ospi1>;
269	memory-region-names = "ospi1";
270	pinctrl-0 = <&ospi_port1_clk_pins_a
271		     &ospi_port1_io03_pins_a
272		     &ospi_port1_cs0_pins_a>;
273	pinctrl-1 = <&ospi_port1_clk_sleep_pins_a
274		     &ospi_port1_io03_sleep_pins_a
275		     &ospi_port1_cs0_sleep_pins_a>;
276	pinctrl-names = "default", "sleep";
277	status = "okay";
278
279	spi@0 {
280		#address-cells = <1>;
281		#size-cells = <0>;
282		memory-region = <&mm_ospi1>;
283		status = "okay";
284
285		flash0: flash@0 {
286			compatible = "jedec,spi-nor";
287			reg = <0>;
288			spi-rx-bus-width = <4>;
289			spi-tx-bus-width = <4>;
290			spi-max-frequency = <50000000>;
291		};
292	};
293};
294
295/* use LPTIMER with tick broadcast for suspend mode */
296&lptimer3 {
297	status = "okay";
298	timer {
299		status = "okay";
300	};
301};
302
303&ltdc {
304	status = "okay";
305	port {
306		ltdc_ep0_out: endpoint {
307			remote-endpoint = <&lvds_in>;
308		};
309	};
310};
311
312&lvds {
313	status = "okay";
314	ports {
315		#address-cells = <1>;
316		#size-cells = <0>;
317
318		port@0 {
319			reg = <0>;
320			lvds_in: endpoint {
321				remote-endpoint = <&ltdc_ep0_out>;
322			};
323		};
324
325		port@1 {
326			reg = <1>;
327			lvds_out0: endpoint {
328				remote-endpoint = <&lvds_panel_in>;
329			};
330		};
331	};
332};
333
334&pcie_ep {
335	pinctrl-names = "default", "init";
336	pinctrl-0 = <&pcie_pins_a>;
337	pinctrl-1 = <&pcie_init_pins_a>;
338	reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>;
339	status = "disabled";
340};
341
342&pcie_rc {
343	pinctrl-names = "default", "init", "sleep";
344	pinctrl-0 = <&pcie_pins_a>;
345	pinctrl-1 = <&pcie_init_pins_a>;
346	pinctrl-2 = <&pcie_sleep_pins_a>;
347	status = "okay";
348
349	pcie@0,0 {
350		 reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>;
351		 wake-gpios = <&gpioh 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
352	};
353};
354
355&rtc {
356	status = "okay";
357};
358
359&scmi_regu {
360	scmi_vddio1: regulator@0 {
361		regulator-min-microvolt = <1800000>;
362		regulator-max-microvolt = <3300000>;
363	};
364	scmi_vddcore: regulator@11  {
365		reg = <VOLTD_SCMI_STPMIC2_BUCK2>;
366		regulator-name = "vddcore";
367	};
368	scmi_v1v8: regulator@14  {
369		reg = <VOLTD_SCMI_STPMIC2_BUCK5>;
370		regulator-name = "v1v8";
371	};
372	scmi_v3v3: regulator@16 {
373		reg = <VOLTD_SCMI_STPMIC2_BUCK7>;
374		regulator-name = "v3v3";
375	};
376	scmi_vdd_emmc: regulator@18 {
377		reg = <VOLTD_SCMI_STPMIC2_LDO2>;
378		regulator-name = "vdd_emmc";
379	};
380	scmi_vdd3v3_usb: regulator@20 {
381		reg = <VOLTD_SCMI_STPMIC2_LDO4>;
382		regulator-name = "vdd3v3_usb";
383	};
384	scmi_vdd_sdcard: regulator@23 {
385		reg = <VOLTD_SCMI_STPMIC2_LDO7>;
386		regulator-name = "vdd_sdcard";
387	};
388};
389
390&sdmmc1 {
391	pinctrl-names = "default", "opendrain", "sleep";
392	pinctrl-0 = <&sdmmc1_b4_pins_a>;
393	pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
394	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
395	cd-gpios = <&gpiod 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
396	disable-wp;
397	st,neg-edge;
398	bus-width = <4>;
399	vmmc-supply = <&scmi_vdd_sdcard>;
400	vqmmc-supply = <&scmi_vddio1>;
401	status = "okay";
402};
403
404&spi3 {
405	pinctrl-names = "default", "sleep";
406	pinctrl-0 = <&spi3_pins_a>;
407	pinctrl-1 = <&spi3_sleep_pins_a>;
408	status = "disabled";
409};
410
411&spi8 {
412	pinctrl-names = "default", "sleep";
413	pinctrl-0 = <&spi8_pins_a>;
414	pinctrl-1 = <&spi8_sleep_pins_a>;
415	status = "disabled";
416};
417
418&timers3 {
419	status = "disabled";
420	counter {
421		status = "okay";
422	};
423	pwm {
424		pinctrl-0 = <&pwm3_pins_a>;
425		pinctrl-1 = <&pwm3_sleep_pins_a>;
426		pinctrl-names = "default", "sleep";
427		status = "okay";
428	};
429	timer@2 {
430		status = "okay";
431	};
432};
433
434&timers8 {
435	status = "disabled";
436	counter {
437		status = "okay";
438	};
439	pwm {
440		pinctrl-0 = <&pwm8_pins_a>;
441		pinctrl-1 = <&pwm8_sleep_pins_a>;
442		pinctrl-names = "default", "sleep";
443		status = "okay";
444	};
445	timer@7 {
446		status = "okay";
447	};
448};
449
450&timers10 {
451	status = "disabled";
452	counter {
453		pinctrl-0 = <&tim10_counter_pins_a>;
454		pinctrl-1 = <&tim10_counter_sleep_pins_a>;
455		pinctrl-names = "default", "sleep";
456		status = "okay";
457	};
458};
459
460&timers12 {
461	status = "disabled";
462	counter {
463		status = "okay";
464	};
465	pwm {
466		pinctrl-0 = <&pwm12_pins_a>;
467		pinctrl-1 = <&pwm12_sleep_pins_a>;
468		pinctrl-names = "default", "sleep";
469		status = "okay";
470	};
471	timer@11 {
472		status = "okay";
473	};
474};
475
476&usart2 {
477	pinctrl-names = "default", "idle", "sleep";
478	pinctrl-0 = <&usart2_pins_a>;
479	pinctrl-1 = <&usart2_idle_pins_a>;
480	pinctrl-2 = <&usart2_sleep_pins_a>;
481	/delete-property/dmas;
482	/delete-property/dma-names;
483	status = "okay";
484};
485
486&usart6 {
487	pinctrl-names = "default", "idle", "sleep";
488	pinctrl-0 = <&usart6_pins_a>;
489	pinctrl-1 = <&usart6_idle_pins_a>;
490	pinctrl-2 = <&usart6_sleep_pins_a>;
491	uart-has-rtscts;
492	status = "disabled";
493};
494