1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * System Control and Power Interface (SCMI) Protocol based i.MX pinctrl driver
4 *
5 * Copyright 2024 NXP
6 */
7
8 #include <linux/device.h>
9 #include <linux/err.h>
10 #include <linux/errno.h>
11 #include <linux/module.h>
12 #include <linux/of.h>
13 #include <linux/scmi_protocol.h>
14 #include <linux/seq_file.h>
15 #include <linux/slab.h>
16 #include <linux/types.h>
17
18 #include <linux/pinctrl/machine.h>
19 #include <linux/pinctrl/pinconf.h>
20 #include <linux/pinctrl/pinconf-generic.h>
21 #include <linux/pinctrl/pinctrl.h>
22 #include <linux/pinctrl/pinmux.h>
23
24 #include "../pinctrl-utils.h"
25 #include "../core.h"
26 #include "../pinconf.h"
27 #include "../pinmux.h"
28
29 #define DRV_NAME "scmi-pinctrl-imx"
30
31 struct scmi_pinctrl_imx {
32 struct device *dev;
33 struct scmi_protocol_handle *ph;
34 struct pinctrl_dev *pctldev;
35 struct pinctrl_desc pctl_desc;
36 const struct scmi_pinctrl_proto_ops *ops;
37 };
38
39 /* SCMI pin control types, aligned with SCMI firmware */
40 #define IMX_SCMI_NUM_CFG 5
41 #define IMX_SCMI_PIN_MUX 192
42 #define IMX_SCMI_PIN_CONFIG 193
43 #define IMX_SCMI_PIN_DAISY_ID 194
44 #define IMX_SCMI_PIN_DAISY_CFG 195
45 #define IMX_SCMI_PIN_EXT 196
46
47 #define IMX_SCMI_NO_PAD_CTL BIT(31)
48 #define IMX_SCMI_PAD_SION BIT(30)
49 #define IMX_SCMI_IOMUXC_CONFIG_SION BIT(4)
50
51 #define IMX_SCMI_PIN_SIZE 24
52
53 #define IMX94_DAISY_OFF 0x608
54 #define IMX95_DAISY_OFF 0x408
55 #define IMX952_DAISY_OFF 0x460
56
pinctrl_scmi_imx_dt_node_to_map(struct pinctrl_dev * pctldev,struct device_node * np,struct pinctrl_map ** map,unsigned int * num_maps)57 static int pinctrl_scmi_imx_dt_node_to_map(struct pinctrl_dev *pctldev,
58 struct device_node *np,
59 struct pinctrl_map **map,
60 unsigned int *num_maps)
61 {
62 struct pinctrl_map *new_map;
63 const __be32 *list;
64 unsigned long *configs = NULL;
65 unsigned long cfg[IMX_SCMI_NUM_CFG];
66 int map_num, size, pin_size, pin_id, num_pins;
67 int mux_reg, conf_reg, input_reg, mux_val, conf_val, input_val;
68 int i, j;
69 uint32_t ncfg;
70 static uint32_t daisy_off;
71
72 if (!daisy_off) {
73 if (of_machine_is_compatible("fsl,imx95")) {
74 daisy_off = IMX95_DAISY_OFF;
75 } else if (of_machine_is_compatible("fsl,imx94")) {
76 daisy_off = IMX94_DAISY_OFF;
77 } else if (of_machine_is_compatible("fsl,imx952")) {
78 daisy_off = IMX952_DAISY_OFF;
79 } else {
80 dev_err(pctldev->dev, "platform not support scmi pinctrl\n");
81 return -EINVAL;
82 }
83 }
84
85 list = of_get_property(np, "fsl,pins", &size);
86 if (!list) {
87 dev_err(pctldev->dev, "no fsl,pins property in node %pOF\n", np);
88 return -EINVAL;
89 }
90
91 pin_size = IMX_SCMI_PIN_SIZE;
92
93 if (!size || size % pin_size) {
94 dev_err(pctldev->dev, "Invalid fsl,pins or pins property in node %pOF\n", np);
95 return -EINVAL;
96 }
97
98 num_pins = size / pin_size;
99 map_num = num_pins;
100
101 new_map = kmalloc_objs(struct pinctrl_map, map_num);
102 if (!new_map)
103 return -ENOMEM;
104
105 *map = new_map;
106 *num_maps = map_num;
107
108 /* create config map */
109 for (i = 0; i < num_pins; i++) {
110 j = 0;
111 ncfg = IMX_SCMI_NUM_CFG;
112 mux_reg = be32_to_cpu(*list++);
113 conf_reg = be32_to_cpu(*list++);
114 input_reg = be32_to_cpu(*list++);
115 mux_val = be32_to_cpu(*list++);
116 input_val = be32_to_cpu(*list++);
117 conf_val = be32_to_cpu(*list++);
118 if (conf_val & IMX_SCMI_PAD_SION)
119 mux_val |= IMX_SCMI_IOMUXC_CONFIG_SION;
120
121 pin_id = mux_reg / 4;
122
123 cfg[j++] = pinconf_to_config_packed(IMX_SCMI_PIN_MUX, (mux_val & 0xFF));
124
125 if (mux_val & 0xFF00) {
126 int ext_val = (mux_val & 0xFF00) >> 8;
127
128 cfg[j++] = pinconf_to_config_packed(IMX_SCMI_PIN_EXT, ext_val);
129 } else
130 ncfg--;
131
132 if (!conf_reg || (conf_val & IMX_SCMI_NO_PAD_CTL))
133 ncfg--;
134 else
135 cfg[j++] = pinconf_to_config_packed(IMX_SCMI_PIN_CONFIG, conf_val);
136
137 if (!input_reg) {
138 ncfg -= 2;
139 } else {
140 cfg[j++] = pinconf_to_config_packed(IMX_SCMI_PIN_DAISY_ID,
141 (input_reg - daisy_off) / 4);
142 cfg[j++] = pinconf_to_config_packed(IMX_SCMI_PIN_DAISY_CFG, input_val);
143 }
144
145 configs = kmemdup_array(cfg, ncfg, sizeof(unsigned long), GFP_KERNEL);
146
147 new_map[i].type = PIN_MAP_TYPE_CONFIGS_PIN;
148 new_map[i].data.configs.group_or_pin = pin_get_name(pctldev, pin_id);
149 new_map[i].data.configs.configs = configs;
150 new_map[i].data.configs.num_configs = ncfg;
151 }
152
153 return 0;
154 }
155
pinctrl_scmi_imx_dt_free_map(struct pinctrl_dev * pctldev,struct pinctrl_map * map,unsigned int num_maps)156 static void pinctrl_scmi_imx_dt_free_map(struct pinctrl_dev *pctldev,
157 struct pinctrl_map *map, unsigned int num_maps)
158 {
159 kfree(map);
160 }
161
162 static const struct pinctrl_ops pinctrl_scmi_imx_pinctrl_ops = {
163 .get_groups_count = pinctrl_generic_get_group_count,
164 .get_group_name = pinctrl_generic_get_group_name,
165 .get_group_pins = pinctrl_generic_get_group_pins,
166 .dt_node_to_map = pinctrl_scmi_imx_dt_node_to_map,
167 .dt_free_map = pinctrl_scmi_imx_dt_free_map,
168 };
169
pinctrl_scmi_imx_func_set_mux(struct pinctrl_dev * pctldev,unsigned int selector,unsigned int group)170 static int pinctrl_scmi_imx_func_set_mux(struct pinctrl_dev *pctldev,
171 unsigned int selector, unsigned int group)
172 {
173 /*
174 * For i.MX SCMI PINCTRL , postpone the mux setting
175 * until config is set as they can be set together
176 * in one IPC call
177 */
178 return 0;
179 }
180
181 static const struct pinmux_ops pinctrl_scmi_imx_pinmux_ops = {
182 .get_functions_count = pinmux_generic_get_function_count,
183 .get_function_name = pinmux_generic_get_function_name,
184 .get_function_groups = pinmux_generic_get_function_groups,
185 .set_mux = pinctrl_scmi_imx_func_set_mux,
186 };
187
pinctrl_scmi_imx_pinconf_get(struct pinctrl_dev * pctldev,unsigned int pin,unsigned long * config)188 static int pinctrl_scmi_imx_pinconf_get(struct pinctrl_dev *pctldev,
189 unsigned int pin, unsigned long *config)
190 {
191 int ret;
192 struct scmi_pinctrl_imx *pmx = pinctrl_dev_get_drvdata(pctldev);
193 u32 config_type, val;
194
195 if (!config)
196 return -EINVAL;
197
198 config_type = pinconf_to_config_param(*config);
199
200 ret = pmx->ops->settings_get_one(pmx->ph, pin, PIN_TYPE, config_type, &val);
201 /* Convert SCMI error code to PINCTRL expected error code */
202 if (ret == -EOPNOTSUPP)
203 return -ENOTSUPP;
204 if (ret)
205 return ret;
206
207 *config = pinconf_to_config_packed(config_type, val);
208
209 dev_dbg(pmx->dev, "pin:%s, conf:0x%x", pin_get_name(pctldev, pin), val);
210
211 return 0;
212 }
213
pinctrl_scmi_imx_pinconf_set(struct pinctrl_dev * pctldev,unsigned int pin,unsigned long * configs,unsigned int num_configs)214 static int pinctrl_scmi_imx_pinconf_set(struct pinctrl_dev *pctldev,
215 unsigned int pin,
216 unsigned long *configs,
217 unsigned int num_configs)
218 {
219 struct scmi_pinctrl_imx *pmx = pinctrl_dev_get_drvdata(pctldev);
220 enum scmi_pinctrl_conf_type config_type[IMX_SCMI_NUM_CFG];
221 u32 config_value[IMX_SCMI_NUM_CFG];
222 enum scmi_pinctrl_conf_type *p_config_type = config_type;
223 u32 *p_config_value = config_value;
224 int ret;
225 int i;
226
227 if (!configs || !num_configs)
228 return -EINVAL;
229
230 if (num_configs > IMX_SCMI_NUM_CFG) {
231 dev_err(pmx->dev, "num_configs(%d) too large\n", num_configs);
232 return -EINVAL;
233 }
234
235 for (i = 0; i < num_configs; i++) {
236 /* cast to avoid build warning */
237 p_config_type[i] =
238 (enum scmi_pinctrl_conf_type)pinconf_to_config_param(configs[i]);
239 p_config_value[i] = pinconf_to_config_argument(configs[i]);
240
241 dev_dbg(pmx->dev, "pin: %u, type: %u, val: 0x%x\n",
242 pin, p_config_type[i], p_config_value[i]);
243 }
244
245 ret = pmx->ops->settings_conf(pmx->ph, pin, PIN_TYPE, num_configs,
246 p_config_type, p_config_value);
247 if (ret)
248 dev_err(pmx->dev, "Error set config %d\n", ret);
249
250 return ret;
251 }
252
pinctrl_scmi_imx_pinconf_dbg_show(struct pinctrl_dev * pctldev,struct seq_file * s,unsigned int pin_id)253 static void pinctrl_scmi_imx_pinconf_dbg_show(struct pinctrl_dev *pctldev,
254 struct seq_file *s, unsigned int pin_id)
255 {
256 unsigned long config = pinconf_to_config_packed(IMX_SCMI_PIN_CONFIG, 0);
257 int ret;
258
259 ret = pinctrl_scmi_imx_pinconf_get(pctldev, pin_id, &config);
260 if (ret)
261 config = 0;
262 else
263 config = pinconf_to_config_argument(config);
264
265 seq_printf(s, "0x%lx", config);
266 }
267
268 static const struct pinconf_ops pinctrl_scmi_imx_pinconf_ops = {
269 .pin_config_get = pinctrl_scmi_imx_pinconf_get,
270 .pin_config_set = pinctrl_scmi_imx_pinconf_set,
271 .pin_config_dbg_show = pinctrl_scmi_imx_pinconf_dbg_show,
272 };
273
274 static int
scmi_pinctrl_imx_get_pins(struct scmi_pinctrl_imx * pmx,struct pinctrl_desc * desc)275 scmi_pinctrl_imx_get_pins(struct scmi_pinctrl_imx *pmx, struct pinctrl_desc *desc)
276 {
277 struct pinctrl_pin_desc *pins;
278 unsigned int npins;
279 int ret, i;
280
281 npins = pmx->ops->count_get(pmx->ph, PIN_TYPE);
282 pins = devm_kmalloc_array(pmx->dev, npins, sizeof(*pins), GFP_KERNEL);
283 if (!pins)
284 return -ENOMEM;
285
286 for (i = 0; i < npins; i++) {
287 pins[i].number = i;
288 /* no need free name, firmware driver handles it */
289 ret = pmx->ops->name_get(pmx->ph, i, PIN_TYPE, &pins[i].name);
290 if (ret)
291 return dev_err_probe(pmx->dev, ret,
292 "Can't get name for pin %d", i);
293 }
294
295 desc->npins = npins;
296 desc->pins = pins;
297 dev_dbg(pmx->dev, "got pins %u", npins);
298
299 return 0;
300 }
301
302 static const char * const scmi_pinctrl_imx_allowlist[] = {
303 "fsl,imx94",
304 "fsl,imx95",
305 "fsl,imx952",
306 NULL
307 };
308
scmi_pinctrl_imx_probe(struct scmi_device * sdev)309 static int scmi_pinctrl_imx_probe(struct scmi_device *sdev)
310 {
311 struct device *dev = &sdev->dev;
312 const struct scmi_handle *handle = sdev->handle;
313 struct scmi_pinctrl_imx *pmx;
314 struct scmi_protocol_handle *ph;
315 const struct scmi_pinctrl_proto_ops *pinctrl_ops;
316 int ret;
317
318 if (!handle)
319 return -EINVAL;
320
321 if (!of_machine_compatible_match(scmi_pinctrl_imx_allowlist))
322 return -ENODEV;
323
324 pinctrl_ops = handle->devm_protocol_get(sdev, SCMI_PROTOCOL_PINCTRL, &ph);
325 if (IS_ERR(pinctrl_ops))
326 return PTR_ERR(pinctrl_ops);
327
328 pmx = devm_kzalloc(dev, sizeof(*pmx), GFP_KERNEL);
329 if (!pmx)
330 return -ENOMEM;
331
332 pmx->ph = ph;
333 pmx->ops = pinctrl_ops;
334
335 pmx->dev = dev;
336 pmx->pctl_desc.name = DRV_NAME;
337 pmx->pctl_desc.owner = THIS_MODULE;
338 pmx->pctl_desc.pctlops = &pinctrl_scmi_imx_pinctrl_ops;
339 pmx->pctl_desc.pmxops = &pinctrl_scmi_imx_pinmux_ops;
340 pmx->pctl_desc.confops = &pinctrl_scmi_imx_pinconf_ops;
341
342 ret = scmi_pinctrl_imx_get_pins(pmx, &pmx->pctl_desc);
343 if (ret)
344 return ret;
345
346 pmx->dev = &sdev->dev;
347
348 ret = devm_pinctrl_register_and_init(dev, &pmx->pctl_desc, pmx,
349 &pmx->pctldev);
350 if (ret)
351 return dev_err_probe(dev, ret, "Failed to register pinctrl\n");
352
353 return pinctrl_enable(pmx->pctldev);
354 }
355
356 static const struct scmi_device_id scmi_id_table[] = {
357 { SCMI_PROTOCOL_PINCTRL, "pinctrl-imx" },
358 { }
359 };
360 MODULE_DEVICE_TABLE(scmi, scmi_id_table);
361
362 static struct scmi_driver scmi_pinctrl_imx_driver = {
363 .name = DRV_NAME,
364 .probe = scmi_pinctrl_imx_probe,
365 .id_table = scmi_id_table,
366 };
367 module_scmi_driver(scmi_pinctrl_imx_driver);
368
369 MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
370 MODULE_DESCRIPTION("i.MX SCMI pin controller driver");
371 MODULE_LICENSE("GPL");
372