1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /* Copyright (c) 2015 - 2021 Intel Corporation */
3 #include "main.h"
4
5 /**
6 * irdma_arp_table -manage arp table
7 * @rf: RDMA PCI function
8 * @ip_addr: ip address for device
9 * @ipv4: IPv4 flag
10 * @mac_addr: mac address ptr
11 * @action: modify, delete or add
12 */
irdma_arp_table(struct irdma_pci_f * rf,u32 * ip_addr,bool ipv4,const u8 * mac_addr,u32 action)13 int irdma_arp_table(struct irdma_pci_f *rf, u32 *ip_addr, bool ipv4,
14 const u8 *mac_addr, u32 action)
15 {
16 unsigned long flags;
17 int arp_index;
18 u32 ip[4] = {};
19
20 if (ipv4)
21 ip[0] = *ip_addr;
22 else
23 memcpy(ip, ip_addr, sizeof(ip));
24
25 spin_lock_irqsave(&rf->arp_lock, flags);
26 for (arp_index = 0; (u32)arp_index < rf->arp_table_size; arp_index++) {
27 if (!memcmp(rf->arp_table[arp_index].ip_addr, ip, sizeof(ip)))
28 break;
29 }
30
31 switch (action) {
32 case IRDMA_ARP_ADD:
33 if (arp_index != rf->arp_table_size) {
34 arp_index = -1;
35 break;
36 }
37
38 arp_index = 0;
39 if (irdma_alloc_rsrc(rf, rf->allocated_arps, rf->arp_table_size,
40 (u32 *)&arp_index, &rf->next_arp_index)) {
41 arp_index = -1;
42 break;
43 }
44
45 memcpy(rf->arp_table[arp_index].ip_addr, ip,
46 sizeof(rf->arp_table[arp_index].ip_addr));
47 ether_addr_copy(rf->arp_table[arp_index].mac_addr, mac_addr);
48 break;
49 case IRDMA_ARP_RESOLVE:
50 if (arp_index == rf->arp_table_size)
51 arp_index = -1;
52 break;
53 case IRDMA_ARP_DELETE:
54 if (arp_index == rf->arp_table_size) {
55 arp_index = -1;
56 break;
57 }
58
59 memset(rf->arp_table[arp_index].ip_addr, 0,
60 sizeof(rf->arp_table[arp_index].ip_addr));
61 eth_zero_addr(rf->arp_table[arp_index].mac_addr);
62 irdma_free_rsrc(rf, rf->allocated_arps, arp_index);
63 break;
64 default:
65 arp_index = -1;
66 break;
67 }
68
69 spin_unlock_irqrestore(&rf->arp_lock, flags);
70 return arp_index;
71 }
72
73 /**
74 * irdma_add_arp - add a new arp entry if needed
75 * @rf: RDMA function
76 * @ip: IP address
77 * @ipv4: IPv4 flag
78 * @mac: MAC address
79 */
irdma_add_arp(struct irdma_pci_f * rf,u32 * ip,bool ipv4,const u8 * mac)80 int irdma_add_arp(struct irdma_pci_f *rf, u32 *ip, bool ipv4, const u8 *mac)
81 {
82 int arpidx;
83
84 arpidx = irdma_arp_table(rf, &ip[0], ipv4, NULL, IRDMA_ARP_RESOLVE);
85 if (arpidx >= 0) {
86 if (ether_addr_equal(rf->arp_table[arpidx].mac_addr, mac))
87 return arpidx;
88
89 irdma_manage_arp_cache(rf, rf->arp_table[arpidx].mac_addr, ip,
90 ipv4, IRDMA_ARP_DELETE);
91 }
92
93 irdma_manage_arp_cache(rf, mac, ip, ipv4, IRDMA_ARP_ADD);
94
95 return irdma_arp_table(rf, ip, ipv4, NULL, IRDMA_ARP_RESOLVE);
96 }
97
98 /**
99 * wr32 - write 32 bits to hw register
100 * @hw: hardware information including registers
101 * @reg: register offset
102 * @val: value to write to register
103 */
wr32(struct irdma_hw * hw,u32 reg,u32 val)104 inline void wr32(struct irdma_hw *hw, u32 reg, u32 val)
105 {
106 writel(val, hw->hw_addr + reg);
107 }
108
109 /**
110 * rd32 - read a 32 bit hw register
111 * @hw: hardware information including registers
112 * @reg: register offset
113 *
114 * Return value of register content
115 */
rd32(struct irdma_hw * hw,u32 reg)116 inline u32 rd32(struct irdma_hw *hw, u32 reg)
117 {
118 return readl(hw->hw_addr + reg);
119 }
120
121 /**
122 * rd64 - read a 64 bit hw register
123 * @hw: hardware information including registers
124 * @reg: register offset
125 *
126 * Return value of register content
127 */
rd64(struct irdma_hw * hw,u32 reg)128 inline u64 rd64(struct irdma_hw *hw, u32 reg)
129 {
130 return readq(hw->hw_addr + reg);
131 }
132
irdma_gid_change_event(struct ib_device * ibdev)133 static void irdma_gid_change_event(struct ib_device *ibdev)
134 {
135 struct ib_event ib_event;
136
137 ib_event.event = IB_EVENT_GID_CHANGE;
138 ib_event.device = ibdev;
139 ib_event.element.port_num = 1;
140 ib_dispatch_event(&ib_event);
141 }
142
143 /**
144 * irdma_inetaddr_event - system notifier for ipv4 addr events
145 * @notifier: not used
146 * @event: event for notifier
147 * @ptr: if address
148 */
irdma_inetaddr_event(struct notifier_block * notifier,unsigned long event,void * ptr)149 int irdma_inetaddr_event(struct notifier_block *notifier, unsigned long event,
150 void *ptr)
151 {
152 struct in_ifaddr *ifa = ptr;
153 struct net_device *real_dev, *netdev = ifa->ifa_dev->dev;
154 struct irdma_device *iwdev;
155 struct ib_device *ibdev;
156 u32 local_ipaddr;
157
158 real_dev = rdma_vlan_dev_real_dev(netdev);
159 if (!real_dev)
160 real_dev = netdev;
161
162 ibdev = ib_device_get_by_netdev(real_dev, RDMA_DRIVER_IRDMA);
163 if (!ibdev)
164 return NOTIFY_DONE;
165
166 iwdev = to_iwdev(ibdev);
167 local_ipaddr = ntohl(ifa->ifa_address);
168 ibdev_dbg(&iwdev->ibdev,
169 "DEV: netdev %p event %lu local_ip=%pI4 MAC=%pM\n", real_dev,
170 event, &local_ipaddr, real_dev->dev_addr);
171 switch (event) {
172 case NETDEV_DOWN:
173 irdma_manage_arp_cache(iwdev->rf, real_dev->dev_addr,
174 &local_ipaddr, true, IRDMA_ARP_DELETE);
175 irdma_if_notify(iwdev, real_dev, &local_ipaddr, true, false);
176 irdma_gid_change_event(&iwdev->ibdev);
177 break;
178 case NETDEV_UP:
179 case NETDEV_CHANGEADDR:
180 irdma_add_arp(iwdev->rf, &local_ipaddr, true, real_dev->dev_addr);
181 irdma_if_notify(iwdev, real_dev, &local_ipaddr, true, true);
182 irdma_gid_change_event(&iwdev->ibdev);
183 break;
184 default:
185 break;
186 }
187
188 ib_device_put(ibdev);
189
190 return NOTIFY_DONE;
191 }
192
193 /**
194 * irdma_inet6addr_event - system notifier for ipv6 addr events
195 * @notifier: not used
196 * @event: event for notifier
197 * @ptr: if address
198 */
irdma_inet6addr_event(struct notifier_block * notifier,unsigned long event,void * ptr)199 int irdma_inet6addr_event(struct notifier_block *notifier, unsigned long event,
200 void *ptr)
201 {
202 struct inet6_ifaddr *ifa = ptr;
203 struct net_device *real_dev, *netdev = ifa->idev->dev;
204 struct irdma_device *iwdev;
205 struct ib_device *ibdev;
206 u32 local_ipaddr6[4];
207
208 real_dev = rdma_vlan_dev_real_dev(netdev);
209 if (!real_dev)
210 real_dev = netdev;
211
212 ibdev = ib_device_get_by_netdev(real_dev, RDMA_DRIVER_IRDMA);
213 if (!ibdev)
214 return NOTIFY_DONE;
215
216 iwdev = to_iwdev(ibdev);
217 irdma_copy_ip_ntohl(local_ipaddr6, ifa->addr.in6_u.u6_addr32);
218 ibdev_dbg(&iwdev->ibdev,
219 "DEV: netdev %p event %lu local_ip=%pI6 MAC=%pM\n", real_dev,
220 event, local_ipaddr6, real_dev->dev_addr);
221 switch (event) {
222 case NETDEV_DOWN:
223 irdma_manage_arp_cache(iwdev->rf, real_dev->dev_addr,
224 local_ipaddr6, false, IRDMA_ARP_DELETE);
225 irdma_if_notify(iwdev, real_dev, local_ipaddr6, false, false);
226 irdma_gid_change_event(&iwdev->ibdev);
227 break;
228 case NETDEV_UP:
229 case NETDEV_CHANGEADDR:
230 irdma_add_arp(iwdev->rf, local_ipaddr6, false,
231 real_dev->dev_addr);
232 irdma_if_notify(iwdev, real_dev, local_ipaddr6, false, true);
233 irdma_gid_change_event(&iwdev->ibdev);
234 break;
235 default:
236 break;
237 }
238
239 ib_device_put(ibdev);
240
241 return NOTIFY_DONE;
242 }
243
244 /**
245 * irdma_net_event - system notifier for net events
246 * @notifier: not used
247 * @event: event for notifier
248 * @ptr: neighbor
249 */
irdma_net_event(struct notifier_block * notifier,unsigned long event,void * ptr)250 int irdma_net_event(struct notifier_block *notifier, unsigned long event,
251 void *ptr)
252 {
253 struct neighbour *neigh = ptr;
254 struct net_device *real_dev, *netdev = (struct net_device *)neigh->dev;
255 struct irdma_device *iwdev;
256 struct ib_device *ibdev;
257 __be32 *p;
258 u32 local_ipaddr[4] = {};
259 bool ipv4 = true;
260
261 switch (event) {
262 case NETEVENT_NEIGH_UPDATE:
263 real_dev = rdma_vlan_dev_real_dev(netdev);
264 if (!real_dev)
265 real_dev = netdev;
266 ibdev = ib_device_get_by_netdev(real_dev, RDMA_DRIVER_IRDMA);
267 if (!ibdev)
268 return NOTIFY_DONE;
269
270 iwdev = to_iwdev(ibdev);
271 p = (__be32 *)neigh->primary_key;
272 if (neigh->tbl->family == AF_INET6) {
273 ipv4 = false;
274 irdma_copy_ip_ntohl(local_ipaddr, p);
275 } else {
276 local_ipaddr[0] = ntohl(*p);
277 }
278
279 ibdev_dbg(&iwdev->ibdev,
280 "DEV: netdev %p state %d local_ip=%pI4 MAC=%pM\n",
281 iwdev->netdev, neigh->nud_state, local_ipaddr,
282 neigh->ha);
283
284 if (neigh->nud_state & NUD_VALID)
285 irdma_add_arp(iwdev->rf, local_ipaddr, ipv4, neigh->ha);
286
287 else
288 irdma_manage_arp_cache(iwdev->rf, neigh->ha,
289 local_ipaddr, ipv4,
290 IRDMA_ARP_DELETE);
291 ib_device_put(ibdev);
292 break;
293 default:
294 break;
295 }
296
297 return NOTIFY_DONE;
298 }
299
300 /**
301 * irdma_netdevice_event - system notifier for netdev events
302 * @notifier: not used
303 * @event: event for notifier
304 * @ptr: netdev
305 */
irdma_netdevice_event(struct notifier_block * notifier,unsigned long event,void * ptr)306 int irdma_netdevice_event(struct notifier_block *notifier, unsigned long event,
307 void *ptr)
308 {
309 struct irdma_device *iwdev;
310 struct ib_device *ibdev;
311 struct net_device *netdev = netdev_notifier_info_to_dev(ptr);
312
313 ibdev = ib_device_get_by_netdev(netdev, RDMA_DRIVER_IRDMA);
314 if (!ibdev)
315 return NOTIFY_DONE;
316
317 iwdev = to_iwdev(ibdev);
318 iwdev->iw_status = 1;
319 switch (event) {
320 case NETDEV_DOWN:
321 iwdev->iw_status = 0;
322 fallthrough;
323 default:
324 break;
325 }
326 ib_device_put(ibdev);
327
328 return NOTIFY_DONE;
329 }
330
331 /**
332 * irdma_add_ipv6_addr - add ipv6 address to the hw arp table
333 * @iwdev: irdma device
334 */
irdma_add_ipv6_addr(struct irdma_device * iwdev)335 static void irdma_add_ipv6_addr(struct irdma_device *iwdev)
336 {
337 struct net_device *ip_dev;
338 struct inet6_dev *idev;
339 struct inet6_ifaddr *ifp, *tmp;
340 u32 local_ipaddr6[4];
341
342 rcu_read_lock();
343 for_each_netdev_rcu (&init_net, ip_dev) {
344 if (((rdma_vlan_dev_vlan_id(ip_dev) < 0xFFFF &&
345 rdma_vlan_dev_real_dev(ip_dev) == iwdev->netdev) ||
346 ip_dev == iwdev->netdev) &&
347 (READ_ONCE(ip_dev->flags) & IFF_UP)) {
348 idev = __in6_dev_get(ip_dev);
349 if (!idev) {
350 ibdev_err(&iwdev->ibdev, "ipv6 inet device not found\n");
351 break;
352 }
353 list_for_each_entry_safe (ifp, tmp, &idev->addr_list,
354 if_list) {
355 ibdev_dbg(&iwdev->ibdev,
356 "INIT: IP=%pI6, vlan_id=%d, MAC=%pM\n",
357 &ifp->addr,
358 rdma_vlan_dev_vlan_id(ip_dev),
359 ip_dev->dev_addr);
360
361 irdma_copy_ip_ntohl(local_ipaddr6,
362 ifp->addr.in6_u.u6_addr32);
363 irdma_manage_arp_cache(iwdev->rf,
364 ip_dev->dev_addr,
365 local_ipaddr6, false,
366 IRDMA_ARP_ADD);
367 }
368 }
369 }
370 rcu_read_unlock();
371 }
372
373 /**
374 * irdma_add_ipv4_addr - add ipv4 address to the hw arp table
375 * @iwdev: irdma device
376 */
irdma_add_ipv4_addr(struct irdma_device * iwdev)377 static void irdma_add_ipv4_addr(struct irdma_device *iwdev)
378 {
379 struct net_device *dev;
380 struct in_device *idev;
381 u32 ip_addr;
382
383 rcu_read_lock();
384 for_each_netdev_rcu (&init_net, dev) {
385 if (((rdma_vlan_dev_vlan_id(dev) < 0xFFFF &&
386 rdma_vlan_dev_real_dev(dev) == iwdev->netdev) ||
387 dev == iwdev->netdev) && (READ_ONCE(dev->flags) & IFF_UP)) {
388 const struct in_ifaddr *ifa;
389
390 idev = __in_dev_get_rcu(dev);
391 if (!idev)
392 continue;
393
394 in_dev_for_each_ifa_rcu(ifa, idev) {
395 ibdev_dbg(&iwdev->ibdev, "CM: IP=%pI4, vlan_id=%d, MAC=%pM\n",
396 &ifa->ifa_address, rdma_vlan_dev_vlan_id(dev),
397 dev->dev_addr);
398
399 ip_addr = ntohl(ifa->ifa_address);
400 irdma_manage_arp_cache(iwdev->rf, dev->dev_addr,
401 &ip_addr, true,
402 IRDMA_ARP_ADD);
403 }
404 }
405 }
406 rcu_read_unlock();
407 }
408
409 /**
410 * irdma_add_ip - add ip addresses
411 * @iwdev: irdma device
412 *
413 * Add ipv4/ipv6 addresses to the arp cache
414 */
irdma_add_ip(struct irdma_device * iwdev)415 void irdma_add_ip(struct irdma_device *iwdev)
416 {
417 irdma_add_ipv4_addr(iwdev);
418 irdma_add_ipv6_addr(iwdev);
419 }
420
421 /**
422 * irdma_alloc_and_get_cqp_request - get cqp struct
423 * @cqp: device cqp ptr
424 * @wait: cqp to be used in wait mode
425 */
irdma_alloc_and_get_cqp_request(struct irdma_cqp * cqp,bool wait)426 struct irdma_cqp_request *irdma_alloc_and_get_cqp_request(struct irdma_cqp *cqp,
427 bool wait)
428 {
429 struct irdma_cqp_request *cqp_request = NULL;
430 unsigned long flags;
431
432 spin_lock_irqsave(&cqp->req_lock, flags);
433 if (!list_empty(&cqp->cqp_avail_reqs)) {
434 cqp_request = list_first_entry(&cqp->cqp_avail_reqs,
435 struct irdma_cqp_request, list);
436 list_del_init(&cqp_request->list);
437 }
438 spin_unlock_irqrestore(&cqp->req_lock, flags);
439 if (!cqp_request) {
440 cqp_request = kzalloc(sizeof(*cqp_request), GFP_ATOMIC);
441 if (cqp_request) {
442 cqp_request->dynamic = true;
443 if (wait)
444 init_waitqueue_head(&cqp_request->waitq);
445 }
446 }
447 if (!cqp_request) {
448 ibdev_dbg(to_ibdev(cqp->sc_cqp.dev), "ERR: CQP Request Fail: No Memory");
449 return NULL;
450 }
451
452 cqp_request->waiting = wait;
453 refcount_set(&cqp_request->refcnt, 1);
454 memset(&cqp_request->compl_info, 0, sizeof(cqp_request->compl_info));
455 memset(&cqp_request->info, 0, sizeof(cqp_request->info));
456
457 return cqp_request;
458 }
459
460 /**
461 * irdma_get_cqp_request - increase refcount for cqp_request
462 * @cqp_request: pointer to cqp_request instance
463 */
irdma_get_cqp_request(struct irdma_cqp_request * cqp_request)464 static inline void irdma_get_cqp_request(struct irdma_cqp_request *cqp_request)
465 {
466 refcount_inc(&cqp_request->refcnt);
467 }
468
469 /**
470 * irdma_free_cqp_request - free cqp request
471 * @cqp: cqp ptr
472 * @cqp_request: to be put back in cqp list
473 */
irdma_free_cqp_request(struct irdma_cqp * cqp,struct irdma_cqp_request * cqp_request)474 void irdma_free_cqp_request(struct irdma_cqp *cqp,
475 struct irdma_cqp_request *cqp_request)
476 {
477 unsigned long flags;
478
479 if (cqp_request->dynamic) {
480 kfree(cqp_request);
481 } else {
482 WRITE_ONCE(cqp_request->request_done, false);
483 cqp_request->callback_fcn = NULL;
484 cqp_request->waiting = false;
485 cqp_request->pending = false;
486
487 spin_lock_irqsave(&cqp->req_lock, flags);
488 list_add_tail(&cqp_request->list, &cqp->cqp_avail_reqs);
489 spin_unlock_irqrestore(&cqp->req_lock, flags);
490 }
491 wake_up(&cqp->remove_wq);
492 }
493
494 /**
495 * irdma_put_cqp_request - dec ref count and free if 0
496 * @cqp: cqp ptr
497 * @cqp_request: to be put back in cqp list
498 */
irdma_put_cqp_request(struct irdma_cqp * cqp,struct irdma_cqp_request * cqp_request)499 void irdma_put_cqp_request(struct irdma_cqp *cqp,
500 struct irdma_cqp_request *cqp_request)
501 {
502 if (refcount_dec_and_test(&cqp_request->refcnt))
503 irdma_free_cqp_request(cqp, cqp_request);
504 }
505
506 /**
507 * irdma_free_pending_cqp_request -free pending cqp request objs
508 * @cqp: cqp ptr
509 * @cqp_request: to be put back in cqp list
510 */
511 static void
irdma_free_pending_cqp_request(struct irdma_cqp * cqp,struct irdma_cqp_request * cqp_request)512 irdma_free_pending_cqp_request(struct irdma_cqp *cqp,
513 struct irdma_cqp_request *cqp_request)
514 {
515 if (cqp_request->waiting) {
516 cqp_request->compl_info.error = true;
517 WRITE_ONCE(cqp_request->request_done, true);
518 wake_up(&cqp_request->waitq);
519 }
520 wait_event_timeout(cqp->remove_wq,
521 refcount_read(&cqp_request->refcnt) == 1, 1000);
522 irdma_put_cqp_request(cqp, cqp_request);
523 }
524
525 /**
526 * irdma_cleanup_deferred_cqp_ops - clean-up cqp with no completions
527 * @dev: sc_dev
528 * @cqp: cqp
529 */
irdma_cleanup_deferred_cqp_ops(struct irdma_sc_dev * dev,struct irdma_cqp * cqp)530 static void irdma_cleanup_deferred_cqp_ops(struct irdma_sc_dev *dev,
531 struct irdma_cqp *cqp)
532 {
533 u64 scratch;
534
535 /* process all CQP requests with deferred/pending completions */
536 while ((scratch = irdma_sc_cqp_cleanup_handler(dev)))
537 irdma_free_pending_cqp_request(cqp, (struct irdma_cqp_request *)
538 (uintptr_t)scratch);
539 }
540
541 /**
542 * irdma_cleanup_pending_cqp_op - clean-up cqp with no
543 * completions
544 * @rf: RDMA PCI function
545 */
irdma_cleanup_pending_cqp_op(struct irdma_pci_f * rf)546 void irdma_cleanup_pending_cqp_op(struct irdma_pci_f *rf)
547 {
548 struct irdma_sc_dev *dev = &rf->sc_dev;
549 struct irdma_cqp *cqp = &rf->cqp;
550 struct irdma_cqp_request *cqp_request = NULL;
551 struct cqp_cmds_info *pcmdinfo = NULL;
552 u32 i, pending_work, wqe_idx;
553
554 if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_3)
555 irdma_cleanup_deferred_cqp_ops(dev, cqp);
556 pending_work = IRDMA_RING_USED_QUANTA(cqp->sc_cqp.sq_ring);
557 wqe_idx = IRDMA_RING_CURRENT_TAIL(cqp->sc_cqp.sq_ring);
558 for (i = 0; i < pending_work; i++) {
559 cqp_request = (struct irdma_cqp_request *)(unsigned long)
560 cqp->scratch_array[wqe_idx];
561 if (cqp_request)
562 irdma_free_pending_cqp_request(cqp, cqp_request);
563 wqe_idx = (wqe_idx + 1) % IRDMA_RING_SIZE(cqp->sc_cqp.sq_ring);
564 }
565
566 while (!list_empty(&dev->cqp_cmd_head)) {
567 pcmdinfo = irdma_remove_cqp_head(dev);
568 cqp_request =
569 container_of(pcmdinfo, struct irdma_cqp_request, info);
570 if (cqp_request)
571 irdma_free_pending_cqp_request(cqp, cqp_request);
572 }
573 }
574
irdma_get_timeout_threshold(struct irdma_sc_dev * dev)575 static int irdma_get_timeout_threshold(struct irdma_sc_dev *dev)
576 {
577 u16 time_s = dev->vc_caps.cqp_timeout_s;
578
579 if (!time_s)
580 return CQP_TIMEOUT_THRESHOLD;
581
582 return time_s * 1000 / dev->hw_attrs.max_cqp_compl_wait_time_ms;
583 }
584
irdma_get_def_timeout_threshold(struct irdma_sc_dev * dev)585 static int irdma_get_def_timeout_threshold(struct irdma_sc_dev *dev)
586 {
587 u16 time_s = dev->vc_caps.cqp_def_timeout_s;
588
589 if (!time_s)
590 return CQP_DEF_CMPL_TIMEOUT_THRESHOLD;
591
592 return time_s * 1000 / dev->hw_attrs.max_cqp_compl_wait_time_ms;
593 }
594
595 /**
596 * irdma_wait_event - wait for completion
597 * @rf: RDMA PCI function
598 * @cqp_request: cqp request to wait
599 */
irdma_wait_event(struct irdma_pci_f * rf,struct irdma_cqp_request * cqp_request)600 static int irdma_wait_event(struct irdma_pci_f *rf,
601 struct irdma_cqp_request *cqp_request)
602 {
603 struct irdma_cqp_timeout cqp_timeout = {};
604 int timeout_threshold = irdma_get_timeout_threshold(&rf->sc_dev);
605 bool cqp_error = false;
606 int err_code = 0;
607
608 cqp_timeout.compl_cqp_cmds = atomic64_read(&rf->sc_dev.cqp->completed_ops);
609 do {
610 irdma_cqp_ce_handler(rf, &rf->ccq.sc_cq);
611 if (wait_event_timeout(cqp_request->waitq,
612 READ_ONCE(cqp_request->request_done),
613 msecs_to_jiffies(CQP_COMPL_WAIT_TIME_MS)))
614 break;
615
616 if (cqp_request->pending)
617 /* There was a deferred or pending completion
618 * received for this CQP request, so we need
619 * to wait longer than usual.
620 */
621 timeout_threshold =
622 irdma_get_def_timeout_threshold(&rf->sc_dev);
623
624 irdma_check_cqp_progress(&cqp_timeout, &rf->sc_dev);
625
626 if (cqp_timeout.count < timeout_threshold)
627 continue;
628
629 if (!rf->reset) {
630 rf->reset = true;
631 rf->gen_ops.request_reset(rf);
632 }
633 return -ETIMEDOUT;
634 } while (1);
635
636 cqp_error = cqp_request->compl_info.error;
637 if (cqp_error) {
638 err_code = -EIO;
639 if (cqp_request->compl_info.maj_err_code == 0xFFFF) {
640 if (cqp_request->compl_info.min_err_code == 0x8002)
641 err_code = -EBUSY;
642 else if (cqp_request->compl_info.min_err_code == 0x8029) {
643 if (!rf->reset) {
644 rf->reset = true;
645 rf->gen_ops.request_reset(rf);
646 }
647 }
648 }
649 }
650
651 return err_code;
652 }
653
654 static const char *const irdma_cqp_cmd_names[IRDMA_MAX_CQP_OPS] = {
655 [IRDMA_OP_CEQ_DESTROY] = "Destroy CEQ Cmd",
656 [IRDMA_OP_AEQ_DESTROY] = "Destroy AEQ Cmd",
657 [IRDMA_OP_DELETE_ARP_CACHE_ENTRY] = "Delete ARP Cache Cmd",
658 [IRDMA_OP_MANAGE_APBVT_ENTRY] = "Manage APBV Table Entry Cmd",
659 [IRDMA_OP_CEQ_CREATE] = "CEQ Create Cmd",
660 [IRDMA_OP_AEQ_CREATE] = "AEQ Destroy Cmd",
661 [IRDMA_OP_MANAGE_QHASH_TABLE_ENTRY] = "Manage Quad Hash Table Entry Cmd",
662 [IRDMA_OP_QP_MODIFY] = "Modify QP Cmd",
663 [IRDMA_OP_QP_UPLOAD_CONTEXT] = "Upload Context Cmd",
664 [IRDMA_OP_CQ_CREATE] = "Create CQ Cmd",
665 [IRDMA_OP_CQ_DESTROY] = "Destroy CQ Cmd",
666 [IRDMA_OP_QP_CREATE] = "Create QP Cmd",
667 [IRDMA_OP_QP_DESTROY] = "Destroy QP Cmd",
668 [IRDMA_OP_ALLOC_STAG] = "Allocate STag Cmd",
669 [IRDMA_OP_MR_REG_NON_SHARED] = "Register Non-Shared MR Cmd",
670 [IRDMA_OP_DEALLOC_STAG] = "Deallocate STag Cmd",
671 [IRDMA_OP_MW_ALLOC] = "Allocate Memory Window Cmd",
672 [IRDMA_OP_QP_FLUSH_WQES] = "Flush QP Cmd",
673 [IRDMA_OP_ADD_ARP_CACHE_ENTRY] = "Add ARP Cache Cmd",
674 [IRDMA_OP_MANAGE_PUSH_PAGE] = "Manage Push Page Cmd",
675 [IRDMA_OP_UPDATE_PE_SDS] = "Update PE SDs Cmd",
676 [IRDMA_OP_MANAGE_HMC_PM_FUNC_TABLE] = "Manage HMC PM Function Table Cmd",
677 [IRDMA_OP_SUSPEND] = "Suspend QP Cmd",
678 [IRDMA_OP_RESUME] = "Resume QP Cmd",
679 [IRDMA_OP_MANAGE_VF_PBLE_BP] = "Manage VF PBLE Backing Pages Cmd",
680 [IRDMA_OP_QUERY_FPM_VAL] = "Query FPM Values Cmd",
681 [IRDMA_OP_COMMIT_FPM_VAL] = "Commit FPM Values Cmd",
682 [IRDMA_OP_AH_CREATE] = "Create Address Handle Cmd",
683 [IRDMA_OP_AH_MODIFY] = "Modify Address Handle Cmd",
684 [IRDMA_OP_AH_DESTROY] = "Destroy Address Handle Cmd",
685 [IRDMA_OP_MC_CREATE] = "Create Multicast Group Cmd",
686 [IRDMA_OP_MC_DESTROY] = "Destroy Multicast Group Cmd",
687 [IRDMA_OP_MC_MODIFY] = "Modify Multicast Group Cmd",
688 [IRDMA_OP_STATS_ALLOCATE] = "Add Statistics Instance Cmd",
689 [IRDMA_OP_STATS_FREE] = "Free Statistics Instance Cmd",
690 [IRDMA_OP_STATS_GATHER] = "Gather Statistics Cmd",
691 [IRDMA_OP_WS_ADD_NODE] = "Add Work Scheduler Node Cmd",
692 [IRDMA_OP_WS_MODIFY_NODE] = "Modify Work Scheduler Node Cmd",
693 [IRDMA_OP_WS_DELETE_NODE] = "Delete Work Scheduler Node Cmd",
694 [IRDMA_OP_SET_UP_MAP] = "Set UP-UP Mapping Cmd",
695 [IRDMA_OP_GEN_AE] = "Generate AE Cmd",
696 [IRDMA_OP_QUERY_RDMA_FEATURES] = "RDMA Get Features Cmd",
697 [IRDMA_OP_ALLOC_LOCAL_MAC_ENTRY] = "Allocate Local MAC Entry Cmd",
698 [IRDMA_OP_ADD_LOCAL_MAC_ENTRY] = "Add Local MAC Entry Cmd",
699 [IRDMA_OP_DELETE_LOCAL_MAC_ENTRY] = "Delete Local MAC Entry Cmd",
700 [IRDMA_OP_CQ_MODIFY] = "CQ Modify Cmd",
701 [IRDMA_OP_SRQ_CREATE] = "Create SRQ Cmd",
702 [IRDMA_OP_SRQ_MODIFY] = "Modify SRQ Cmd",
703 [IRDMA_OP_SRQ_DESTROY] = "Destroy SRQ Cmd",
704 };
705
706 static const struct irdma_cqp_err_info irdma_noncrit_err_list[] = {
707 {0xffff, 0x8002, "Invalid State"},
708 {0xffff, 0x8006, "Flush No Wqe Pending"},
709 {0xffff, 0x8007, "Modify QP Bad Close"},
710 {0xffff, 0x8009, "LLP Closed"},
711 {0xffff, 0x800a, "Reset Not Sent"}
712 };
713
714 /**
715 * irdma_cqp_crit_err - check if CQP error is critical
716 * @dev: pointer to dev structure
717 * @cqp_cmd: code for last CQP operation
718 * @maj_err_code: major error code
719 * @min_err_code: minot error code
720 */
irdma_cqp_crit_err(struct irdma_sc_dev * dev,u8 cqp_cmd,u16 maj_err_code,u16 min_err_code)721 bool irdma_cqp_crit_err(struct irdma_sc_dev *dev, u8 cqp_cmd,
722 u16 maj_err_code, u16 min_err_code)
723 {
724 int i;
725
726 for (i = 0; i < ARRAY_SIZE(irdma_noncrit_err_list); ++i) {
727 if (maj_err_code == irdma_noncrit_err_list[i].maj &&
728 min_err_code == irdma_noncrit_err_list[i].min) {
729 ibdev_dbg(to_ibdev(dev),
730 "CQP: [%s Error][%s] maj=0x%x min=0x%x\n",
731 irdma_noncrit_err_list[i].desc,
732 irdma_cqp_cmd_names[cqp_cmd], maj_err_code,
733 min_err_code);
734 return false;
735 }
736 }
737 return true;
738 }
739
740 /**
741 * irdma_handle_cqp_op - process cqp command
742 * @rf: RDMA PCI function
743 * @cqp_request: cqp request to process
744 */
irdma_handle_cqp_op(struct irdma_pci_f * rf,struct irdma_cqp_request * cqp_request)745 int irdma_handle_cqp_op(struct irdma_pci_f *rf,
746 struct irdma_cqp_request *cqp_request)
747 {
748 struct irdma_sc_dev *dev = &rf->sc_dev;
749 struct cqp_cmds_info *info = &cqp_request->info;
750 int status;
751 bool put_cqp_request = true;
752
753 if (rf->reset)
754 return -EBUSY;
755
756 irdma_get_cqp_request(cqp_request);
757 status = irdma_process_cqp_cmd(dev, info);
758 if (status)
759 goto err;
760
761 if (cqp_request->waiting) {
762 put_cqp_request = false;
763 status = irdma_wait_event(rf, cqp_request);
764 if (status)
765 goto err;
766 }
767
768 return 0;
769
770 err:
771 if (irdma_cqp_crit_err(dev, info->cqp_cmd,
772 cqp_request->compl_info.maj_err_code,
773 cqp_request->compl_info.min_err_code))
774 ibdev_err(&rf->iwdev->ibdev,
775 "[%s Error][op_code=%d] status=%d waiting=%d completion_err=%d maj=0x%x min=0x%x\n",
776 irdma_cqp_cmd_names[info->cqp_cmd], info->cqp_cmd, status, cqp_request->waiting,
777 cqp_request->compl_info.error, cqp_request->compl_info.maj_err_code,
778 cqp_request->compl_info.min_err_code);
779
780 if (put_cqp_request)
781 irdma_put_cqp_request(&rf->cqp, cqp_request);
782
783 return status;
784 }
785
irdma_qp_add_ref(struct ib_qp * ibqp)786 void irdma_qp_add_ref(struct ib_qp *ibqp)
787 {
788 struct irdma_qp *iwqp = (struct irdma_qp *)ibqp;
789
790 refcount_inc(&iwqp->refcnt);
791 }
792
irdma_qp_rem_ref(struct ib_qp * ibqp)793 void irdma_qp_rem_ref(struct ib_qp *ibqp)
794 {
795 struct irdma_qp *iwqp = to_iwqp(ibqp);
796 struct irdma_device *iwdev = iwqp->iwdev;
797 u32 qp_num;
798 unsigned long flags;
799
800 spin_lock_irqsave(&iwdev->rf->qptable_lock, flags);
801 if (!refcount_dec_and_test(&iwqp->refcnt)) {
802 spin_unlock_irqrestore(&iwdev->rf->qptable_lock, flags);
803 return;
804 }
805
806 qp_num = iwqp->ibqp.qp_num;
807 iwdev->rf->qp_table[qp_num] = NULL;
808 spin_unlock_irqrestore(&iwdev->rf->qptable_lock, flags);
809 complete(&iwqp->free_qp);
810 }
811
irdma_cq_add_ref(struct ib_cq * ibcq)812 void irdma_cq_add_ref(struct ib_cq *ibcq)
813 {
814 struct irdma_cq *iwcq = to_iwcq(ibcq);
815
816 refcount_inc(&iwcq->refcnt);
817 }
818
irdma_cq_rem_ref(struct ib_cq * ibcq)819 void irdma_cq_rem_ref(struct ib_cq *ibcq)
820 {
821 struct ib_device *ibdev = ibcq->device;
822 struct irdma_device *iwdev = to_iwdev(ibdev);
823 struct irdma_cq *iwcq = to_iwcq(ibcq);
824 unsigned long flags;
825
826 spin_lock_irqsave(&iwdev->rf->cqtable_lock, flags);
827 if (!refcount_dec_and_test(&iwcq->refcnt)) {
828 spin_unlock_irqrestore(&iwdev->rf->cqtable_lock, flags);
829 return;
830 }
831
832 iwdev->rf->cq_table[iwcq->cq_num] = NULL;
833 spin_unlock_irqrestore(&iwdev->rf->cqtable_lock, flags);
834 complete(&iwcq->free_cq);
835 }
836
to_ibdev(struct irdma_sc_dev * dev)837 struct ib_device *to_ibdev(struct irdma_sc_dev *dev)
838 {
839 return &(container_of(dev, struct irdma_pci_f, sc_dev))->iwdev->ibdev;
840 }
841
842 /**
843 * irdma_get_qp - get qp address
844 * @device: iwarp device
845 * @qpn: qp number
846 */
irdma_get_qp(struct ib_device * device,int qpn)847 struct ib_qp *irdma_get_qp(struct ib_device *device, int qpn)
848 {
849 struct irdma_device *iwdev = to_iwdev(device);
850
851 if (qpn < IW_FIRST_QPN || qpn >= iwdev->rf->max_qp)
852 return NULL;
853
854 return &iwdev->rf->qp_table[qpn]->ibqp;
855 }
856
857 /**
858 * irdma_remove_cqp_head - return head entry and remove
859 * @dev: device
860 */
irdma_remove_cqp_head(struct irdma_sc_dev * dev)861 void *irdma_remove_cqp_head(struct irdma_sc_dev *dev)
862 {
863 struct list_head *entry;
864 struct list_head *list = &dev->cqp_cmd_head;
865
866 if (list_empty(list))
867 return NULL;
868
869 entry = list->next;
870 list_del(entry);
871
872 return entry;
873 }
874
875 /**
876 * irdma_cqp_sds_cmd - create cqp command for sd
877 * @dev: hardware control device structure
878 * @sdinfo: information for sd cqp
879 *
880 */
irdma_cqp_sds_cmd(struct irdma_sc_dev * dev,struct irdma_update_sds_info * sdinfo)881 int irdma_cqp_sds_cmd(struct irdma_sc_dev *dev,
882 struct irdma_update_sds_info *sdinfo)
883 {
884 struct irdma_cqp_request *cqp_request;
885 struct cqp_cmds_info *cqp_info;
886 struct irdma_pci_f *rf = dev_to_rf(dev);
887 int status;
888
889 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
890 if (!cqp_request)
891 return -ENOMEM;
892
893 cqp_info = &cqp_request->info;
894 memcpy(&cqp_info->in.u.update_pe_sds.info, sdinfo,
895 sizeof(cqp_info->in.u.update_pe_sds.info));
896 cqp_info->cqp_cmd = IRDMA_OP_UPDATE_PE_SDS;
897 cqp_info->post_sq = 1;
898 cqp_info->in.u.update_pe_sds.dev = dev;
899 cqp_info->in.u.update_pe_sds.scratch = (uintptr_t)cqp_request;
900
901 status = irdma_handle_cqp_op(rf, cqp_request);
902 irdma_put_cqp_request(&rf->cqp, cqp_request);
903
904 return status;
905 }
906
907 /**
908 * irdma_cqp_qp_suspend_resume - cqp command for suspend/resume
909 * @qp: hardware control qp
910 * @op: suspend or resume
911 */
irdma_cqp_qp_suspend_resume(struct irdma_sc_qp * qp,u8 op)912 int irdma_cqp_qp_suspend_resume(struct irdma_sc_qp *qp, u8 op)
913 {
914 struct irdma_sc_dev *dev = qp->dev;
915 struct irdma_cqp_request *cqp_request;
916 struct irdma_sc_cqp *cqp = dev->cqp;
917 struct cqp_cmds_info *cqp_info;
918 struct irdma_pci_f *rf = dev_to_rf(dev);
919 int status;
920
921 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, false);
922 if (!cqp_request)
923 return -ENOMEM;
924
925 cqp_info = &cqp_request->info;
926 cqp_info->cqp_cmd = op;
927 cqp_info->in.u.suspend_resume.cqp = cqp;
928 cqp_info->in.u.suspend_resume.qp = qp;
929 cqp_info->in.u.suspend_resume.scratch = (uintptr_t)cqp_request;
930
931 status = irdma_handle_cqp_op(rf, cqp_request);
932 irdma_put_cqp_request(&rf->cqp, cqp_request);
933
934 return status;
935 }
936
937 /**
938 * irdma_term_modify_qp - modify qp for term message
939 * @qp: hardware control qp
940 * @next_state: qp's next state
941 * @term: terminate code
942 * @term_len: length
943 */
irdma_term_modify_qp(struct irdma_sc_qp * qp,u8 next_state,u8 term,u8 term_len)944 void irdma_term_modify_qp(struct irdma_sc_qp *qp, u8 next_state, u8 term,
945 u8 term_len)
946 {
947 struct irdma_qp *iwqp;
948
949 iwqp = qp->qp_uk.back_qp;
950 irdma_next_iw_state(iwqp, next_state, 0, term, term_len);
951 };
952
953 /**
954 * irdma_terminate_done - after terminate is completed
955 * @qp: hardware control qp
956 * @timeout_occurred: indicates if terminate timer expired
957 */
irdma_terminate_done(struct irdma_sc_qp * qp,int timeout_occurred)958 void irdma_terminate_done(struct irdma_sc_qp *qp, int timeout_occurred)
959 {
960 struct irdma_qp *iwqp;
961 u8 hte = 0;
962 bool first_time;
963 unsigned long flags;
964
965 iwqp = qp->qp_uk.back_qp;
966 spin_lock_irqsave(&iwqp->lock, flags);
967 if (iwqp->hte_added) {
968 iwqp->hte_added = 0;
969 hte = 1;
970 }
971 first_time = !(qp->term_flags & IRDMA_TERM_DONE);
972 qp->term_flags |= IRDMA_TERM_DONE;
973 spin_unlock_irqrestore(&iwqp->lock, flags);
974 if (first_time) {
975 if (!timeout_occurred)
976 irdma_terminate_del_timer(qp);
977
978 irdma_next_iw_state(iwqp, IRDMA_QP_STATE_ERROR, hte, 0, 0);
979 irdma_cm_disconn(iwqp);
980 }
981 }
982
irdma_terminate_timeout(struct timer_list * t)983 static void irdma_terminate_timeout(struct timer_list *t)
984 {
985 struct irdma_qp *iwqp = timer_container_of(iwqp, t, terminate_timer);
986 struct irdma_sc_qp *qp = &iwqp->sc_qp;
987
988 irdma_terminate_done(qp, 1);
989 irdma_qp_rem_ref(&iwqp->ibqp);
990 }
991
992 /**
993 * irdma_terminate_start_timer - start terminate timeout
994 * @qp: hardware control qp
995 */
irdma_terminate_start_timer(struct irdma_sc_qp * qp)996 void irdma_terminate_start_timer(struct irdma_sc_qp *qp)
997 {
998 struct irdma_qp *iwqp;
999
1000 iwqp = qp->qp_uk.back_qp;
1001 irdma_qp_add_ref(&iwqp->ibqp);
1002 timer_setup(&iwqp->terminate_timer, irdma_terminate_timeout, 0);
1003 iwqp->terminate_timer.expires = jiffies + HZ;
1004
1005 add_timer(&iwqp->terminate_timer);
1006 }
1007
1008 /**
1009 * irdma_terminate_del_timer - delete terminate timeout
1010 * @qp: hardware control qp
1011 */
irdma_terminate_del_timer(struct irdma_sc_qp * qp)1012 void irdma_terminate_del_timer(struct irdma_sc_qp *qp)
1013 {
1014 struct irdma_qp *iwqp;
1015 int ret;
1016
1017 iwqp = qp->qp_uk.back_qp;
1018 ret = timer_delete(&iwqp->terminate_timer);
1019 if (ret)
1020 irdma_qp_rem_ref(&iwqp->ibqp);
1021 }
1022
1023 /**
1024 * irdma_cqp_cq_create_cmd - create a cq for the cqp
1025 * @dev: device pointer
1026 * @cq: pointer to created cq
1027 */
irdma_cqp_cq_create_cmd(struct irdma_sc_dev * dev,struct irdma_sc_cq * cq)1028 int irdma_cqp_cq_create_cmd(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq)
1029 {
1030 struct irdma_pci_f *rf = dev_to_rf(dev);
1031 struct irdma_cqp *iwcqp = &rf->cqp;
1032 struct irdma_cqp_request *cqp_request;
1033 struct cqp_cmds_info *cqp_info;
1034 int status;
1035
1036 cqp_request = irdma_alloc_and_get_cqp_request(iwcqp, true);
1037 if (!cqp_request)
1038 return -ENOMEM;
1039
1040 cqp_info = &cqp_request->info;
1041 cqp_info->cqp_cmd = IRDMA_OP_CQ_CREATE;
1042 cqp_info->post_sq = 1;
1043 cqp_info->in.u.cq_create.cq = cq;
1044 cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
1045
1046 status = irdma_handle_cqp_op(rf, cqp_request);
1047 irdma_put_cqp_request(iwcqp, cqp_request);
1048
1049 return status;
1050 }
1051
1052 /**
1053 * irdma_cqp_qp_create_cmd - create a qp for the cqp
1054 * @dev: device pointer
1055 * @qp: pointer to created qp
1056 */
irdma_cqp_qp_create_cmd(struct irdma_sc_dev * dev,struct irdma_sc_qp * qp)1057 int irdma_cqp_qp_create_cmd(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp)
1058 {
1059 struct irdma_pci_f *rf = dev_to_rf(dev);
1060 struct irdma_cqp *iwcqp = &rf->cqp;
1061 struct irdma_cqp_request *cqp_request;
1062 struct cqp_cmds_info *cqp_info;
1063 struct irdma_create_qp_info *qp_info;
1064 int status;
1065
1066 cqp_request = irdma_alloc_and_get_cqp_request(iwcqp, true);
1067 if (!cqp_request)
1068 return -ENOMEM;
1069
1070 cqp_info = &cqp_request->info;
1071 qp_info = &cqp_request->info.in.u.qp_create.info;
1072 qp_info->cq_num_valid = true;
1073 qp_info->next_iwarp_state = IRDMA_QP_STATE_RTS;
1074 cqp_info->cqp_cmd = IRDMA_OP_QP_CREATE;
1075 cqp_info->post_sq = 1;
1076 cqp_info->in.u.qp_create.qp = qp;
1077 cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
1078
1079 status = irdma_handle_cqp_op(rf, cqp_request);
1080 irdma_put_cqp_request(iwcqp, cqp_request);
1081
1082 return status;
1083 }
1084
1085 /**
1086 * irdma_dealloc_push_page - free a push page for qp
1087 * @rf: RDMA PCI function
1088 * @qp: hardware control qp
1089 */
irdma_dealloc_push_page(struct irdma_pci_f * rf,struct irdma_sc_qp * qp)1090 static void irdma_dealloc_push_page(struct irdma_pci_f *rf,
1091 struct irdma_sc_qp *qp)
1092 {
1093 struct irdma_cqp_request *cqp_request;
1094 struct cqp_cmds_info *cqp_info;
1095 int status;
1096
1097 if (qp->push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX)
1098 return;
1099
1100 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, false);
1101 if (!cqp_request)
1102 return;
1103
1104 cqp_info = &cqp_request->info;
1105 cqp_info->cqp_cmd = IRDMA_OP_MANAGE_PUSH_PAGE;
1106 cqp_info->post_sq = 1;
1107 cqp_info->in.u.manage_push_page.info.push_idx = qp->push_idx;
1108 cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
1109 cqp_info->in.u.manage_push_page.info.free_page = 1;
1110 cqp_info->in.u.manage_push_page.info.push_page_type = 0;
1111 cqp_info->in.u.manage_push_page.cqp = &rf->cqp.sc_cqp;
1112 cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
1113 status = irdma_handle_cqp_op(rf, cqp_request);
1114 if (!status)
1115 qp->push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX;
1116 irdma_put_cqp_request(&rf->cqp, cqp_request);
1117 }
1118
irdma_free_gsi_qp_rsrc(struct irdma_qp * iwqp,u32 qp_num)1119 static void irdma_free_gsi_qp_rsrc(struct irdma_qp *iwqp, u32 qp_num)
1120 {
1121 struct irdma_device *iwdev = iwqp->iwdev;
1122 struct irdma_pci_f *rf = iwdev->rf;
1123 unsigned long flags;
1124
1125 if (rf->sc_dev.hw_attrs.uk_attrs.hw_rev < IRDMA_GEN_3)
1126 return;
1127
1128 irdma_vchnl_req_del_vport(&rf->sc_dev, iwdev->vport_id, qp_num);
1129
1130 if (qp_num == 1) {
1131 spin_lock_irqsave(&rf->rsrc_lock, flags);
1132 rf->hwqp1_rsvd = false;
1133 spin_unlock_irqrestore(&rf->rsrc_lock, flags);
1134 } else if (qp_num > 2) {
1135 irdma_free_rsrc(rf, rf->allocated_qps, qp_num);
1136 }
1137 }
1138
1139 /**
1140 * irdma_free_qp_rsrc - free up memory resources for qp
1141 * @iwqp: qp ptr (user or kernel)
1142 */
irdma_free_qp_rsrc(struct irdma_qp * iwqp)1143 void irdma_free_qp_rsrc(struct irdma_qp *iwqp)
1144 {
1145 struct irdma_device *iwdev = iwqp->iwdev;
1146 struct irdma_pci_f *rf = iwdev->rf;
1147 u32 qp_num = iwqp->sc_qp.qp_uk.qp_id;
1148
1149 irdma_ieq_cleanup_qp(iwdev->vsi.ieq, &iwqp->sc_qp);
1150 irdma_dealloc_push_page(rf, &iwqp->sc_qp);
1151 if (iwqp->sc_qp.vsi) {
1152 irdma_qp_rem_qos(&iwqp->sc_qp);
1153 iwqp->sc_qp.dev->ws_remove(iwqp->sc_qp.vsi,
1154 iwqp->sc_qp.user_pri);
1155 }
1156
1157 if (iwqp->ibqp.qp_type == IB_QPT_GSI) {
1158 irdma_free_gsi_qp_rsrc(iwqp, qp_num);
1159 } else {
1160 if (qp_num > 2)
1161 irdma_free_rsrc(rf, rf->allocated_qps, qp_num);
1162 }
1163 dma_free_coherent(rf->sc_dev.hw->device, iwqp->q2_ctx_mem.size,
1164 iwqp->q2_ctx_mem.va, iwqp->q2_ctx_mem.pa);
1165 iwqp->q2_ctx_mem.va = NULL;
1166 dma_free_coherent(rf->sc_dev.hw->device, iwqp->kqp.dma_mem.size,
1167 iwqp->kqp.dma_mem.va, iwqp->kqp.dma_mem.pa);
1168 iwqp->kqp.dma_mem.va = NULL;
1169 kfree(iwqp->kqp.sq_wrid_mem);
1170 kfree(iwqp->kqp.rq_wrid_mem);
1171 }
1172
1173 /**
1174 * irdma_srq_wq_destroy - send srq destroy cqp
1175 * @rf: RDMA PCI function
1176 * @srq: hardware control srq
1177 */
irdma_srq_wq_destroy(struct irdma_pci_f * rf,struct irdma_sc_srq * srq)1178 void irdma_srq_wq_destroy(struct irdma_pci_f *rf, struct irdma_sc_srq *srq)
1179 {
1180 struct irdma_cqp_request *cqp_request;
1181 struct cqp_cmds_info *cqp_info;
1182
1183 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
1184 if (!cqp_request)
1185 return;
1186
1187 cqp_info = &cqp_request->info;
1188 cqp_info->cqp_cmd = IRDMA_OP_SRQ_DESTROY;
1189 cqp_info->post_sq = 1;
1190 cqp_info->in.u.srq_destroy.srq = srq;
1191 cqp_info->in.u.srq_destroy.scratch = (uintptr_t)cqp_request;
1192
1193 irdma_handle_cqp_op(rf, cqp_request);
1194 irdma_put_cqp_request(&rf->cqp, cqp_request);
1195 }
1196
1197 /**
1198 * irdma_cq_wq_destroy - send cq destroy cqp
1199 * @rf: RDMA PCI function
1200 * @cq: hardware control cq
1201 */
irdma_cq_wq_destroy(struct irdma_pci_f * rf,struct irdma_sc_cq * cq)1202 void irdma_cq_wq_destroy(struct irdma_pci_f *rf, struct irdma_sc_cq *cq)
1203 {
1204 struct irdma_cqp_request *cqp_request;
1205 struct cqp_cmds_info *cqp_info;
1206
1207 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
1208 if (!cqp_request)
1209 return;
1210
1211 cqp_info = &cqp_request->info;
1212 cqp_info->cqp_cmd = IRDMA_OP_CQ_DESTROY;
1213 cqp_info->post_sq = 1;
1214 cqp_info->in.u.cq_destroy.cq = cq;
1215 cqp_info->in.u.cq_destroy.scratch = (uintptr_t)cqp_request;
1216
1217 irdma_handle_cqp_op(rf, cqp_request);
1218 irdma_put_cqp_request(&rf->cqp, cqp_request);
1219 }
1220
1221 /**
1222 * irdma_hw_modify_qp_callback - handle state for modifyQPs that don't wait
1223 * @cqp_request: modify QP completion
1224 */
irdma_hw_modify_qp_callback(struct irdma_cqp_request * cqp_request)1225 static void irdma_hw_modify_qp_callback(struct irdma_cqp_request *cqp_request)
1226 {
1227 struct cqp_cmds_info *cqp_info;
1228 struct irdma_qp *iwqp;
1229
1230 cqp_info = &cqp_request->info;
1231 iwqp = cqp_info->in.u.qp_modify.qp->qp_uk.back_qp;
1232 atomic_dec(&iwqp->hw_mod_qp_pend);
1233 wake_up(&iwqp->mod_qp_waitq);
1234 }
1235
1236 /**
1237 * irdma_hw_modify_qp - setup cqp for modify qp
1238 * @iwdev: RDMA device
1239 * @iwqp: qp ptr (user or kernel)
1240 * @info: info for modify qp
1241 * @wait: flag to wait or not for modify qp completion
1242 */
irdma_hw_modify_qp(struct irdma_device * iwdev,struct irdma_qp * iwqp,struct irdma_modify_qp_info * info,bool wait)1243 int irdma_hw_modify_qp(struct irdma_device *iwdev, struct irdma_qp *iwqp,
1244 struct irdma_modify_qp_info *info, bool wait)
1245 {
1246 int status;
1247 struct irdma_pci_f *rf = iwdev->rf;
1248 struct irdma_cqp_request *cqp_request;
1249 struct cqp_cmds_info *cqp_info;
1250 struct irdma_modify_qp_info *m_info;
1251
1252 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, wait);
1253 if (!cqp_request)
1254 return -ENOMEM;
1255
1256 if (!wait) {
1257 cqp_request->callback_fcn = irdma_hw_modify_qp_callback;
1258 atomic_inc(&iwqp->hw_mod_qp_pend);
1259 }
1260 cqp_info = &cqp_request->info;
1261 m_info = &cqp_info->in.u.qp_modify.info;
1262 memcpy(m_info, info, sizeof(*m_info));
1263 cqp_info->cqp_cmd = IRDMA_OP_QP_MODIFY;
1264 cqp_info->post_sq = 1;
1265 cqp_info->in.u.qp_modify.qp = &iwqp->sc_qp;
1266 cqp_info->in.u.qp_modify.scratch = (uintptr_t)cqp_request;
1267 status = irdma_handle_cqp_op(rf, cqp_request);
1268 irdma_put_cqp_request(&rf->cqp, cqp_request);
1269 if (status) {
1270 if (rdma_protocol_roce(&iwdev->ibdev, 1))
1271 return status;
1272
1273 switch (m_info->next_iwarp_state) {
1274 struct irdma_gen_ae_info ae_info;
1275
1276 case IRDMA_QP_STATE_RTS:
1277 case IRDMA_QP_STATE_IDLE:
1278 case IRDMA_QP_STATE_TERMINATE:
1279 case IRDMA_QP_STATE_CLOSING:
1280 if (info->curr_iwarp_state == IRDMA_QP_STATE_IDLE)
1281 irdma_send_reset(iwqp->cm_node);
1282 else
1283 iwqp->sc_qp.term_flags = IRDMA_TERM_DONE;
1284 if (!wait) {
1285 ae_info.ae_code = IRDMA_AE_BAD_CLOSE;
1286 ae_info.ae_src = 0;
1287 irdma_gen_ae(rf, &iwqp->sc_qp, &ae_info, false);
1288 } else {
1289 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp,
1290 wait);
1291 if (!cqp_request)
1292 return -ENOMEM;
1293
1294 cqp_info = &cqp_request->info;
1295 m_info = &cqp_info->in.u.qp_modify.info;
1296 memcpy(m_info, info, sizeof(*m_info));
1297 cqp_info->cqp_cmd = IRDMA_OP_QP_MODIFY;
1298 cqp_info->post_sq = 1;
1299 cqp_info->in.u.qp_modify.qp = &iwqp->sc_qp;
1300 cqp_info->in.u.qp_modify.scratch = (uintptr_t)cqp_request;
1301 m_info->next_iwarp_state = IRDMA_QP_STATE_ERROR;
1302 m_info->reset_tcp_conn = true;
1303 irdma_handle_cqp_op(rf, cqp_request);
1304 irdma_put_cqp_request(&rf->cqp, cqp_request);
1305 }
1306 break;
1307 case IRDMA_QP_STATE_ERROR:
1308 default:
1309 break;
1310 }
1311 }
1312
1313 return status;
1314 }
1315
1316 /**
1317 * irdma_cqp_cq_destroy_cmd - destroy the cqp cq
1318 * @dev: device pointer
1319 * @cq: pointer to cq
1320 */
irdma_cqp_cq_destroy_cmd(struct irdma_sc_dev * dev,struct irdma_sc_cq * cq)1321 void irdma_cqp_cq_destroy_cmd(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq)
1322 {
1323 struct irdma_pci_f *rf = dev_to_rf(dev);
1324
1325 irdma_cq_wq_destroy(rf, cq);
1326 }
1327
1328 /**
1329 * irdma_cqp_qp_destroy_cmd - destroy the cqp
1330 * @dev: device pointer
1331 * @qp: pointer to qp
1332 */
irdma_cqp_qp_destroy_cmd(struct irdma_sc_dev * dev,struct irdma_sc_qp * qp)1333 int irdma_cqp_qp_destroy_cmd(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp)
1334 {
1335 struct irdma_pci_f *rf = dev_to_rf(dev);
1336 struct irdma_cqp *iwcqp = &rf->cqp;
1337 struct irdma_cqp_request *cqp_request;
1338 struct cqp_cmds_info *cqp_info;
1339 int status;
1340
1341 cqp_request = irdma_alloc_and_get_cqp_request(iwcqp, true);
1342 if (!cqp_request)
1343 return -ENOMEM;
1344
1345 cqp_info = &cqp_request->info;
1346 cqp_info->cqp_cmd = IRDMA_OP_QP_DESTROY;
1347 cqp_info->post_sq = 1;
1348 cqp_info->in.u.qp_destroy.qp = qp;
1349 cqp_info->in.u.qp_destroy.scratch = (uintptr_t)cqp_request;
1350 cqp_info->in.u.qp_destroy.remove_hash_idx = true;
1351
1352 status = irdma_handle_cqp_op(rf, cqp_request);
1353 irdma_put_cqp_request(&rf->cqp, cqp_request);
1354
1355 return status;
1356 }
1357
1358 /**
1359 * irdma_ieq_mpa_crc_ae - generate AE for crc error
1360 * @dev: hardware control device structure
1361 * @qp: hardware control qp
1362 */
irdma_ieq_mpa_crc_ae(struct irdma_sc_dev * dev,struct irdma_sc_qp * qp)1363 void irdma_ieq_mpa_crc_ae(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp)
1364 {
1365 struct irdma_gen_ae_info info = {};
1366 struct irdma_pci_f *rf = dev_to_rf(dev);
1367
1368 ibdev_dbg(&rf->iwdev->ibdev, "AEQ: Generate MPA CRC AE\n");
1369 info.ae_code = IRDMA_AE_LLP_RECEIVED_MPA_CRC_ERROR;
1370 info.ae_src = IRDMA_AE_SOURCE_RQ;
1371 irdma_gen_ae(rf, qp, &info, false);
1372 }
1373
1374 /**
1375 * irdma_ieq_check_mpacrc - check if mpa crc is OK
1376 * @addr: address of buffer for crc
1377 * @len: length of buffer
1378 * @val: value to be compared
1379 */
irdma_ieq_check_mpacrc(const void * addr,u32 len,u32 val)1380 int irdma_ieq_check_mpacrc(const void *addr, u32 len, u32 val)
1381 {
1382 if ((__force u32)cpu_to_le32(~crc32c(~0, addr, len)) != val)
1383 return -EINVAL;
1384
1385 return 0;
1386 }
1387
1388 /**
1389 * irdma_ieq_get_qp - get qp based on quad in puda buffer
1390 * @dev: hardware control device structure
1391 * @buf: receive puda buffer on exception q
1392 */
irdma_ieq_get_qp(struct irdma_sc_dev * dev,struct irdma_puda_buf * buf)1393 struct irdma_sc_qp *irdma_ieq_get_qp(struct irdma_sc_dev *dev,
1394 struct irdma_puda_buf *buf)
1395 {
1396 struct irdma_qp *iwqp;
1397 struct irdma_cm_node *cm_node;
1398 struct irdma_device *iwdev = buf->vsi->back_vsi;
1399 u32 loc_addr[4] = {};
1400 u32 rem_addr[4] = {};
1401 u16 loc_port, rem_port;
1402 struct ipv6hdr *ip6h;
1403 struct iphdr *iph = (struct iphdr *)buf->iph;
1404 struct tcphdr *tcph = (struct tcphdr *)buf->tcph;
1405
1406 if (iph->version == 4) {
1407 loc_addr[0] = ntohl(iph->daddr);
1408 rem_addr[0] = ntohl(iph->saddr);
1409 } else {
1410 ip6h = (struct ipv6hdr *)buf->iph;
1411 irdma_copy_ip_ntohl(loc_addr, ip6h->daddr.in6_u.u6_addr32);
1412 irdma_copy_ip_ntohl(rem_addr, ip6h->saddr.in6_u.u6_addr32);
1413 }
1414 loc_port = ntohs(tcph->dest);
1415 rem_port = ntohs(tcph->source);
1416 cm_node = irdma_find_node(&iwdev->cm_core, rem_port, rem_addr, loc_port,
1417 loc_addr, buf->vlan_valid ? buf->vlan_id : 0xFFFF);
1418 if (!cm_node)
1419 return NULL;
1420
1421 iwqp = cm_node->iwqp;
1422 irdma_rem_ref_cm_node(cm_node);
1423
1424 return &iwqp->sc_qp;
1425 }
1426
1427 /**
1428 * irdma_send_ieq_ack - ACKs for duplicate or OOO partials FPDUs
1429 * @qp: qp ptr
1430 */
irdma_send_ieq_ack(struct irdma_sc_qp * qp)1431 void irdma_send_ieq_ack(struct irdma_sc_qp *qp)
1432 {
1433 struct irdma_cm_node *cm_node = ((struct irdma_qp *)qp->qp_uk.back_qp)->cm_node;
1434 struct irdma_puda_buf *buf = qp->pfpdu.lastrcv_buf;
1435 struct tcphdr *tcph = (struct tcphdr *)buf->tcph;
1436
1437 cm_node->tcp_cntxt.rcv_nxt = qp->pfpdu.nextseqnum;
1438 cm_node->tcp_cntxt.loc_seq_num = ntohl(tcph->ack_seq);
1439
1440 irdma_send_ack(cm_node);
1441 }
1442
1443 /**
1444 * irdma_puda_ieq_get_ah_info - get AH info from IEQ buffer
1445 * @qp: qp pointer
1446 * @ah_info: AH info pointer
1447 */
irdma_puda_ieq_get_ah_info(struct irdma_sc_qp * qp,struct irdma_ah_info * ah_info)1448 void irdma_puda_ieq_get_ah_info(struct irdma_sc_qp *qp,
1449 struct irdma_ah_info *ah_info)
1450 {
1451 struct irdma_puda_buf *buf = qp->pfpdu.ah_buf;
1452 struct iphdr *iph;
1453 struct ipv6hdr *ip6h;
1454
1455 memset(ah_info, 0, sizeof(*ah_info));
1456 ah_info->do_lpbk = true;
1457 ah_info->vlan_tag = buf->vlan_id;
1458 ah_info->insert_vlan_tag = buf->vlan_valid;
1459 ah_info->ipv4_valid = buf->ipv4;
1460 ah_info->vsi = qp->vsi;
1461
1462 if (buf->smac_valid)
1463 ether_addr_copy(ah_info->mac_addr, buf->smac);
1464
1465 if (buf->ipv4) {
1466 ah_info->ipv4_valid = true;
1467 iph = (struct iphdr *)buf->iph;
1468 ah_info->hop_ttl = iph->ttl;
1469 ah_info->tc_tos = iph->tos;
1470 ah_info->dest_ip_addr[0] = ntohl(iph->daddr);
1471 ah_info->src_ip_addr[0] = ntohl(iph->saddr);
1472 } else {
1473 ip6h = (struct ipv6hdr *)buf->iph;
1474 ah_info->hop_ttl = ip6h->hop_limit;
1475 ah_info->tc_tos = ip6h->priority;
1476 irdma_copy_ip_ntohl(ah_info->dest_ip_addr,
1477 ip6h->daddr.in6_u.u6_addr32);
1478 irdma_copy_ip_ntohl(ah_info->src_ip_addr,
1479 ip6h->saddr.in6_u.u6_addr32);
1480 }
1481
1482 ah_info->dst_arpindex = irdma_arp_table(dev_to_rf(qp->dev),
1483 ah_info->dest_ip_addr,
1484 ah_info->ipv4_valid,
1485 NULL, IRDMA_ARP_RESOLVE);
1486 }
1487
1488 /**
1489 * irdma_gen1_ieq_update_tcpip_info - update tcpip in the buffer
1490 * @buf: puda to update
1491 * @len: length of buffer
1492 * @seqnum: seq number for tcp
1493 */
irdma_gen1_ieq_update_tcpip_info(struct irdma_puda_buf * buf,u16 len,u32 seqnum)1494 static void irdma_gen1_ieq_update_tcpip_info(struct irdma_puda_buf *buf,
1495 u16 len, u32 seqnum)
1496 {
1497 struct tcphdr *tcph;
1498 struct iphdr *iph;
1499 u16 iphlen;
1500 u16 pktsize;
1501 u8 *addr = buf->mem.va;
1502
1503 iphlen = (buf->ipv4) ? 20 : 40;
1504 iph = (struct iphdr *)(addr + buf->maclen);
1505 tcph = (struct tcphdr *)(addr + buf->maclen + iphlen);
1506 pktsize = len + buf->tcphlen + iphlen;
1507 iph->tot_len = htons(pktsize);
1508 tcph->seq = htonl(seqnum);
1509 }
1510
1511 /**
1512 * irdma_ieq_update_tcpip_info - update tcpip in the buffer
1513 * @buf: puda to update
1514 * @len: length of buffer
1515 * @seqnum: seq number for tcp
1516 */
irdma_ieq_update_tcpip_info(struct irdma_puda_buf * buf,u16 len,u32 seqnum)1517 void irdma_ieq_update_tcpip_info(struct irdma_puda_buf *buf, u16 len,
1518 u32 seqnum)
1519 {
1520 struct tcphdr *tcph;
1521 u8 *addr;
1522
1523 if (buf->vsi->dev->hw_attrs.uk_attrs.hw_rev == IRDMA_GEN_1)
1524 return irdma_gen1_ieq_update_tcpip_info(buf, len, seqnum);
1525
1526 addr = buf->mem.va;
1527 tcph = (struct tcphdr *)addr;
1528 tcph->seq = htonl(seqnum);
1529 }
1530
1531 /**
1532 * irdma_gen1_puda_get_tcpip_info - get tcpip info from puda
1533 * buffer
1534 * @info: to get information
1535 * @buf: puda buffer
1536 */
irdma_gen1_puda_get_tcpip_info(struct irdma_puda_cmpl_info * info,struct irdma_puda_buf * buf)1537 static int irdma_gen1_puda_get_tcpip_info(struct irdma_puda_cmpl_info *info,
1538 struct irdma_puda_buf *buf)
1539 {
1540 struct iphdr *iph;
1541 struct ipv6hdr *ip6h;
1542 struct tcphdr *tcph;
1543 u16 iphlen;
1544 u16 pkt_len;
1545 u8 *mem = buf->mem.va;
1546 struct ethhdr *ethh = buf->mem.va;
1547
1548 if (ethh->h_proto == htons(0x8100)) {
1549 info->vlan_valid = true;
1550 buf->vlan_id = ntohs(((struct vlan_ethhdr *)ethh)->h_vlan_TCI) &
1551 VLAN_VID_MASK;
1552 }
1553
1554 buf->maclen = (info->vlan_valid) ? 18 : 14;
1555 iphlen = (info->l3proto) ? 40 : 20;
1556 buf->ipv4 = (info->l3proto) ? false : true;
1557 buf->iph = mem + buf->maclen;
1558 iph = (struct iphdr *)buf->iph;
1559 buf->tcph = buf->iph + iphlen;
1560 tcph = (struct tcphdr *)buf->tcph;
1561
1562 if (buf->ipv4) {
1563 pkt_len = ntohs(iph->tot_len);
1564 } else {
1565 ip6h = (struct ipv6hdr *)buf->iph;
1566 pkt_len = ntohs(ip6h->payload_len) + iphlen;
1567 }
1568
1569 buf->totallen = pkt_len + buf->maclen;
1570
1571 if (info->payload_len < buf->totallen) {
1572 ibdev_dbg(to_ibdev(buf->vsi->dev),
1573 "ERR: payload_len = 0x%x totallen expected0x%x\n",
1574 info->payload_len, buf->totallen);
1575 return -EINVAL;
1576 }
1577
1578 buf->tcphlen = tcph->doff << 2;
1579 buf->datalen = pkt_len - iphlen - buf->tcphlen;
1580 buf->data = buf->datalen ? buf->tcph + buf->tcphlen : NULL;
1581 buf->hdrlen = buf->maclen + iphlen + buf->tcphlen;
1582 buf->seqnum = ntohl(tcph->seq);
1583
1584 return 0;
1585 }
1586
1587 /**
1588 * irdma_puda_get_tcpip_info - get tcpip info from puda buffer
1589 * @info: to get information
1590 * @buf: puda buffer
1591 */
irdma_puda_get_tcpip_info(struct irdma_puda_cmpl_info * info,struct irdma_puda_buf * buf)1592 int irdma_puda_get_tcpip_info(struct irdma_puda_cmpl_info *info,
1593 struct irdma_puda_buf *buf)
1594 {
1595 struct tcphdr *tcph;
1596 u32 pkt_len;
1597 u8 *mem;
1598
1599 if (buf->vsi->dev->hw_attrs.uk_attrs.hw_rev == IRDMA_GEN_1)
1600 return irdma_gen1_puda_get_tcpip_info(info, buf);
1601
1602 mem = buf->mem.va;
1603 buf->vlan_valid = info->vlan_valid;
1604 if (info->vlan_valid)
1605 buf->vlan_id = info->vlan;
1606
1607 buf->ipv4 = info->ipv4;
1608 if (buf->ipv4)
1609 buf->iph = mem + IRDMA_IPV4_PAD;
1610 else
1611 buf->iph = mem;
1612
1613 buf->tcph = mem + IRDMA_TCP_OFFSET;
1614 tcph = (struct tcphdr *)buf->tcph;
1615 pkt_len = info->payload_len;
1616 buf->totallen = pkt_len;
1617 buf->tcphlen = tcph->doff << 2;
1618 buf->datalen = pkt_len - IRDMA_TCP_OFFSET - buf->tcphlen;
1619 buf->data = buf->datalen ? buf->tcph + buf->tcphlen : NULL;
1620 buf->hdrlen = IRDMA_TCP_OFFSET + buf->tcphlen;
1621 buf->seqnum = ntohl(tcph->seq);
1622
1623 if (info->smac_valid) {
1624 ether_addr_copy(buf->smac, info->smac);
1625 buf->smac_valid = true;
1626 }
1627
1628 return 0;
1629 }
1630
1631 /**
1632 * irdma_hw_stats_timeout - Stats timer-handler which updates all HW stats
1633 * @t: timer_list pointer
1634 */
irdma_hw_stats_timeout(struct timer_list * t)1635 static void irdma_hw_stats_timeout(struct timer_list *t)
1636 {
1637 struct irdma_vsi_pestat *pf_devstat =
1638 timer_container_of(pf_devstat, t, stats_timer);
1639 struct irdma_sc_vsi *sc_vsi = pf_devstat->vsi;
1640
1641 if (sc_vsi->dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
1642 irdma_cqp_gather_stats_cmd(sc_vsi->dev, sc_vsi->pestat, false);
1643 else
1644 irdma_cqp_gather_stats_gen1(sc_vsi->dev, sc_vsi->pestat);
1645
1646 mod_timer(&pf_devstat->stats_timer,
1647 jiffies + msecs_to_jiffies(STATS_TIMER_DELAY));
1648 }
1649
1650 /**
1651 * irdma_hw_stats_start_timer - Start periodic stats timer
1652 * @vsi: vsi structure pointer
1653 */
irdma_hw_stats_start_timer(struct irdma_sc_vsi * vsi)1654 void irdma_hw_stats_start_timer(struct irdma_sc_vsi *vsi)
1655 {
1656 struct irdma_vsi_pestat *devstat = vsi->pestat;
1657
1658 timer_setup(&devstat->stats_timer, irdma_hw_stats_timeout, 0);
1659 mod_timer(&devstat->stats_timer,
1660 jiffies + msecs_to_jiffies(STATS_TIMER_DELAY));
1661 }
1662
1663 /**
1664 * irdma_hw_stats_stop_timer - Delete periodic stats timer
1665 * @vsi: pointer to vsi structure
1666 */
irdma_hw_stats_stop_timer(struct irdma_sc_vsi * vsi)1667 void irdma_hw_stats_stop_timer(struct irdma_sc_vsi *vsi)
1668 {
1669 struct irdma_vsi_pestat *devstat = vsi->pestat;
1670
1671 timer_delete_sync(&devstat->stats_timer);
1672 }
1673
1674 /**
1675 * irdma_process_stats - Checking for wrap and update stats
1676 * @pestat: stats structure pointer
1677 */
irdma_process_stats(struct irdma_vsi_pestat * pestat)1678 static inline void irdma_process_stats(struct irdma_vsi_pestat *pestat)
1679 {
1680 sc_vsi_update_stats(pestat->vsi);
1681 }
1682
1683 /**
1684 * irdma_cqp_gather_stats_gen1 - Gather stats
1685 * @dev: pointer to device structure
1686 * @pestat: statistics structure
1687 */
irdma_cqp_gather_stats_gen1(struct irdma_sc_dev * dev,struct irdma_vsi_pestat * pestat)1688 void irdma_cqp_gather_stats_gen1(struct irdma_sc_dev *dev,
1689 struct irdma_vsi_pestat *pestat)
1690 {
1691 struct irdma_gather_stats *gather_stats =
1692 pestat->gather_info.gather_stats_va;
1693 const struct irdma_hw_stat_map *map = dev->hw_stats_map;
1694 u16 max_stats_idx = dev->hw_attrs.max_stat_idx;
1695 u32 stats_inst_offset_32;
1696 u32 stats_inst_offset_64;
1697 u64 new_val;
1698 u16 i;
1699
1700 stats_inst_offset_32 = (pestat->gather_info.use_stats_inst) ?
1701 pestat->gather_info.stats_inst_index :
1702 pestat->hw->hmc.hmc_fn_id;
1703 stats_inst_offset_32 *= 4;
1704 stats_inst_offset_64 = stats_inst_offset_32 * 2;
1705
1706 for (i = 0; i < max_stats_idx; i++) {
1707 if (map[i].bitmask <= IRDMA_MAX_STATS_32)
1708 new_val = rd32(dev->hw,
1709 dev->hw_stats_regs[i] + stats_inst_offset_32);
1710 else
1711 new_val = rd64(dev->hw,
1712 dev->hw_stats_regs[i] + stats_inst_offset_64);
1713 gather_stats->val[map[i].byteoff / sizeof(u64)] = new_val;
1714 }
1715
1716 irdma_process_stats(pestat);
1717 }
1718
1719 /**
1720 * irdma_process_cqp_stats - Checking for wrap and update stats
1721 * @cqp_request: cqp_request structure pointer
1722 */
irdma_process_cqp_stats(struct irdma_cqp_request * cqp_request)1723 static void irdma_process_cqp_stats(struct irdma_cqp_request *cqp_request)
1724 {
1725 struct irdma_vsi_pestat *pestat = cqp_request->param;
1726
1727 irdma_process_stats(pestat);
1728 }
1729
1730 /**
1731 * irdma_cqp_gather_stats_cmd - Gather stats
1732 * @dev: pointer to device structure
1733 * @pestat: pointer to stats info
1734 * @wait: flag to wait or not wait for stats
1735 */
irdma_cqp_gather_stats_cmd(struct irdma_sc_dev * dev,struct irdma_vsi_pestat * pestat,bool wait)1736 int irdma_cqp_gather_stats_cmd(struct irdma_sc_dev *dev,
1737 struct irdma_vsi_pestat *pestat, bool wait)
1738
1739 {
1740 struct irdma_pci_f *rf = dev_to_rf(dev);
1741 struct irdma_cqp *iwcqp = &rf->cqp;
1742 struct irdma_cqp_request *cqp_request;
1743 struct cqp_cmds_info *cqp_info;
1744 int status;
1745
1746 cqp_request = irdma_alloc_and_get_cqp_request(iwcqp, wait);
1747 if (!cqp_request)
1748 return -ENOMEM;
1749
1750 cqp_info = &cqp_request->info;
1751 cqp_info->cqp_cmd = IRDMA_OP_STATS_GATHER;
1752 cqp_info->post_sq = 1;
1753 cqp_info->in.u.stats_gather.info = pestat->gather_info;
1754 cqp_info->in.u.stats_gather.scratch = (uintptr_t)cqp_request;
1755 cqp_info->in.u.stats_gather.cqp = &rf->cqp.sc_cqp;
1756 cqp_request->param = pestat;
1757 if (!wait)
1758 cqp_request->callback_fcn = irdma_process_cqp_stats;
1759 status = irdma_handle_cqp_op(rf, cqp_request);
1760 if (wait)
1761 irdma_process_stats(pestat);
1762 irdma_put_cqp_request(&rf->cqp, cqp_request);
1763
1764 return status;
1765 }
1766
1767 /**
1768 * irdma_cqp_stats_inst_cmd - Allocate/free stats instance
1769 * @vsi: pointer to vsi structure
1770 * @cmd: command to allocate or free
1771 * @stats_info: pointer to allocate stats info
1772 */
irdma_cqp_stats_inst_cmd(struct irdma_sc_vsi * vsi,u8 cmd,struct irdma_stats_inst_info * stats_info)1773 int irdma_cqp_stats_inst_cmd(struct irdma_sc_vsi *vsi, u8 cmd,
1774 struct irdma_stats_inst_info *stats_info)
1775 {
1776 struct irdma_pci_f *rf = dev_to_rf(vsi->dev);
1777 struct irdma_cqp *iwcqp = &rf->cqp;
1778 struct irdma_cqp_request *cqp_request;
1779 struct cqp_cmds_info *cqp_info;
1780 int status;
1781 bool wait = false;
1782
1783 if (cmd == IRDMA_OP_STATS_ALLOCATE)
1784 wait = true;
1785 cqp_request = irdma_alloc_and_get_cqp_request(iwcqp, wait);
1786 if (!cqp_request)
1787 return -ENOMEM;
1788
1789 cqp_info = &cqp_request->info;
1790 cqp_info->cqp_cmd = cmd;
1791 cqp_info->post_sq = 1;
1792 cqp_info->in.u.stats_manage.info = *stats_info;
1793 cqp_info->in.u.stats_manage.scratch = (uintptr_t)cqp_request;
1794 cqp_info->in.u.stats_manage.cqp = &rf->cqp.sc_cqp;
1795 status = irdma_handle_cqp_op(rf, cqp_request);
1796 if (wait)
1797 stats_info->stats_idx = cqp_request->compl_info.op_ret_val;
1798 irdma_put_cqp_request(iwcqp, cqp_request);
1799
1800 return status;
1801 }
1802
1803 /**
1804 * irdma_cqp_ceq_cmd - Create/Destroy CEQ's after CEQ 0
1805 * @dev: pointer to device info
1806 * @sc_ceq: pointer to ceq structure
1807 * @op: Create or Destroy
1808 */
irdma_cqp_ceq_cmd(struct irdma_sc_dev * dev,struct irdma_sc_ceq * sc_ceq,u8 op)1809 int irdma_cqp_ceq_cmd(struct irdma_sc_dev *dev, struct irdma_sc_ceq *sc_ceq,
1810 u8 op)
1811 {
1812 struct irdma_cqp_request *cqp_request;
1813 struct cqp_cmds_info *cqp_info;
1814 struct irdma_pci_f *rf = dev_to_rf(dev);
1815 int status;
1816
1817 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
1818 if (!cqp_request)
1819 return -ENOMEM;
1820
1821 cqp_info = &cqp_request->info;
1822 cqp_info->post_sq = 1;
1823 cqp_info->cqp_cmd = op;
1824 cqp_info->in.u.ceq_create.ceq = sc_ceq;
1825 cqp_info->in.u.ceq_create.scratch = (uintptr_t)cqp_request;
1826
1827 status = irdma_handle_cqp_op(rf, cqp_request);
1828 irdma_put_cqp_request(&rf->cqp, cqp_request);
1829
1830 return status;
1831 }
1832
1833 /**
1834 * irdma_cqp_aeq_cmd - Create/Destroy AEQ
1835 * @dev: pointer to device info
1836 * @sc_aeq: pointer to aeq structure
1837 * @op: Create or Destroy
1838 */
irdma_cqp_aeq_cmd(struct irdma_sc_dev * dev,struct irdma_sc_aeq * sc_aeq,u8 op)1839 int irdma_cqp_aeq_cmd(struct irdma_sc_dev *dev, struct irdma_sc_aeq *sc_aeq,
1840 u8 op)
1841 {
1842 struct irdma_cqp_request *cqp_request;
1843 struct cqp_cmds_info *cqp_info;
1844 struct irdma_pci_f *rf = dev_to_rf(dev);
1845 int status;
1846
1847 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
1848 if (!cqp_request)
1849 return -ENOMEM;
1850
1851 cqp_info = &cqp_request->info;
1852 cqp_info->post_sq = 1;
1853 cqp_info->cqp_cmd = op;
1854 cqp_info->in.u.aeq_create.aeq = sc_aeq;
1855 cqp_info->in.u.aeq_create.scratch = (uintptr_t)cqp_request;
1856
1857 status = irdma_handle_cqp_op(rf, cqp_request);
1858 irdma_put_cqp_request(&rf->cqp, cqp_request);
1859
1860 return status;
1861 }
1862
1863 /**
1864 * irdma_cqp_ws_node_cmd - Add/modify/delete ws node
1865 * @dev: pointer to device structure
1866 * @cmd: Add, modify or delete
1867 * @node_info: pointer to ws node info
1868 */
irdma_cqp_ws_node_cmd(struct irdma_sc_dev * dev,u8 cmd,struct irdma_ws_node_info * node_info)1869 int irdma_cqp_ws_node_cmd(struct irdma_sc_dev *dev, u8 cmd,
1870 struct irdma_ws_node_info *node_info)
1871 {
1872 struct irdma_pci_f *rf = dev_to_rf(dev);
1873 struct irdma_cqp *iwcqp = &rf->cqp;
1874 struct irdma_sc_cqp *cqp = &iwcqp->sc_cqp;
1875 struct irdma_cqp_request *cqp_request;
1876 struct cqp_cmds_info *cqp_info;
1877 int status;
1878 bool poll;
1879
1880 if (!rf->sc_dev.ceq_valid)
1881 poll = true;
1882 else
1883 poll = false;
1884
1885 cqp_request = irdma_alloc_and_get_cqp_request(iwcqp, !poll);
1886 if (!cqp_request)
1887 return -ENOMEM;
1888
1889 cqp_info = &cqp_request->info;
1890 cqp_info->cqp_cmd = cmd;
1891 cqp_info->post_sq = 1;
1892 cqp_info->in.u.ws_node.info = *node_info;
1893 cqp_info->in.u.ws_node.cqp = cqp;
1894 cqp_info->in.u.ws_node.scratch = (uintptr_t)cqp_request;
1895 status = irdma_handle_cqp_op(rf, cqp_request);
1896 if (status)
1897 goto exit;
1898
1899 if (poll) {
1900 struct irdma_ccq_cqe_info compl_info;
1901
1902 status = irdma_sc_poll_for_cqp_op_done(cqp, IRDMA_CQP_OP_WORK_SCHED_NODE,
1903 &compl_info);
1904 node_info->qs_handle = compl_info.op_ret_val;
1905 ibdev_dbg(&rf->iwdev->ibdev, "DCB: opcode=%d, compl_info.retval=%d\n",
1906 compl_info.op_code, compl_info.op_ret_val);
1907 } else {
1908 node_info->qs_handle = cqp_request->compl_info.op_ret_val;
1909 }
1910
1911 exit:
1912 irdma_put_cqp_request(&rf->cqp, cqp_request);
1913
1914 return status;
1915 }
1916
1917 /**
1918 * irdma_ah_cqp_op - perform an AH cqp operation
1919 * @rf: RDMA PCI function
1920 * @sc_ah: address handle
1921 * @cmd: AH operation
1922 * @wait: wait if true
1923 * @callback_fcn: Callback function on CQP op completion
1924 * @cb_param: parameter for callback function
1925 *
1926 * returns errno
1927 */
irdma_ah_cqp_op(struct irdma_pci_f * rf,struct irdma_sc_ah * sc_ah,u8 cmd,bool wait,void (* callback_fcn)(struct irdma_cqp_request *),void * cb_param)1928 int irdma_ah_cqp_op(struct irdma_pci_f *rf, struct irdma_sc_ah *sc_ah, u8 cmd,
1929 bool wait,
1930 void (*callback_fcn)(struct irdma_cqp_request *),
1931 void *cb_param)
1932 {
1933 struct irdma_cqp_request *cqp_request;
1934 struct cqp_cmds_info *cqp_info;
1935 int status;
1936
1937 if (cmd != IRDMA_OP_AH_CREATE && cmd != IRDMA_OP_AH_DESTROY)
1938 return -EINVAL;
1939
1940 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, wait);
1941 if (!cqp_request)
1942 return -ENOMEM;
1943
1944 cqp_info = &cqp_request->info;
1945 cqp_info->cqp_cmd = cmd;
1946 cqp_info->post_sq = 1;
1947 if (cmd == IRDMA_OP_AH_CREATE) {
1948 cqp_info->in.u.ah_create.info = sc_ah->ah_info;
1949 cqp_info->in.u.ah_create.scratch = (uintptr_t)cqp_request;
1950 cqp_info->in.u.ah_create.cqp = &rf->cqp.sc_cqp;
1951 } else if (cmd == IRDMA_OP_AH_DESTROY) {
1952 cqp_info->in.u.ah_destroy.info = sc_ah->ah_info;
1953 cqp_info->in.u.ah_destroy.scratch = (uintptr_t)cqp_request;
1954 cqp_info->in.u.ah_destroy.cqp = &rf->cqp.sc_cqp;
1955 }
1956
1957 if (!wait) {
1958 cqp_request->callback_fcn = callback_fcn;
1959 cqp_request->param = cb_param;
1960 }
1961 status = irdma_handle_cqp_op(rf, cqp_request);
1962 irdma_put_cqp_request(&rf->cqp, cqp_request);
1963
1964 if (status)
1965 return -ENOMEM;
1966
1967 if (wait)
1968 sc_ah->ah_info.ah_valid = (cmd == IRDMA_OP_AH_CREATE);
1969
1970 return 0;
1971 }
1972
1973 /**
1974 * irdma_ieq_ah_cb - callback after creation of AH for IEQ
1975 * @cqp_request: pointer to cqp_request of create AH
1976 */
irdma_ieq_ah_cb(struct irdma_cqp_request * cqp_request)1977 static void irdma_ieq_ah_cb(struct irdma_cqp_request *cqp_request)
1978 {
1979 struct irdma_sc_qp *qp = cqp_request->param;
1980 struct irdma_sc_ah *sc_ah = qp->pfpdu.ah;
1981 unsigned long flags;
1982
1983 spin_lock_irqsave(&qp->pfpdu.lock, flags);
1984 if (!cqp_request->compl_info.op_ret_val) {
1985 sc_ah->ah_info.ah_valid = true;
1986 irdma_ieq_process_fpdus(qp, qp->vsi->ieq);
1987 } else {
1988 sc_ah->ah_info.ah_valid = false;
1989 irdma_ieq_cleanup_qp(qp->vsi->ieq, qp);
1990 }
1991 spin_unlock_irqrestore(&qp->pfpdu.lock, flags);
1992 }
1993
1994 /**
1995 * irdma_ilq_ah_cb - callback after creation of AH for ILQ
1996 * @cqp_request: pointer to cqp_request of create AH
1997 */
irdma_ilq_ah_cb(struct irdma_cqp_request * cqp_request)1998 static void irdma_ilq_ah_cb(struct irdma_cqp_request *cqp_request)
1999 {
2000 struct irdma_cm_node *cm_node = cqp_request->param;
2001 struct irdma_sc_ah *sc_ah = cm_node->ah;
2002
2003 sc_ah->ah_info.ah_valid = !cqp_request->compl_info.op_ret_val;
2004 irdma_add_conn_est_qh(cm_node);
2005 }
2006
2007 /**
2008 * irdma_puda_create_ah - create AH for ILQ/IEQ qp's
2009 * @dev: device pointer
2010 * @ah_info: Address handle info
2011 * @wait: When true will wait for operation to complete
2012 * @type: ILQ/IEQ
2013 * @cb_param: Callback param when not waiting
2014 * @ah_ret: Returned pointer to address handle if created
2015 *
2016 */
irdma_puda_create_ah(struct irdma_sc_dev * dev,struct irdma_ah_info * ah_info,bool wait,enum puda_rsrc_type type,void * cb_param,struct irdma_sc_ah ** ah_ret)2017 int irdma_puda_create_ah(struct irdma_sc_dev *dev,
2018 struct irdma_ah_info *ah_info, bool wait,
2019 enum puda_rsrc_type type, void *cb_param,
2020 struct irdma_sc_ah **ah_ret)
2021 {
2022 struct irdma_sc_ah *ah;
2023 struct irdma_pci_f *rf = dev_to_rf(dev);
2024 int err;
2025
2026 ah = kzalloc(sizeof(*ah), GFP_ATOMIC);
2027 *ah_ret = ah;
2028 if (!ah)
2029 return -ENOMEM;
2030
2031 err = irdma_alloc_rsrc(rf, rf->allocated_ahs, rf->max_ah,
2032 &ah_info->ah_idx, &rf->next_ah);
2033 if (err)
2034 goto err_free;
2035
2036 ah->dev = dev;
2037 ah->ah_info = *ah_info;
2038
2039 if (type == IRDMA_PUDA_RSRC_TYPE_ILQ)
2040 err = irdma_ah_cqp_op(rf, ah, IRDMA_OP_AH_CREATE, wait,
2041 irdma_ilq_ah_cb, cb_param);
2042 else
2043 err = irdma_ah_cqp_op(rf, ah, IRDMA_OP_AH_CREATE, wait,
2044 irdma_ieq_ah_cb, cb_param);
2045
2046 if (err)
2047 goto error;
2048 return 0;
2049
2050 error:
2051 irdma_free_rsrc(rf, rf->allocated_ahs, ah->ah_info.ah_idx);
2052 err_free:
2053 kfree(ah);
2054 *ah_ret = NULL;
2055 return -ENOMEM;
2056 }
2057
2058 /**
2059 * irdma_puda_free_ah - free a puda address handle
2060 * @dev: device pointer
2061 * @ah: The address handle to free
2062 */
irdma_puda_free_ah(struct irdma_sc_dev * dev,struct irdma_sc_ah * ah)2063 void irdma_puda_free_ah(struct irdma_sc_dev *dev, struct irdma_sc_ah *ah)
2064 {
2065 struct irdma_pci_f *rf = dev_to_rf(dev);
2066
2067 if (!ah)
2068 return;
2069
2070 if (ah->ah_info.ah_valid) {
2071 irdma_ah_cqp_op(rf, ah, IRDMA_OP_AH_DESTROY, false, NULL, NULL);
2072 irdma_free_rsrc(rf, rf->allocated_ahs, ah->ah_info.ah_idx);
2073 }
2074
2075 kfree(ah);
2076 }
2077
2078 /**
2079 * irdma_gsi_ud_qp_ah_cb - callback after creation of AH for GSI/ID QP
2080 * @cqp_request: pointer to cqp_request of create AH
2081 */
irdma_gsi_ud_qp_ah_cb(struct irdma_cqp_request * cqp_request)2082 void irdma_gsi_ud_qp_ah_cb(struct irdma_cqp_request *cqp_request)
2083 {
2084 struct irdma_sc_ah *sc_ah = cqp_request->param;
2085
2086 if (!cqp_request->compl_info.op_ret_val)
2087 sc_ah->ah_info.ah_valid = true;
2088 else
2089 sc_ah->ah_info.ah_valid = false;
2090 }
2091
2092 /**
2093 * irdma_prm_add_pble_mem - add moemory to pble resources
2094 * @pprm: pble resource manager
2095 * @pchunk: chunk of memory to add
2096 */
irdma_prm_add_pble_mem(struct irdma_pble_prm * pprm,struct irdma_chunk * pchunk)2097 int irdma_prm_add_pble_mem(struct irdma_pble_prm *pprm,
2098 struct irdma_chunk *pchunk)
2099 {
2100 u64 sizeofbitmap;
2101
2102 if (pchunk->size & 0xfff)
2103 return -EINVAL;
2104
2105 sizeofbitmap = (u64)pchunk->size >> pprm->pble_shift;
2106
2107 pchunk->bitmapbuf = bitmap_zalloc(sizeofbitmap, GFP_KERNEL);
2108 if (!pchunk->bitmapbuf)
2109 return -ENOMEM;
2110
2111 pchunk->sizeofbitmap = sizeofbitmap;
2112 /* each pble is 8 bytes hence shift by 3 */
2113 pprm->total_pble_alloc += pchunk->size >> 3;
2114 pprm->free_pble_cnt += pchunk->size >> 3;
2115
2116 return 0;
2117 }
2118
2119 /**
2120 * irdma_prm_get_pbles - get pble's from prm
2121 * @pprm: pble resource manager
2122 * @chunkinfo: nformation about chunk where pble's were acquired
2123 * @mem_size: size of pble memory needed
2124 * @vaddr: returns virtual address of pble memory
2125 * @fpm_addr: returns fpm address of pble memory
2126 */
irdma_prm_get_pbles(struct irdma_pble_prm * pprm,struct irdma_pble_chunkinfo * chunkinfo,u64 mem_size,u64 ** vaddr,u64 * fpm_addr)2127 int irdma_prm_get_pbles(struct irdma_pble_prm *pprm,
2128 struct irdma_pble_chunkinfo *chunkinfo, u64 mem_size,
2129 u64 **vaddr, u64 *fpm_addr)
2130 {
2131 u64 bits_needed;
2132 u64 bit_idx = PBLE_INVALID_IDX;
2133 struct irdma_chunk *pchunk = NULL;
2134 struct list_head *chunk_entry = pprm->clist.next;
2135 u32 offset;
2136 unsigned long flags;
2137 *vaddr = NULL;
2138 *fpm_addr = 0;
2139
2140 bits_needed = DIV_ROUND_UP_ULL(mem_size, BIT_ULL(pprm->pble_shift));
2141
2142 spin_lock_irqsave(&pprm->prm_lock, flags);
2143 while (chunk_entry != &pprm->clist) {
2144 pchunk = (struct irdma_chunk *)chunk_entry;
2145 bit_idx = bitmap_find_next_zero_area(pchunk->bitmapbuf,
2146 pchunk->sizeofbitmap, 0,
2147 bits_needed, 0);
2148 if (bit_idx < pchunk->sizeofbitmap)
2149 break;
2150
2151 /* list.next used macro */
2152 chunk_entry = pchunk->list.next;
2153 }
2154
2155 if (!pchunk || bit_idx >= pchunk->sizeofbitmap) {
2156 spin_unlock_irqrestore(&pprm->prm_lock, flags);
2157 return -ENOMEM;
2158 }
2159
2160 bitmap_set(pchunk->bitmapbuf, bit_idx, bits_needed);
2161 offset = bit_idx << pprm->pble_shift;
2162 *vaddr = pchunk->vaddr + offset;
2163 *fpm_addr = pchunk->fpm_addr + offset;
2164
2165 chunkinfo->pchunk = pchunk;
2166 chunkinfo->bit_idx = bit_idx;
2167 chunkinfo->bits_used = bits_needed;
2168 /* 3 is sizeof pble divide */
2169 pprm->free_pble_cnt -= chunkinfo->bits_used << (pprm->pble_shift - 3);
2170 spin_unlock_irqrestore(&pprm->prm_lock, flags);
2171
2172 return 0;
2173 }
2174
2175 /**
2176 * irdma_prm_return_pbles - return pbles back to prm
2177 * @pprm: pble resource manager
2178 * @chunkinfo: chunk where pble's were acquired and to be freed
2179 */
irdma_prm_return_pbles(struct irdma_pble_prm * pprm,struct irdma_pble_chunkinfo * chunkinfo)2180 void irdma_prm_return_pbles(struct irdma_pble_prm *pprm,
2181 struct irdma_pble_chunkinfo *chunkinfo)
2182 {
2183 unsigned long flags;
2184
2185 spin_lock_irqsave(&pprm->prm_lock, flags);
2186 pprm->free_pble_cnt += chunkinfo->bits_used << (pprm->pble_shift - 3);
2187 bitmap_clear(chunkinfo->pchunk->bitmapbuf, chunkinfo->bit_idx,
2188 chunkinfo->bits_used);
2189 spin_unlock_irqrestore(&pprm->prm_lock, flags);
2190 }
2191
irdma_map_vm_page_list(struct irdma_hw * hw,void * va,dma_addr_t * pg_dma,u32 pg_cnt)2192 int irdma_map_vm_page_list(struct irdma_hw *hw, void *va, dma_addr_t *pg_dma,
2193 u32 pg_cnt)
2194 {
2195 struct page *vm_page;
2196 int i;
2197 u8 *addr;
2198
2199 addr = (u8 *)(uintptr_t)va;
2200 for (i = 0; i < pg_cnt; i++) {
2201 vm_page = vmalloc_to_page(addr);
2202 if (!vm_page)
2203 goto err;
2204
2205 pg_dma[i] = dma_map_page(hw->device, vm_page, 0, PAGE_SIZE,
2206 DMA_BIDIRECTIONAL);
2207 if (dma_mapping_error(hw->device, pg_dma[i]))
2208 goto err;
2209
2210 addr += PAGE_SIZE;
2211 }
2212
2213 return 0;
2214
2215 err:
2216 irdma_unmap_vm_page_list(hw, pg_dma, i);
2217 return -ENOMEM;
2218 }
2219
irdma_unmap_vm_page_list(struct irdma_hw * hw,dma_addr_t * pg_dma,u32 pg_cnt)2220 void irdma_unmap_vm_page_list(struct irdma_hw *hw, dma_addr_t *pg_dma, u32 pg_cnt)
2221 {
2222 int i;
2223
2224 for (i = 0; i < pg_cnt; i++)
2225 dma_unmap_page(hw->device, pg_dma[i], PAGE_SIZE, DMA_BIDIRECTIONAL);
2226 }
2227
2228 /**
2229 * irdma_pble_free_paged_mem - free virtual paged memory
2230 * @chunk: chunk to free with paged memory
2231 */
irdma_pble_free_paged_mem(struct irdma_chunk * chunk)2232 void irdma_pble_free_paged_mem(struct irdma_chunk *chunk)
2233 {
2234 if (!chunk->pg_cnt)
2235 goto done;
2236
2237 irdma_unmap_vm_page_list(chunk->dev->hw, chunk->dmainfo.dmaaddrs,
2238 chunk->pg_cnt);
2239
2240 done:
2241 kfree(chunk->dmainfo.dmaaddrs);
2242 chunk->dmainfo.dmaaddrs = NULL;
2243 vfree(chunk->vaddr);
2244 chunk->vaddr = NULL;
2245 chunk->type = 0;
2246 }
2247
2248 /**
2249 * irdma_pble_get_paged_mem -allocate paged memory for pbles
2250 * @chunk: chunk to add for paged memory
2251 * @pg_cnt: number of pages needed
2252 */
irdma_pble_get_paged_mem(struct irdma_chunk * chunk,u32 pg_cnt)2253 int irdma_pble_get_paged_mem(struct irdma_chunk *chunk, u32 pg_cnt)
2254 {
2255 u32 size;
2256 void *va;
2257
2258 chunk->dmainfo.dmaaddrs = kzalloc(pg_cnt << 3, GFP_KERNEL);
2259 if (!chunk->dmainfo.dmaaddrs)
2260 return -ENOMEM;
2261
2262 size = PAGE_SIZE * pg_cnt;
2263 va = vmalloc(size);
2264 if (!va)
2265 goto err;
2266
2267 if (irdma_map_vm_page_list(chunk->dev->hw, va, chunk->dmainfo.dmaaddrs,
2268 pg_cnt)) {
2269 vfree(va);
2270 goto err;
2271 }
2272 chunk->vaddr = va;
2273 chunk->size = size;
2274 chunk->pg_cnt = pg_cnt;
2275 chunk->type = PBLE_SD_PAGED;
2276
2277 return 0;
2278 err:
2279 kfree(chunk->dmainfo.dmaaddrs);
2280 chunk->dmainfo.dmaaddrs = NULL;
2281
2282 return -ENOMEM;
2283 }
2284
2285 /**
2286 * irdma_alloc_ws_node_id - Allocate a tx scheduler node ID
2287 * @dev: device pointer
2288 */
irdma_alloc_ws_node_id(struct irdma_sc_dev * dev)2289 u16 irdma_alloc_ws_node_id(struct irdma_sc_dev *dev)
2290 {
2291 struct irdma_pci_f *rf = dev_to_rf(dev);
2292 u32 next = 1;
2293 u32 node_id;
2294
2295 if (irdma_alloc_rsrc(rf, rf->allocated_ws_nodes, rf->max_ws_node_id,
2296 &node_id, &next))
2297 return IRDMA_WS_NODE_INVALID;
2298
2299 return (u16)node_id;
2300 }
2301
2302 /**
2303 * irdma_free_ws_node_id - Free a tx scheduler node ID
2304 * @dev: device pointer
2305 * @node_id: Work scheduler node ID
2306 */
irdma_free_ws_node_id(struct irdma_sc_dev * dev,u16 node_id)2307 void irdma_free_ws_node_id(struct irdma_sc_dev *dev, u16 node_id)
2308 {
2309 struct irdma_pci_f *rf = dev_to_rf(dev);
2310
2311 irdma_free_rsrc(rf, rf->allocated_ws_nodes, (u32)node_id);
2312 }
2313
2314 /**
2315 * irdma_modify_qp_to_err - Modify a QP to error
2316 * @sc_qp: qp structure
2317 */
irdma_modify_qp_to_err(struct irdma_sc_qp * sc_qp)2318 void irdma_modify_qp_to_err(struct irdma_sc_qp *sc_qp)
2319 {
2320 struct irdma_qp *qp = sc_qp->qp_uk.back_qp;
2321 struct ib_qp_attr attr;
2322
2323 if (qp->iwdev->rf->reset)
2324 return;
2325 attr.qp_state = IB_QPS_ERR;
2326
2327 if (rdma_protocol_roce(qp->ibqp.device, 1))
2328 irdma_modify_qp_roce(&qp->ibqp, &attr, IB_QP_STATE, NULL);
2329 else
2330 irdma_modify_qp(&qp->ibqp, &attr, IB_QP_STATE, NULL);
2331 }
2332
irdma_ib_qp_event(struct irdma_qp * iwqp,enum irdma_qp_event_type event)2333 void irdma_ib_qp_event(struct irdma_qp *iwqp, enum irdma_qp_event_type event)
2334 {
2335 struct ib_event ibevent;
2336
2337 if (!iwqp->ibqp.event_handler)
2338 return;
2339
2340 switch (event) {
2341 case IRDMA_QP_EVENT_CATASTROPHIC:
2342 ibevent.event = IB_EVENT_QP_FATAL;
2343 break;
2344 case IRDMA_QP_EVENT_ACCESS_ERR:
2345 ibevent.event = IB_EVENT_QP_ACCESS_ERR;
2346 break;
2347 case IRDMA_QP_EVENT_REQ_ERR:
2348 ibevent.event = IB_EVENT_QP_REQ_ERR;
2349 break;
2350 }
2351 ibevent.device = iwqp->ibqp.device;
2352 ibevent.element.qp = &iwqp->ibqp;
2353 iwqp->ibqp.event_handler(&ibevent, iwqp->ibqp.qp_context);
2354 }
2355
irdma_remove_cmpls_list(struct irdma_cq * iwcq)2356 void irdma_remove_cmpls_list(struct irdma_cq *iwcq)
2357 {
2358 struct irdma_cmpl_gen *cmpl_node;
2359 struct list_head *tmp_node, *list_node;
2360
2361 list_for_each_safe (list_node, tmp_node, &iwcq->cmpl_generated) {
2362 cmpl_node = list_entry(list_node, struct irdma_cmpl_gen, list);
2363 list_del(&cmpl_node->list);
2364 kfree(cmpl_node);
2365 }
2366 }
2367
irdma_generated_cmpls(struct irdma_cq * iwcq,struct irdma_cq_poll_info * cq_poll_info)2368 int irdma_generated_cmpls(struct irdma_cq *iwcq, struct irdma_cq_poll_info *cq_poll_info)
2369 {
2370 struct irdma_cmpl_gen *cmpl;
2371
2372 if (list_empty(&iwcq->cmpl_generated))
2373 return -ENOENT;
2374 cmpl = list_first_entry_or_null(&iwcq->cmpl_generated, struct irdma_cmpl_gen, list);
2375 list_del(&cmpl->list);
2376 memcpy(cq_poll_info, &cmpl->cpi, sizeof(*cq_poll_info));
2377 kfree(cmpl);
2378
2379 ibdev_dbg(iwcq->ibcq.device,
2380 "VERBS: %s: Poll artificially generated completion for QP 0x%X, op %u, wr_id=0x%llx\n",
2381 __func__, cq_poll_info->qp_id, cq_poll_info->op_type,
2382 cq_poll_info->wr_id);
2383
2384 return 0;
2385 }
2386
2387 /**
2388 * irdma_set_cpi_common_values - fill in values for polling info struct
2389 * @cpi: resulting structure of cq_poll_info type
2390 * @qp: QPair
2391 * @qp_num: id of the QP
2392 */
irdma_set_cpi_common_values(struct irdma_cq_poll_info * cpi,struct irdma_qp_uk * qp,u32 qp_num)2393 static void irdma_set_cpi_common_values(struct irdma_cq_poll_info *cpi,
2394 struct irdma_qp_uk *qp, u32 qp_num)
2395 {
2396 cpi->comp_status = IRDMA_COMPL_STATUS_FLUSHED;
2397 cpi->error = true;
2398 cpi->major_err = IRDMA_FLUSH_MAJOR_ERR;
2399 cpi->minor_err = FLUSH_GENERAL_ERR;
2400 cpi->qp_handle = (irdma_qp_handle)(uintptr_t)qp;
2401 cpi->qp_id = qp_num;
2402 }
2403
irdma_comp_handler(struct irdma_cq * cq)2404 static inline void irdma_comp_handler(struct irdma_cq *cq)
2405 {
2406 if (!cq->ibcq.comp_handler)
2407 return;
2408 if (atomic_cmpxchg(&cq->armed, 1, 0))
2409 cq->ibcq.comp_handler(&cq->ibcq, cq->ibcq.cq_context);
2410 }
2411
irdma_generate_flush_completions(struct irdma_qp * iwqp)2412 void irdma_generate_flush_completions(struct irdma_qp *iwqp)
2413 {
2414 struct irdma_qp_uk *qp = &iwqp->sc_qp.qp_uk;
2415 struct irdma_ring *sq_ring = &qp->sq_ring;
2416 struct irdma_ring *rq_ring = &qp->rq_ring;
2417 struct irdma_cq *iwscq = iwqp->iwscq;
2418 struct irdma_cq *iwrcq = iwqp->iwrcq;
2419 struct irdma_cmpl_gen *cmpl;
2420 __le64 *sw_wqe;
2421 u64 wqe_qword;
2422 u32 wqe_idx;
2423 bool compl_generated = false;
2424 unsigned long flags1;
2425
2426 spin_lock_irqsave(&iwscq->lock, flags1);
2427 if (irdma_uk_cq_empty(&iwscq->sc_cq.cq_uk)) {
2428 unsigned long flags2;
2429
2430 spin_lock_irqsave(&iwqp->lock, flags2);
2431 while (IRDMA_RING_MORE_WORK(*sq_ring)) {
2432 cmpl = kzalloc(sizeof(*cmpl), GFP_ATOMIC);
2433 if (!cmpl) {
2434 spin_unlock_irqrestore(&iwqp->lock, flags2);
2435 spin_unlock_irqrestore(&iwscq->lock, flags1);
2436 return;
2437 }
2438
2439 wqe_idx = sq_ring->tail;
2440 irdma_set_cpi_common_values(&cmpl->cpi, qp, qp->qp_id);
2441
2442 cmpl->cpi.wr_id = qp->sq_wrtrk_array[wqe_idx].wrid;
2443 sw_wqe = qp->sq_base[wqe_idx].elem;
2444 get_64bit_val(sw_wqe, 24, &wqe_qword);
2445 cmpl->cpi.op_type = (u8)FIELD_GET(IRDMAQPSQ_OPCODE, IRDMAQPSQ_OPCODE);
2446 cmpl->cpi.q_type = IRDMA_CQE_QTYPE_SQ;
2447 /* remove the SQ WR by moving SQ tail*/
2448 IRDMA_RING_SET_TAIL(*sq_ring,
2449 sq_ring->tail + qp->sq_wrtrk_array[sq_ring->tail].quanta);
2450 if (cmpl->cpi.op_type == IRDMAQP_OP_NOP) {
2451 kfree(cmpl);
2452 continue;
2453 }
2454 ibdev_dbg(iwscq->ibcq.device,
2455 "DEV: %s: adding wr_id = 0x%llx SQ Completion to list qp_id=%d\n",
2456 __func__, cmpl->cpi.wr_id, qp->qp_id);
2457 list_add_tail(&cmpl->list, &iwscq->cmpl_generated);
2458 compl_generated = true;
2459 }
2460 spin_unlock_irqrestore(&iwqp->lock, flags2);
2461 spin_unlock_irqrestore(&iwscq->lock, flags1);
2462 if (compl_generated)
2463 irdma_comp_handler(iwscq);
2464 } else {
2465 spin_unlock_irqrestore(&iwscq->lock, flags1);
2466 mod_delayed_work(iwqp->iwdev->cleanup_wq, &iwqp->dwork_flush,
2467 msecs_to_jiffies(IRDMA_FLUSH_DELAY_MS));
2468 }
2469
2470 spin_lock_irqsave(&iwrcq->lock, flags1);
2471 if (irdma_uk_cq_empty(&iwrcq->sc_cq.cq_uk)) {
2472 unsigned long flags2;
2473
2474 spin_lock_irqsave(&iwqp->lock, flags2);
2475 while (IRDMA_RING_MORE_WORK(*rq_ring)) {
2476 cmpl = kzalloc(sizeof(*cmpl), GFP_ATOMIC);
2477 if (!cmpl) {
2478 spin_unlock_irqrestore(&iwqp->lock, flags2);
2479 spin_unlock_irqrestore(&iwrcq->lock, flags1);
2480 return;
2481 }
2482
2483 wqe_idx = rq_ring->tail;
2484 irdma_set_cpi_common_values(&cmpl->cpi, qp, qp->qp_id);
2485
2486 cmpl->cpi.wr_id = qp->rq_wrid_array[wqe_idx];
2487 cmpl->cpi.op_type = IRDMA_OP_TYPE_REC;
2488 cmpl->cpi.q_type = IRDMA_CQE_QTYPE_RQ;
2489 /* remove the RQ WR by moving RQ tail */
2490 IRDMA_RING_SET_TAIL(*rq_ring, rq_ring->tail + 1);
2491 ibdev_dbg(iwrcq->ibcq.device,
2492 "DEV: %s: adding wr_id = 0x%llx RQ Completion to list qp_id=%d, wqe_idx=%d\n",
2493 __func__, cmpl->cpi.wr_id, qp->qp_id,
2494 wqe_idx);
2495 list_add_tail(&cmpl->list, &iwrcq->cmpl_generated);
2496
2497 compl_generated = true;
2498 }
2499 spin_unlock_irqrestore(&iwqp->lock, flags2);
2500 spin_unlock_irqrestore(&iwrcq->lock, flags1);
2501 if (compl_generated)
2502 irdma_comp_handler(iwrcq);
2503 } else {
2504 spin_unlock_irqrestore(&iwrcq->lock, flags1);
2505 mod_delayed_work(iwqp->iwdev->cleanup_wq, &iwqp->dwork_flush,
2506 msecs_to_jiffies(IRDMA_FLUSH_DELAY_MS));
2507 }
2508 }
2509