1 // SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
2 /*
3 * Support for ST VL53L1X FlightSense ToF Ranging Sensor on a i2c bus.
4 *
5 * Copyright (C) 2026 Siratul Islam <siratul.islam@linux.dev>
6 *
7 * Datasheet available at
8 * <https://www.st.com/resource/en/datasheet/vl53l1x.pdf>
9 *
10 * Default 7-bit i2c slave address 0x29.
11 *
12 * The VL53L1X requires a firmware configuration blob to be loaded at boot.
13 * Register values for the default configuration are taken from
14 * ST's VL53L1X Ultra Lite Driver (STSW-IMG009).
15 */
16
17 #include <linux/array_size.h>
18 #include <linux/bits.h>
19 #include <linux/bitfield.h>
20 #include <linux/completion.h>
21 #include <linux/delay.h>
22 #include <linux/dev_printk.h>
23 #include <linux/err.h>
24 #include <linux/i2c.h>
25 #include <linux/interrupt.h>
26 #include <linux/math.h>
27 #include <linux/module.h>
28 #include <linux/regmap.h>
29 #include <linux/regulator/consumer.h>
30 #include <linux/reset.h>
31 #include <linux/time.h>
32 #include <linux/types.h>
33
34 #include <asm/byteorder.h>
35
36 #include <linux/iio/buffer.h>
37 #include <linux/iio/iio.h>
38 #include <linux/iio/trigger.h>
39 #include <linux/iio/trigger_consumer.h>
40 #include <linux/iio/triggered_buffer.h>
41
42 #define VL53L1X_REG_SOFT_RESET 0x0000
43 #define VL53L1X_REG_VHV_CONFIG__TIMEOUT_MACROP_LOOP_BOUND 0x0008
44 #define VL53L1X_REG_VHV_CONFIG__INIT 0x000B
45 #define VL53L1X_REG_DEFAULT_CONFIG 0x002D
46 #define VL53L1X_REG_GPIO_HV_MUX__CTRL 0x0030
47 #define VL53L1X_REG_GPIO__TIO_HV_STATUS 0x0031
48 #define VL53L1X_REG_SYSTEM__INTERRUPT_CONFIG_GPIO 0x0046
49 #define VL53L1X_REG_PHASECAL_CONFIG__TIMEOUT_MACROP 0x004B
50 #define VL53L1X_REG_RANGE_CONFIG__TIMEOUT_MACROP_A 0x005E
51 #define VL53L1X_REG_RANGE_CONFIG__VCSEL_PERIOD_A 0x0060
52 #define VL53L1X_REG_RANGE_CONFIG__TIMEOUT_MACROP_B 0x0061
53 #define VL53L1X_REG_RANGE_CONFIG__VCSEL_PERIOD_B 0x0063
54 #define VL53L1X_REG_RANGE_CONFIG__VALID_PHASE_HIGH 0x0069
55 #define VL53L1X_REG_SYSTEM__INTERMEASUREMENT_PERIOD 0x006C
56 #define VL53L1X_REG_SD_CONFIG__WOI_SD0 0x0078
57 #define VL53L1X_REG_SD_CONFIG__WOI_SD1 0x0079
58 #define VL53L1X_REG_SD_CONFIG__INITIAL_PHASE_SD0 0x007A
59 #define VL53L1X_REG_SD_CONFIG__INITIAL_PHASE_SD1 0x007B
60 #define VL53L1X_REG_SYSTEM__INTERRUPT_CLEAR 0x0086
61 #define VL53L1X_REG_SYSTEM__MODE_START 0x0087
62 #define VL53L1X_REG_RESULT__RANGE_STATUS 0x0089
63 #define VL53L1X_REG_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 0x0096
64 #define VL53L1X_REG_RESULT__OSC_CALIBRATE_VAL 0x00DE
65 #define VL53L1X_REG_FIRMWARE__SYSTEM_STATUS 0x00E5
66 #define VL53L1X_REG_IDENTIFICATION__MODEL_ID 0x010F
67
68 #define VL53L1X_MODEL_ID_VAL 0xEACC
69
70 #define VL53L1X_MODE_START_TIMED 0x40
71 #define VL53L1X_MODE_START_STOP 0x00
72
73 #define VL53L1X_INT_NEW_SAMPLE_READY 0x02
74
75 #define VL53L1X_GPIO_HV_MUX_POLARITY BIT(4)
76
77 #define VL53L1X_VHV_LOOP_BOUND_TWO 0x09
78
79 #define VL53L1X_RANGE_STATUS_MASK GENMASK(4, 0)
80 #define VL53L1X_RANGE_STATUS_VALID 9
81
82 #define VL53L1X_OSC_CALIBRATE_MASK GENMASK(9, 0)
83
84 #define VL53L1X_FIRMWARE__SYSTEM_STATUS_BOOTED BIT(0)
85 #define VL53L1X_GPIO__TIO_HV_STATUS_DATA_READY BIT(0)
86
87 /* Inter-measurement period uses PLL divider with 1.075 oscillator correction */
88 static const struct u32_fract vl53l1x_osc_correction = {
89 .numerator = 1075,
90 .denominator = 1000,
91 };
92
93 enum vl53l1x_distance_mode {
94 VL53L1X_SHORT,
95 VL53L1X_LONG,
96 };
97
98 struct vl53l1x_data {
99 struct regmap *regmap;
100 struct completion completion;
101 struct reset_control *xshut_reset;
102 enum vl53l1x_distance_mode distance_mode;
103 u8 gpio_polarity;
104 int irq;
105 };
106
107 static const struct regmap_range vl53l1x_volatile_ranges[] = {
108 regmap_reg_range(VL53L1X_REG_GPIO__TIO_HV_STATUS,
109 VL53L1X_REG_GPIO__TIO_HV_STATUS),
110 regmap_reg_range(VL53L1X_REG_RESULT__RANGE_STATUS,
111 VL53L1X_REG_RESULT__RANGE_STATUS),
112 regmap_reg_range(VL53L1X_REG_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0,
113 VL53L1X_REG_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 + 1),
114 regmap_reg_range(VL53L1X_REG_RESULT__OSC_CALIBRATE_VAL,
115 VL53L1X_REG_RESULT__OSC_CALIBRATE_VAL + 1),
116 regmap_reg_range(VL53L1X_REG_FIRMWARE__SYSTEM_STATUS,
117 VL53L1X_REG_FIRMWARE__SYSTEM_STATUS),
118 };
119
120 static const struct regmap_access_table vl53l1x_volatile_table = {
121 .yes_ranges = vl53l1x_volatile_ranges,
122 .n_yes_ranges = ARRAY_SIZE(vl53l1x_volatile_ranges),
123 };
124
125 static const struct regmap_range vl53l1x_write_only_ranges[] = {
126 regmap_reg_range(VL53L1X_REG_SOFT_RESET, VL53L1X_REG_SOFT_RESET),
127 regmap_reg_range(VL53L1X_REG_SYSTEM__INTERRUPT_CLEAR,
128 VL53L1X_REG_SYSTEM__MODE_START),
129 };
130
131 static const struct regmap_access_table vl53l1x_readable_table = {
132 .no_ranges = vl53l1x_write_only_ranges,
133 .n_no_ranges = ARRAY_SIZE(vl53l1x_write_only_ranges),
134 };
135
136 static const struct regmap_config vl53l1x_regmap_config = {
137 .reg_bits = 16,
138 .val_bits = 8,
139 /* MODEL_ID is 16-bit. +1 covers the second byte at 0x0110 */
140 .max_register = VL53L1X_REG_IDENTIFICATION__MODEL_ID + 1,
141 .cache_type = REGCACHE_MAPLE,
142 .volatile_table = &vl53l1x_volatile_table,
143 .rd_table = &vl53l1x_readable_table,
144 };
145
vl53l1x_read_u16(struct vl53l1x_data * data,u16 reg,u16 * val)146 static int vl53l1x_read_u16(struct vl53l1x_data *data, u16 reg, u16 *val)
147 {
148 __be16 buf;
149 int ret;
150
151 ret = regmap_bulk_read(data->regmap, reg, &buf, sizeof(buf));
152 if (ret)
153 return ret;
154
155 *val = be16_to_cpu(buf);
156 return 0;
157 }
158
vl53l1x_write_u16(struct vl53l1x_data * data,u16 reg,u16 val)159 static int vl53l1x_write_u16(struct vl53l1x_data *data, u16 reg, u16 val)
160 {
161 __be16 buf = cpu_to_be16(val);
162
163 return regmap_bulk_write(data->regmap, reg, &buf, sizeof(buf));
164 }
165
vl53l1x_write_u32(struct vl53l1x_data * data,u16 reg,u32 val)166 static int vl53l1x_write_u32(struct vl53l1x_data *data, u16 reg, u32 val)
167 {
168 __be32 buf = cpu_to_be32(val);
169
170 return regmap_bulk_write(data->regmap, reg, &buf, sizeof(buf));
171 }
172
vl53l1x_clear_irq(struct vl53l1x_data * data)173 static int vl53l1x_clear_irq(struct vl53l1x_data *data)
174 {
175 return regmap_write(data->regmap, VL53L1X_REG_SYSTEM__INTERRUPT_CLEAR, 0x01);
176 }
177
vl53l1x_start_ranging(struct vl53l1x_data * data)178 static int vl53l1x_start_ranging(struct vl53l1x_data *data)
179 {
180 int ret;
181
182 ret = vl53l1x_clear_irq(data);
183 if (ret)
184 return ret;
185
186 return regmap_write(data->regmap, VL53L1X_REG_SYSTEM__MODE_START,
187 VL53L1X_MODE_START_TIMED);
188 }
189
vl53l1x_stop_ranging(struct vl53l1x_data * data)190 static int vl53l1x_stop_ranging(struct vl53l1x_data *data)
191 {
192 return regmap_write(data->regmap, VL53L1X_REG_SYSTEM__MODE_START,
193 VL53L1X_MODE_START_STOP);
194 }
195
vl53l1x_wait_data_ready(struct vl53l1x_data * data)196 static int vl53l1x_wait_data_ready(struct vl53l1x_data *data)
197 {
198 unsigned int val;
199
200 /* 1ms poll, 1s timeout covers max timing budgets (per ST Ultra Lite Driver) */
201 return regmap_read_poll_timeout(data->regmap,
202 VL53L1X_REG_GPIO__TIO_HV_STATUS, val,
203 (val & VL53L1X_GPIO__TIO_HV_STATUS_DATA_READY) != data->gpio_polarity,
204 1 * USEC_PER_MSEC, 1 * USEC_PER_SEC);
205 }
206
207 /*
208 * Default configuration blob from ST's VL53L1X Ultra Lite Driver
209 * (STSW-IMG009).
210 */
211 static const u8 vl53l1x_default_config[] = {
212 0x00, 0x00, 0x00, 0x01, 0x02, 0x00, 0x02, 0x08, /* reg 0x2d..0x34 */
213 0x00, 0x08, 0x10, 0x01, 0x01, 0x00, 0x00, 0x00, /* reg 0x35..0x3c */
214 0x00, 0xFF, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, /* reg 0x3d..0x44 */
215 0x00, 0x20, 0x0B, 0x00, 0x00, 0x02, 0x0A, 0x21, /* reg 0x45..0x4c */
216 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0xC8, /* reg 0x4d..0x54 */
217 0x00, 0x00, 0x38, 0xFF, 0x01, 0x00, 0x08, 0x00, /* reg 0x55..0x5c */
218 0x00, 0x01, 0xCC, 0x0F, 0x01, 0xF1, 0x0D, 0x01, /* reg 0x5d..0x64 */
219 0x68, 0x00, 0x80, 0x08, 0xB8, 0x00, 0x00, 0x00, /* reg 0x65..0x6c */
220 0x00, 0x0F, 0x89, 0x00, 0x00, 0x00, 0x00, 0x00, /* reg 0x6d..0x74 */
221 0x00, 0x00, 0x01, 0x0F, 0x0D, 0x0E, 0x0E, 0x00, /* reg 0x75..0x7c */
222 0x00, 0x02, 0xC7, 0xFF, 0x9B, 0x00, 0x00, 0x00, /* reg 0x7d..0x84 */
223 0x01, 0x00, 0x00, /* reg 0x85..0x87 */
224 };
225
vl53l1x_chip_init(struct vl53l1x_data * data)226 static int vl53l1x_chip_init(struct vl53l1x_data *data)
227 {
228 struct device *dev = regmap_get_device(data->regmap);
229 unsigned int val;
230 u16 model_id;
231 int ret;
232
233 if (!data->xshut_reset) {
234 ret = regmap_write(data->regmap, VL53L1X_REG_SOFT_RESET, 0x00);
235 if (ret)
236 return ret;
237 fsleep(100); /* conservative reset pulse, no spec */
238
239 ret = regmap_write(data->regmap, VL53L1X_REG_SOFT_RESET, 0x01);
240 if (ret)
241 return ret;
242 fsleep(1000); /* conservative boot wait, no spec */
243 }
244
245 ret = regmap_read_poll_timeout(data->regmap,
246 VL53L1X_REG_FIRMWARE__SYSTEM_STATUS,
247 val, val & VL53L1X_FIRMWARE__SYSTEM_STATUS_BOOTED,
248 1 * USEC_PER_MSEC, 100 * USEC_PER_MSEC);
249 if (ret)
250 return dev_err_probe(dev, ret, "firmware boot timeout\n");
251
252 ret = vl53l1x_read_u16(data, VL53L1X_REG_IDENTIFICATION__MODEL_ID,
253 &model_id);
254 if (ret)
255 return ret;
256
257 if (model_id != VL53L1X_MODEL_ID_VAL)
258 dev_info(dev, "unknown model id: 0x%04x, continuing\n", model_id);
259
260 ret = regmap_bulk_write(data->regmap, VL53L1X_REG_DEFAULT_CONFIG,
261 vl53l1x_default_config,
262 sizeof(vl53l1x_default_config));
263 if (ret)
264 return ret;
265
266 ret = regmap_read(data->regmap, VL53L1X_REG_GPIO_HV_MUX__CTRL, &val);
267 if (ret)
268 return ret;
269 data->gpio_polarity = !!(val & VL53L1X_GPIO_HV_MUX_POLARITY);
270
271 /* Initial ranging cycle for VHV calibration */
272 ret = vl53l1x_start_ranging(data);
273 if (ret)
274 return ret;
275
276 ret = vl53l1x_wait_data_ready(data);
277 if (ret)
278 return ret;
279
280 ret = vl53l1x_clear_irq(data);
281 if (ret)
282 return ret;
283
284 ret = vl53l1x_stop_ranging(data);
285 if (ret)
286 return ret;
287
288 ret = regmap_write(data->regmap,
289 VL53L1X_REG_VHV_CONFIG__TIMEOUT_MACROP_LOOP_BOUND,
290 VL53L1X_VHV_LOOP_BOUND_TWO);
291 if (ret)
292 return ret;
293
294 return regmap_write(data->regmap, VL53L1X_REG_VHV_CONFIG__INIT, 0x00);
295 }
296
297 static const struct reg_sequence vl53l1x_mode_short[] = {
298 { VL53L1X_REG_PHASECAL_CONFIG__TIMEOUT_MACROP, 0x14 },
299 { VL53L1X_REG_RANGE_CONFIG__VCSEL_PERIOD_A, 0x07 },
300 { VL53L1X_REG_RANGE_CONFIG__VCSEL_PERIOD_B, 0x05 },
301 { VL53L1X_REG_RANGE_CONFIG__VALID_PHASE_HIGH, 0x38 },
302 { VL53L1X_REG_SD_CONFIG__WOI_SD0, 0x07 },
303 { VL53L1X_REG_SD_CONFIG__WOI_SD1, 0x05 },
304 { VL53L1X_REG_SD_CONFIG__INITIAL_PHASE_SD0, 0x06 },
305 { VL53L1X_REG_SD_CONFIG__INITIAL_PHASE_SD1, 0x06 },
306 };
307
308 static const struct reg_sequence vl53l1x_mode_long[] = {
309 { VL53L1X_REG_PHASECAL_CONFIG__TIMEOUT_MACROP, 0x0A },
310 { VL53L1X_REG_RANGE_CONFIG__VCSEL_PERIOD_A, 0x0F },
311 { VL53L1X_REG_RANGE_CONFIG__VCSEL_PERIOD_B, 0x0D },
312 { VL53L1X_REG_RANGE_CONFIG__VALID_PHASE_HIGH, 0xB8 },
313 { VL53L1X_REG_SD_CONFIG__WOI_SD0, 0x0F },
314 { VL53L1X_REG_SD_CONFIG__WOI_SD1, 0x0D },
315 { VL53L1X_REG_SD_CONFIG__INITIAL_PHASE_SD0, 0x0E },
316 { VL53L1X_REG_SD_CONFIG__INITIAL_PHASE_SD1, 0x0E },
317 };
318
319 static const struct {
320 const struct reg_sequence *regs;
321 size_t num_regs;
322 } vl53l1x_mode_configs[] = {
323 [VL53L1X_SHORT] = { vl53l1x_mode_short, ARRAY_SIZE(vl53l1x_mode_short) },
324 [VL53L1X_LONG] = { vl53l1x_mode_long, ARRAY_SIZE(vl53l1x_mode_long) },
325 };
326
vl53l1x_set_distance_mode(struct vl53l1x_data * data,enum vl53l1x_distance_mode mode)327 static int vl53l1x_set_distance_mode(struct vl53l1x_data *data,
328 enum vl53l1x_distance_mode mode)
329 {
330 int ret;
331
332 if (mode >= ARRAY_SIZE(vl53l1x_mode_configs))
333 return -EINVAL;
334
335 ret = regmap_multi_reg_write(data->regmap,
336 vl53l1x_mode_configs[mode].regs,
337 vl53l1x_mode_configs[mode].num_regs);
338 if (ret)
339 return ret;
340
341 data->distance_mode = mode;
342 return 0;
343 }
344
345 /*
346 * The timing budget controls how long the sensor spends collecting
347 * a single range measurement. Pre-computed TIMEOUT_MACROP register
348 * values from ST's VL53L1X Ultra Lite Driver.
349 */
vl53l1x_set_timing_budget(struct vl53l1x_data * data,u16 budget_ms)350 static int vl53l1x_set_timing_budget(struct vl53l1x_data *data, u16 budget_ms)
351 {
352 u16 timeout_a, timeout_b;
353 int ret;
354
355 switch (data->distance_mode) {
356 case VL53L1X_SHORT:
357 switch (budget_ms) {
358 case 15:
359 timeout_a = 0x001D;
360 timeout_b = 0x0027;
361 break;
362 case 20:
363 timeout_a = 0x0051;
364 timeout_b = 0x006E;
365 break;
366 case 33:
367 timeout_a = 0x00D6;
368 timeout_b = 0x006E;
369 break;
370 case 50:
371 timeout_a = 0x01AE;
372 timeout_b = 0x01E8;
373 break;
374 case 100:
375 timeout_a = 0x02E1;
376 timeout_b = 0x0388;
377 break;
378 case 200:
379 timeout_a = 0x03E1;
380 timeout_b = 0x0496;
381 break;
382 case 500:
383 timeout_a = 0x0591;
384 timeout_b = 0x05C1;
385 break;
386 default:
387 return -EINVAL;
388 }
389 break;
390 case VL53L1X_LONG:
391 switch (budget_ms) {
392 case 20:
393 timeout_a = 0x001E;
394 timeout_b = 0x0022;
395 break;
396 case 33:
397 timeout_a = 0x0060;
398 timeout_b = 0x006E;
399 break;
400 case 50:
401 timeout_a = 0x00AD;
402 timeout_b = 0x00C6;
403 break;
404 case 100:
405 timeout_a = 0x01CC;
406 timeout_b = 0x01EA;
407 break;
408 case 200:
409 timeout_a = 0x02D9;
410 timeout_b = 0x02F8;
411 break;
412 case 500:
413 timeout_a = 0x048F;
414 timeout_b = 0x04A4;
415 break;
416 default:
417 return -EINVAL;
418 }
419 break;
420 default:
421 return -EINVAL;
422 }
423
424 ret = vl53l1x_write_u16(data, VL53L1X_REG_RANGE_CONFIG__TIMEOUT_MACROP_A,
425 timeout_a);
426 if (ret)
427 return ret;
428
429 return vl53l1x_write_u16(data, VL53L1X_REG_RANGE_CONFIG__TIMEOUT_MACROP_B,
430 timeout_b);
431 }
432
vl53l1x_set_inter_measurement_ms(struct vl53l1x_data * data,u16 period_ms)433 static int vl53l1x_set_inter_measurement_ms(struct vl53l1x_data *data,
434 u16 period_ms)
435 {
436 u16 osc_calibrate_val;
437 u16 clock_pll;
438 u32 inter_meas;
439 int ret;
440
441 ret = vl53l1x_read_u16(data, VL53L1X_REG_RESULT__OSC_CALIBRATE_VAL,
442 &osc_calibrate_val);
443 if (ret)
444 return ret;
445
446 clock_pll = osc_calibrate_val & VL53L1X_OSC_CALIBRATE_MASK;
447 inter_meas = (clock_pll * period_ms * vl53l1x_osc_correction.numerator) /
448 vl53l1x_osc_correction.denominator;
449
450 return vl53l1x_write_u32(data,
451 VL53L1X_REG_SYSTEM__INTERMEASUREMENT_PERIOD,
452 inter_meas);
453 }
454
vl53l1x_read_proximity(struct vl53l1x_data * data,int * val)455 static int vl53l1x_read_proximity(struct vl53l1x_data *data, int *val)
456 {
457 unsigned int range_status;
458 u16 distance;
459 int ret;
460
461 if (data->irq) {
462 reinit_completion(&data->completion);
463
464 ret = vl53l1x_clear_irq(data);
465 if (ret)
466 return ret;
467
468 if (!wait_for_completion_timeout(&data->completion, HZ))
469 return -ETIMEDOUT;
470 } else {
471 ret = vl53l1x_wait_data_ready(data);
472 if (ret)
473 return ret;
474 }
475
476 ret = regmap_read(data->regmap, VL53L1X_REG_RESULT__RANGE_STATUS,
477 &range_status);
478 if (ret)
479 goto clear_irq;
480
481 if (FIELD_GET(VL53L1X_RANGE_STATUS_MASK, range_status) !=
482 VL53L1X_RANGE_STATUS_VALID) {
483 ret = -EIO;
484 goto clear_irq;
485 }
486
487 ret = vl53l1x_read_u16(data,
488 VL53L1X_REG_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0,
489 &distance);
490 if (ret)
491 goto clear_irq;
492
493 *val = distance;
494
495 clear_irq:
496 vl53l1x_clear_irq(data);
497 return ret;
498 }
499
500 static const struct iio_chan_spec vl53l1x_channels[] = {
501 {
502 .type = IIO_DISTANCE,
503 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
504 BIT(IIO_CHAN_INFO_SCALE),
505 .scan_index = 0,
506 .scan_type = {
507 .sign = 'u',
508 .realbits = 16,
509 .storagebits = 16,
510 },
511 },
512 IIO_CHAN_SOFT_TIMESTAMP(1),
513 };
514
vl53l1x_read_raw(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,int * val,int * val2,long mask)515 static int vl53l1x_read_raw(struct iio_dev *indio_dev,
516 const struct iio_chan_spec *chan,
517 int *val, int *val2, long mask)
518 {
519 struct vl53l1x_data *data = iio_priv(indio_dev);
520 int ret;
521
522 if (chan->type != IIO_DISTANCE)
523 return -EINVAL;
524
525 switch (mask) {
526 case IIO_CHAN_INFO_RAW:
527 if (!iio_device_claim_direct(indio_dev))
528 return -EBUSY;
529 ret = vl53l1x_read_proximity(data, val);
530 iio_device_release_direct(indio_dev);
531 if (ret)
532 return ret;
533 return IIO_VAL_INT;
534 case IIO_CHAN_INFO_SCALE:
535 *val = 0;
536 *val2 = 1000;
537 return IIO_VAL_INT_PLUS_MICRO;
538 default:
539 return -EINVAL;
540 }
541 }
542
543 static const struct iio_info vl53l1x_info = {
544 .read_raw = vl53l1x_read_raw,
545 .validate_trigger = iio_validate_own_trigger,
546 };
547
vl53l1x_trigger_handler(int irq,void * priv)548 static irqreturn_t vl53l1x_trigger_handler(int irq, void *priv)
549 {
550 struct iio_poll_func *pf = priv;
551 struct iio_dev *indio_dev = pf->indio_dev;
552 struct vl53l1x_data *data = iio_priv(indio_dev);
553 struct {
554 u16 distance;
555 aligned_s64 timestamp;
556 } scan = { };
557 unsigned int range_status;
558 int ret;
559
560 ret = regmap_read(data->regmap, VL53L1X_REG_RESULT__RANGE_STATUS,
561 &range_status);
562 if (ret)
563 goto notify_and_clear_irq;
564 if (FIELD_GET(VL53L1X_RANGE_STATUS_MASK, range_status) !=
565 VL53L1X_RANGE_STATUS_VALID)
566 goto notify_and_clear_irq;
567
568 ret = vl53l1x_read_u16(data,
569 VL53L1X_REG_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0,
570 &scan.distance);
571 if (ret)
572 goto notify_and_clear_irq;
573
574 iio_push_to_buffers_with_ts(indio_dev, &scan, sizeof(scan),
575 iio_get_time_ns(indio_dev));
576
577 notify_and_clear_irq:
578 iio_trigger_notify_done(indio_dev->trig);
579 vl53l1x_clear_irq(data);
580
581 return IRQ_HANDLED;
582 }
583
vl53l1x_irq_handler(int irq,void * priv)584 static irqreturn_t vl53l1x_irq_handler(int irq, void *priv)
585 {
586 struct iio_dev *indio_dev = priv;
587 struct vl53l1x_data *data = iio_priv(indio_dev);
588
589 if (iio_buffer_enabled(indio_dev))
590 iio_trigger_poll(indio_dev->trig);
591 else
592 complete(&data->completion);
593
594 return IRQ_HANDLED;
595 }
596
597 static const struct iio_trigger_ops vl53l1x_trigger_ops = {
598 .validate_device = iio_trigger_validate_own_device,
599 };
600
vl53l1x_stop_ranging_action(void * priv)601 static void vl53l1x_stop_ranging_action(void *priv)
602 {
603 vl53l1x_stop_ranging(priv);
604 }
605
vl53l1x_configure_irq(struct device * dev,int irq,struct iio_dev * indio_dev)606 static int vl53l1x_configure_irq(struct device *dev, int irq,
607 struct iio_dev *indio_dev)
608 {
609 struct vl53l1x_data *data = iio_priv(indio_dev);
610 int ret;
611
612 ret = devm_request_irq(dev, irq, vl53l1x_irq_handler, IRQF_NO_THREAD,
613 indio_dev->name, indio_dev);
614 if (ret)
615 return ret;
616
617 ret = regmap_write(data->regmap, VL53L1X_REG_SYSTEM__INTERRUPT_CONFIG_GPIO,
618 VL53L1X_INT_NEW_SAMPLE_READY);
619 if (ret)
620 return dev_err_probe(dev, ret, "failed to configure IRQ\n");
621
622 return 0;
623 }
624
vl53l1x_probe(struct i2c_client * client)625 static int vl53l1x_probe(struct i2c_client *client)
626 {
627 struct device *dev = &client->dev;
628 struct vl53l1x_data *data;
629 struct iio_dev *indio_dev;
630 int ret;
631
632 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
633 if (!indio_dev)
634 return -ENOMEM;
635
636 data = iio_priv(indio_dev);
637 data->irq = client->irq;
638
639 data->regmap = devm_regmap_init_i2c(client, &vl53l1x_regmap_config);
640 if (IS_ERR(data->regmap))
641 return dev_err_probe(dev, PTR_ERR(data->regmap),
642 "regmap initialization failed\n");
643
644 ret = devm_regulator_get_enable(dev, "vdd");
645 if (ret)
646 return dev_err_probe(dev, ret, "Failed to enable VDD regulator\n");
647
648 /*
649 * XSHUT held low puts the chip in hardware standby. All register
650 * state is lost on de-assert so this is functionally a reset.
651 */
652 data->xshut_reset = devm_reset_control_get_optional_exclusive_deasserted(dev, NULL);
653 if (IS_ERR(data->xshut_reset))
654 return dev_err_probe(dev, PTR_ERR(data->xshut_reset),
655 "Cannot get reset control\n");
656
657 /*
658 * 1.2 ms max boot duration.
659 * Datasheet Section 3.6 "Power up and boot sequence".
660 */
661 fsleep(1200);
662
663 ret = vl53l1x_chip_init(data);
664 if (ret)
665 return ret;
666
667 ret = vl53l1x_set_distance_mode(data, VL53L1X_LONG);
668 if (ret)
669 return ret;
670
671 /* 50 ms timing budget (per ST Ultra Lite Driver) */
672 ret = vl53l1x_set_timing_budget(data, 50);
673 if (ret)
674 return ret;
675
676 /* 50 ms inter-measurement period (per ST Ultra Lite Driver) */
677 ret = vl53l1x_set_inter_measurement_ms(data, 50);
678 if (ret)
679 return ret;
680
681 /*
682 * The hardware only supports "autonomous" continuous ranging mode.
683 * Start ranging here and leave it running for the lifetime of
684 * the device. Both direct reads and the buffer path rely on this.
685 */
686 ret = vl53l1x_start_ranging(data);
687 if (ret)
688 return ret;
689
690 ret = devm_add_action_or_reset(dev, vl53l1x_stop_ranging_action, data);
691 if (ret)
692 return ret;
693
694 indio_dev->name = "vl53l1x";
695 indio_dev->info = &vl53l1x_info;
696 indio_dev->channels = vl53l1x_channels;
697 indio_dev->num_channels = ARRAY_SIZE(vl53l1x_channels);
698 indio_dev->modes = INDIO_DIRECT_MODE;
699
700 if (client->irq) {
701 struct iio_trigger *trig;
702
703 init_completion(&data->completion);
704
705 trig = devm_iio_trigger_alloc(dev, "%s-dev%d", indio_dev->name,
706 iio_device_id(indio_dev));
707 if (!trig)
708 return -ENOMEM;
709
710 trig->ops = &vl53l1x_trigger_ops;
711 iio_trigger_set_drvdata(trig, indio_dev);
712 ret = devm_iio_trigger_register(dev, trig);
713 if (ret)
714 return ret;
715
716 indio_dev->trig = iio_trigger_get(trig);
717
718 ret = vl53l1x_configure_irq(dev, client->irq, indio_dev);
719 if (ret)
720 return ret;
721
722 ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
723 &vl53l1x_trigger_handler,
724 NULL);
725 if (ret)
726 return ret;
727 }
728
729 return devm_iio_device_register(dev, indio_dev);
730 }
731
732 static const struct i2c_device_id vl53l1x_id[] = {
733 { .name = "vl53l1x" },
734 { }
735 };
736 MODULE_DEVICE_TABLE(i2c, vl53l1x_id);
737
738 static const struct of_device_id st_vl53l1x_dt_match[] = {
739 { .compatible = "st,vl53l1x" },
740 { }
741 };
742 MODULE_DEVICE_TABLE(of, st_vl53l1x_dt_match);
743
744 static struct i2c_driver vl53l1x_driver = {
745 .driver = {
746 .name = "vl53l1x-i2c",
747 .of_match_table = st_vl53l1x_dt_match,
748 },
749 .probe = vl53l1x_probe,
750 .id_table = vl53l1x_id,
751 };
752 module_i2c_driver(vl53l1x_driver);
753
754 MODULE_AUTHOR("Siratul Islam <siratul.islam@linux.dev>");
755 MODULE_DESCRIPTION("ST VL53L1X ToF ranging sensor driver");
756 MODULE_LICENSE("Dual BSD/GPL");
757