1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * LTC2688 16 channel, 16 bit Voltage Output SoftSpan DAC driver
4 *
5 * Copyright 2022 Analog Devices Inc.
6 */
7 #include <linux/bitfield.h>
8 #include <linux/bits.h>
9 #include <linux/cleanup.h>
10 #include <linux/clk.h>
11 #include <linux/device.h>
12 #include <linux/gpio/consumer.h>
13 #include <linux/iio/iio.h>
14 #include <linux/limits.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/mutex.h>
18 #include <linux/of.h>
19 #include <linux/property.h>
20 #include <linux/regmap.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/spi/spi.h>
23
24 #define LTC2688_DAC_CHANNELS 16
25
26 #define LTC2688_CMD_CH_CODE(x) (0x00 + (x))
27 #define LTC2688_CMD_CH_SETTING(x) (0x10 + (x))
28 #define LTC2688_CMD_CH_OFFSET(x) (0X20 + (x))
29 #define LTC2688_CMD_CH_GAIN(x) (0x30 + (x))
30 #define LTC2688_CMD_CH_CODE_UPDATE(x) (0x40 + (x))
31
32 #define LTC2688_CMD_CONFIG 0x70
33 #define LTC2688_CMD_POWERDOWN 0x71
34 #define LTC2688_CMD_A_B_SELECT 0x72
35 #define LTC2688_CMD_SW_TOGGLE 0x73
36 #define LTC2688_CMD_TOGGLE_DITHER_EN 0x74
37 #define LTC2688_CMD_THERMAL_STAT 0x77
38 #define LTC2688_CMD_UPDATE_ALL 0x7C
39 #define LTC2688_CMD_NOOP 0xFF
40
41 #define LTC2688_READ_OPERATION 0x80
42
43 /* Channel Settings */
44 #define LTC2688_CH_SPAN_MSK GENMASK(2, 0)
45 #define LTC2688_CH_OVERRANGE_MSK BIT(3)
46 #define LTC2688_CH_TD_SEL_MSK GENMASK(5, 4)
47 #define LTC2688_CH_TGP_MAX 3
48 #define LTC2688_CH_DIT_PER_MSK GENMASK(8, 6)
49 #define LTC2688_CH_DIT_PH_MSK GENMASK(10, 9)
50 #define LTC2688_CH_MODE_MSK BIT(11)
51
52 #define LTC2688_DITHER_RAW_MASK GENMASK(15, 2)
53 #define LTC2688_CH_CALIBBIAS_MASK GENMASK(15, 2)
54 #define LTC2688_DITHER_RAW_MAX_VAL (BIT(14) - 1)
55 #define LTC2688_CH_CALIBBIAS_MAX_VAL (BIT(14) - 1)
56
57 /* Configuration register */
58 #define LTC2688_CONFIG_RST BIT(15)
59 #define LTC2688_CONFIG_EXT_REF BIT(1)
60
61 #define LTC2688_DITHER_FREQ_AVAIL_N 5
62
63 enum {
64 LTC2688_SPAN_RANGE_0V_5V,
65 LTC2688_SPAN_RANGE_0V_10V,
66 LTC2688_SPAN_RANGE_M5V_5V,
67 LTC2688_SPAN_RANGE_M10V_10V,
68 LTC2688_SPAN_RANGE_M15V_15V,
69 LTC2688_SPAN_RANGE_MAX
70 };
71
72 enum {
73 LTC2688_MODE_DEFAULT,
74 LTC2688_MODE_DITHER_TOGGLE,
75 };
76
77 struct ltc2688_chan {
78 long dither_frequency[LTC2688_DITHER_FREQ_AVAIL_N];
79 bool overrange;
80 bool toggle_chan;
81 u8 mode;
82 };
83
84 struct ltc2688_state {
85 struct spi_device *spi;
86 struct regmap *regmap;
87 struct ltc2688_chan channels[LTC2688_DAC_CHANNELS];
88 struct iio_chan_spec *iio_chan;
89 /* lock to protect against multiple access to the device and shared data */
90 struct mutex lock;
91 int vref;
92 /*
93 * DMA (thus cache coherency maintenance) may require the
94 * transfer buffers to live in their own cache lines.
95 */
96 u8 tx_data[6] __aligned(IIO_DMA_MINALIGN);
97 u8 rx_data[3];
98 };
99
ltc2688_spi_read(void * context,const void * reg,size_t reg_size,void * val,size_t val_size)100 static int ltc2688_spi_read(void *context, const void *reg, size_t reg_size,
101 void *val, size_t val_size)
102 {
103 struct ltc2688_state *st = context;
104 struct spi_transfer xfers[] = {
105 {
106 .tx_buf = st->tx_data,
107 .len = reg_size + val_size,
108 .cs_change = 1,
109 }, {
110 .tx_buf = st->tx_data + 3,
111 .rx_buf = st->rx_data,
112 .len = reg_size + val_size,
113 },
114 };
115 int ret;
116
117 memcpy(st->tx_data, reg, reg_size);
118
119 ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
120 if (ret)
121 return ret;
122
123 memcpy(val, &st->rx_data[1], val_size);
124
125 return 0;
126 }
127
ltc2688_spi_write(void * context,const void * data,size_t count)128 static int ltc2688_spi_write(void *context, const void *data, size_t count)
129 {
130 struct ltc2688_state *st = context;
131
132 return spi_write(st->spi, data, count);
133 }
134
ltc2688_span_get(const struct ltc2688_state * st,int c)135 static int ltc2688_span_get(const struct ltc2688_state *st, int c)
136 {
137 int ret, reg, span;
138
139 ret = regmap_read(st->regmap, LTC2688_CMD_CH_SETTING(c), ®);
140 if (ret)
141 return ret;
142
143 span = FIELD_GET(LTC2688_CH_SPAN_MSK, reg);
144 /* sanity check to make sure we don't get any weird value from the HW */
145 if (span >= LTC2688_SPAN_RANGE_MAX)
146 return -EIO;
147
148 return span;
149 }
150
151 static const int ltc2688_span_helper[LTC2688_SPAN_RANGE_MAX][2] = {
152 {0, 5000}, {0, 10000}, {-5000, 5000}, {-10000, 10000}, {-15000, 15000},
153 };
154
ltc2688_scale_get(const struct ltc2688_state * st,int c,int * val)155 static int ltc2688_scale_get(const struct ltc2688_state *st, int c, int *val)
156 {
157 const struct ltc2688_chan *chan = &st->channels[c];
158 int span, fs;
159
160 span = ltc2688_span_get(st, c);
161 if (span < 0)
162 return span;
163
164 fs = ltc2688_span_helper[span][1] - ltc2688_span_helper[span][0];
165 if (chan->overrange)
166 fs = mult_frac(fs, 105, 100);
167
168 *val = DIV_ROUND_CLOSEST(fs * st->vref, 4096);
169
170 return 0;
171 }
172
ltc2688_offset_get(const struct ltc2688_state * st,int c,int * val)173 static int ltc2688_offset_get(const struct ltc2688_state *st, int c, int *val)
174 {
175 int span;
176
177 span = ltc2688_span_get(st, c);
178 if (span < 0)
179 return span;
180
181 if (ltc2688_span_helper[span][0] < 0)
182 *val = -32768;
183 else
184 *val = 0;
185
186 return 0;
187 }
188
189 enum {
190 LTC2688_INPUT_A,
191 LTC2688_INPUT_B,
192 LTC2688_INPUT_B_AVAIL,
193 LTC2688_DITHER_OFF,
194 LTC2688_DITHER_FREQ_AVAIL,
195 };
196
ltc2688_dac_code_write(struct ltc2688_state * st,u32 chan,u32 input,u16 code)197 static int ltc2688_dac_code_write(struct ltc2688_state *st, u32 chan, u32 input,
198 u16 code)
199 {
200 struct ltc2688_chan *c = &st->channels[chan];
201 int ret, reg;
202
203 /* 2 LSBs set to 0 if writing dither amplitude */
204 if (!c->toggle_chan && input == LTC2688_INPUT_B) {
205 if (code > LTC2688_DITHER_RAW_MAX_VAL)
206 return -EINVAL;
207
208 code = FIELD_PREP(LTC2688_DITHER_RAW_MASK, code);
209 }
210
211 guard(mutex)(&st->lock);
212 /* select the correct input register to read from */
213 ret = regmap_update_bits(st->regmap, LTC2688_CMD_A_B_SELECT, BIT(chan),
214 input << chan);
215 if (ret)
216 return ret;
217
218 /*
219 * If in dither/toggle mode the dac should be updated by an
220 * external signal (or sw toggle) and not here.
221 */
222 if (c->mode == LTC2688_MODE_DEFAULT)
223 reg = LTC2688_CMD_CH_CODE_UPDATE(chan);
224 else
225 reg = LTC2688_CMD_CH_CODE(chan);
226
227 return regmap_write(st->regmap, reg, code);
228 }
229
ltc2688_dac_code_read(struct ltc2688_state * st,u32 chan,u32 input,u32 * code)230 static int ltc2688_dac_code_read(struct ltc2688_state *st, u32 chan, u32 input,
231 u32 *code)
232 {
233 struct ltc2688_chan *c = &st->channels[chan];
234 int ret;
235
236 guard(mutex)(&st->lock);
237 ret = regmap_update_bits(st->regmap, LTC2688_CMD_A_B_SELECT, BIT(chan),
238 input << chan);
239 if (ret)
240 return ret;
241
242 ret = regmap_read(st->regmap, LTC2688_CMD_CH_CODE(chan), code);
243 if (ret)
244 return ret;
245
246 if (!c->toggle_chan && input == LTC2688_INPUT_B)
247 *code = FIELD_GET(LTC2688_DITHER_RAW_MASK, *code);
248
249 return 0;
250 }
251
252 static const int ltc2688_raw_range[] = {0, 1, U16_MAX};
253
ltc2688_read_avail(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,const int ** vals,int * type,int * length,long info)254 static int ltc2688_read_avail(struct iio_dev *indio_dev,
255 struct iio_chan_spec const *chan,
256 const int **vals, int *type, int *length,
257 long info)
258 {
259 switch (info) {
260 case IIO_CHAN_INFO_RAW:
261 *vals = ltc2688_raw_range;
262 *type = IIO_VAL_INT;
263 return IIO_AVAIL_RANGE;
264 default:
265 return -EINVAL;
266 }
267 }
268
ltc2688_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long info)269 static int ltc2688_read_raw(struct iio_dev *indio_dev,
270 struct iio_chan_spec const *chan, int *val,
271 int *val2, long info)
272 {
273 struct ltc2688_state *st = iio_priv(indio_dev);
274 int ret;
275
276 switch (info) {
277 case IIO_CHAN_INFO_RAW:
278 ret = ltc2688_dac_code_read(st, chan->channel, LTC2688_INPUT_A,
279 val);
280 if (ret)
281 return ret;
282
283 return IIO_VAL_INT;
284 case IIO_CHAN_INFO_OFFSET:
285 ret = ltc2688_offset_get(st, chan->channel, val);
286 if (ret)
287 return ret;
288
289 return IIO_VAL_INT;
290 case IIO_CHAN_INFO_SCALE:
291 ret = ltc2688_scale_get(st, chan->channel, val);
292 if (ret)
293 return ret;
294
295 *val2 = 16;
296 return IIO_VAL_FRACTIONAL_LOG2;
297 case IIO_CHAN_INFO_CALIBBIAS:
298 ret = regmap_read(st->regmap,
299 LTC2688_CMD_CH_OFFSET(chan->channel), val);
300 if (ret)
301 return ret;
302
303 *val = FIELD_GET(LTC2688_CH_CALIBBIAS_MASK, *val);
304 return IIO_VAL_INT;
305 case IIO_CHAN_INFO_CALIBSCALE:
306 ret = regmap_read(st->regmap,
307 LTC2688_CMD_CH_GAIN(chan->channel), val);
308 if (ret)
309 return ret;
310
311 return IIO_VAL_INT;
312 default:
313 return -EINVAL;
314 }
315 }
316
ltc2688_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long info)317 static int ltc2688_write_raw(struct iio_dev *indio_dev,
318 struct iio_chan_spec const *chan, int val,
319 int val2, long info)
320 {
321 struct ltc2688_state *st = iio_priv(indio_dev);
322
323 switch (info) {
324 case IIO_CHAN_INFO_RAW:
325 if (val > U16_MAX || val < 0)
326 return -EINVAL;
327
328 return ltc2688_dac_code_write(st, chan->channel,
329 LTC2688_INPUT_A, val);
330 case IIO_CHAN_INFO_CALIBBIAS:
331 if (val > LTC2688_CH_CALIBBIAS_MAX_VAL)
332 return -EINVAL;
333
334 return regmap_write(st->regmap,
335 LTC2688_CMD_CH_OFFSET(chan->channel),
336 FIELD_PREP(LTC2688_CH_CALIBBIAS_MASK, val));
337 case IIO_CHAN_INFO_CALIBSCALE:
338 return regmap_write(st->regmap,
339 LTC2688_CMD_CH_GAIN(chan->channel), val);
340 default:
341 return -EINVAL;
342 }
343 }
344
ltc2688_dither_toggle_set(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,const char * buf,size_t len)345 static ssize_t ltc2688_dither_toggle_set(struct iio_dev *indio_dev,
346 uintptr_t private,
347 const struct iio_chan_spec *chan,
348 const char *buf, size_t len)
349 {
350 struct ltc2688_state *st = iio_priv(indio_dev);
351 struct ltc2688_chan *c = &st->channels[chan->channel];
352 int ret;
353 bool en;
354
355 ret = kstrtobool(buf, &en);
356 if (ret)
357 return ret;
358
359 guard(mutex)(&st->lock);
360 ret = regmap_update_bits(st->regmap, LTC2688_CMD_TOGGLE_DITHER_EN,
361 BIT(chan->channel), en << chan->channel);
362 if (ret)
363 return ret;
364
365 c->mode = en ? LTC2688_MODE_DITHER_TOGGLE : LTC2688_MODE_DEFAULT;
366
367 return len;
368 }
369
ltc2688_reg_bool_get(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,char * buf)370 static ssize_t ltc2688_reg_bool_get(struct iio_dev *indio_dev,
371 uintptr_t private,
372 const struct iio_chan_spec *chan,
373 char *buf)
374 {
375 const struct ltc2688_state *st = iio_priv(indio_dev);
376 int ret;
377 u32 val;
378
379 ret = regmap_read(st->regmap, private, &val);
380 if (ret)
381 return ret;
382
383 return sysfs_emit(buf, "%u\n", !!(val & BIT(chan->channel)));
384 }
385
ltc2688_reg_bool_set(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,const char * buf,size_t len)386 static ssize_t ltc2688_reg_bool_set(struct iio_dev *indio_dev,
387 uintptr_t private,
388 const struct iio_chan_spec *chan,
389 const char *buf, size_t len)
390 {
391 const struct ltc2688_state *st = iio_priv(indio_dev);
392 int ret;
393 bool en;
394
395 ret = kstrtobool(buf, &en);
396 if (ret)
397 return ret;
398
399 ret = regmap_update_bits(st->regmap, private, BIT(chan->channel),
400 en << chan->channel);
401 if (ret)
402 return ret;
403
404 return len;
405 }
406
ltc2688_dither_freq_avail(const struct ltc2688_state * st,const struct ltc2688_chan * chan,char * buf)407 static ssize_t ltc2688_dither_freq_avail(const struct ltc2688_state *st,
408 const struct ltc2688_chan *chan,
409 char *buf)
410 {
411 int sz = 0;
412 u32 f;
413
414 for (f = 0; f < ARRAY_SIZE(chan->dither_frequency); f++)
415 sz += sysfs_emit_at(buf, sz, "%ld ", chan->dither_frequency[f]);
416
417 buf[sz - 1] = '\n';
418
419 return sz;
420 }
421
ltc2688_dither_freq_get(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,char * buf)422 static ssize_t ltc2688_dither_freq_get(struct iio_dev *indio_dev,
423 uintptr_t private,
424 const struct iio_chan_spec *chan,
425 char *buf)
426 {
427 const struct ltc2688_state *st = iio_priv(indio_dev);
428 const struct ltc2688_chan *c = &st->channels[chan->channel];
429 u32 reg, freq;
430 int ret;
431
432 if (private == LTC2688_DITHER_FREQ_AVAIL)
433 return ltc2688_dither_freq_avail(st, c, buf);
434
435 ret = regmap_read(st->regmap, LTC2688_CMD_CH_SETTING(chan->channel),
436 ®);
437 if (ret)
438 return ret;
439
440 freq = FIELD_GET(LTC2688_CH_DIT_PER_MSK, reg);
441 if (freq >= ARRAY_SIZE(c->dither_frequency))
442 return -EIO;
443
444 return sysfs_emit(buf, "%ld\n", c->dither_frequency[freq]);
445 }
446
ltc2688_dither_freq_set(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,const char * buf,size_t len)447 static ssize_t ltc2688_dither_freq_set(struct iio_dev *indio_dev,
448 uintptr_t private,
449 const struct iio_chan_spec *chan,
450 const char *buf, size_t len)
451 {
452 const struct ltc2688_state *st = iio_priv(indio_dev);
453 const struct ltc2688_chan *c = &st->channels[chan->channel];
454 long val;
455 u32 freq;
456 int ret;
457
458 if (private == LTC2688_DITHER_FREQ_AVAIL)
459 return -EINVAL;
460
461 ret = kstrtol(buf, 10, &val);
462 if (ret)
463 return ret;
464
465 for (freq = 0; freq < ARRAY_SIZE(c->dither_frequency); freq++) {
466 if (val == c->dither_frequency[freq])
467 break;
468 }
469
470 if (freq == ARRAY_SIZE(c->dither_frequency))
471 return -EINVAL;
472
473 ret = regmap_update_bits(st->regmap,
474 LTC2688_CMD_CH_SETTING(chan->channel),
475 LTC2688_CH_DIT_PER_MSK,
476 FIELD_PREP(LTC2688_CH_DIT_PER_MSK, freq));
477 if (ret)
478 return ret;
479
480 return len;
481 }
482
ltc2688_dac_input_read(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,char * buf)483 static ssize_t ltc2688_dac_input_read(struct iio_dev *indio_dev,
484 uintptr_t private,
485 const struct iio_chan_spec *chan,
486 char *buf)
487 {
488 struct ltc2688_state *st = iio_priv(indio_dev);
489 int ret;
490 u32 val;
491
492 if (private == LTC2688_INPUT_B_AVAIL)
493 return sysfs_emit(buf, "[%u %u %u]\n", ltc2688_raw_range[0],
494 ltc2688_raw_range[1],
495 ltc2688_raw_range[2] / 4);
496
497 if (private == LTC2688_DITHER_OFF)
498 return sysfs_emit(buf, "0\n");
499
500 ret = ltc2688_dac_code_read(st, chan->channel, private, &val);
501 if (ret)
502 return ret;
503
504 return sysfs_emit(buf, "%u\n", val);
505 }
506
ltc2688_dac_input_write(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,const char * buf,size_t len)507 static ssize_t ltc2688_dac_input_write(struct iio_dev *indio_dev,
508 uintptr_t private,
509 const struct iio_chan_spec *chan,
510 const char *buf, size_t len)
511 {
512 struct ltc2688_state *st = iio_priv(indio_dev);
513 int ret;
514 u16 val;
515
516 if (private == LTC2688_INPUT_B_AVAIL || private == LTC2688_DITHER_OFF)
517 return -EINVAL;
518
519 ret = kstrtou16(buf, 10, &val);
520 if (ret)
521 return ret;
522
523 ret = ltc2688_dac_code_write(st, chan->channel, private, val);
524 if (ret)
525 return ret;
526
527 return len;
528 }
529
ltc2688_get_dither_phase(struct iio_dev * dev,const struct iio_chan_spec * chan)530 static int ltc2688_get_dither_phase(struct iio_dev *dev,
531 const struct iio_chan_spec *chan)
532 {
533 struct ltc2688_state *st = iio_priv(dev);
534 int ret, regval;
535
536 ret = regmap_read(st->regmap, LTC2688_CMD_CH_SETTING(chan->channel),
537 ®val);
538 if (ret)
539 return ret;
540
541 return FIELD_GET(LTC2688_CH_DIT_PH_MSK, regval);
542 }
543
ltc2688_set_dither_phase(struct iio_dev * dev,const struct iio_chan_spec * chan,unsigned int phase)544 static int ltc2688_set_dither_phase(struct iio_dev *dev,
545 const struct iio_chan_spec *chan,
546 unsigned int phase)
547 {
548 struct ltc2688_state *st = iio_priv(dev);
549
550 return regmap_update_bits(st->regmap,
551 LTC2688_CMD_CH_SETTING(chan->channel),
552 LTC2688_CH_DIT_PH_MSK,
553 FIELD_PREP(LTC2688_CH_DIT_PH_MSK, phase));
554 }
555
ltc2688_reg_access(struct iio_dev * indio_dev,unsigned int reg,unsigned int writeval,unsigned int * readval)556 static int ltc2688_reg_access(struct iio_dev *indio_dev,
557 unsigned int reg,
558 unsigned int writeval,
559 unsigned int *readval)
560 {
561 struct ltc2688_state *st = iio_priv(indio_dev);
562
563 if (readval)
564 return regmap_read(st->regmap, reg, readval);
565
566 return regmap_write(st->regmap, reg, writeval);
567 }
568
569 static const char * const ltc2688_dither_phase[] = {
570 "0", "1.5708", "3.14159", "4.71239",
571 };
572
573 static const struct iio_enum ltc2688_dither_phase_enum = {
574 .items = ltc2688_dither_phase,
575 .num_items = ARRAY_SIZE(ltc2688_dither_phase),
576 .set = ltc2688_set_dither_phase,
577 .get = ltc2688_get_dither_phase,
578 };
579
580 #define LTC2688_CHAN_EXT_INFO(_name, _what, _shared, _read, _write) { \
581 .name = _name, \
582 .read = (_read), \
583 .write = (_write), \
584 .private = (_what), \
585 .shared = (_shared), \
586 }
587
588 /*
589 * For toggle mode we only expose the symbol attr (sw_toggle) in case a TGPx is
590 * not provided in dts.
591 */
592 static const struct iio_chan_spec_ext_info ltc2688_toggle_sym_ext_info[] = {
593 LTC2688_CHAN_EXT_INFO("raw0", LTC2688_INPUT_A, IIO_SEPARATE,
594 ltc2688_dac_input_read, ltc2688_dac_input_write),
595 LTC2688_CHAN_EXT_INFO("raw1", LTC2688_INPUT_B, IIO_SEPARATE,
596 ltc2688_dac_input_read, ltc2688_dac_input_write),
597 LTC2688_CHAN_EXT_INFO("toggle_en", LTC2688_CMD_TOGGLE_DITHER_EN,
598 IIO_SEPARATE, ltc2688_reg_bool_get,
599 ltc2688_dither_toggle_set),
600 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE,
601 ltc2688_reg_bool_get, ltc2688_reg_bool_set),
602 LTC2688_CHAN_EXT_INFO("symbol", LTC2688_CMD_SW_TOGGLE, IIO_SEPARATE,
603 ltc2688_reg_bool_get, ltc2688_reg_bool_set),
604 { }
605 };
606
607 static const struct iio_chan_spec_ext_info ltc2688_toggle_ext_info[] = {
608 LTC2688_CHAN_EXT_INFO("raw0", LTC2688_INPUT_A, IIO_SEPARATE,
609 ltc2688_dac_input_read, ltc2688_dac_input_write),
610 LTC2688_CHAN_EXT_INFO("raw1", LTC2688_INPUT_B, IIO_SEPARATE,
611 ltc2688_dac_input_read, ltc2688_dac_input_write),
612 LTC2688_CHAN_EXT_INFO("toggle_en", LTC2688_CMD_TOGGLE_DITHER_EN,
613 IIO_SEPARATE, ltc2688_reg_bool_get,
614 ltc2688_dither_toggle_set),
615 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE,
616 ltc2688_reg_bool_get, ltc2688_reg_bool_set),
617 { }
618 };
619
620 static const struct iio_chan_spec_ext_info ltc2688_dither_ext_info[] = {
621 LTC2688_CHAN_EXT_INFO("dither_raw", LTC2688_INPUT_B, IIO_SEPARATE,
622 ltc2688_dac_input_read, ltc2688_dac_input_write),
623 LTC2688_CHAN_EXT_INFO("dither_raw_available", LTC2688_INPUT_B_AVAIL,
624 IIO_SEPARATE, ltc2688_dac_input_read,
625 ltc2688_dac_input_write),
626 LTC2688_CHAN_EXT_INFO("dither_offset", LTC2688_DITHER_OFF, IIO_SEPARATE,
627 ltc2688_dac_input_read, ltc2688_dac_input_write),
628 /*
629 * Not IIO_ENUM because the available freq needs to be computed at
630 * probe. We could still use it, but it didn't felt much right.
631 */
632 LTC2688_CHAN_EXT_INFO("dither_frequency", 0, IIO_SEPARATE,
633 ltc2688_dither_freq_get, ltc2688_dither_freq_set),
634 LTC2688_CHAN_EXT_INFO("dither_frequency_available",
635 LTC2688_DITHER_FREQ_AVAIL, IIO_SEPARATE,
636 ltc2688_dither_freq_get, ltc2688_dither_freq_set),
637 IIO_ENUM("dither_phase", IIO_SEPARATE, <c2688_dither_phase_enum),
638 IIO_ENUM_AVAILABLE("dither_phase", IIO_SEPARATE,
639 <c2688_dither_phase_enum),
640 LTC2688_CHAN_EXT_INFO("dither_en", LTC2688_CMD_TOGGLE_DITHER_EN,
641 IIO_SEPARATE, ltc2688_reg_bool_get,
642 ltc2688_dither_toggle_set),
643 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE,
644 ltc2688_reg_bool_get, ltc2688_reg_bool_set),
645 { }
646 };
647
648 static const struct iio_chan_spec_ext_info ltc2688_ext_info[] = {
649 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE,
650 ltc2688_reg_bool_get, ltc2688_reg_bool_set),
651 { }
652 };
653
654 #define LTC2688_CHANNEL(_chan) { \
655 .type = IIO_VOLTAGE, \
656 .indexed = 1, \
657 .output = 1, \
658 .channel = (_chan), \
659 .info_mask_separate = BIT(IIO_CHAN_INFO_CALIBSCALE) | \
660 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET) | \
661 BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_RAW), \
662 .info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW), \
663 .ext_info = ltc2688_ext_info, \
664 }
665
666 static const struct iio_chan_spec ltc2688_channels[] = {
667 LTC2688_CHANNEL(0),
668 LTC2688_CHANNEL(1),
669 LTC2688_CHANNEL(2),
670 LTC2688_CHANNEL(3),
671 LTC2688_CHANNEL(4),
672 LTC2688_CHANNEL(5),
673 LTC2688_CHANNEL(6),
674 LTC2688_CHANNEL(7),
675 LTC2688_CHANNEL(8),
676 LTC2688_CHANNEL(9),
677 LTC2688_CHANNEL(10),
678 LTC2688_CHANNEL(11),
679 LTC2688_CHANNEL(12),
680 LTC2688_CHANNEL(13),
681 LTC2688_CHANNEL(14),
682 LTC2688_CHANNEL(15),
683 };
684
ltc2688_clk_disable(void * clk)685 static void ltc2688_clk_disable(void *clk)
686 {
687 clk_disable_unprepare(clk);
688 }
689
690 static const int ltc2688_period[LTC2688_DITHER_FREQ_AVAIL_N] = {
691 4, 8, 16, 32, 64,
692 };
693
ltc2688_tgp_clk_setup(struct ltc2688_state * st,struct ltc2688_chan * chan,struct fwnode_handle * node,int tgp)694 static int ltc2688_tgp_clk_setup(struct ltc2688_state *st,
695 struct ltc2688_chan *chan,
696 struct fwnode_handle *node, int tgp)
697 {
698 struct device *dev = &st->spi->dev;
699 unsigned long rate;
700 struct clk *clk;
701 int ret, f;
702
703 clk = devm_get_clk_from_child(dev, to_of_node(node), NULL);
704 if (IS_ERR(clk))
705 return dev_err_probe(dev, PTR_ERR(clk), "failed to get tgp clk.\n");
706
707 ret = clk_prepare_enable(clk);
708 if (ret)
709 return dev_err_probe(dev, ret, "failed to enable tgp clk.\n");
710
711 ret = devm_add_action_or_reset(dev, ltc2688_clk_disable, clk);
712 if (ret)
713 return ret;
714
715 if (chan->toggle_chan)
716 return 0;
717
718 /* calculate available dither frequencies */
719 rate = clk_get_rate(clk);
720 for (f = 0; f < ARRAY_SIZE(chan->dither_frequency); f++)
721 chan->dither_frequency[f] = DIV_ROUND_CLOSEST(rate, ltc2688_period[f]);
722
723 return 0;
724 }
725
ltc2688_span_lookup(const struct ltc2688_state * st,int min,int max)726 static int ltc2688_span_lookup(const struct ltc2688_state *st, int min, int max)
727 {
728 u32 span;
729
730 for (span = 0; span < ARRAY_SIZE(ltc2688_span_helper); span++) {
731 if (min == ltc2688_span_helper[span][0] &&
732 max == ltc2688_span_helper[span][1])
733 return span;
734 }
735
736 return -EINVAL;
737 }
738
ltc2688_channel_config(struct ltc2688_state * st)739 static int ltc2688_channel_config(struct ltc2688_state *st)
740 {
741 struct device *dev = &st->spi->dev;
742 u32 reg, clk_input, val, tmp[2];
743 int ret, span;
744
745 device_for_each_child_node_scoped(dev, child) {
746 struct ltc2688_chan *chan;
747
748 ret = fwnode_property_read_u32(child, "reg", ®);
749 if (ret)
750 return dev_err_probe(dev, ret,
751 "Failed to get reg property\n");
752
753 if (reg >= LTC2688_DAC_CHANNELS)
754 return dev_err_probe(dev, -EINVAL,
755 "reg bigger than: %d\n",
756 LTC2688_DAC_CHANNELS);
757
758 val = 0;
759 chan = &st->channels[reg];
760 if (fwnode_property_read_bool(child, "adi,toggle-mode")) {
761 chan->toggle_chan = true;
762 /* assume sw toggle ABI */
763 st->iio_chan[reg].ext_info = ltc2688_toggle_sym_ext_info;
764 /*
765 * Clear IIO_CHAN_INFO_RAW bit as toggle channels expose
766 * out_voltage_raw{0|1} files.
767 */
768 __clear_bit(IIO_CHAN_INFO_RAW,
769 &st->iio_chan[reg].info_mask_separate);
770 }
771
772 ret = fwnode_property_read_u32_array(child, "adi,output-range-microvolt",
773 tmp, ARRAY_SIZE(tmp));
774 if (!ret) {
775 span = ltc2688_span_lookup(st, (int)tmp[0] / 1000,
776 tmp[1] / 1000);
777 if (span < 0)
778 return dev_err_probe(dev, span,
779 "output range not valid:[%d %d]\n",
780 tmp[0], tmp[1]);
781
782 val |= FIELD_PREP(LTC2688_CH_SPAN_MSK, span);
783 }
784
785 ret = fwnode_property_read_u32(child, "adi,toggle-dither-input",
786 &clk_input);
787 if (!ret) {
788 if (clk_input >= LTC2688_CH_TGP_MAX) {
789 return dev_err_probe(dev, -EINVAL,
790 "toggle-dither-input inv value(%d)\n",
791 clk_input);
792 }
793
794 ret = ltc2688_tgp_clk_setup(st, chan, child, clk_input);
795 if (ret)
796 return ret;
797
798 /*
799 * 0 means software toggle which is the default mode.
800 * Hence the +1.
801 */
802 val |= FIELD_PREP(LTC2688_CH_TD_SEL_MSK, clk_input + 1);
803
804 /*
805 * If a TGPx is given, we automatically assume a dither
806 * capable channel (unless toggle is already enabled).
807 * On top of this we just set here the dither bit in the
808 * channel settings. It won't have any effect until the
809 * global toggle/dither bit is enabled.
810 */
811 if (!chan->toggle_chan) {
812 val |= FIELD_PREP(LTC2688_CH_MODE_MSK, 1);
813 st->iio_chan[reg].ext_info = ltc2688_dither_ext_info;
814 } else {
815 /* wait, no sw toggle after all */
816 st->iio_chan[reg].ext_info = ltc2688_toggle_ext_info;
817 }
818 }
819
820 if (fwnode_property_read_bool(child, "adi,overrange")) {
821 chan->overrange = true;
822 val |= LTC2688_CH_OVERRANGE_MSK;
823 }
824
825 if (!val)
826 continue;
827
828 ret = regmap_write(st->regmap, LTC2688_CMD_CH_SETTING(reg),
829 val);
830 if (ret)
831 return dev_err_probe(dev, ret,
832 "failed to set chan settings\n");
833 }
834
835 return 0;
836 }
837
ltc2688_setup(struct ltc2688_state * st,bool has_external_vref)838 static int ltc2688_setup(struct ltc2688_state *st, bool has_external_vref)
839 {
840 struct device *dev = &st->spi->dev;
841 struct gpio_desc *gpio;
842 int ret;
843
844 /*
845 * If we have a reset pin, use that to reset the board, If not, use
846 * the reset bit.
847 */
848 gpio = devm_gpiod_get_optional(dev, "clr", GPIOD_OUT_HIGH);
849 if (IS_ERR(gpio))
850 return dev_err_probe(dev, PTR_ERR(gpio), "Failed to get reset gpio");
851 if (gpio) {
852 usleep_range(1000, 1200);
853 /* bring device out of reset */
854 gpiod_set_value_cansleep(gpio, 0);
855 } else {
856 ret = regmap_set_bits(st->regmap, LTC2688_CMD_CONFIG,
857 LTC2688_CONFIG_RST);
858 if (ret)
859 return ret;
860 }
861
862 usleep_range(10000, 12000);
863
864 /*
865 * Duplicate the default channel configuration as it can change during
866 * @ltc2688_channel_config()
867 */
868 st->iio_chan = devm_kmemdup(dev, ltc2688_channels,
869 sizeof(ltc2688_channels), GFP_KERNEL);
870 if (!st->iio_chan)
871 return -ENOMEM;
872
873 ret = ltc2688_channel_config(st);
874 if (ret)
875 return ret;
876
877 if (!has_external_vref)
878 return 0;
879
880 return regmap_set_bits(st->regmap, LTC2688_CMD_CONFIG,
881 LTC2688_CONFIG_EXT_REF);
882 }
883
ltc2688_reg_readable(struct device * dev,unsigned int reg)884 static bool ltc2688_reg_readable(struct device *dev, unsigned int reg)
885 {
886 switch (reg) {
887 case LTC2688_CMD_CH_CODE(0) ... LTC2688_CMD_CH_GAIN(15):
888 return true;
889 case LTC2688_CMD_CONFIG ... LTC2688_CMD_THERMAL_STAT:
890 return true;
891 default:
892 return false;
893 }
894 }
895
ltc2688_reg_writable(struct device * dev,unsigned int reg)896 static bool ltc2688_reg_writable(struct device *dev, unsigned int reg)
897 {
898 /*
899 * There's a jump from 0x76 to 0x78 in the write codes and the thermal
900 * status code is 0x77 (which is read only) so that we need to check
901 * that special condition.
902 */
903 if (reg <= LTC2688_CMD_UPDATE_ALL && reg != LTC2688_CMD_THERMAL_STAT)
904 return true;
905
906 return false;
907 }
908
909 static const struct regmap_bus ltc2688_regmap_bus = {
910 .read = ltc2688_spi_read,
911 .write = ltc2688_spi_write,
912 .read_flag_mask = LTC2688_READ_OPERATION,
913 .reg_format_endian_default = REGMAP_ENDIAN_BIG,
914 .val_format_endian_default = REGMAP_ENDIAN_BIG,
915 };
916
917 static const struct regmap_config ltc2688_regmap_config = {
918 .reg_bits = 8,
919 .val_bits = 16,
920 .readable_reg = ltc2688_reg_readable,
921 .writeable_reg = ltc2688_reg_writable,
922 /* ignoring the no op command */
923 .max_register = LTC2688_CMD_UPDATE_ALL,
924 };
925
926 static const struct iio_info ltc2688_info = {
927 .write_raw = ltc2688_write_raw,
928 .read_raw = ltc2688_read_raw,
929 .read_avail = ltc2688_read_avail,
930 .debugfs_reg_access = ltc2688_reg_access,
931 };
932
ltc2688_probe(struct spi_device * spi)933 static int ltc2688_probe(struct spi_device *spi)
934 {
935 static const char * const regulators[] = { "vcc", "iovcc" };
936 struct ltc2688_state *st;
937 struct iio_dev *indio_dev;
938 struct device *dev = &spi->dev;
939 bool has_external_vref;
940 int ret;
941
942 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
943 if (!indio_dev)
944 return -ENOMEM;
945
946 st = iio_priv(indio_dev);
947 st->spi = spi;
948
949 /* Just write this once. No need to do it in every regmap read. */
950 st->tx_data[3] = LTC2688_CMD_NOOP;
951 ret = devm_mutex_init(dev, &st->lock);
952 if (ret)
953 return ret;
954
955 st->regmap = devm_regmap_init(dev, <c2688_regmap_bus, st,
956 <c2688_regmap_config);
957 if (IS_ERR(st->regmap))
958 return dev_err_probe(dev, PTR_ERR(st->regmap),
959 "Failed to init regmap");
960
961 ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulators),
962 regulators);
963 if (ret)
964 return dev_err_probe(dev, ret, "Failed to enable regulators\n");
965
966 ret = devm_regulator_get_enable_read_voltage(dev, "vref");
967 if (ret < 0 && ret != -ENODEV)
968 return dev_err_probe(dev, ret,
969 "Failed to get vref regulator voltage\n");
970
971 has_external_vref = ret != -ENODEV;
972 st->vref = has_external_vref ? ret / 1000 : 0;
973
974 ret = ltc2688_setup(st, has_external_vref);
975 if (ret)
976 return ret;
977
978 indio_dev->name = "ltc2688";
979 indio_dev->info = <c2688_info;
980 indio_dev->modes = INDIO_DIRECT_MODE;
981 indio_dev->channels = st->iio_chan;
982 indio_dev->num_channels = ARRAY_SIZE(ltc2688_channels);
983
984 return devm_iio_device_register(dev, indio_dev);
985 }
986
987 static const struct of_device_id ltc2688_of_id[] = {
988 { .compatible = "adi,ltc2688" },
989 { }
990 };
991 MODULE_DEVICE_TABLE(of, ltc2688_of_id);
992
993 static const struct spi_device_id ltc2688_id[] = {
994 { .name = "ltc2688" },
995 { }
996 };
997 MODULE_DEVICE_TABLE(spi, ltc2688_id);
998
999 static struct spi_driver ltc2688_driver = {
1000 .driver = {
1001 .name = "ltc2688",
1002 .of_match_table = ltc2688_of_id,
1003 },
1004 .probe = ltc2688_probe,
1005 .id_table = ltc2688_id,
1006 };
1007 module_spi_driver(ltc2688_driver);
1008
1009 MODULE_AUTHOR("Nuno Sá <nuno.sa@analog.com>");
1010 MODULE_DESCRIPTION("Analog Devices LTC2688 DAC");
1011 MODULE_LICENSE("GPL");
1012