1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /* Copyright (C) 2018 Microchip Technology Inc. */
3
4 #include <linux/module.h>
5 #include <linux/pci.h>
6 #include <linux/netdevice.h>
7 #include <linux/etherdevice.h>
8 #include <linux/crc32.h>
9 #include <linux/microchipphy.h>
10 #include <linux/net_tstamp.h>
11 #include <linux/of_mdio.h>
12 #include <linux/of_net.h>
13 #include <linux/phy.h>
14 #include <linux/phy_fixed.h>
15 #include <linux/rtnetlink.h>
16 #include <linux/iopoll.h>
17 #include <linux/crc16.h>
18 #include <linux/phylink.h>
19 #include "lan743x_main.h"
20 #include "lan743x_ethtool.h"
21
22 #define MMD_ACCESS_ADDRESS 0
23 #define MMD_ACCESS_WRITE 1
24 #define MMD_ACCESS_READ 2
25 #define MMD_ACCESS_READ_INC 3
26 #define PCS_POWER_STATE_DOWN 0x6
27 #define PCS_POWER_STATE_UP 0x4
28
29 #define RFE_RD_FIFO_TH_3_DWORDS 0x3
30
pci11x1x_is_a0(struct lan743x_adapter * adapter)31 static bool pci11x1x_is_a0(struct lan743x_adapter *adapter)
32 {
33 u32 dev_rev = adapter->csr.id_rev & ID_REV_CHIP_REV_MASK_;
34 return dev_rev == ID_REV_CHIP_REV_PCI11X1X_A0_;
35 }
36
pci11x1x_strap_get_status(struct lan743x_adapter * adapter)37 static void pci11x1x_strap_get_status(struct lan743x_adapter *adapter)
38 {
39 u32 fpga_rev;
40 u32 cfg_load;
41 u32 hw_cfg;
42 u32 strap;
43 int ret;
44
45 adapter->is_rmii_en = false;
46 /* Timeout = 100 (i.e. 1 sec (10 msce * 100)) */
47 ret = lan743x_hs_syslock_acquire(adapter, 100);
48 if (ret < 0) {
49 netif_err(adapter, drv, adapter->netdev,
50 "Sys Lock acquire failed ret:%d\n", ret);
51 return;
52 }
53
54 cfg_load = lan743x_csr_read(adapter, ETH_SYS_CONFIG_LOAD_STARTED_REG);
55 lan743x_hs_syslock_release(adapter);
56 hw_cfg = lan743x_csr_read(adapter, HW_CFG);
57 strap = lan743x_csr_read(adapter, STRAP_READ);
58 if ((pci11x1x_is_a0(adapter) &&
59 (cfg_load & GEN_SYS_LOAD_STARTED_REG_ETH_ ||
60 hw_cfg & HW_CFG_RST_PROTECT_)) ||
61 (strap & STRAP_READ_USE_SGMII_EN_)) {
62 if (strap & STRAP_READ_SGMII_EN_)
63 adapter->is_sgmii_en = true;
64 else
65 adapter->is_sgmii_en = false;
66 } else {
67 fpga_rev = lan743x_csr_read(adapter, FPGA_REV);
68 if (fpga_rev) {
69 if (fpga_rev & FPGA_SGMII_OP)
70 adapter->is_sgmii_en = true;
71 else
72 adapter->is_sgmii_en = false;
73 } else {
74 adapter->is_sgmii_en = false;
75 }
76 }
77
78 if (!adapter->is_sgmii_en && strap & STRAP_READ_USE_RMII_EN_) {
79 if (strap & STRAP_READ_RMII_EN_)
80 adapter->is_rmii_en = true;
81 }
82
83 netif_dbg(adapter, drv, adapter->netdev, "Selected I/F: %s\n",
84 adapter->is_sgmii_en ? "SGMII" :
85 adapter->is_rmii_en ? "RMII" : "RGMII");
86 }
87
is_pci11x1x_chip(struct lan743x_adapter * adapter)88 static bool is_pci11x1x_chip(struct lan743x_adapter *adapter)
89 {
90 struct lan743x_csr *csr = &adapter->csr;
91 u32 id_rev = csr->id_rev;
92
93 if (((id_rev & 0xFFFF0000) == ID_REV_ID_A011_) ||
94 ((id_rev & 0xFFFF0000) == ID_REV_ID_A041_)) {
95 return true;
96 }
97 return false;
98 }
99
lan743x_pci_cleanup(struct lan743x_adapter * adapter)100 static void lan743x_pci_cleanup(struct lan743x_adapter *adapter)
101 {
102 pci_release_selected_regions(adapter->pdev,
103 pci_select_bars(adapter->pdev,
104 IORESOURCE_MEM));
105 pci_disable_device(adapter->pdev);
106 }
107
lan743x_pci_init(struct lan743x_adapter * adapter,struct pci_dev * pdev)108 static int lan743x_pci_init(struct lan743x_adapter *adapter,
109 struct pci_dev *pdev)
110 {
111 unsigned long bars = 0;
112 int ret;
113
114 adapter->pdev = pdev;
115 ret = pci_enable_device_mem(pdev);
116 if (ret)
117 goto return_error;
118
119 dev_dbg(&adapter->pdev->dev,
120 "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n",
121 pdev->vendor, pdev->device);
122 bars = pci_select_bars(pdev, IORESOURCE_MEM);
123 if (!test_bit(0, &bars))
124 goto disable_device;
125
126 ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME);
127 if (ret)
128 goto disable_device;
129
130 pci_set_master(pdev);
131 return 0;
132
133 disable_device:
134 pci_disable_device(adapter->pdev);
135
136 return_error:
137 return ret;
138 }
139
lan743x_csr_read(struct lan743x_adapter * adapter,int offset)140 u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset)
141 {
142 return ioread32(&adapter->csr.csr_address[offset]);
143 }
144
lan743x_csr_write(struct lan743x_adapter * adapter,int offset,u32 data)145 void lan743x_csr_write(struct lan743x_adapter *adapter, int offset,
146 u32 data)
147 {
148 iowrite32(data, &adapter->csr.csr_address[offset]);
149 }
150
151 #define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset)
152
lan743x_csr_light_reset(struct lan743x_adapter * adapter)153 static int lan743x_csr_light_reset(struct lan743x_adapter *adapter)
154 {
155 u32 data;
156
157 data = lan743x_csr_read(adapter, HW_CFG);
158 data |= HW_CFG_LRST_;
159 lan743x_csr_write(adapter, HW_CFG, data);
160
161 return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data,
162 !(data & HW_CFG_LRST_), 100000, 10000000);
163 }
164
lan743x_csr_wait_for_bit_atomic(struct lan743x_adapter * adapter,int offset,u32 bit_mask,int target_value,int udelay_min,int udelay_max,int count)165 static int lan743x_csr_wait_for_bit_atomic(struct lan743x_adapter *adapter,
166 int offset, u32 bit_mask,
167 int target_value, int udelay_min,
168 int udelay_max, int count)
169 {
170 u32 data;
171
172 return readx_poll_timeout_atomic(LAN743X_CSR_READ_OP, offset, data,
173 target_value == !!(data & bit_mask),
174 udelay_max, udelay_min * count);
175 }
176
lan743x_csr_wait_for_bit(struct lan743x_adapter * adapter,int offset,u32 bit_mask,int target_value,int usleep_min,int usleep_max,int count)177 static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter,
178 int offset, u32 bit_mask,
179 int target_value, int usleep_min,
180 int usleep_max, int count)
181 {
182 u32 data;
183
184 return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data,
185 target_value == !!(data & bit_mask),
186 usleep_max, usleep_min * count);
187 }
188
lan743x_csr_init(struct lan743x_adapter * adapter)189 static int lan743x_csr_init(struct lan743x_adapter *adapter)
190 {
191 struct lan743x_csr *csr = &adapter->csr;
192 resource_size_t bar_start, bar_length;
193
194 bar_start = pci_resource_start(adapter->pdev, 0);
195 bar_length = pci_resource_len(adapter->pdev, 0);
196 csr->csr_address = devm_ioremap(&adapter->pdev->dev,
197 bar_start, bar_length);
198 if (!csr->csr_address)
199 return -ENOMEM;
200
201 csr->id_rev = lan743x_csr_read(adapter, ID_REV);
202 csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV);
203 dev_dbg(&adapter->pdev->dev,
204 "ID_REV = 0x%08X, FPGA_REV = %d.%d\n",
205 csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev),
206 FPGA_REV_GET_MINOR_(csr->fpga_rev));
207 if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev))
208 return -ENODEV;
209
210 csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
211 switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) {
212 case ID_REV_CHIP_REV_A0_:
213 csr->flags |= LAN743X_CSR_FLAG_IS_A0;
214 csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
215 break;
216 case ID_REV_CHIP_REV_B0_:
217 csr->flags |= LAN743X_CSR_FLAG_IS_B0;
218 break;
219 }
220
221 return lan743x_csr_light_reset(adapter);
222 }
223
lan743x_intr_software_isr(struct lan743x_adapter * adapter)224 static void lan743x_intr_software_isr(struct lan743x_adapter *adapter)
225 {
226 struct lan743x_intr *intr = &adapter->intr;
227
228 /* disable the interrupt to prevent repeated re-triggering */
229 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_);
230 intr->software_isr_flag = true;
231 wake_up(&intr->software_isr_wq);
232 }
233
lan743x_tx_isr(void * context,u32 int_sts,u32 flags)234 static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags)
235 {
236 struct lan743x_tx *tx = context;
237 struct lan743x_adapter *adapter = tx->adapter;
238 bool enable_flag = true;
239
240 lan743x_csr_read(adapter, INT_EN_SET);
241 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
242 lan743x_csr_write(adapter, INT_EN_CLR,
243 INT_BIT_DMA_TX_(tx->channel_number));
244 }
245
246 if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) {
247 u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
248 u32 dmac_int_sts;
249 u32 dmac_int_en;
250
251 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
252 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
253 else
254 dmac_int_sts = ioc_bit;
255 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
256 dmac_int_en = lan743x_csr_read(adapter,
257 DMAC_INT_EN_SET);
258 else
259 dmac_int_en = ioc_bit;
260
261 dmac_int_en &= ioc_bit;
262 dmac_int_sts &= dmac_int_en;
263 if (dmac_int_sts & ioc_bit) {
264 napi_schedule(&tx->napi);
265 enable_flag = false;/* poll func will enable later */
266 }
267 }
268
269 if (enable_flag)
270 /* enable isr */
271 lan743x_csr_write(adapter, INT_EN_SET,
272 INT_BIT_DMA_TX_(tx->channel_number));
273 }
274
lan743x_rx_isr(void * context,u32 int_sts,u32 flags)275 static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags)
276 {
277 struct lan743x_rx *rx = context;
278 struct lan743x_adapter *adapter = rx->adapter;
279 bool enable_flag = true;
280
281 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
282 lan743x_csr_write(adapter, INT_EN_CLR,
283 INT_BIT_DMA_RX_(rx->channel_number));
284 }
285
286 if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) {
287 u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number);
288 u32 dmac_int_sts;
289 u32 dmac_int_en;
290
291 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
292 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
293 else
294 dmac_int_sts = rx_frame_bit;
295 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
296 dmac_int_en = lan743x_csr_read(adapter,
297 DMAC_INT_EN_SET);
298 else
299 dmac_int_en = rx_frame_bit;
300
301 dmac_int_en &= rx_frame_bit;
302 dmac_int_sts &= dmac_int_en;
303 if (dmac_int_sts & rx_frame_bit) {
304 napi_schedule(&rx->napi);
305 enable_flag = false;/* poll funct will enable later */
306 }
307 }
308
309 if (enable_flag) {
310 /* enable isr */
311 lan743x_csr_write(adapter, INT_EN_SET,
312 INT_BIT_DMA_RX_(rx->channel_number));
313 }
314 }
315
lan743x_intr_shared_isr(void * context,u32 int_sts,u32 flags)316 static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags)
317 {
318 struct lan743x_adapter *adapter = context;
319 unsigned int channel;
320
321 if (int_sts & INT_BIT_ALL_RX_) {
322 for (channel = 0; channel < LAN743X_USED_RX_CHANNELS;
323 channel++) {
324 u32 int_bit = INT_BIT_DMA_RX_(channel);
325
326 if (int_sts & int_bit) {
327 lan743x_rx_isr(&adapter->rx[channel],
328 int_bit, flags);
329 int_sts &= ~int_bit;
330 }
331 }
332 }
333 if (int_sts & INT_BIT_ALL_TX_) {
334 for (channel = 0; channel < adapter->used_tx_channels;
335 channel++) {
336 u32 int_bit = INT_BIT_DMA_TX_(channel);
337
338 if (int_sts & int_bit) {
339 lan743x_tx_isr(&adapter->tx[channel],
340 int_bit, flags);
341 int_sts &= ~int_bit;
342 }
343 }
344 }
345 if (int_sts & INT_BIT_ALL_OTHER_) {
346 if (int_sts & INT_BIT_SW_GP_) {
347 lan743x_intr_software_isr(adapter);
348 int_sts &= ~INT_BIT_SW_GP_;
349 }
350 if (int_sts & INT_BIT_1588_) {
351 lan743x_ptp_isr(adapter);
352 int_sts &= ~INT_BIT_1588_;
353 }
354 }
355 if (int_sts)
356 lan743x_csr_write(adapter, INT_EN_CLR, int_sts);
357 }
358
lan743x_intr_entry_isr(int irq,void * ptr)359 static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr)
360 {
361 struct lan743x_vector *vector = ptr;
362 struct lan743x_adapter *adapter = vector->adapter;
363 irqreturn_t result = IRQ_NONE;
364 u32 int_enables;
365 u32 int_sts;
366
367 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) {
368 int_sts = lan743x_csr_read(adapter, INT_STS);
369 } else if (vector->flags &
370 (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C |
371 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) {
372 int_sts = lan743x_csr_read(adapter, INT_STS_R2C);
373 } else {
374 /* use mask as implied status */
375 int_sts = vector->int_mask | INT_BIT_MAS_;
376 }
377
378 if (!(int_sts & INT_BIT_MAS_))
379 goto irq_done;
380
381 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR)
382 /* disable vector interrupt */
383 lan743x_csr_write(adapter,
384 INT_VEC_EN_CLR,
385 INT_VEC_EN_(vector->vector_index));
386
387 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR)
388 /* disable master interrupt */
389 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
390
391 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) {
392 int_enables = lan743x_csr_read(adapter, INT_EN_SET);
393 } else {
394 /* use vector mask as implied enable mask */
395 int_enables = vector->int_mask;
396 }
397
398 int_sts &= int_enables;
399 int_sts &= vector->int_mask;
400 if (int_sts) {
401 if (vector->handler) {
402 vector->handler(vector->context,
403 int_sts, vector->flags);
404 } else {
405 /* disable interrupts on this vector */
406 lan743x_csr_write(adapter, INT_EN_CLR,
407 vector->int_mask);
408 }
409 result = IRQ_HANDLED;
410 }
411
412 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET)
413 /* enable master interrupt */
414 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
415
416 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET)
417 /* enable vector interrupt */
418 lan743x_csr_write(adapter,
419 INT_VEC_EN_SET,
420 INT_VEC_EN_(vector->vector_index));
421 irq_done:
422 return result;
423 }
424
lan743x_intr_test_isr(struct lan743x_adapter * adapter)425 static int lan743x_intr_test_isr(struct lan743x_adapter *adapter)
426 {
427 struct lan743x_intr *intr = &adapter->intr;
428 int ret;
429
430 intr->software_isr_flag = false;
431
432 /* enable and activate test interrupt */
433 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_);
434 lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_);
435
436 ret = wait_event_timeout(intr->software_isr_wq,
437 intr->software_isr_flag,
438 msecs_to_jiffies(200));
439
440 /* disable test interrupt */
441 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_);
442
443 return ret > 0 ? 0 : -ENODEV;
444 }
445
lan743x_intr_register_isr(struct lan743x_adapter * adapter,int vector_index,u32 flags,u32 int_mask,lan743x_vector_handler handler,void * context)446 static int lan743x_intr_register_isr(struct lan743x_adapter *adapter,
447 int vector_index, u32 flags,
448 u32 int_mask,
449 lan743x_vector_handler handler,
450 void *context)
451 {
452 struct lan743x_vector *vector = &adapter->intr.vector_list
453 [vector_index];
454 int ret;
455
456 vector->adapter = adapter;
457 vector->flags = flags;
458 vector->vector_index = vector_index;
459 vector->int_mask = int_mask;
460 vector->handler = handler;
461 vector->context = context;
462
463 ret = request_irq(vector->irq,
464 lan743x_intr_entry_isr,
465 (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ?
466 IRQF_SHARED : 0, DRIVER_NAME, vector);
467 if (ret) {
468 vector->handler = NULL;
469 vector->context = NULL;
470 vector->int_mask = 0;
471 vector->flags = 0;
472 }
473 return ret;
474 }
475
lan743x_intr_unregister_isr(struct lan743x_adapter * adapter,int vector_index)476 static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter,
477 int vector_index)
478 {
479 struct lan743x_vector *vector = &adapter->intr.vector_list
480 [vector_index];
481
482 free_irq(vector->irq, vector);
483 vector->handler = NULL;
484 vector->context = NULL;
485 vector->int_mask = 0;
486 vector->flags = 0;
487 }
488
lan743x_intr_get_vector_flags(struct lan743x_adapter * adapter,u32 int_mask)489 static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter,
490 u32 int_mask)
491 {
492 int index;
493
494 for (index = 0; index < adapter->max_vector_count; index++) {
495 if (adapter->intr.vector_list[index].int_mask & int_mask)
496 return adapter->intr.vector_list[index].flags;
497 }
498 return 0;
499 }
500
lan743x_intr_close(struct lan743x_adapter * adapter)501 static void lan743x_intr_close(struct lan743x_adapter *adapter)
502 {
503 struct lan743x_intr *intr = &adapter->intr;
504 int index = 0;
505
506 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
507 if (adapter->is_pci11x1x)
508 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x0000FFFF);
509 else
510 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF);
511
512 for (index = 0; index < intr->number_of_vectors; index++) {
513 if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) {
514 lan743x_intr_unregister_isr(adapter, index);
515 intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index);
516 }
517 }
518
519 if (intr->flags & INTR_FLAG_MSI_ENABLED) {
520 pci_disable_msi(adapter->pdev);
521 intr->flags &= ~INTR_FLAG_MSI_ENABLED;
522 }
523
524 if (intr->flags & INTR_FLAG_MSIX_ENABLED) {
525 pci_disable_msix(adapter->pdev);
526 intr->flags &= ~INTR_FLAG_MSIX_ENABLED;
527 }
528 }
529
lan743x_intr_open(struct lan743x_adapter * adapter)530 static int lan743x_intr_open(struct lan743x_adapter *adapter)
531 {
532 struct msix_entry msix_entries[PCI11X1X_MAX_VECTOR_COUNT];
533 struct lan743x_intr *intr = &adapter->intr;
534 unsigned int used_tx_channels;
535 u32 int_vec_en_auto_clr = 0;
536 u8 max_vector_count;
537 u32 int_vec_map0 = 0;
538 u32 int_vec_map1 = 0;
539 int ret = -ENODEV;
540 int index = 0;
541 u32 flags = 0;
542
543 intr->number_of_vectors = 0;
544
545 /* Try to set up MSIX interrupts */
546 max_vector_count = adapter->max_vector_count;
547 memset(&msix_entries[0], 0,
548 sizeof(struct msix_entry) * max_vector_count);
549 for (index = 0; index < max_vector_count; index++)
550 msix_entries[index].entry = index;
551 used_tx_channels = adapter->used_tx_channels;
552 ret = pci_enable_msix_range(adapter->pdev,
553 msix_entries, 1,
554 1 + used_tx_channels +
555 LAN743X_USED_RX_CHANNELS);
556
557 if (ret > 0) {
558 intr->flags |= INTR_FLAG_MSIX_ENABLED;
559 intr->number_of_vectors = ret;
560 intr->using_vectors = true;
561 for (index = 0; index < intr->number_of_vectors; index++)
562 intr->vector_list[index].irq = msix_entries
563 [index].vector;
564 netif_info(adapter, ifup, adapter->netdev,
565 "using MSIX interrupts, number of vectors = %d\n",
566 intr->number_of_vectors);
567 }
568
569 /* If MSIX failed try to setup using MSI interrupts */
570 if (!intr->number_of_vectors) {
571 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
572 if (!pci_enable_msi(adapter->pdev)) {
573 intr->flags |= INTR_FLAG_MSI_ENABLED;
574 intr->number_of_vectors = 1;
575 intr->using_vectors = true;
576 intr->vector_list[0].irq =
577 adapter->pdev->irq;
578 netif_info(adapter, ifup, adapter->netdev,
579 "using MSI interrupts, number of vectors = %d\n",
580 intr->number_of_vectors);
581 }
582 }
583 }
584
585 /* If MSIX, and MSI failed, setup using legacy interrupt */
586 if (!intr->number_of_vectors) {
587 intr->number_of_vectors = 1;
588 intr->using_vectors = false;
589 intr->vector_list[0].irq = intr->irq;
590 netif_info(adapter, ifup, adapter->netdev,
591 "using legacy interrupts\n");
592 }
593
594 /* At this point we must have at least one irq */
595 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF);
596
597 /* map all interrupts to vector 0 */
598 lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000);
599 lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000);
600 lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000);
601 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
602 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
603 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
604 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
605
606 if (intr->using_vectors) {
607 flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
608 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
609 } else {
610 flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR |
611 LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET |
612 LAN743X_VECTOR_FLAG_IRQ_SHARED;
613 }
614
615 if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
616 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ;
617 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C;
618 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
619 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK;
620 flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C;
621 flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C;
622 }
623
624 init_waitqueue_head(&intr->software_isr_wq);
625
626 ret = lan743x_intr_register_isr(adapter, 0, flags,
627 INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ |
628 INT_BIT_ALL_OTHER_,
629 lan743x_intr_shared_isr, adapter);
630 if (ret)
631 goto clean_up;
632 intr->flags |= INTR_FLAG_IRQ_REQUESTED(0);
633
634 if (intr->using_vectors)
635 lan743x_csr_write(adapter, INT_VEC_EN_SET,
636 INT_VEC_EN_(0));
637
638 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
639 lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD);
640 lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD);
641 lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD);
642 lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD);
643 lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD);
644 lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD);
645 lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD);
646 lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD);
647 if (adapter->is_pci11x1x) {
648 lan743x_csr_write(adapter, INT_MOD_CFG8, LAN743X_INT_MOD);
649 lan743x_csr_write(adapter, INT_MOD_CFG9, LAN743X_INT_MOD);
650 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00007654);
651 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00003210);
652 } else {
653 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432);
654 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001);
655 }
656 lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF);
657 }
658
659 /* enable interrupts */
660 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
661 ret = lan743x_intr_test_isr(adapter);
662 if (ret)
663 goto clean_up;
664
665 if (intr->number_of_vectors > 1) {
666 int number_of_tx_vectors = intr->number_of_vectors - 1;
667
668 if (number_of_tx_vectors > used_tx_channels)
669 number_of_tx_vectors = used_tx_channels;
670 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
671 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
672 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
673 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
674 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
675 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
676
677 if (adapter->csr.flags &
678 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
679 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
680 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
681 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
682 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
683 }
684
685 for (index = 0; index < number_of_tx_vectors; index++) {
686 u32 int_bit = INT_BIT_DMA_TX_(index);
687 int vector = index + 1;
688
689 /* map TX interrupt to vector */
690 int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector);
691 lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1);
692
693 /* Remove TX interrupt from shared mask */
694 intr->vector_list[0].int_mask &= ~int_bit;
695 ret = lan743x_intr_register_isr(adapter, vector, flags,
696 int_bit, lan743x_tx_isr,
697 &adapter->tx[index]);
698 if (ret)
699 goto clean_up;
700 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
701 if (!(flags &
702 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET))
703 lan743x_csr_write(adapter, INT_VEC_EN_SET,
704 INT_VEC_EN_(vector));
705 }
706 }
707 if ((intr->number_of_vectors - used_tx_channels) > 1) {
708 int number_of_rx_vectors = intr->number_of_vectors -
709 used_tx_channels - 1;
710
711 if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS)
712 number_of_rx_vectors = LAN743X_USED_RX_CHANNELS;
713
714 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
715 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
716 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
717 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
718 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
719 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
720
721 if (adapter->csr.flags &
722 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
723 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR |
724 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
725 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
726 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
727 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
728 }
729 for (index = 0; index < number_of_rx_vectors; index++) {
730 int vector = index + 1 + used_tx_channels;
731 u32 int_bit = INT_BIT_DMA_RX_(index);
732
733 /* map RX interrupt to vector */
734 int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector);
735 lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0);
736 if (flags &
737 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) {
738 int_vec_en_auto_clr |= INT_VEC_EN_(vector);
739 lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR,
740 int_vec_en_auto_clr);
741 }
742
743 /* Remove RX interrupt from shared mask */
744 intr->vector_list[0].int_mask &= ~int_bit;
745 ret = lan743x_intr_register_isr(adapter, vector, flags,
746 int_bit, lan743x_rx_isr,
747 &adapter->rx[index]);
748 if (ret)
749 goto clean_up;
750 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
751
752 lan743x_csr_write(adapter, INT_VEC_EN_SET,
753 INT_VEC_EN_(vector));
754 }
755 }
756 return 0;
757
758 clean_up:
759 lan743x_intr_close(adapter);
760 return ret;
761 }
762
lan743x_dp_write(struct lan743x_adapter * adapter,u32 select,u32 addr,u32 length,u32 * buf)763 static int lan743x_dp_write(struct lan743x_adapter *adapter,
764 u32 select, u32 addr, u32 length, u32 *buf)
765 {
766 u32 dp_sel;
767 int i;
768
769 if (lan743x_csr_wait_for_bit_atomic(adapter, DP_SEL, DP_SEL_DPRDY_,
770 1, 40, 100, 100))
771 return -EIO;
772 dp_sel = lan743x_csr_read(adapter, DP_SEL);
773 dp_sel &= ~DP_SEL_MASK_;
774 dp_sel |= select;
775 lan743x_csr_write(adapter, DP_SEL, dp_sel);
776
777 for (i = 0; i < length; i++) {
778 lan743x_csr_write(adapter, DP_ADDR, addr + i);
779 lan743x_csr_write(adapter, DP_DATA_0, buf[i]);
780 lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_);
781 if (lan743x_csr_wait_for_bit_atomic(adapter, DP_SEL,
782 DP_SEL_DPRDY_,
783 1, 40, 100, 100))
784 return -EIO;
785 }
786
787 return 0;
788 }
789
lan743x_mac_mii_access(u16 id,u16 index,int read)790 static u32 lan743x_mac_mii_access(u16 id, u16 index, int read)
791 {
792 u32 ret;
793
794 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) &
795 MAC_MII_ACC_PHY_ADDR_MASK_;
796 ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) &
797 MAC_MII_ACC_MIIRINDA_MASK_;
798
799 if (read)
800 ret |= MAC_MII_ACC_MII_READ_;
801 else
802 ret |= MAC_MII_ACC_MII_WRITE_;
803 ret |= MAC_MII_ACC_MII_BUSY_;
804
805 return ret;
806 }
807
lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter * adapter)808 static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter)
809 {
810 u32 data;
811
812 return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data,
813 !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000);
814 }
815
lan743x_mdiobus_read_c22(struct mii_bus * bus,int phy_id,int index)816 static int lan743x_mdiobus_read_c22(struct mii_bus *bus, int phy_id, int index)
817 {
818 struct lan743x_adapter *adapter = bus->priv;
819 u32 val, mii_access;
820 int ret;
821
822 /* confirm MII not busy */
823 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
824 if (ret < 0)
825 return ret;
826
827 /* set the address, index & direction (read from PHY) */
828 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ);
829 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
830 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
831 if (ret < 0)
832 return ret;
833
834 val = lan743x_csr_read(adapter, MAC_MII_DATA);
835 return (int)(val & 0xFFFF);
836 }
837
lan743x_mdiobus_write_c22(struct mii_bus * bus,int phy_id,int index,u16 regval)838 static int lan743x_mdiobus_write_c22(struct mii_bus *bus,
839 int phy_id, int index, u16 regval)
840 {
841 struct lan743x_adapter *adapter = bus->priv;
842 u32 val, mii_access;
843 int ret;
844
845 /* confirm MII not busy */
846 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
847 if (ret < 0)
848 return ret;
849 val = (u32)regval;
850 lan743x_csr_write(adapter, MAC_MII_DATA, val);
851
852 /* set the address, index & direction (write to PHY) */
853 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE);
854 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
855 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
856 return ret;
857 }
858
lan743x_mac_mmd_access(int id,int dev_addr,int op)859 static u32 lan743x_mac_mmd_access(int id, int dev_addr, int op)
860 {
861 u32 ret;
862
863 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) &
864 MAC_MII_ACC_PHY_ADDR_MASK_;
865 ret |= (dev_addr << MAC_MII_ACC_MIIMMD_SHIFT_) &
866 MAC_MII_ACC_MIIMMD_MASK_;
867 if (op == MMD_ACCESS_WRITE)
868 ret |= MAC_MII_ACC_MIICMD_WRITE_;
869 else if (op == MMD_ACCESS_READ)
870 ret |= MAC_MII_ACC_MIICMD_READ_;
871 else if (op == MMD_ACCESS_READ_INC)
872 ret |= MAC_MII_ACC_MIICMD_READ_INC_;
873 else
874 ret |= MAC_MII_ACC_MIICMD_ADDR_;
875 ret |= (MAC_MII_ACC_MII_BUSY_ | MAC_MII_ACC_MIICL45_);
876
877 return ret;
878 }
879
lan743x_mdiobus_read_c45(struct mii_bus * bus,int phy_id,int dev_addr,int index)880 static int lan743x_mdiobus_read_c45(struct mii_bus *bus, int phy_id,
881 int dev_addr, int index)
882 {
883 struct lan743x_adapter *adapter = bus->priv;
884 u32 mmd_access;
885 int ret;
886
887 /* confirm MII not busy */
888 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
889 if (ret < 0)
890 return ret;
891
892 /* Load Register Address */
893 lan743x_csr_write(adapter, MAC_MII_DATA, index);
894 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr,
895 MMD_ACCESS_ADDRESS);
896 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
897 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
898 if (ret < 0)
899 return ret;
900
901 /* Read Data */
902 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr,
903 MMD_ACCESS_READ);
904 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
905 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
906 if (ret < 0)
907 return ret;
908
909 ret = lan743x_csr_read(adapter, MAC_MII_DATA);
910 return (int)(ret & 0xFFFF);
911 }
912
lan743x_mdiobus_write_c45(struct mii_bus * bus,int phy_id,int dev_addr,int index,u16 regval)913 static int lan743x_mdiobus_write_c45(struct mii_bus *bus, int phy_id,
914 int dev_addr, int index, u16 regval)
915 {
916 struct lan743x_adapter *adapter = bus->priv;
917 u32 mmd_access;
918 int ret;
919
920 /* confirm MII not busy */
921 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
922 if (ret < 0)
923 return ret;
924
925 /* Load Register Address */
926 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)index);
927 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr,
928 MMD_ACCESS_ADDRESS);
929 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
930 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
931 if (ret < 0)
932 return ret;
933
934 /* Write Data */
935 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)regval);
936 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr,
937 MMD_ACCESS_WRITE);
938 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
939
940 return lan743x_mac_mii_wait_till_not_busy(adapter);
941 }
942
lan743x_sgmii_wait_till_not_busy(struct lan743x_adapter * adapter)943 static int lan743x_sgmii_wait_till_not_busy(struct lan743x_adapter *adapter)
944 {
945 u32 data;
946 int ret;
947
948 ret = readx_poll_timeout(LAN743X_CSR_READ_OP, SGMII_ACC, data,
949 !(data & SGMII_ACC_SGMII_BZY_), 100, 1000000);
950 if (ret < 0)
951 netif_err(adapter, drv, adapter->netdev,
952 "%s: error %d sgmii wait timeout\n", __func__, ret);
953
954 return ret;
955 }
956
lan743x_sgmii_read(struct lan743x_adapter * adapter,u8 mmd,u16 addr)957 int lan743x_sgmii_read(struct lan743x_adapter *adapter, u8 mmd, u16 addr)
958 {
959 u32 mmd_access;
960 int ret;
961 u32 val;
962
963 if (mmd > 31) {
964 dev_err(&adapter->pdev->dev,
965 "%s mmd should <= 31\n", __func__);
966 return -EINVAL;
967 }
968
969 mutex_lock(&adapter->sgmii_rw_lock);
970 /* Load Register Address */
971 mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_;
972 mmd_access |= (addr | SGMII_ACC_SGMII_BZY_);
973 lan743x_csr_write(adapter, SGMII_ACC, mmd_access);
974 ret = lan743x_sgmii_wait_till_not_busy(adapter);
975 if (ret < 0)
976 goto sgmii_unlock;
977
978 val = lan743x_csr_read(adapter, SGMII_DATA);
979 ret = (int)(val & SGMII_DATA_MASK_);
980
981 sgmii_unlock:
982 mutex_unlock(&adapter->sgmii_rw_lock);
983
984 return ret;
985 }
986
lan743x_sgmii_write(struct lan743x_adapter * adapter,u8 mmd,u16 addr,u16 val)987 static int lan743x_sgmii_write(struct lan743x_adapter *adapter,
988 u8 mmd, u16 addr, u16 val)
989 {
990 u32 mmd_access;
991 int ret;
992
993 if (mmd > 31) {
994 dev_err(&adapter->pdev->dev,
995 "%s mmd should <= 31\n", __func__);
996 return -EINVAL;
997 }
998 mutex_lock(&adapter->sgmii_rw_lock);
999 /* Load Register Data */
1000 lan743x_csr_write(adapter, SGMII_DATA, (u32)(val & SGMII_DATA_MASK_));
1001 /* Load Register Address */
1002 mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_;
1003 mmd_access |= (addr | SGMII_ACC_SGMII_BZY_ | SGMII_ACC_SGMII_WR_);
1004 lan743x_csr_write(adapter, SGMII_ACC, mmd_access);
1005 ret = lan743x_sgmii_wait_till_not_busy(adapter);
1006 mutex_unlock(&adapter->sgmii_rw_lock);
1007
1008 return ret;
1009 }
1010
lan743x_get_lsd(int speed,int duplex,u8 mss)1011 static int lan743x_get_lsd(int speed, int duplex, u8 mss)
1012 {
1013 int lsd;
1014
1015 switch (speed) {
1016 case SPEED_2500:
1017 if (mss == MASTER_SLAVE_STATE_SLAVE)
1018 lsd = LINK_2500_SLAVE;
1019 else
1020 lsd = LINK_2500_MASTER;
1021 break;
1022 case SPEED_1000:
1023 if (mss == MASTER_SLAVE_STATE_SLAVE)
1024 lsd = LINK_1000_SLAVE;
1025 else
1026 lsd = LINK_1000_MASTER;
1027 break;
1028 case SPEED_100:
1029 if (duplex == DUPLEX_FULL)
1030 lsd = LINK_100FD;
1031 else
1032 lsd = LINK_100HD;
1033 break;
1034 case SPEED_10:
1035 if (duplex == DUPLEX_FULL)
1036 lsd = LINK_10FD;
1037 else
1038 lsd = LINK_10HD;
1039 break;
1040 default:
1041 lsd = -EINVAL;
1042 }
1043
1044 return lsd;
1045 }
1046
lan743x_sgmii_mpll_set(struct lan743x_adapter * adapter,u16 baud)1047 static int lan743x_sgmii_mpll_set(struct lan743x_adapter *adapter,
1048 u16 baud)
1049 {
1050 int mpllctrl0;
1051 int mpllctrl1;
1052 int miscctrl1;
1053 int ret;
1054
1055 mpllctrl0 = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2,
1056 VR_MII_GEN2_4_MPLL_CTRL0);
1057 if (mpllctrl0 < 0)
1058 return mpllctrl0;
1059
1060 mpllctrl0 &= ~VR_MII_MPLL_CTRL0_USE_REFCLK_PAD_;
1061 if (baud == VR_MII_BAUD_RATE_1P25GBPS) {
1062 mpllctrl1 = VR_MII_MPLL_MULTIPLIER_100;
1063 /* mpll_baud_clk/4 */
1064 miscctrl1 = 0xA;
1065 } else {
1066 mpllctrl1 = VR_MII_MPLL_MULTIPLIER_125;
1067 /* mpll_baud_clk/2 */
1068 miscctrl1 = 0x5;
1069 }
1070
1071 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1072 VR_MII_GEN2_4_MPLL_CTRL0, mpllctrl0);
1073 if (ret < 0)
1074 return ret;
1075
1076 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1077 VR_MII_GEN2_4_MPLL_CTRL1, mpllctrl1);
1078 if (ret < 0)
1079 return ret;
1080
1081 return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1082 VR_MII_GEN2_4_MISC_CTRL1, miscctrl1);
1083 }
1084
lan743x_sgmii_2_5G_mode_set(struct lan743x_adapter * adapter,bool enable)1085 static int lan743x_sgmii_2_5G_mode_set(struct lan743x_adapter *adapter,
1086 bool enable)
1087 {
1088 if (enable)
1089 return lan743x_sgmii_mpll_set(adapter,
1090 VR_MII_BAUD_RATE_3P125GBPS);
1091 else
1092 return lan743x_sgmii_mpll_set(adapter,
1093 VR_MII_BAUD_RATE_1P25GBPS);
1094 }
1095
lan743x_serdes_clock_and_aneg_update(struct lan743x_adapter * adapter)1096 static int lan743x_serdes_clock_and_aneg_update(struct lan743x_adapter *adapter)
1097 {
1098 enum lan743x_sgmii_lsd lsd = adapter->sgmii_lsd;
1099 int mii_ctrl;
1100 int dgt_ctrl;
1101 int an_ctrl;
1102 int ret;
1103
1104 if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE)
1105 /* Switch to 2.5 Gbps */
1106 ret = lan743x_sgmii_2_5G_mode_set(adapter, true);
1107 else
1108 /* Switch to 10/100/1000 Mbps clock */
1109 ret = lan743x_sgmii_2_5G_mode_set(adapter, false);
1110 if (ret < 0)
1111 return ret;
1112
1113 /* Enable SGMII Auto NEG */
1114 mii_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR);
1115 if (mii_ctrl < 0)
1116 return mii_ctrl;
1117
1118 an_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, VR_MII_AN_CTRL);
1119 if (an_ctrl < 0)
1120 return an_ctrl;
1121
1122 dgt_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2,
1123 VR_MII_DIG_CTRL1);
1124 if (dgt_ctrl < 0)
1125 return dgt_ctrl;
1126
1127 if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE) {
1128 mii_ctrl &= ~(BMCR_ANENABLE | BMCR_ANRESTART | BMCR_SPEED100);
1129 mii_ctrl |= BMCR_SPEED1000;
1130 dgt_ctrl |= VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_;
1131 dgt_ctrl &= ~VR_MII_DIG_CTRL1_MAC_AUTO_SW_;
1132 /* In order for Auto-Negotiation to operate properly at
1133 * 2.5 Gbps the 1.6ms link timer values must be adjusted
1134 * The VR_MII_LINK_TIMER_CTRL Register must be set to
1135 * 16'h7A1 and The CL37_TMR_OVR_RIDE bit of the
1136 * VR_MII_DIG_CTRL1 Register set to 1
1137 */
1138 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1139 VR_MII_LINK_TIMER_CTRL, 0x7A1);
1140 if (ret < 0)
1141 return ret;
1142 } else {
1143 mii_ctrl |= (BMCR_ANENABLE | BMCR_ANRESTART);
1144 an_ctrl &= ~VR_MII_AN_CTRL_SGMII_LINK_STS_;
1145 dgt_ctrl &= ~VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_;
1146 dgt_ctrl |= VR_MII_DIG_CTRL1_MAC_AUTO_SW_;
1147 }
1148
1149 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR,
1150 mii_ctrl);
1151 if (ret < 0)
1152 return ret;
1153
1154 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1155 VR_MII_DIG_CTRL1, dgt_ctrl);
1156 if (ret < 0)
1157 return ret;
1158
1159 return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1160 VR_MII_AN_CTRL, an_ctrl);
1161 }
1162
lan743x_pcs_seq_state(struct lan743x_adapter * adapter,u8 state)1163 static int lan743x_pcs_seq_state(struct lan743x_adapter *adapter, u8 state)
1164 {
1165 u8 wait_cnt = 0;
1166 u32 dig_sts;
1167
1168 do {
1169 dig_sts = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2,
1170 VR_MII_DIG_STS);
1171 if (((dig_sts & VR_MII_DIG_STS_PSEQ_STATE_MASK_) >>
1172 VR_MII_DIG_STS_PSEQ_STATE_POS_) == state)
1173 break;
1174 usleep_range(1000, 2000);
1175 } while (wait_cnt++ < 10);
1176
1177 if (wait_cnt >= 10)
1178 return -ETIMEDOUT;
1179
1180 return 0;
1181 }
1182
lan743x_pcs_power_reset(struct lan743x_adapter * adapter)1183 static int lan743x_pcs_power_reset(struct lan743x_adapter *adapter)
1184 {
1185 int mii_ctl;
1186 int ret;
1187
1188 /* SGMII/1000/2500BASE-X PCS power down */
1189 mii_ctl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR);
1190 if (mii_ctl < 0)
1191 return mii_ctl;
1192
1193 mii_ctl |= BMCR_PDOWN;
1194 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl);
1195 if (ret < 0)
1196 return ret;
1197
1198 ret = lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_DOWN);
1199 if (ret < 0)
1200 return ret;
1201
1202 /* SGMII/1000/2500BASE-X PCS power up */
1203 mii_ctl &= ~BMCR_PDOWN;
1204 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl);
1205 if (ret < 0)
1206 return ret;
1207
1208 return lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_UP);
1209 }
1210
lan743x_mac_set_address(struct lan743x_adapter * adapter,u8 * addr)1211 static void lan743x_mac_set_address(struct lan743x_adapter *adapter,
1212 u8 *addr)
1213 {
1214 u32 addr_lo, addr_hi;
1215
1216 addr_lo = addr[0] |
1217 addr[1] << 8 |
1218 addr[2] << 16 |
1219 addr[3] << 24;
1220 addr_hi = addr[4] |
1221 addr[5] << 8;
1222 lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo);
1223 lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi);
1224
1225 ether_addr_copy(adapter->mac_address, addr);
1226 dev_dbg(&adapter->pdev->dev, "MAC address set to %pM\n", addr);
1227 }
1228
lan743x_mac_rx_enable_fse(struct lan743x_adapter * adapter)1229 static void lan743x_mac_rx_enable_fse(struct lan743x_adapter *adapter)
1230 {
1231 u32 mac_rx;
1232 bool rxen;
1233
1234 mac_rx = lan743x_csr_read(adapter, MAC_RX);
1235 if (mac_rx & MAC_RX_FSE_)
1236 return;
1237
1238 rxen = mac_rx & MAC_RX_RXEN_;
1239 if (rxen) {
1240 mac_rx &= ~MAC_RX_RXEN_;
1241 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1242 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
1243 1, 1000, 20000, 100);
1244 }
1245
1246 /* Per AN2948, hardware prevents modification of the FSE bit while the
1247 * MAC receiver is enabled (RXEN bit set). Use separate register write
1248 * to assert the FSE bit before enabling the RXEN bit in MAC_RX
1249 */
1250 mac_rx |= MAC_RX_FSE_;
1251 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1252
1253 if (rxen) {
1254 mac_rx |= MAC_RX_RXEN_;
1255 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1256 }
1257 }
1258
lan743x_mac_init(struct lan743x_adapter * adapter)1259 static int lan743x_mac_init(struct lan743x_adapter *adapter)
1260 {
1261 bool mac_address_valid = true;
1262 struct net_device *netdev;
1263 u32 mac_addr_hi = 0;
1264 u32 mac_addr_lo = 0;
1265 u32 data;
1266
1267 netdev = adapter->netdev;
1268
1269 /* disable auto duplex, and speed detection. Phylib does that */
1270 data = lan743x_csr_read(adapter, MAC_CR);
1271 data &= ~(MAC_CR_ADD_ | MAC_CR_ASD_);
1272 data |= MAC_CR_CNTR_RST_;
1273 lan743x_csr_write(adapter, MAC_CR, data);
1274
1275 if (!is_valid_ether_addr(adapter->mac_address)) {
1276 mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH);
1277 mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL);
1278 adapter->mac_address[0] = mac_addr_lo & 0xFF;
1279 adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF;
1280 adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF;
1281 adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF;
1282 adapter->mac_address[4] = mac_addr_hi & 0xFF;
1283 adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF;
1284
1285 if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) &&
1286 mac_addr_lo == 0xFFFFFFFF) {
1287 mac_address_valid = false;
1288 } else if (!is_valid_ether_addr(adapter->mac_address)) {
1289 mac_address_valid = false;
1290 }
1291
1292 if (!mac_address_valid)
1293 eth_random_addr(adapter->mac_address);
1294 }
1295 lan743x_mac_set_address(adapter, adapter->mac_address);
1296 eth_hw_addr_set(netdev, adapter->mac_address);
1297
1298 lan743x_mac_rx_enable_fse(adapter);
1299
1300 return 0;
1301 }
1302
lan743x_mac_open(struct lan743x_adapter * adapter)1303 static int lan743x_mac_open(struct lan743x_adapter *adapter)
1304 {
1305 u32 temp;
1306
1307 temp = lan743x_csr_read(adapter, MAC_RX);
1308 lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_);
1309 temp = lan743x_csr_read(adapter, MAC_TX);
1310 lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_);
1311 return 0;
1312 }
1313
lan743x_mac_close(struct lan743x_adapter * adapter)1314 static void lan743x_mac_close(struct lan743x_adapter *adapter)
1315 {
1316 u32 temp;
1317
1318 temp = lan743x_csr_read(adapter, MAC_TX);
1319 temp &= ~MAC_TX_TXEN_;
1320 lan743x_csr_write(adapter, MAC_TX, temp);
1321 lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_,
1322 1, 1000, 20000, 100);
1323
1324 temp = lan743x_csr_read(adapter, MAC_RX);
1325 temp &= ~MAC_RX_RXEN_;
1326 lan743x_csr_write(adapter, MAC_RX, temp);
1327 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
1328 1, 1000, 20000, 100);
1329 }
1330
lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter * adapter,bool tx_enable,bool rx_enable)1331 void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter,
1332 bool tx_enable, bool rx_enable)
1333 {
1334 u32 flow_setting = 0;
1335
1336 /* set maximum pause time because when fifo space frees
1337 * up a zero value pause frame will be sent to release the pause
1338 */
1339 flow_setting = MAC_FLOW_CR_FCPT_MASK_;
1340 if (tx_enable)
1341 flow_setting |= MAC_FLOW_CR_TX_FCEN_;
1342 if (rx_enable)
1343 flow_setting |= MAC_FLOW_CR_RX_FCEN_;
1344 lan743x_csr_write(adapter, MAC_FLOW, flow_setting);
1345 }
1346
lan743x_mac_set_mtu(struct lan743x_adapter * adapter,int new_mtu)1347 static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu)
1348 {
1349 int enabled = 0;
1350 u32 mac_rx = 0;
1351
1352 mac_rx = lan743x_csr_read(adapter, MAC_RX);
1353 if (mac_rx & MAC_RX_RXEN_) {
1354 enabled = 1;
1355 if (mac_rx & MAC_RX_RXD_) {
1356 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1357 mac_rx &= ~MAC_RX_RXD_;
1358 }
1359 mac_rx &= ~MAC_RX_RXEN_;
1360 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1361 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
1362 1, 1000, 20000, 100);
1363 lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_);
1364 }
1365
1366 mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_);
1367 mac_rx |= (((new_mtu + ETH_HLEN + ETH_FCS_LEN)
1368 << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_);
1369 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1370
1371 if (enabled) {
1372 mac_rx |= MAC_RX_RXEN_;
1373 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1374 }
1375 return 0;
1376 }
1377
1378 /* PHY */
lan743x_hw_reset_phy(struct lan743x_adapter * adapter)1379 static int lan743x_hw_reset_phy(struct lan743x_adapter *adapter)
1380 {
1381 u32 data;
1382
1383 /* Only called with in probe, and before mdiobus_register */
1384
1385 data = lan743x_csr_read(adapter, PMT_CTL);
1386 data |= PMT_CTL_ETH_PHY_RST_;
1387 lan743x_csr_write(adapter, PMT_CTL, data);
1388
1389 return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data,
1390 (!(data & PMT_CTL_ETH_PHY_RST_) &&
1391 (data & PMT_CTL_READY_)),
1392 50000, 1000000);
1393 }
1394
lan743x_phy_interface_select(struct lan743x_adapter * adapter)1395 static void lan743x_phy_interface_select(struct lan743x_adapter *adapter)
1396 {
1397 u32 id_rev;
1398 u32 data;
1399
1400 data = lan743x_csr_read(adapter, MAC_CR);
1401 id_rev = adapter->csr.id_rev & ID_REV_ID_MASK_;
1402
1403 if (adapter->is_pci11x1x && adapter->is_sgmii_en)
1404 adapter->phy_interface = PHY_INTERFACE_MODE_SGMII;
1405 else if (adapter->is_pci11x1x && adapter->is_rmii_en)
1406 adapter->phy_interface = PHY_INTERFACE_MODE_RMII;
1407 else if (id_rev == ID_REV_ID_LAN7430_)
1408 adapter->phy_interface = PHY_INTERFACE_MODE_GMII;
1409 else if ((id_rev == ID_REV_ID_LAN7431_) && (data & MAC_CR_MII_EN_))
1410 adapter->phy_interface = PHY_INTERFACE_MODE_MII;
1411 else
1412 adapter->phy_interface = PHY_INTERFACE_MODE_RGMII;
1413
1414 dev_dbg(&adapter->pdev->dev,
1415 "selected phy interface: 0x%X\n", adapter->phy_interface);
1416 }
1417
lan743x_rfe_open(struct lan743x_adapter * adapter)1418 static void lan743x_rfe_open(struct lan743x_adapter *adapter)
1419 {
1420 lan743x_csr_write(adapter, RFE_RSS_CFG,
1421 RFE_RSS_CFG_UDP_IPV6_EX_ |
1422 RFE_RSS_CFG_TCP_IPV6_EX_ |
1423 RFE_RSS_CFG_IPV6_EX_ |
1424 RFE_RSS_CFG_UDP_IPV6_ |
1425 RFE_RSS_CFG_TCP_IPV6_ |
1426 RFE_RSS_CFG_IPV6_ |
1427 RFE_RSS_CFG_UDP_IPV4_ |
1428 RFE_RSS_CFG_TCP_IPV4_ |
1429 RFE_RSS_CFG_IPV4_ |
1430 RFE_RSS_CFG_VALID_HASH_BITS_ |
1431 RFE_RSS_CFG_RSS_QUEUE_ENABLE_ |
1432 RFE_RSS_CFG_RSS_HASH_STORE_ |
1433 RFE_RSS_CFG_RSS_ENABLE_);
1434 }
1435
lan743x_rfe_update_mac_address(struct lan743x_adapter * adapter)1436 static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter)
1437 {
1438 u8 *mac_addr;
1439 u32 mac_addr_hi = 0;
1440 u32 mac_addr_lo = 0;
1441
1442 /* Add mac address to perfect Filter */
1443 mac_addr = adapter->mac_address;
1444 mac_addr_lo = ((((u32)(mac_addr[0])) << 0) |
1445 (((u32)(mac_addr[1])) << 8) |
1446 (((u32)(mac_addr[2])) << 16) |
1447 (((u32)(mac_addr[3])) << 24));
1448 mac_addr_hi = ((((u32)(mac_addr[4])) << 0) |
1449 (((u32)(mac_addr[5])) << 8));
1450
1451 lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo);
1452 lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0),
1453 mac_addr_hi | RFE_ADDR_FILT_HI_VALID_);
1454 }
1455
lan743x_rfe_set_multicast(struct lan743x_adapter * adapter)1456 static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter)
1457 {
1458 struct net_device *netdev = adapter->netdev;
1459 u32 hash_table[DP_SEL_VHF_HASH_LEN];
1460 u32 rfctl;
1461 u32 data;
1462
1463 rfctl = lan743x_csr_read(adapter, RFE_CTL);
1464 rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ |
1465 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
1466 rfctl |= RFE_CTL_AB_;
1467 if (netdev->flags & IFF_PROMISC) {
1468 rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_;
1469 } else {
1470 if (netdev->flags & IFF_ALLMULTI)
1471 rfctl |= RFE_CTL_AM_;
1472 }
1473
1474 if (netdev->features & NETIF_F_RXCSUM)
1475 rfctl |= RFE_CTL_IP_COE_ | RFE_CTL_TCP_UDP_COE_;
1476
1477 memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32));
1478 if (netdev_mc_count(netdev)) {
1479 struct netdev_hw_addr *ha;
1480 int i;
1481
1482 rfctl |= RFE_CTL_DA_PERFECT_;
1483 i = 1;
1484 netdev_for_each_mc_addr(ha, netdev) {
1485 /* set first 32 into Perfect Filter */
1486 if (i < 33) {
1487 lan743x_csr_write(adapter,
1488 RFE_ADDR_FILT_HI(i), 0);
1489 data = ha->addr[3];
1490 data = ha->addr[2] | (data << 8);
1491 data = ha->addr[1] | (data << 8);
1492 data = ha->addr[0] | (data << 8);
1493 lan743x_csr_write(adapter,
1494 RFE_ADDR_FILT_LO(i), data);
1495 data = ha->addr[5];
1496 data = ha->addr[4] | (data << 8);
1497 data |= RFE_ADDR_FILT_HI_VALID_;
1498 lan743x_csr_write(adapter,
1499 RFE_ADDR_FILT_HI(i), data);
1500 } else {
1501 u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >>
1502 23) & 0x1FF;
1503 hash_table[bitnum / 32] |= (1 << (bitnum % 32));
1504 rfctl |= RFE_CTL_MCAST_HASH_;
1505 }
1506 i++;
1507 }
1508 }
1509
1510 lan743x_dp_write(adapter, DP_SEL_RFE_RAM,
1511 DP_SEL_VHF_VLAN_LEN,
1512 DP_SEL_VHF_HASH_LEN, hash_table);
1513 lan743x_csr_write(adapter, RFE_CTL, rfctl);
1514 }
1515
lan743x_dmac_init(struct lan743x_adapter * adapter)1516 static int lan743x_dmac_init(struct lan743x_adapter *adapter)
1517 {
1518 u32 data = 0;
1519
1520 lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_);
1521 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_,
1522 0, 1000, 20000, 100);
1523 switch (DEFAULT_DMA_DESCRIPTOR_SPACING) {
1524 case DMA_DESCRIPTOR_SPACING_16:
1525 data = DMAC_CFG_MAX_DSPACE_16_;
1526 break;
1527 case DMA_DESCRIPTOR_SPACING_32:
1528 data = DMAC_CFG_MAX_DSPACE_32_;
1529 break;
1530 case DMA_DESCRIPTOR_SPACING_64:
1531 data = DMAC_CFG_MAX_DSPACE_64_;
1532 break;
1533 case DMA_DESCRIPTOR_SPACING_128:
1534 data = DMAC_CFG_MAX_DSPACE_128_;
1535 break;
1536 default:
1537 return -EPERM;
1538 }
1539 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
1540 data |= DMAC_CFG_COAL_EN_;
1541 data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_;
1542 data |= DMAC_CFG_MAX_READ_REQ_SET_(6);
1543 lan743x_csr_write(adapter, DMAC_CFG, data);
1544 data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1);
1545 data |= DMAC_COAL_CFG_TIMER_TX_START_;
1546 data |= DMAC_COAL_CFG_FLUSH_INTS_;
1547 data |= DMAC_COAL_CFG_INT_EXIT_COAL_;
1548 data |= DMAC_COAL_CFG_CSR_EXIT_COAL_;
1549 data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A);
1550 data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C);
1551 lan743x_csr_write(adapter, DMAC_COAL_CFG, data);
1552 data = DMAC_OBFF_TX_THRES_SET_(0x08);
1553 data |= DMAC_OBFF_RX_THRES_SET_(0x0A);
1554 lan743x_csr_write(adapter, DMAC_OBFF_CFG, data);
1555 return 0;
1556 }
1557
lan743x_dmac_tx_get_state(struct lan743x_adapter * adapter,int tx_channel)1558 static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter,
1559 int tx_channel)
1560 {
1561 u32 dmac_cmd = 0;
1562
1563 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
1564 return DMAC_CHANNEL_STATE_SET((dmac_cmd &
1565 DMAC_CMD_START_T_(tx_channel)),
1566 (dmac_cmd &
1567 DMAC_CMD_STOP_T_(tx_channel)));
1568 }
1569
lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter * adapter,int tx_channel)1570 static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter,
1571 int tx_channel)
1572 {
1573 int timeout = 100;
1574 int result = 0;
1575
1576 while (timeout &&
1577 ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) ==
1578 DMAC_CHANNEL_STATE_STOP_PENDING)) {
1579 usleep_range(1000, 20000);
1580 timeout--;
1581 }
1582 if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
1583 result = -ENODEV;
1584 return result;
1585 }
1586
lan743x_dmac_rx_get_state(struct lan743x_adapter * adapter,int rx_channel)1587 static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter,
1588 int rx_channel)
1589 {
1590 u32 dmac_cmd = 0;
1591
1592 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
1593 return DMAC_CHANNEL_STATE_SET((dmac_cmd &
1594 DMAC_CMD_START_R_(rx_channel)),
1595 (dmac_cmd &
1596 DMAC_CMD_STOP_R_(rx_channel)));
1597 }
1598
lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter * adapter,int rx_channel)1599 static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter,
1600 int rx_channel)
1601 {
1602 int timeout = 100;
1603 int result = 0;
1604
1605 while (timeout &&
1606 ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) ==
1607 DMAC_CHANNEL_STATE_STOP_PENDING)) {
1608 usleep_range(1000, 20000);
1609 timeout--;
1610 }
1611 if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
1612 result = -ENODEV;
1613 return result;
1614 }
1615
lan743x_tx_release_desc(struct lan743x_tx * tx,int descriptor_index,bool cleanup)1616 static void lan743x_tx_release_desc(struct lan743x_tx *tx,
1617 int descriptor_index, bool cleanup)
1618 {
1619 struct lan743x_tx_buffer_info *buffer_info = NULL;
1620 struct lan743x_tx_descriptor *descriptor = NULL;
1621 u32 descriptor_type = 0;
1622 bool ignore_sync;
1623
1624 descriptor = &tx->ring_cpu_ptr[descriptor_index];
1625 buffer_info = &tx->buffer_info[descriptor_index];
1626 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE))
1627 goto done;
1628
1629 descriptor_type = le32_to_cpu(descriptor->data0) &
1630 TX_DESC_DATA0_DTYPE_MASK_;
1631 if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_)
1632 goto clean_up_data_descriptor;
1633 else
1634 goto clear_active;
1635
1636 clean_up_data_descriptor:
1637 if (buffer_info->dma_ptr) {
1638 if (buffer_info->flags &
1639 TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) {
1640 dma_unmap_page(&tx->adapter->pdev->dev,
1641 buffer_info->dma_ptr,
1642 buffer_info->buffer_length,
1643 DMA_TO_DEVICE);
1644 } else {
1645 dma_unmap_single(&tx->adapter->pdev->dev,
1646 buffer_info->dma_ptr,
1647 buffer_info->buffer_length,
1648 DMA_TO_DEVICE);
1649 }
1650 buffer_info->dma_ptr = 0;
1651 buffer_info->buffer_length = 0;
1652 }
1653 if (!buffer_info->skb)
1654 goto clear_active;
1655
1656 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) {
1657 dev_kfree_skb_any(buffer_info->skb);
1658 goto clear_skb;
1659 }
1660
1661 if (cleanup) {
1662 lan743x_ptp_unrequest_tx_timestamp(tx->adapter);
1663 dev_kfree_skb_any(buffer_info->skb);
1664 } else {
1665 ignore_sync = (buffer_info->flags &
1666 TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0;
1667 lan743x_ptp_tx_timestamp_skb(tx->adapter,
1668 buffer_info->skb, ignore_sync);
1669 }
1670
1671 clear_skb:
1672 buffer_info->skb = NULL;
1673
1674 clear_active:
1675 buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE;
1676
1677 done:
1678 memset(buffer_info, 0, sizeof(*buffer_info));
1679 memset(descriptor, 0, sizeof(*descriptor));
1680 }
1681
lan743x_tx_next_index(struct lan743x_tx * tx,int index)1682 static int lan743x_tx_next_index(struct lan743x_tx *tx, int index)
1683 {
1684 return ((++index) % tx->ring_size);
1685 }
1686
lan743x_tx_release_completed_descriptors(struct lan743x_tx * tx)1687 static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx)
1688 {
1689 while (le32_to_cpu(*tx->head_cpu_ptr) != (tx->last_head)) {
1690 lan743x_tx_release_desc(tx, tx->last_head, false);
1691 tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
1692 }
1693 }
1694
lan743x_tx_release_all_descriptors(struct lan743x_tx * tx)1695 static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx)
1696 {
1697 u32 original_head = 0;
1698
1699 original_head = tx->last_head;
1700 do {
1701 lan743x_tx_release_desc(tx, tx->last_head, true);
1702 tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
1703 } while (tx->last_head != original_head);
1704 memset(tx->ring_cpu_ptr, 0,
1705 sizeof(*tx->ring_cpu_ptr) * (tx->ring_size));
1706 memset(tx->buffer_info, 0,
1707 sizeof(*tx->buffer_info) * (tx->ring_size));
1708 }
1709
lan743x_tx_get_desc_cnt(struct lan743x_tx * tx,struct sk_buff * skb)1710 static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx,
1711 struct sk_buff *skb)
1712 {
1713 int result = 1; /* 1 for the main skb buffer */
1714 int nr_frags = 0;
1715
1716 if (skb_is_gso(skb))
1717 result++; /* requires an extension descriptor */
1718 nr_frags = skb_shinfo(skb)->nr_frags;
1719 result += nr_frags; /* 1 for each fragment buffer */
1720 return result;
1721 }
1722
lan743x_tx_get_avail_desc(struct lan743x_tx * tx)1723 static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx)
1724 {
1725 int last_head = tx->last_head;
1726 int last_tail = tx->last_tail;
1727
1728 if (last_tail >= last_head)
1729 return tx->ring_size - last_tail + last_head - 1;
1730 else
1731 return last_head - last_tail - 1;
1732 }
1733
lan743x_rx_cfg_b_tstamp_config(struct lan743x_adapter * adapter,int rx_ts_config)1734 static void lan743x_rx_cfg_b_tstamp_config(struct lan743x_adapter *adapter,
1735 int rx_ts_config)
1736 {
1737 int channel_number;
1738 int index;
1739 u32 data;
1740
1741 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
1742 channel_number = adapter->rx[index].channel_number;
1743 data = lan743x_csr_read(adapter, RX_CFG_B(channel_number));
1744 data &= RX_CFG_B_TS_MASK_;
1745 data |= rx_ts_config;
1746 lan743x_csr_write(adapter, RX_CFG_B(channel_number),
1747 data);
1748 }
1749 }
1750
lan743x_rx_set_tstamp_mode(struct lan743x_adapter * adapter,int rx_filter)1751 int lan743x_rx_set_tstamp_mode(struct lan743x_adapter *adapter,
1752 int rx_filter)
1753 {
1754 u32 data;
1755
1756 switch (rx_filter) {
1757 case HWTSTAMP_FILTER_PTP_V2_EVENT:
1758 lan743x_rx_cfg_b_tstamp_config(adapter,
1759 RX_CFG_B_TS_DESCR_EN_);
1760 data = lan743x_csr_read(adapter, PTP_RX_TS_CFG);
1761 data |= PTP_RX_TS_CFG_EVENT_MSGS_;
1762 lan743x_csr_write(adapter, PTP_RX_TS_CFG, data);
1763 break;
1764 case HWTSTAMP_FILTER_NONE:
1765 lan743x_rx_cfg_b_tstamp_config(adapter,
1766 RX_CFG_B_TS_NONE_);
1767 break;
1768 case HWTSTAMP_FILTER_ALL:
1769 lan743x_rx_cfg_b_tstamp_config(adapter,
1770 RX_CFG_B_TS_ALL_RX_);
1771 break;
1772 default:
1773 return -ERANGE;
1774 }
1775 adapter->rx_tstamp_filter = rx_filter;
1776 return 0;
1777 }
1778
lan743x_tx_set_timestamping_mode(struct lan743x_tx * tx,bool enable_timestamping,bool enable_onestep_sync)1779 void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx,
1780 bool enable_timestamping,
1781 bool enable_onestep_sync)
1782 {
1783 if (enable_timestamping)
1784 tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED;
1785 else
1786 tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED;
1787 if (enable_onestep_sync)
1788 tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC;
1789 else
1790 tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC;
1791 }
1792
lan743x_tx_frame_start(struct lan743x_tx * tx,unsigned char * first_buffer,unsigned int first_buffer_length,unsigned int frame_length,bool time_stamp,bool check_sum)1793 static int lan743x_tx_frame_start(struct lan743x_tx *tx,
1794 unsigned char *first_buffer,
1795 unsigned int first_buffer_length,
1796 unsigned int frame_length,
1797 bool time_stamp,
1798 bool check_sum)
1799 {
1800 /* called only from within lan743x_tx_xmit_frame.
1801 * assuming tx->ring_lock has already been acquired.
1802 */
1803 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1804 struct lan743x_tx_buffer_info *buffer_info = NULL;
1805 struct lan743x_adapter *adapter = tx->adapter;
1806 struct device *dev = &adapter->pdev->dev;
1807 dma_addr_t dma_ptr;
1808
1809 tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS;
1810 tx->frame_first = tx->last_tail;
1811 tx->frame_tail = tx->frame_first;
1812
1813 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1814 buffer_info = &tx->buffer_info[tx->frame_tail];
1815 dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length,
1816 DMA_TO_DEVICE);
1817 if (dma_mapping_error(dev, dma_ptr))
1818 return -ENOMEM;
1819
1820 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr));
1821 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr));
1822 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) &
1823 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_);
1824
1825 buffer_info->skb = NULL;
1826 buffer_info->dma_ptr = dma_ptr;
1827 buffer_info->buffer_length = first_buffer_length;
1828 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1829
1830 tx->frame_data0 = (first_buffer_length &
1831 TX_DESC_DATA0_BUF_LENGTH_MASK_) |
1832 TX_DESC_DATA0_DTYPE_DATA_ |
1833 TX_DESC_DATA0_FS_ |
1834 TX_DESC_DATA0_FCS_;
1835 if (time_stamp)
1836 tx->frame_data0 |= TX_DESC_DATA0_TSE_;
1837
1838 if (check_sum)
1839 tx->frame_data0 |= TX_DESC_DATA0_ICE_ |
1840 TX_DESC_DATA0_IPE_ |
1841 TX_DESC_DATA0_TPE_;
1842
1843 /* data0 will be programmed in one of other frame assembler functions */
1844 return 0;
1845 }
1846
lan743x_tx_frame_add_lso(struct lan743x_tx * tx,unsigned int frame_length,int nr_frags)1847 static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx,
1848 unsigned int frame_length,
1849 int nr_frags)
1850 {
1851 /* called only from within lan743x_tx_xmit_frame.
1852 * assuming tx->ring_lock has already been acquired.
1853 */
1854 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1855 struct lan743x_tx_buffer_info *buffer_info = NULL;
1856
1857 /* wrap up previous descriptor */
1858 tx->frame_data0 |= TX_DESC_DATA0_EXT_;
1859 if (nr_frags <= 0) {
1860 tx->frame_data0 |= TX_DESC_DATA0_LS_;
1861 tx->frame_data0 |= TX_DESC_DATA0_IOC_;
1862 tx->frame_last = tx->frame_first;
1863 }
1864 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1865 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0);
1866
1867 /* move to next descriptor */
1868 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
1869 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1870 buffer_info = &tx->buffer_info[tx->frame_tail];
1871
1872 /* add extension descriptor */
1873 tx_descriptor->data1 = 0;
1874 tx_descriptor->data2 = 0;
1875 tx_descriptor->data3 = 0;
1876
1877 buffer_info->skb = NULL;
1878 buffer_info->dma_ptr = 0;
1879 buffer_info->buffer_length = 0;
1880 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1881
1882 tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) |
1883 TX_DESC_DATA0_DTYPE_EXT_ |
1884 TX_DESC_DATA0_EXT_LSO_;
1885
1886 /* data0 will be programmed in one of other frame assembler functions */
1887 }
1888
lan743x_tx_frame_add_fragment(struct lan743x_tx * tx,const skb_frag_t * fragment,unsigned int frame_length)1889 static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx,
1890 const skb_frag_t *fragment,
1891 unsigned int frame_length)
1892 {
1893 /* called only from within lan743x_tx_xmit_frame
1894 * assuming tx->ring_lock has already been acquired
1895 */
1896 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1897 struct lan743x_tx_buffer_info *buffer_info = NULL;
1898 struct lan743x_adapter *adapter = tx->adapter;
1899 struct device *dev = &adapter->pdev->dev;
1900 unsigned int fragment_length = 0;
1901 dma_addr_t dma_ptr;
1902
1903 fragment_length = skb_frag_size(fragment);
1904 if (!fragment_length)
1905 return 0;
1906
1907 /* wrap up previous descriptor */
1908 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1909 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0);
1910
1911 /* move to next descriptor */
1912 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
1913 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1914 buffer_info = &tx->buffer_info[tx->frame_tail];
1915 dma_ptr = skb_frag_dma_map(dev, fragment,
1916 0, fragment_length,
1917 DMA_TO_DEVICE);
1918 if (dma_mapping_error(dev, dma_ptr)) {
1919 int desc_index;
1920
1921 /* cleanup all previously setup descriptors */
1922 desc_index = tx->frame_first;
1923 while (desc_index != tx->frame_tail) {
1924 lan743x_tx_release_desc(tx, desc_index, true);
1925 desc_index = lan743x_tx_next_index(tx, desc_index);
1926 }
1927 dma_wmb();
1928 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
1929 tx->frame_first = 0;
1930 tx->frame_data0 = 0;
1931 tx->frame_tail = 0;
1932 tx->frame_last = 0;
1933 return -ENOMEM;
1934 }
1935
1936 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr));
1937 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr));
1938 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) &
1939 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_);
1940
1941 buffer_info->skb = NULL;
1942 buffer_info->dma_ptr = dma_ptr;
1943 buffer_info->buffer_length = fragment_length;
1944 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1945 buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT;
1946
1947 tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) |
1948 TX_DESC_DATA0_DTYPE_DATA_ |
1949 TX_DESC_DATA0_FCS_;
1950
1951 /* data0 will be programmed in one of other frame assembler functions */
1952 return 0;
1953 }
1954
lan743x_tx_frame_end(struct lan743x_tx * tx,struct sk_buff * skb,bool time_stamp,bool ignore_sync)1955 static void lan743x_tx_frame_end(struct lan743x_tx *tx,
1956 struct sk_buff *skb,
1957 bool time_stamp,
1958 bool ignore_sync)
1959 {
1960 /* called only from within lan743x_tx_xmit_frame
1961 * assuming tx->ring_lock has already been acquired
1962 */
1963 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1964 struct lan743x_tx_buffer_info *buffer_info = NULL;
1965 struct lan743x_adapter *adapter = tx->adapter;
1966 u32 tx_tail_flags = 0;
1967
1968 /* wrap up previous descriptor */
1969 if ((tx->frame_data0 & TX_DESC_DATA0_DTYPE_MASK_) ==
1970 TX_DESC_DATA0_DTYPE_DATA_) {
1971 tx->frame_data0 |= TX_DESC_DATA0_LS_;
1972 tx->frame_data0 |= TX_DESC_DATA0_IOC_;
1973 tx->frame_last = tx->frame_tail;
1974 }
1975
1976 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_last];
1977 buffer_info = &tx->buffer_info[tx->frame_last];
1978 buffer_info->skb = skb;
1979 if (time_stamp)
1980 buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED;
1981 if (ignore_sync)
1982 buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC;
1983
1984 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1985 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0);
1986 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
1987 tx->last_tail = tx->frame_tail;
1988
1989 dma_wmb();
1990
1991 if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
1992 tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_;
1993 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)
1994 tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ |
1995 TX_TAIL_SET_TOP_INT_EN_;
1996
1997 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
1998 tx_tail_flags | tx->frame_tail);
1999 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
2000 }
2001
lan743x_tx_xmit_frame(struct lan743x_tx * tx,struct sk_buff * skb)2002 static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx,
2003 struct sk_buff *skb)
2004 {
2005 int required_number_of_descriptors = 0;
2006 unsigned int start_frame_length = 0;
2007 netdev_tx_t retval = NETDEV_TX_OK;
2008 unsigned int frame_length = 0;
2009 unsigned int head_length = 0;
2010 unsigned long irq_flags = 0;
2011 bool do_timestamp = false;
2012 bool ignore_sync = false;
2013 struct netdev_queue *txq;
2014 int nr_frags = 0;
2015 bool gso = false;
2016 int j;
2017
2018 required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb);
2019
2020 spin_lock_irqsave(&tx->ring_lock, irq_flags);
2021 if (required_number_of_descriptors >
2022 lan743x_tx_get_avail_desc(tx)) {
2023 if (required_number_of_descriptors > (tx->ring_size - 1)) {
2024 dev_kfree_skb_irq(skb);
2025 } else {
2026 /* save how many descriptors we needed to restart the queue */
2027 tx->rqd_descriptors = required_number_of_descriptors;
2028 retval = NETDEV_TX_BUSY;
2029 txq = netdev_get_tx_queue(tx->adapter->netdev,
2030 tx->channel_number);
2031 netif_tx_stop_queue(txq);
2032 }
2033 goto unlock;
2034 }
2035
2036 /* space available, transmit skb */
2037 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
2038 (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) &&
2039 (lan743x_ptp_request_tx_timestamp(tx->adapter))) {
2040 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
2041 do_timestamp = true;
2042 if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC)
2043 ignore_sync = true;
2044 }
2045 head_length = skb_headlen(skb);
2046 frame_length = skb_pagelen(skb);
2047 nr_frags = skb_shinfo(skb)->nr_frags;
2048 start_frame_length = frame_length;
2049 gso = skb_is_gso(skb);
2050 if (gso) {
2051 start_frame_length = max(skb_shinfo(skb)->gso_size,
2052 (unsigned short)8);
2053 }
2054
2055 if (lan743x_tx_frame_start(tx,
2056 skb->data, head_length,
2057 start_frame_length,
2058 do_timestamp,
2059 skb->ip_summed == CHECKSUM_PARTIAL)) {
2060 dev_kfree_skb_irq(skb);
2061 goto unlock;
2062 }
2063 tx->frame_count++;
2064
2065 if (gso)
2066 lan743x_tx_frame_add_lso(tx, frame_length, nr_frags);
2067
2068 if (nr_frags <= 0)
2069 goto finish;
2070
2071 for (j = 0; j < nr_frags; j++) {
2072 const skb_frag_t *frag = &(skb_shinfo(skb)->frags[j]);
2073
2074 if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) {
2075 /* upon error no need to call
2076 * lan743x_tx_frame_end
2077 * frame assembler clean up was performed inside
2078 * lan743x_tx_frame_add_fragment
2079 */
2080 dev_kfree_skb_irq(skb);
2081 goto unlock;
2082 }
2083 }
2084
2085 finish:
2086 lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync);
2087
2088 unlock:
2089 spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
2090 return retval;
2091 }
2092
lan743x_tx_napi_poll(struct napi_struct * napi,int weight)2093 static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight)
2094 {
2095 struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi);
2096 struct lan743x_adapter *adapter = tx->adapter;
2097 unsigned long irq_flags = 0;
2098 struct netdev_queue *txq;
2099 u32 ioc_bit = 0;
2100
2101 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
2102 lan743x_csr_read(adapter, DMAC_INT_STS);
2103 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C)
2104 lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit);
2105 spin_lock_irqsave(&tx->ring_lock, irq_flags);
2106
2107 /* clean up tx ring */
2108 lan743x_tx_release_completed_descriptors(tx);
2109 txq = netdev_get_tx_queue(adapter->netdev, tx->channel_number);
2110 if (netif_tx_queue_stopped(txq)) {
2111 if (tx->rqd_descriptors) {
2112 if (tx->rqd_descriptors <=
2113 lan743x_tx_get_avail_desc(tx)) {
2114 tx->rqd_descriptors = 0;
2115 netif_tx_wake_queue(txq);
2116 }
2117 } else {
2118 netif_tx_wake_queue(txq);
2119 }
2120 }
2121 spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
2122
2123 if (!napi_complete(napi))
2124 goto done;
2125
2126 /* enable isr */
2127 lan743x_csr_write(adapter, INT_EN_SET,
2128 INT_BIT_DMA_TX_(tx->channel_number));
2129 lan743x_csr_read(adapter, INT_STS);
2130
2131 done:
2132 return 0;
2133 }
2134
lan743x_tx_ring_cleanup(struct lan743x_tx * tx)2135 static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx)
2136 {
2137 if (tx->head_cpu_ptr) {
2138 dma_free_coherent(&tx->adapter->pdev->dev,
2139 sizeof(*tx->head_cpu_ptr), tx->head_cpu_ptr,
2140 tx->head_dma_ptr);
2141 tx->head_cpu_ptr = NULL;
2142 tx->head_dma_ptr = 0;
2143 }
2144 kfree(tx->buffer_info);
2145 tx->buffer_info = NULL;
2146
2147 if (tx->ring_cpu_ptr) {
2148 dma_free_coherent(&tx->adapter->pdev->dev,
2149 tx->ring_allocation_size, tx->ring_cpu_ptr,
2150 tx->ring_dma_ptr);
2151 tx->ring_allocation_size = 0;
2152 tx->ring_cpu_ptr = NULL;
2153 tx->ring_dma_ptr = 0;
2154 }
2155 tx->ring_size = 0;
2156 }
2157
lan743x_tx_ring_init(struct lan743x_tx * tx)2158 static int lan743x_tx_ring_init(struct lan743x_tx *tx)
2159 {
2160 size_t ring_allocation_size = 0;
2161 void *cpu_ptr = NULL;
2162 dma_addr_t dma_ptr;
2163 int ret = -ENOMEM;
2164
2165 tx->ring_size = LAN743X_TX_RING_SIZE;
2166 if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) {
2167 ret = -EINVAL;
2168 goto cleanup;
2169 }
2170 if (dma_set_mask_and_coherent(&tx->adapter->pdev->dev,
2171 DMA_BIT_MASK(64))) {
2172 dev_warn(&tx->adapter->pdev->dev,
2173 "lan743x_: No suitable DMA available\n");
2174 ret = -ENOMEM;
2175 goto cleanup;
2176 }
2177 ring_allocation_size = ALIGN(tx->ring_size *
2178 sizeof(struct lan743x_tx_descriptor),
2179 PAGE_SIZE);
2180 dma_ptr = 0;
2181 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev,
2182 ring_allocation_size, &dma_ptr, GFP_KERNEL);
2183 if (!cpu_ptr) {
2184 ret = -ENOMEM;
2185 goto cleanup;
2186 }
2187
2188 tx->ring_allocation_size = ring_allocation_size;
2189 tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr;
2190 tx->ring_dma_ptr = dma_ptr;
2191
2192 cpu_ptr = kzalloc_objs(*tx->buffer_info, tx->ring_size);
2193 if (!cpu_ptr) {
2194 ret = -ENOMEM;
2195 goto cleanup;
2196 }
2197 tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr;
2198 dma_ptr = 0;
2199 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev,
2200 sizeof(*tx->head_cpu_ptr), &dma_ptr,
2201 GFP_KERNEL);
2202 if (!cpu_ptr) {
2203 ret = -ENOMEM;
2204 goto cleanup;
2205 }
2206
2207 tx->head_cpu_ptr = cpu_ptr;
2208 tx->head_dma_ptr = dma_ptr;
2209 if (tx->head_dma_ptr & 0x3) {
2210 ret = -ENOMEM;
2211 goto cleanup;
2212 }
2213
2214 return 0;
2215
2216 cleanup:
2217 lan743x_tx_ring_cleanup(tx);
2218 return ret;
2219 }
2220
lan743x_tx_close(struct lan743x_tx * tx)2221 static void lan743x_tx_close(struct lan743x_tx *tx)
2222 {
2223 struct lan743x_adapter *adapter = tx->adapter;
2224
2225 lan743x_csr_write(adapter,
2226 DMAC_CMD,
2227 DMAC_CMD_STOP_T_(tx->channel_number));
2228 lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number);
2229
2230 lan743x_csr_write(adapter,
2231 DMAC_INT_EN_CLR,
2232 DMAC_INT_BIT_TX_IOC_(tx->channel_number));
2233 lan743x_csr_write(adapter, INT_EN_CLR,
2234 INT_BIT_DMA_TX_(tx->channel_number));
2235 napi_disable(&tx->napi);
2236 netif_napi_del(&tx->napi);
2237
2238 lan743x_csr_write(adapter, FCT_TX_CTL,
2239 FCT_TX_CTL_DIS_(tx->channel_number));
2240 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
2241 FCT_TX_CTL_EN_(tx->channel_number),
2242 0, 1000, 20000, 100);
2243
2244 lan743x_tx_release_all_descriptors(tx);
2245
2246 tx->rqd_descriptors = 0;
2247
2248 lan743x_tx_ring_cleanup(tx);
2249 }
2250
lan743x_tx_open(struct lan743x_tx * tx)2251 static int lan743x_tx_open(struct lan743x_tx *tx)
2252 {
2253 struct lan743x_adapter *adapter = NULL;
2254 u32 data = 0;
2255 int ret;
2256
2257 adapter = tx->adapter;
2258 ret = lan743x_tx_ring_init(tx);
2259 if (ret)
2260 return ret;
2261
2262 /* initialize fifo */
2263 lan743x_csr_write(adapter, FCT_TX_CTL,
2264 FCT_TX_CTL_RESET_(tx->channel_number));
2265 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
2266 FCT_TX_CTL_RESET_(tx->channel_number),
2267 0, 1000, 20000, 100);
2268
2269 /* enable fifo */
2270 lan743x_csr_write(adapter, FCT_TX_CTL,
2271 FCT_TX_CTL_EN_(tx->channel_number));
2272
2273 /* reset tx channel */
2274 lan743x_csr_write(adapter, DMAC_CMD,
2275 DMAC_CMD_TX_SWR_(tx->channel_number));
2276 lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
2277 DMAC_CMD_TX_SWR_(tx->channel_number),
2278 0, 1000, 20000, 100);
2279
2280 /* Write TX_BASE_ADDR */
2281 lan743x_csr_write(adapter,
2282 TX_BASE_ADDRH(tx->channel_number),
2283 DMA_ADDR_HIGH32(tx->ring_dma_ptr));
2284 lan743x_csr_write(adapter,
2285 TX_BASE_ADDRL(tx->channel_number),
2286 DMA_ADDR_LOW32(tx->ring_dma_ptr));
2287
2288 /* Write TX_CFG_B */
2289 data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number));
2290 data &= ~TX_CFG_B_TX_RING_LEN_MASK_;
2291 data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_);
2292 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
2293 data |= TX_CFG_B_TDMABL_512_;
2294 lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data);
2295
2296 /* Write TX_CFG_A */
2297 data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_;
2298 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
2299 data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_;
2300 data |= TX_CFG_A_TX_PF_THRES_SET_(0x10);
2301 data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04);
2302 data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07);
2303 }
2304 lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data);
2305
2306 /* Write TX_HEAD_WRITEBACK_ADDR */
2307 lan743x_csr_write(adapter,
2308 TX_HEAD_WRITEBACK_ADDRH(tx->channel_number),
2309 DMA_ADDR_HIGH32(tx->head_dma_ptr));
2310 lan743x_csr_write(adapter,
2311 TX_HEAD_WRITEBACK_ADDRL(tx->channel_number),
2312 DMA_ADDR_LOW32(tx->head_dma_ptr));
2313
2314 /* set last head */
2315 tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number));
2316
2317 /* write TX_TAIL */
2318 tx->last_tail = 0;
2319 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
2320 (u32)(tx->last_tail));
2321 tx->vector_flags = lan743x_intr_get_vector_flags(adapter,
2322 INT_BIT_DMA_TX_
2323 (tx->channel_number));
2324 netif_napi_add_tx_weight(adapter->netdev,
2325 &tx->napi, lan743x_tx_napi_poll,
2326 NAPI_POLL_WEIGHT);
2327 napi_enable(&tx->napi);
2328
2329 data = 0;
2330 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
2331 data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_;
2332 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
2333 data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_;
2334 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
2335 data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_;
2336 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
2337 data |= TX_CFG_C_TX_INT_EN_R2C_;
2338 lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data);
2339
2340 if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET))
2341 lan743x_csr_write(adapter, INT_EN_SET,
2342 INT_BIT_DMA_TX_(tx->channel_number));
2343 lan743x_csr_write(adapter, DMAC_INT_EN_SET,
2344 DMAC_INT_BIT_TX_IOC_(tx->channel_number));
2345
2346 /* start dmac channel */
2347 lan743x_csr_write(adapter, DMAC_CMD,
2348 DMAC_CMD_START_T_(tx->channel_number));
2349 return 0;
2350 }
2351
lan743x_rx_next_index(struct lan743x_rx * rx,int index)2352 static int lan743x_rx_next_index(struct lan743x_rx *rx, int index)
2353 {
2354 return ((++index) % rx->ring_size);
2355 }
2356
lan743x_rx_update_tail(struct lan743x_rx * rx,int index)2357 static void lan743x_rx_update_tail(struct lan743x_rx *rx, int index)
2358 {
2359 /* update the tail once per 8 descriptors */
2360 if ((index & 7) == 7)
2361 lan743x_csr_write(rx->adapter, RX_TAIL(rx->channel_number),
2362 index);
2363 }
2364
lan743x_rx_init_ring_element(struct lan743x_rx * rx,int index,gfp_t gfp)2365 static int lan743x_rx_init_ring_element(struct lan743x_rx *rx, int index,
2366 gfp_t gfp)
2367 {
2368 struct net_device *netdev = rx->adapter->netdev;
2369 struct device *dev = &rx->adapter->pdev->dev;
2370 struct lan743x_rx_buffer_info *buffer_info;
2371 unsigned int buffer_length, used_length;
2372 struct lan743x_rx_descriptor *descriptor;
2373 struct sk_buff *skb;
2374 dma_addr_t dma_ptr;
2375
2376 buffer_length = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + RX_HEAD_PADDING;
2377
2378 descriptor = &rx->ring_cpu_ptr[index];
2379 buffer_info = &rx->buffer_info[index];
2380 skb = __netdev_alloc_skb(netdev, buffer_length, gfp);
2381 if (!skb)
2382 return -ENOMEM;
2383 dma_ptr = dma_map_single(dev, skb->data, buffer_length, DMA_FROM_DEVICE);
2384 if (dma_mapping_error(dev, dma_ptr)) {
2385 dev_kfree_skb_any(skb);
2386 return -ENOMEM;
2387 }
2388 if (buffer_info->dma_ptr) {
2389 /* sync used area of buffer only */
2390 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_)
2391 /* frame length is valid only if LS bit is set.
2392 * it's a safe upper bound for the used area in this
2393 * buffer.
2394 */
2395 used_length = min(RX_DESC_DATA0_FRAME_LENGTH_GET_
2396 (le32_to_cpu(descriptor->data0)),
2397 buffer_info->buffer_length);
2398 else
2399 used_length = buffer_info->buffer_length;
2400 dma_sync_single_for_cpu(dev, buffer_info->dma_ptr,
2401 used_length,
2402 DMA_FROM_DEVICE);
2403 dma_unmap_single_attrs(dev, buffer_info->dma_ptr,
2404 buffer_info->buffer_length,
2405 DMA_FROM_DEVICE,
2406 DMA_ATTR_SKIP_CPU_SYNC);
2407 }
2408
2409 buffer_info->skb = skb;
2410 buffer_info->dma_ptr = dma_ptr;
2411 buffer_info->buffer_length = buffer_length;
2412 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr));
2413 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr));
2414 descriptor->data3 = 0;
2415 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ |
2416 (buffer_length & RX_DESC_DATA0_BUF_LENGTH_MASK_)));
2417 lan743x_rx_update_tail(rx, index);
2418
2419 return 0;
2420 }
2421
lan743x_rx_reuse_ring_element(struct lan743x_rx * rx,int index)2422 static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index)
2423 {
2424 struct lan743x_rx_buffer_info *buffer_info;
2425 struct lan743x_rx_descriptor *descriptor;
2426
2427 descriptor = &rx->ring_cpu_ptr[index];
2428 buffer_info = &rx->buffer_info[index];
2429
2430 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr));
2431 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr));
2432 descriptor->data3 = 0;
2433 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ |
2434 ((buffer_info->buffer_length) &
2435 RX_DESC_DATA0_BUF_LENGTH_MASK_)));
2436 lan743x_rx_update_tail(rx, index);
2437 }
2438
lan743x_rx_release_ring_element(struct lan743x_rx * rx,int index)2439 static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index)
2440 {
2441 struct lan743x_rx_buffer_info *buffer_info;
2442 struct lan743x_rx_descriptor *descriptor;
2443
2444 descriptor = &rx->ring_cpu_ptr[index];
2445 buffer_info = &rx->buffer_info[index];
2446
2447 memset(descriptor, 0, sizeof(*descriptor));
2448
2449 if (buffer_info->dma_ptr) {
2450 dma_unmap_single(&rx->adapter->pdev->dev,
2451 buffer_info->dma_ptr,
2452 buffer_info->buffer_length,
2453 DMA_FROM_DEVICE);
2454 buffer_info->dma_ptr = 0;
2455 }
2456
2457 if (buffer_info->skb) {
2458 dev_kfree_skb(buffer_info->skb);
2459 buffer_info->skb = NULL;
2460 }
2461
2462 memset(buffer_info, 0, sizeof(*buffer_info));
2463 }
2464
2465 static struct sk_buff *
lan743x_rx_trim_skb(struct sk_buff * skb,int frame_length)2466 lan743x_rx_trim_skb(struct sk_buff *skb, int frame_length)
2467 {
2468 if (skb_linearize(skb)) {
2469 dev_kfree_skb_irq(skb);
2470 return NULL;
2471 }
2472 frame_length = max_t(int, 0, frame_length - ETH_FCS_LEN);
2473 if (skb->len > frame_length) {
2474 skb->tail -= skb->len - frame_length;
2475 skb->len = frame_length;
2476 }
2477 return skb;
2478 }
2479
lan743x_rx_process_buffer(struct lan743x_rx * rx)2480 static int lan743x_rx_process_buffer(struct lan743x_rx *rx)
2481 {
2482 int current_head_index = le32_to_cpu(*rx->head_cpu_ptr);
2483 struct lan743x_rx_descriptor *descriptor, *desc_ext;
2484 struct net_device *netdev = rx->adapter->netdev;
2485 int result = RX_PROCESS_RESULT_NOTHING_TO_DO;
2486 struct lan743x_rx_buffer_info *buffer_info;
2487 int frame_length, buffer_length;
2488 bool is_ice, is_tce, is_icsm;
2489 int extension_index = -1;
2490 bool is_last, is_first;
2491 struct sk_buff *skb;
2492
2493 if (current_head_index < 0 || current_head_index >= rx->ring_size)
2494 goto done;
2495
2496 if (rx->last_head < 0 || rx->last_head >= rx->ring_size)
2497 goto done;
2498
2499 if (rx->last_head == current_head_index)
2500 goto done;
2501
2502 descriptor = &rx->ring_cpu_ptr[rx->last_head];
2503 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_OWN_)
2504 goto done;
2505 buffer_info = &rx->buffer_info[rx->last_head];
2506
2507 is_last = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_;
2508 is_first = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_FS_;
2509
2510 if (is_last && le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_EXT_) {
2511 /* extension is expected to follow */
2512 int index = lan743x_rx_next_index(rx, rx->last_head);
2513
2514 if (index == current_head_index)
2515 /* extension not yet available */
2516 goto done;
2517 desc_ext = &rx->ring_cpu_ptr[index];
2518 if (le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_OWN_)
2519 /* extension not yet available */
2520 goto done;
2521 if (!(le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_EXT_))
2522 goto move_forward;
2523 extension_index = index;
2524 }
2525
2526 /* Only the last buffer in a multi-buffer frame contains the total frame
2527 * length. The chip occasionally sends more buffers than strictly
2528 * required to reach the total frame length.
2529 * Handle this by adding all buffers to the skb in their entirety.
2530 * Once the real frame length is known, trim the skb.
2531 */
2532 frame_length =
2533 RX_DESC_DATA0_FRAME_LENGTH_GET_(le32_to_cpu(descriptor->data0));
2534 buffer_length = buffer_info->buffer_length;
2535 is_ice = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_ICE_;
2536 is_tce = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_TCE_;
2537 is_icsm = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_ICSM_;
2538
2539 netdev_dbg(netdev, "%s%schunk: %d/%d",
2540 is_first ? "first " : " ",
2541 is_last ? "last " : " ",
2542 frame_length, buffer_length);
2543
2544 /* save existing skb, allocate new skb and map to dma */
2545 skb = buffer_info->skb;
2546 if (lan743x_rx_init_ring_element(rx, rx->last_head, GFP_ATOMIC)) {
2547 /* failed to allocate next skb.
2548 * Memory is very low.
2549 * Drop this packet and reuse buffer.
2550 */
2551 lan743x_rx_reuse_ring_element(rx, rx->last_head);
2552 /* drop packet that was being assembled */
2553 dev_kfree_skb_irq(rx->skb_head);
2554 rx->skb_head = NULL;
2555 goto process_extension;
2556 }
2557
2558 /* add buffers to skb via skb->frag_list */
2559 if (is_first) {
2560 skb_reserve(skb, RX_HEAD_PADDING);
2561 skb_put(skb, buffer_length - RX_HEAD_PADDING);
2562 if (rx->skb_head)
2563 dev_kfree_skb_irq(rx->skb_head);
2564 rx->skb_head = skb;
2565 } else if (rx->skb_head) {
2566 skb_put(skb, buffer_length);
2567 if (skb_shinfo(rx->skb_head)->frag_list)
2568 rx->skb_tail->next = skb;
2569 else
2570 skb_shinfo(rx->skb_head)->frag_list = skb;
2571 rx->skb_tail = skb;
2572 rx->skb_head->len += skb->len;
2573 rx->skb_head->data_len += skb->len;
2574 rx->skb_head->truesize += skb->truesize;
2575 } else {
2576 /* packet to assemble has already been dropped because one or
2577 * more of its buffers could not be allocated
2578 */
2579 netdev_dbg(netdev, "drop buffer intended for dropped packet");
2580 dev_kfree_skb_irq(skb);
2581 }
2582
2583 process_extension:
2584 if (extension_index >= 0) {
2585 u32 ts_sec;
2586 u32 ts_nsec;
2587
2588 ts_sec = le32_to_cpu(desc_ext->data1);
2589 ts_nsec = (le32_to_cpu(desc_ext->data2) &
2590 RX_DESC_DATA2_TS_NS_MASK_);
2591 if (rx->skb_head)
2592 skb_hwtstamps(rx->skb_head)->hwtstamp =
2593 ktime_set(ts_sec, ts_nsec);
2594 lan743x_rx_reuse_ring_element(rx, extension_index);
2595 rx->last_head = extension_index;
2596 netdev_dbg(netdev, "process extension");
2597 }
2598
2599 if (is_last && rx->skb_head)
2600 rx->skb_head = lan743x_rx_trim_skb(rx->skb_head, frame_length);
2601
2602 if (is_last && rx->skb_head) {
2603 rx->skb_head->protocol = eth_type_trans(rx->skb_head,
2604 rx->adapter->netdev);
2605 if (rx->adapter->netdev->features & NETIF_F_RXCSUM) {
2606 if (!is_ice && !is_tce && !is_icsm)
2607 skb->ip_summed = CHECKSUM_UNNECESSARY;
2608 }
2609 netdev_dbg(netdev, "sending %d byte frame to OS",
2610 rx->skb_head->len);
2611 napi_gro_receive(&rx->napi, rx->skb_head);
2612 rx->skb_head = NULL;
2613 }
2614
2615 move_forward:
2616 /* push tail and head forward */
2617 rx->last_tail = rx->last_head;
2618 rx->last_head = lan743x_rx_next_index(rx, rx->last_head);
2619 result = RX_PROCESS_RESULT_BUFFER_RECEIVED;
2620 done:
2621 return result;
2622 }
2623
lan743x_rx_napi_poll(struct napi_struct * napi,int weight)2624 static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight)
2625 {
2626 struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi);
2627 struct lan743x_adapter *adapter = rx->adapter;
2628 int result = RX_PROCESS_RESULT_NOTHING_TO_DO;
2629 u32 rx_tail_flags = 0;
2630 int count;
2631
2632 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) {
2633 /* clear int status bit before reading packet */
2634 lan743x_csr_write(adapter, DMAC_INT_STS,
2635 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2636 }
2637 for (count = 0; count < weight; count++) {
2638 result = lan743x_rx_process_buffer(rx);
2639 if (result == RX_PROCESS_RESULT_NOTHING_TO_DO)
2640 break;
2641 }
2642 rx->frame_count += count;
2643 if (count == weight || result == RX_PROCESS_RESULT_BUFFER_RECEIVED)
2644 return weight;
2645
2646 if (!napi_complete_done(napi, count))
2647 return count;
2648
2649 /* re-arm interrupts, must write to rx tail on some chip variants */
2650 if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
2651 rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_;
2652 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) {
2653 rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_;
2654 } else {
2655 lan743x_csr_write(adapter, INT_EN_SET,
2656 INT_BIT_DMA_RX_(rx->channel_number));
2657 }
2658
2659 if (rx_tail_flags)
2660 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
2661 rx_tail_flags | rx->last_tail);
2662
2663 return count;
2664 }
2665
lan743x_rx_ring_cleanup(struct lan743x_rx * rx)2666 static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx)
2667 {
2668 if (rx->buffer_info && rx->ring_cpu_ptr) {
2669 int index;
2670
2671 for (index = 0; index < rx->ring_size; index++)
2672 lan743x_rx_release_ring_element(rx, index);
2673 }
2674
2675 if (rx->head_cpu_ptr) {
2676 dma_free_coherent(&rx->adapter->pdev->dev,
2677 sizeof(*rx->head_cpu_ptr), rx->head_cpu_ptr,
2678 rx->head_dma_ptr);
2679 rx->head_cpu_ptr = NULL;
2680 rx->head_dma_ptr = 0;
2681 }
2682
2683 kfree(rx->buffer_info);
2684 rx->buffer_info = NULL;
2685
2686 if (rx->ring_cpu_ptr) {
2687 dma_free_coherent(&rx->adapter->pdev->dev,
2688 rx->ring_allocation_size, rx->ring_cpu_ptr,
2689 rx->ring_dma_ptr);
2690 rx->ring_allocation_size = 0;
2691 rx->ring_cpu_ptr = NULL;
2692 rx->ring_dma_ptr = 0;
2693 }
2694
2695 rx->ring_size = 0;
2696 rx->last_head = 0;
2697 }
2698
lan743x_rx_ring_init(struct lan743x_rx * rx)2699 static int lan743x_rx_ring_init(struct lan743x_rx *rx)
2700 {
2701 size_t ring_allocation_size = 0;
2702 dma_addr_t dma_ptr = 0;
2703 void *cpu_ptr = NULL;
2704 int ret = -ENOMEM;
2705 int index = 0;
2706
2707 rx->ring_size = LAN743X_RX_RING_SIZE;
2708 if (rx->ring_size <= 1) {
2709 ret = -EINVAL;
2710 goto cleanup;
2711 }
2712 if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) {
2713 ret = -EINVAL;
2714 goto cleanup;
2715 }
2716 if (dma_set_mask_and_coherent(&rx->adapter->pdev->dev,
2717 DMA_BIT_MASK(64))) {
2718 dev_warn(&rx->adapter->pdev->dev,
2719 "lan743x_: No suitable DMA available\n");
2720 ret = -ENOMEM;
2721 goto cleanup;
2722 }
2723 ring_allocation_size = ALIGN(rx->ring_size *
2724 sizeof(struct lan743x_rx_descriptor),
2725 PAGE_SIZE);
2726 dma_ptr = 0;
2727 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev,
2728 ring_allocation_size, &dma_ptr, GFP_KERNEL);
2729 if (!cpu_ptr) {
2730 ret = -ENOMEM;
2731 goto cleanup;
2732 }
2733 rx->ring_allocation_size = ring_allocation_size;
2734 rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr;
2735 rx->ring_dma_ptr = dma_ptr;
2736
2737 cpu_ptr = kzalloc_objs(*rx->buffer_info, rx->ring_size);
2738 if (!cpu_ptr) {
2739 ret = -ENOMEM;
2740 goto cleanup;
2741 }
2742 rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr;
2743 dma_ptr = 0;
2744 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev,
2745 sizeof(*rx->head_cpu_ptr), &dma_ptr,
2746 GFP_KERNEL);
2747 if (!cpu_ptr) {
2748 ret = -ENOMEM;
2749 goto cleanup;
2750 }
2751
2752 rx->head_cpu_ptr = cpu_ptr;
2753 rx->head_dma_ptr = dma_ptr;
2754 if (rx->head_dma_ptr & 0x3) {
2755 ret = -ENOMEM;
2756 goto cleanup;
2757 }
2758
2759 rx->last_head = 0;
2760 for (index = 0; index < rx->ring_size; index++) {
2761 ret = lan743x_rx_init_ring_element(rx, index, GFP_KERNEL);
2762 if (ret)
2763 goto cleanup;
2764 }
2765 return 0;
2766
2767 cleanup:
2768 netif_warn(rx->adapter, ifup, rx->adapter->netdev,
2769 "Error allocating memory for LAN743x\n");
2770
2771 lan743x_rx_ring_cleanup(rx);
2772 return ret;
2773 }
2774
lan743x_rx_close(struct lan743x_rx * rx)2775 static void lan743x_rx_close(struct lan743x_rx *rx)
2776 {
2777 struct lan743x_adapter *adapter = rx->adapter;
2778
2779 lan743x_csr_write(adapter, FCT_RX_CTL,
2780 FCT_RX_CTL_DIS_(rx->channel_number));
2781 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
2782 FCT_RX_CTL_EN_(rx->channel_number),
2783 0, 1000, 20000, 100);
2784
2785 lan743x_csr_write(adapter, DMAC_CMD,
2786 DMAC_CMD_STOP_R_(rx->channel_number));
2787 lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number);
2788
2789 lan743x_csr_write(adapter, DMAC_INT_EN_CLR,
2790 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2791 lan743x_csr_write(adapter, INT_EN_CLR,
2792 INT_BIT_DMA_RX_(rx->channel_number));
2793 napi_disable(&rx->napi);
2794
2795 netif_napi_del(&rx->napi);
2796
2797 lan743x_rx_ring_cleanup(rx);
2798 }
2799
lan743x_rx_open(struct lan743x_rx * rx)2800 static int lan743x_rx_open(struct lan743x_rx *rx)
2801 {
2802 struct lan743x_adapter *adapter = rx->adapter;
2803 u32 data = 0;
2804 int ret;
2805
2806 rx->frame_count = 0;
2807 ret = lan743x_rx_ring_init(rx);
2808 if (ret)
2809 goto return_error;
2810
2811 netif_napi_add(adapter->netdev, &rx->napi, lan743x_rx_napi_poll);
2812
2813 lan743x_csr_write(adapter, DMAC_CMD,
2814 DMAC_CMD_RX_SWR_(rx->channel_number));
2815 lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
2816 DMAC_CMD_RX_SWR_(rx->channel_number),
2817 0, 1000, 20000, 100);
2818
2819 /* set ring base address */
2820 lan743x_csr_write(adapter,
2821 RX_BASE_ADDRH(rx->channel_number),
2822 DMA_ADDR_HIGH32(rx->ring_dma_ptr));
2823 lan743x_csr_write(adapter,
2824 RX_BASE_ADDRL(rx->channel_number),
2825 DMA_ADDR_LOW32(rx->ring_dma_ptr));
2826
2827 /* set rx write back address */
2828 lan743x_csr_write(adapter,
2829 RX_HEAD_WRITEBACK_ADDRH(rx->channel_number),
2830 DMA_ADDR_HIGH32(rx->head_dma_ptr));
2831 lan743x_csr_write(adapter,
2832 RX_HEAD_WRITEBACK_ADDRL(rx->channel_number),
2833 DMA_ADDR_LOW32(rx->head_dma_ptr));
2834 data = RX_CFG_A_RX_HP_WB_EN_;
2835 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
2836 data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ |
2837 RX_CFG_A_RX_WB_THRES_SET_(0x7) |
2838 RX_CFG_A_RX_PF_THRES_SET_(16) |
2839 RX_CFG_A_RX_PF_PRI_THRES_SET_(4));
2840 }
2841
2842 /* set RX_CFG_A */
2843 lan743x_csr_write(adapter,
2844 RX_CFG_A(rx->channel_number), data);
2845
2846 /* set RX_CFG_B */
2847 data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number));
2848 data &= ~RX_CFG_B_RX_PAD_MASK_;
2849 if (!RX_HEAD_PADDING)
2850 data |= RX_CFG_B_RX_PAD_0_;
2851 else
2852 data |= RX_CFG_B_RX_PAD_2_;
2853 data &= ~RX_CFG_B_RX_RING_LEN_MASK_;
2854 data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_);
2855 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
2856 data |= RX_CFG_B_RDMABL_512_;
2857
2858 lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data);
2859 rx->vector_flags = lan743x_intr_get_vector_flags(adapter,
2860 INT_BIT_DMA_RX_
2861 (rx->channel_number));
2862
2863 /* set RX_CFG_C */
2864 data = 0;
2865 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
2866 data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_;
2867 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
2868 data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_;
2869 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
2870 data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_;
2871 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
2872 data |= RX_CFG_C_RX_INT_EN_R2C_;
2873 lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data);
2874
2875 rx->last_tail = ((u32)(rx->ring_size - 1));
2876 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
2877 rx->last_tail);
2878 rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number));
2879 if (rx->last_head) {
2880 ret = -EIO;
2881 goto napi_delete;
2882 }
2883
2884 napi_enable(&rx->napi);
2885
2886 lan743x_csr_write(adapter, INT_EN_SET,
2887 INT_BIT_DMA_RX_(rx->channel_number));
2888 lan743x_csr_write(adapter, DMAC_INT_STS,
2889 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2890 lan743x_csr_write(adapter, DMAC_INT_EN_SET,
2891 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2892 lan743x_csr_write(adapter, DMAC_CMD,
2893 DMAC_CMD_START_R_(rx->channel_number));
2894
2895 /* initialize fifo */
2896 lan743x_csr_write(adapter, FCT_RX_CTL,
2897 FCT_RX_CTL_RESET_(rx->channel_number));
2898 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
2899 FCT_RX_CTL_RESET_(rx->channel_number),
2900 0, 1000, 20000, 100);
2901 lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number),
2902 FCT_FLOW_CTL_REQ_EN_ |
2903 FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) |
2904 FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA));
2905
2906 /* enable fifo */
2907 lan743x_csr_write(adapter, FCT_RX_CTL,
2908 FCT_RX_CTL_EN_(rx->channel_number));
2909 return 0;
2910
2911 napi_delete:
2912 netif_napi_del(&rx->napi);
2913 lan743x_rx_ring_cleanup(rx);
2914
2915 return_error:
2916 return ret;
2917 }
2918
lan743x_phylink_sgmii_config(struct lan743x_adapter * adapter)2919 static int lan743x_phylink_sgmii_config(struct lan743x_adapter *adapter)
2920 {
2921 u32 sgmii_ctl;
2922 int ret;
2923
2924 ret = lan743x_get_lsd(SPEED_1000, DUPLEX_FULL,
2925 MASTER_SLAVE_STATE_MASTER);
2926 if (ret < 0) {
2927 netif_err(adapter, drv, adapter->netdev,
2928 "error %d link-speed-duplex(LSD) invalid\n", ret);
2929 return ret;
2930 }
2931
2932 adapter->sgmii_lsd = ret;
2933 netif_dbg(adapter, drv, adapter->netdev,
2934 "Link Speed Duplex (lsd) : 0x%X\n", adapter->sgmii_lsd);
2935
2936 /* LINK_STATUS_SOURCE from the External PHY via SGMII */
2937 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);
2938 sgmii_ctl &= ~SGMII_CTL_LINK_STATUS_SOURCE_;
2939 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);
2940
2941 ret = lan743x_serdes_clock_and_aneg_update(adapter);
2942 if (ret < 0) {
2943 netif_err(adapter, drv, adapter->netdev,
2944 "error %d sgmii aneg update failed\n", ret);
2945 return ret;
2946 }
2947
2948 return lan743x_pcs_power_reset(adapter);
2949 }
2950
lan743x_phylink_1000basex_config(struct lan743x_adapter * adapter)2951 static int lan743x_phylink_1000basex_config(struct lan743x_adapter *adapter)
2952 {
2953 u32 sgmii_ctl;
2954 int ret;
2955
2956 ret = lan743x_get_lsd(SPEED_1000, DUPLEX_FULL,
2957 MASTER_SLAVE_STATE_MASTER);
2958 if (ret < 0) {
2959 netif_err(adapter, drv, adapter->netdev,
2960 "error %d link-speed-duplex(LSD) invalid\n", ret);
2961 return ret;
2962 }
2963
2964 adapter->sgmii_lsd = ret;
2965 netif_dbg(adapter, drv, adapter->netdev,
2966 "Link Speed Duplex (lsd) : 0x%X\n", adapter->sgmii_lsd);
2967
2968 /* LINK_STATUS_SOURCE from 1000BASE-X PCS link status */
2969 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);
2970 sgmii_ctl |= SGMII_CTL_LINK_STATUS_SOURCE_;
2971 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);
2972
2973 ret = lan743x_serdes_clock_and_aneg_update(adapter);
2974 if (ret < 0) {
2975 netif_err(adapter, drv, adapter->netdev,
2976 "error %d 1000basex aneg update failed\n", ret);
2977 return ret;
2978 }
2979
2980 return lan743x_pcs_power_reset(adapter);
2981 }
2982
lan743x_phylink_2500basex_config(struct lan743x_adapter * adapter)2983 static int lan743x_phylink_2500basex_config(struct lan743x_adapter *adapter)
2984 {
2985 u32 sgmii_ctl;
2986 int ret;
2987
2988 ret = lan743x_get_lsd(SPEED_2500, DUPLEX_FULL,
2989 MASTER_SLAVE_STATE_MASTER);
2990 if (ret < 0) {
2991 netif_err(adapter, drv, adapter->netdev,
2992 "error %d link-speed-duplex(LSD) invalid\n", ret);
2993 return ret;
2994 }
2995
2996 adapter->sgmii_lsd = ret;
2997 netif_dbg(adapter, drv, adapter->netdev,
2998 "Link Speed Duplex (lsd) : 0x%X\n", adapter->sgmii_lsd);
2999
3000 /* LINK_STATUS_SOURCE from 2500BASE-X PCS link status */
3001 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);
3002 sgmii_ctl |= SGMII_CTL_LINK_STATUS_SOURCE_;
3003 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);
3004
3005 ret = lan743x_serdes_clock_and_aneg_update(adapter);
3006 if (ret < 0) {
3007 netif_err(adapter, drv, adapter->netdev,
3008 "error %d 2500basex aneg update failed\n", ret);
3009 return ret;
3010 }
3011
3012 return lan743x_pcs_power_reset(adapter);
3013 }
3014
lan743x_mac_eee_enable(struct lan743x_adapter * adapter,bool enable)3015 static void lan743x_mac_eee_enable(struct lan743x_adapter *adapter, bool enable)
3016 {
3017 u32 mac_cr;
3018
3019 mac_cr = lan743x_csr_read(adapter, MAC_CR);
3020 if (enable)
3021 mac_cr |= MAC_CR_EEE_EN_;
3022 else
3023 mac_cr &= ~MAC_CR_EEE_EN_;
3024 lan743x_csr_write(adapter, MAC_CR, mac_cr);
3025 }
3026
lan743x_phylink_mac_config(struct phylink_config * config,unsigned int link_an_mode,const struct phylink_link_state * state)3027 static void lan743x_phylink_mac_config(struct phylink_config *config,
3028 unsigned int link_an_mode,
3029 const struct phylink_link_state *state)
3030 {
3031 struct net_device *netdev = to_net_dev(config->dev);
3032 struct lan743x_adapter *adapter = netdev_priv(netdev);
3033 int ret;
3034
3035 switch (state->interface) {
3036 case PHY_INTERFACE_MODE_2500BASEX:
3037 ret = lan743x_phylink_2500basex_config(adapter);
3038 if (ret < 0)
3039 netif_err(adapter, drv, adapter->netdev,
3040 "2500BASEX config failed. Error %d\n", ret);
3041 else
3042 netif_dbg(adapter, drv, adapter->netdev,
3043 "2500BASEX mode selected and configured\n");
3044 break;
3045 case PHY_INTERFACE_MODE_1000BASEX:
3046 ret = lan743x_phylink_1000basex_config(adapter);
3047 if (ret < 0)
3048 netif_err(adapter, drv, adapter->netdev,
3049 "1000BASEX config failed. Error %d\n", ret);
3050 else
3051 netif_dbg(adapter, drv, adapter->netdev,
3052 "1000BASEX mode selected and configured\n");
3053 break;
3054 case PHY_INTERFACE_MODE_SGMII:
3055 ret = lan743x_phylink_sgmii_config(adapter);
3056 if (ret < 0)
3057 netif_err(adapter, drv, adapter->netdev,
3058 "SGMII config failed. Error %d\n", ret);
3059 else
3060 netif_dbg(adapter, drv, adapter->netdev,
3061 "SGMII mode selected and configured\n");
3062 break;
3063 default:
3064 netif_dbg(adapter, drv, adapter->netdev,
3065 "RGMII/GMII/MII(0x%X) mode enable\n",
3066 state->interface);
3067 break;
3068 }
3069 }
3070
lan743x_phylink_mac_link_down(struct phylink_config * config,unsigned int link_an_mode,phy_interface_t interface)3071 static void lan743x_phylink_mac_link_down(struct phylink_config *config,
3072 unsigned int link_an_mode,
3073 phy_interface_t interface)
3074 {
3075 struct net_device *netdev = to_net_dev(config->dev);
3076
3077 netif_tx_stop_all_queues(netdev);
3078 }
3079
lan743x_phylink_mac_link_up(struct phylink_config * config,struct phy_device * phydev,unsigned int link_an_mode,phy_interface_t interface,int speed,int duplex,bool tx_pause,bool rx_pause)3080 static void lan743x_phylink_mac_link_up(struct phylink_config *config,
3081 struct phy_device *phydev,
3082 unsigned int link_an_mode,
3083 phy_interface_t interface,
3084 int speed, int duplex,
3085 bool tx_pause, bool rx_pause)
3086 {
3087 struct net_device *netdev = to_net_dev(config->dev);
3088 struct lan743x_adapter *adapter = netdev_priv(netdev);
3089 int mac_cr;
3090 u8 cap;
3091
3092 mac_cr = lan743x_csr_read(adapter, MAC_CR);
3093 /* Pre-initialize register bits.
3094 * Resulting value corresponds to SPEED_10
3095 */
3096 mac_cr &= ~(MAC_CR_CFG_H_ | MAC_CR_CFG_L_);
3097 if (speed == SPEED_2500)
3098 mac_cr |= MAC_CR_CFG_H_ | MAC_CR_CFG_L_;
3099 else if (speed == SPEED_1000)
3100 mac_cr |= MAC_CR_CFG_H_;
3101 else if (speed == SPEED_100)
3102 mac_cr |= MAC_CR_CFG_L_;
3103
3104 if (duplex == DUPLEX_FULL)
3105 mac_cr |= MAC_CR_DPX_;
3106 else
3107 mac_cr &= ~MAC_CR_DPX_;
3108
3109 lan743x_csr_write(adapter, MAC_CR, mac_cr);
3110
3111 lan743x_ptp_update_latency(adapter, speed);
3112
3113 /* Flow Control operation */
3114 cap = 0;
3115 if (tx_pause)
3116 cap |= FLOW_CTRL_TX;
3117 if (rx_pause)
3118 cap |= FLOW_CTRL_RX;
3119
3120 lan743x_mac_flow_ctrl_set_enables(adapter,
3121 cap & FLOW_CTRL_TX,
3122 cap & FLOW_CTRL_RX);
3123
3124 netif_tx_wake_all_queues(netdev);
3125 }
3126
lan743x_mac_disable_tx_lpi(struct phylink_config * config)3127 static void lan743x_mac_disable_tx_lpi(struct phylink_config *config)
3128 {
3129 struct net_device *netdev = to_net_dev(config->dev);
3130 struct lan743x_adapter *adapter = netdev_priv(netdev);
3131
3132 lan743x_mac_eee_enable(adapter, false);
3133 }
3134
lan743x_mac_enable_tx_lpi(struct phylink_config * config,u32 timer,bool tx_clk_stop)3135 static int lan743x_mac_enable_tx_lpi(struct phylink_config *config, u32 timer,
3136 bool tx_clk_stop)
3137 {
3138 struct net_device *netdev = to_net_dev(config->dev);
3139 struct lan743x_adapter *adapter = netdev_priv(netdev);
3140
3141 /* Software should only change this field when Energy Efficient
3142 * Ethernet Enable (EEEEN) is cleared. We ensure that by clearing
3143 * EEEEN during probe, and phylink itself guarantees that
3144 * mac_disable_tx_lpi() will have been previously called.
3145 */
3146 lan743x_csr_write(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT, timer);
3147 lan743x_mac_eee_enable(adapter, true);
3148
3149 return 0;
3150 }
3151
3152 static const struct phylink_mac_ops lan743x_phylink_mac_ops = {
3153 .mac_config = lan743x_phylink_mac_config,
3154 .mac_link_down = lan743x_phylink_mac_link_down,
3155 .mac_link_up = lan743x_phylink_mac_link_up,
3156 .mac_disable_tx_lpi = lan743x_mac_disable_tx_lpi,
3157 .mac_enable_tx_lpi = lan743x_mac_enable_tx_lpi,
3158 };
3159
lan743x_phylink_create(struct lan743x_adapter * adapter)3160 static int lan743x_phylink_create(struct lan743x_adapter *adapter)
3161 {
3162 struct net_device *netdev = adapter->netdev;
3163 struct phylink *pl;
3164
3165 adapter->phylink_config.dev = &netdev->dev;
3166 adapter->phylink_config.type = PHYLINK_NETDEV;
3167 adapter->phylink_config.mac_managed_pm = false;
3168
3169 adapter->phylink_config.mac_capabilities = MAC_ASYM_PAUSE |
3170 MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD;
3171 adapter->phylink_config.lpi_capabilities = MAC_100FD | MAC_1000FD;
3172 adapter->phylink_config.lpi_timer_default =
3173 lan743x_csr_read(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT);
3174
3175 lan743x_phy_interface_select(adapter);
3176
3177 switch (adapter->phy_interface) {
3178 case PHY_INTERFACE_MODE_SGMII:
3179 __set_bit(PHY_INTERFACE_MODE_SGMII,
3180 adapter->phylink_config.supported_interfaces);
3181 __set_bit(PHY_INTERFACE_MODE_1000BASEX,
3182 adapter->phylink_config.supported_interfaces);
3183 __set_bit(PHY_INTERFACE_MODE_2500BASEX,
3184 adapter->phylink_config.supported_interfaces);
3185 adapter->phylink_config.mac_capabilities |= MAC_2500FD;
3186 break;
3187 case PHY_INTERFACE_MODE_GMII:
3188 __set_bit(PHY_INTERFACE_MODE_GMII,
3189 adapter->phylink_config.supported_interfaces);
3190 break;
3191 case PHY_INTERFACE_MODE_MII:
3192 __set_bit(PHY_INTERFACE_MODE_MII,
3193 adapter->phylink_config.supported_interfaces);
3194 break;
3195 case PHY_INTERFACE_MODE_RMII:
3196 __set_bit(PHY_INTERFACE_MODE_RMII,
3197 adapter->phylink_config.supported_interfaces);
3198 adapter->phylink_config.lpi_capabilities = 0;
3199 break;
3200
3201 default:
3202 phy_interface_set_rgmii(adapter->phylink_config.supported_interfaces);
3203 }
3204
3205 memcpy(adapter->phylink_config.lpi_interfaces,
3206 adapter->phylink_config.supported_interfaces,
3207 sizeof(adapter->phylink_config.lpi_interfaces));
3208 if (adapter->phy_interface == PHY_INTERFACE_MODE_RMII)
3209 __clear_bit(PHY_INTERFACE_MODE_RMII,
3210 adapter->phylink_config.lpi_interfaces);
3211
3212 pl = phylink_create(&adapter->phylink_config, NULL,
3213 adapter->phy_interface, &lan743x_phylink_mac_ops);
3214
3215 if (IS_ERR(pl)) {
3216 netdev_err(netdev, "Could not create phylink (%pe)\n", pl);
3217 return PTR_ERR(pl);
3218 }
3219
3220 adapter->phylink = pl;
3221 dev_dbg(&adapter->pdev->dev, "lan743x phylink created");
3222
3223 return 0;
3224 }
3225
lan743x_phy_handle_exists(struct device_node * dn)3226 static bool lan743x_phy_handle_exists(struct device_node *dn)
3227 {
3228 dn = of_parse_phandle(dn, "phy-handle", 0);
3229 of_node_put(dn);
3230 return dn != NULL;
3231 }
3232
lan743x_phylink_connect(struct lan743x_adapter * adapter)3233 static int lan743x_phylink_connect(struct lan743x_adapter *adapter)
3234 {
3235 struct device_node *dn = adapter->pdev->dev.of_node;
3236 struct net_device *dev = adapter->netdev;
3237 struct phy_device *phydev;
3238 int ret;
3239
3240 if (dn)
3241 ret = phylink_of_phy_connect(adapter->phylink, dn, 0);
3242
3243 if (!dn || (ret && !lan743x_phy_handle_exists(dn))) {
3244 phydev = phy_find_first(adapter->mdiobus);
3245 if (phydev) {
3246 /* attach the mac to the phy */
3247 ret = phylink_connect_phy(adapter->phylink, phydev);
3248 } else if (((adapter->csr.id_rev & ID_REV_ID_MASK_) ==
3249 ID_REV_ID_LAN7431_) || adapter->is_pci11x1x) {
3250 struct phylink_link_state state;
3251 unsigned long caps;
3252
3253 caps = adapter->phylink_config.mac_capabilities;
3254 if (caps & MAC_2500FD) {
3255 state.speed = SPEED_2500;
3256 state.duplex = DUPLEX_FULL;
3257 } else if (caps & MAC_1000FD) {
3258 state.speed = SPEED_1000;
3259 state.duplex = DUPLEX_FULL;
3260 } else {
3261 state.speed = SPEED_UNKNOWN;
3262 state.duplex = DUPLEX_UNKNOWN;
3263 }
3264
3265 ret = phylink_set_fixed_link(adapter->phylink, &state);
3266 if (ret) {
3267 netdev_err(dev, "Could not set fixed link\n");
3268 return ret;
3269 }
3270 } else {
3271 netdev_err(dev, "no PHY found\n");
3272 return -ENXIO;
3273 }
3274 }
3275
3276 if (ret) {
3277 netdev_err(dev, "Could not attach PHY (%d)\n", ret);
3278 return ret;
3279 }
3280
3281 phylink_start(adapter->phylink);
3282
3283 return 0;
3284 }
3285
lan743x_phylink_disconnect(struct lan743x_adapter * adapter)3286 static void lan743x_phylink_disconnect(struct lan743x_adapter *adapter)
3287 {
3288 phylink_stop(adapter->phylink);
3289 phylink_disconnect_phy(adapter->phylink);
3290 }
3291
lan743x_netdev_close(struct net_device * netdev)3292 static int lan743x_netdev_close(struct net_device *netdev)
3293 {
3294 struct lan743x_adapter *adapter = netdev_priv(netdev);
3295 int index;
3296
3297 for (index = 0; index < adapter->used_tx_channels; index++)
3298 lan743x_tx_close(&adapter->tx[index]);
3299
3300 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++)
3301 lan743x_rx_close(&adapter->rx[index]);
3302
3303 lan743x_ptp_close(adapter);
3304
3305 lan743x_phylink_disconnect(adapter);
3306
3307 lan743x_mac_close(adapter);
3308
3309 lan743x_intr_close(adapter);
3310
3311 return 0;
3312 }
3313
lan743x_netdev_open(struct net_device * netdev)3314 static int lan743x_netdev_open(struct net_device *netdev)
3315 {
3316 struct lan743x_adapter *adapter = netdev_priv(netdev);
3317 int index;
3318 int ret;
3319
3320 ret = lan743x_intr_open(adapter);
3321 if (ret)
3322 goto return_error;
3323
3324 ret = lan743x_mac_open(adapter);
3325 if (ret)
3326 goto close_intr;
3327
3328 ret = lan743x_phylink_connect(adapter);
3329 if (ret)
3330 goto close_mac;
3331
3332 ret = lan743x_ptp_open(adapter);
3333 if (ret)
3334 goto close_mac;
3335
3336 lan743x_rfe_open(adapter);
3337
3338 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
3339 ret = lan743x_rx_open(&adapter->rx[index]);
3340 if (ret)
3341 goto close_rx;
3342 }
3343
3344 for (index = 0; index < adapter->used_tx_channels; index++) {
3345 ret = lan743x_tx_open(&adapter->tx[index]);
3346 if (ret)
3347 goto close_tx;
3348 }
3349
3350 if (netdev->phydev)
3351 phy_support_eee(netdev->phydev);
3352
3353 #ifdef CONFIG_PM
3354 if (adapter->netdev->phydev) {
3355 struct ethtool_wolinfo wol = { .cmd = ETHTOOL_GWOL };
3356
3357 phy_ethtool_get_wol(netdev->phydev, &wol);
3358 adapter->phy_wol_supported = wol.supported;
3359 adapter->phy_wolopts = wol.wolopts;
3360 }
3361 #endif
3362
3363 return 0;
3364
3365 close_tx:
3366 for (index = 0; index < adapter->used_tx_channels; index++) {
3367 if (adapter->tx[index].ring_cpu_ptr)
3368 lan743x_tx_close(&adapter->tx[index]);
3369 }
3370
3371 close_rx:
3372 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
3373 if (adapter->rx[index].ring_cpu_ptr)
3374 lan743x_rx_close(&adapter->rx[index]);
3375 }
3376 lan743x_ptp_close(adapter);
3377 if (adapter->phylink)
3378 lan743x_phylink_disconnect(adapter);
3379
3380 close_mac:
3381 lan743x_mac_close(adapter);
3382
3383 close_intr:
3384 lan743x_intr_close(adapter);
3385
3386 return_error:
3387 netif_warn(adapter, ifup, adapter->netdev,
3388 "Error opening LAN743x\n");
3389 return ret;
3390 }
3391
lan743x_netdev_xmit_frame(struct sk_buff * skb,struct net_device * netdev)3392 static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb,
3393 struct net_device *netdev)
3394 {
3395 struct lan743x_adapter *adapter = netdev_priv(netdev);
3396 u8 ch = 0;
3397
3398 if (adapter->is_pci11x1x)
3399 ch = skb->queue_mapping % PCI11X1X_USED_TX_CHANNELS;
3400
3401 return lan743x_tx_xmit_frame(&adapter->tx[ch], skb);
3402 }
3403
lan743x_netdev_ioctl(struct net_device * netdev,struct ifreq * ifr,int cmd)3404 static int lan743x_netdev_ioctl(struct net_device *netdev,
3405 struct ifreq *ifr, int cmd)
3406 {
3407 struct lan743x_adapter *adapter = netdev_priv(netdev);
3408
3409 if (!netif_running(netdev))
3410 return -EINVAL;
3411
3412 return phylink_mii_ioctl(adapter->phylink, ifr, cmd);
3413 }
3414
lan743x_netdev_set_multicast(struct net_device * netdev)3415 static void lan743x_netdev_set_multicast(struct net_device *netdev)
3416 {
3417 struct lan743x_adapter *adapter = netdev_priv(netdev);
3418
3419 lan743x_rfe_set_multicast(adapter);
3420 }
3421
lan743x_netdev_change_mtu(struct net_device * netdev,int new_mtu)3422 static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu)
3423 {
3424 struct lan743x_adapter *adapter = netdev_priv(netdev);
3425 int ret = 0;
3426
3427 ret = lan743x_mac_set_mtu(adapter, new_mtu);
3428 if (!ret)
3429 WRITE_ONCE(netdev->mtu, new_mtu);
3430 return ret;
3431 }
3432
lan743x_netdev_get_stats64(struct net_device * netdev,struct rtnl_link_stats64 * stats)3433 static void lan743x_netdev_get_stats64(struct net_device *netdev,
3434 struct rtnl_link_stats64 *stats)
3435 {
3436 struct lan743x_adapter *adapter = netdev_priv(netdev);
3437
3438 stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES);
3439 stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES);
3440 stats->rx_bytes = lan743x_csr_read(adapter,
3441 STAT_RX_UNICAST_BYTE_COUNT) +
3442 lan743x_csr_read(adapter,
3443 STAT_RX_BROADCAST_BYTE_COUNT) +
3444 lan743x_csr_read(adapter,
3445 STAT_RX_MULTICAST_BYTE_COUNT);
3446 stats->tx_bytes = lan743x_csr_read(adapter,
3447 STAT_TX_UNICAST_BYTE_COUNT) +
3448 lan743x_csr_read(adapter,
3449 STAT_TX_BROADCAST_BYTE_COUNT) +
3450 lan743x_csr_read(adapter,
3451 STAT_TX_MULTICAST_BYTE_COUNT);
3452 stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) +
3453 lan743x_csr_read(adapter,
3454 STAT_RX_ALIGNMENT_ERRORS) +
3455 lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) +
3456 lan743x_csr_read(adapter,
3457 STAT_RX_UNDERSIZE_FRAME_ERRORS) +
3458 lan743x_csr_read(adapter,
3459 STAT_RX_OVERSIZE_FRAME_ERRORS);
3460 stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) +
3461 lan743x_csr_read(adapter,
3462 STAT_TX_EXCESS_DEFERRAL_ERRORS) +
3463 lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS);
3464 stats->rx_dropped = lan743x_csr_read(adapter,
3465 STAT_RX_DROPPED_FRAMES);
3466 stats->tx_dropped = lan743x_csr_read(adapter,
3467 STAT_TX_EXCESSIVE_COLLISION);
3468 stats->multicast = lan743x_csr_read(adapter,
3469 STAT_RX_MULTICAST_FRAMES) +
3470 lan743x_csr_read(adapter,
3471 STAT_TX_MULTICAST_FRAMES);
3472 stats->collisions = lan743x_csr_read(adapter,
3473 STAT_TX_SINGLE_COLLISIONS) +
3474 lan743x_csr_read(adapter,
3475 STAT_TX_MULTIPLE_COLLISIONS) +
3476 lan743x_csr_read(adapter,
3477 STAT_TX_LATE_COLLISIONS);
3478 }
3479
lan743x_netdev_set_mac_address(struct net_device * netdev,void * addr)3480 static int lan743x_netdev_set_mac_address(struct net_device *netdev,
3481 void *addr)
3482 {
3483 struct lan743x_adapter *adapter = netdev_priv(netdev);
3484 struct sockaddr *sock_addr = addr;
3485 int ret;
3486
3487 ret = eth_prepare_mac_addr_change(netdev, sock_addr);
3488 if (ret)
3489 return ret;
3490 eth_hw_addr_set(netdev, sock_addr->sa_data);
3491 lan743x_mac_set_address(adapter, sock_addr->sa_data);
3492 lan743x_rfe_update_mac_address(adapter);
3493 return 0;
3494 }
3495
3496 static const struct net_device_ops lan743x_netdev_ops = {
3497 .ndo_open = lan743x_netdev_open,
3498 .ndo_stop = lan743x_netdev_close,
3499 .ndo_start_xmit = lan743x_netdev_xmit_frame,
3500 .ndo_eth_ioctl = lan743x_netdev_ioctl,
3501 .ndo_set_rx_mode = lan743x_netdev_set_multicast,
3502 .ndo_change_mtu = lan743x_netdev_change_mtu,
3503 .ndo_get_stats64 = lan743x_netdev_get_stats64,
3504 .ndo_set_mac_address = lan743x_netdev_set_mac_address,
3505 .ndo_hwtstamp_get = lan743x_ptp_hwtstamp_get,
3506 .ndo_hwtstamp_set = lan743x_ptp_hwtstamp_set,
3507 };
3508
lan743x_hardware_cleanup(struct lan743x_adapter * adapter)3509 static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter)
3510 {
3511 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
3512 }
3513
lan743x_mdiobus_cleanup(struct lan743x_adapter * adapter)3514 static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter)
3515 {
3516 mdiobus_unregister(adapter->mdiobus);
3517 }
3518
lan743x_destroy_phylink(struct lan743x_adapter * adapter)3519 static void lan743x_destroy_phylink(struct lan743x_adapter *adapter)
3520 {
3521 phylink_destroy(adapter->phylink);
3522 adapter->phylink = NULL;
3523 }
3524
lan743x_full_cleanup(struct lan743x_adapter * adapter)3525 static void lan743x_full_cleanup(struct lan743x_adapter *adapter)
3526 {
3527 unregister_netdev(adapter->netdev);
3528
3529 lan743x_destroy_phylink(adapter);
3530 lan743x_mdiobus_cleanup(adapter);
3531 lan743x_hardware_cleanup(adapter);
3532 lan743x_pci_cleanup(adapter);
3533 }
3534
pci11x1x_set_rfe_rd_fifo_threshold(struct lan743x_adapter * adapter)3535 static void pci11x1x_set_rfe_rd_fifo_threshold(struct lan743x_adapter *adapter)
3536 {
3537 u16 rev = adapter->csr.id_rev & ID_REV_CHIP_REV_MASK_;
3538
3539 if (rev == ID_REV_CHIP_REV_PCI11X1X_B0_) {
3540 u32 misc_ctl;
3541
3542 misc_ctl = lan743x_csr_read(adapter, MISC_CTL_0);
3543 misc_ctl &= ~MISC_CTL_0_RFE_READ_FIFO_MASK_;
3544 misc_ctl |= FIELD_PREP(MISC_CTL_0_RFE_READ_FIFO_MASK_,
3545 RFE_RD_FIFO_TH_3_DWORDS);
3546 lan743x_csr_write(adapter, MISC_CTL_0, misc_ctl);
3547 }
3548 }
3549
lan743x_hardware_init(struct lan743x_adapter * adapter,struct pci_dev * pdev)3550 static int lan743x_hardware_init(struct lan743x_adapter *adapter,
3551 struct pci_dev *pdev)
3552 {
3553 struct lan743x_tx *tx;
3554 u32 sgmii_ctl;
3555 u32 rmii_ctl;
3556 int index;
3557 int ret;
3558
3559 adapter->is_pci11x1x = is_pci11x1x_chip(adapter);
3560 if (adapter->is_pci11x1x) {
3561 adapter->max_tx_channels = PCI11X1X_MAX_TX_CHANNELS;
3562 adapter->used_tx_channels = PCI11X1X_USED_TX_CHANNELS;
3563 adapter->max_vector_count = PCI11X1X_MAX_VECTOR_COUNT;
3564 spin_lock_init(&adapter->eth_syslock_spinlock);
3565 pci11x1x_strap_get_status(adapter);
3566 mutex_init(&adapter->sgmii_rw_lock);
3567 pci11x1x_set_rfe_rd_fifo_threshold(adapter);
3568 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);
3569 if (adapter->is_sgmii_en) {
3570 sgmii_ctl |= SGMII_CTL_SGMII_ENABLE_;
3571 sgmii_ctl &= ~SGMII_CTL_SGMII_POWER_DN_;
3572 } else {
3573 sgmii_ctl &= ~SGMII_CTL_SGMII_ENABLE_;
3574 sgmii_ctl |= SGMII_CTL_SGMII_POWER_DN_;
3575 }
3576 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);
3577 rmii_ctl = lan743x_csr_read(adapter, RMII_CTL);
3578 if (adapter->is_rmii_en)
3579 rmii_ctl |= RMII_CTL_RMII_ENABLE_;
3580 else
3581 rmii_ctl &= ~RMII_CTL_RMII_ENABLE_;
3582 lan743x_csr_write(adapter, RMII_CTL, rmii_ctl);
3583 } else {
3584 adapter->max_tx_channels = LAN743X_MAX_TX_CHANNELS;
3585 adapter->used_tx_channels = LAN743X_USED_TX_CHANNELS;
3586 adapter->max_vector_count = LAN743X_MAX_VECTOR_COUNT;
3587 }
3588
3589 adapter->intr.irq = adapter->pdev->irq;
3590 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
3591
3592 ret = lan743x_gpio_init(adapter);
3593 if (ret)
3594 return ret;
3595
3596 ret = lan743x_mac_init(adapter);
3597 if (ret)
3598 return ret;
3599
3600 ret = lan743x_ptp_init(adapter);
3601 if (ret)
3602 return ret;
3603
3604 lan743x_rfe_update_mac_address(adapter);
3605
3606 ret = lan743x_dmac_init(adapter);
3607 if (ret)
3608 return ret;
3609
3610 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
3611 adapter->rx[index].adapter = adapter;
3612 adapter->rx[index].channel_number = index;
3613 }
3614
3615 for (index = 0; index < adapter->used_tx_channels; index++) {
3616 tx = &adapter->tx[index];
3617 tx->adapter = adapter;
3618 tx->channel_number = index;
3619 spin_lock_init(&tx->ring_lock);
3620 }
3621
3622 /* Ensure EEEEN is clear */
3623 lan743x_mac_eee_enable(adapter, false);
3624
3625 return 0;
3626 }
3627
lan743x_mdiobus_init(struct lan743x_adapter * adapter)3628 static int lan743x_mdiobus_init(struct lan743x_adapter *adapter)
3629 {
3630 int ret;
3631
3632 adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev);
3633 if (!(adapter->mdiobus)) {
3634 ret = -ENOMEM;
3635 goto return_error;
3636 }
3637
3638 adapter->mdiobus->priv = (void *)adapter;
3639 if (adapter->is_pci11x1x) {
3640 if (adapter->is_sgmii_en) {
3641 dev_dbg(&adapter->pdev->dev, "SGMII operation\n");
3642 adapter->mdiobus->read = lan743x_mdiobus_read_c22;
3643 adapter->mdiobus->write = lan743x_mdiobus_write_c22;
3644 adapter->mdiobus->read_c45 = lan743x_mdiobus_read_c45;
3645 adapter->mdiobus->write_c45 = lan743x_mdiobus_write_c45;
3646 adapter->mdiobus->name = "lan743x-mdiobus-c45";
3647 dev_dbg(&adapter->pdev->dev, "lan743x-mdiobus-c45\n");
3648 } else {
3649 dev_dbg(&adapter->pdev->dev, "%s operation\n",
3650 adapter->is_rmii_en ? "RMII" : "RGMII");
3651 // Only C22 support when RGMII/RMII I/F
3652 adapter->mdiobus->read = lan743x_mdiobus_read_c22;
3653 adapter->mdiobus->write = lan743x_mdiobus_write_c22;
3654 adapter->mdiobus->name = "lan743x-mdiobus";
3655 dev_dbg(&adapter->pdev->dev, "lan743x-mdiobus\n");
3656 }
3657 } else {
3658 adapter->mdiobus->read = lan743x_mdiobus_read_c22;
3659 adapter->mdiobus->write = lan743x_mdiobus_write_c22;
3660 adapter->mdiobus->name = "lan743x-mdiobus";
3661 dev_dbg(&adapter->pdev->dev, "lan743x-mdiobus\n");
3662 }
3663
3664 snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE,
3665 "pci-%s", pci_name(adapter->pdev));
3666
3667 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == ID_REV_ID_LAN7430_)
3668 /* LAN7430 uses internal phy at address 1 */
3669 adapter->mdiobus->phy_mask = ~(u32)BIT(1);
3670
3671 /* register mdiobus */
3672 ret = mdiobus_register(adapter->mdiobus);
3673 if (ret < 0)
3674 goto return_error;
3675 return 0;
3676
3677 return_error:
3678 return ret;
3679 }
3680
3681 /* lan743x_pcidev_probe - Device Initialization Routine
3682 * @pdev: PCI device information struct
3683 * @id: entry in lan743x_pci_tbl
3684 *
3685 * Returns 0 on success, negative on failure
3686 *
3687 * initializes an adapter identified by a pci_dev structure.
3688 * The OS initialization, configuring of the adapter private structure,
3689 * and a hardware reset occur.
3690 **/
lan743x_pcidev_probe(struct pci_dev * pdev,const struct pci_device_id * id)3691 static int lan743x_pcidev_probe(struct pci_dev *pdev,
3692 const struct pci_device_id *id)
3693 {
3694 struct lan743x_adapter *adapter = NULL;
3695 struct net_device *netdev = NULL;
3696 int ret = -ENODEV;
3697
3698 if (id->device == PCI_DEVICE_ID_SMSC_A011 ||
3699 id->device == PCI_DEVICE_ID_SMSC_A041) {
3700 netdev = devm_alloc_etherdev_mqs(&pdev->dev,
3701 sizeof(struct lan743x_adapter),
3702 PCI11X1X_USED_TX_CHANNELS,
3703 LAN743X_USED_RX_CHANNELS);
3704 } else {
3705 netdev = devm_alloc_etherdev_mqs(&pdev->dev,
3706 sizeof(struct lan743x_adapter),
3707 LAN743X_USED_TX_CHANNELS,
3708 LAN743X_USED_RX_CHANNELS);
3709 }
3710
3711 if (!netdev)
3712 goto return_error;
3713
3714 SET_NETDEV_DEV(netdev, &pdev->dev);
3715 pci_set_drvdata(pdev, netdev);
3716 adapter = netdev_priv(netdev);
3717 adapter->netdev = netdev;
3718 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE |
3719 NETIF_MSG_LINK | NETIF_MSG_IFUP |
3720 NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED;
3721 netdev->max_mtu = LAN743X_MAX_FRAME_SIZE;
3722
3723 of_get_mac_address(pdev->dev.of_node, adapter->mac_address);
3724
3725 ret = lan743x_pci_init(adapter, pdev);
3726 if (ret)
3727 goto return_error;
3728
3729 ret = lan743x_csr_init(adapter);
3730 if (ret)
3731 goto cleanup_pci;
3732
3733 ret = lan743x_hw_reset_phy(adapter);
3734 if (ret)
3735 goto cleanup_pci;
3736
3737 ret = lan743x_hardware_init(adapter, pdev);
3738 if (ret)
3739 goto cleanup_pci;
3740
3741 ret = lan743x_mdiobus_init(adapter);
3742 if (ret)
3743 goto cleanup_hardware;
3744
3745 adapter->netdev->netdev_ops = &lan743x_netdev_ops;
3746 adapter->netdev->ethtool_ops = &lan743x_ethtool_ops;
3747 adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO |
3748 NETIF_F_HW_CSUM | NETIF_F_RXCSUM;
3749 adapter->netdev->hw_features = adapter->netdev->features;
3750
3751 ret = lan743x_phylink_create(adapter);
3752 if (ret < 0) {
3753 dev_err(&pdev->dev, "failed to setup phylink (%d)\n", ret);
3754 goto cleanup_mdiobus;
3755 }
3756
3757 ret = register_netdev(adapter->netdev);
3758 if (ret < 0)
3759 goto cleanup_phylink;
3760 return 0;
3761
3762 cleanup_phylink:
3763 lan743x_destroy_phylink(adapter);
3764
3765 cleanup_mdiobus:
3766 lan743x_mdiobus_cleanup(adapter);
3767
3768 cleanup_hardware:
3769 lan743x_hardware_cleanup(adapter);
3770
3771 cleanup_pci:
3772 lan743x_pci_cleanup(adapter);
3773
3774 return_error:
3775 pr_warn("Initialization failed\n");
3776 return ret;
3777 }
3778
3779 /**
3780 * lan743x_pcidev_remove - Device Removal Routine
3781 * @pdev: PCI device information struct
3782 *
3783 * this is called by the PCI subsystem to alert the driver
3784 * that it should release a PCI device. This could be caused by a
3785 * Hot-Plug event, or because the driver is going to be removed from
3786 * memory.
3787 **/
lan743x_pcidev_remove(struct pci_dev * pdev)3788 static void lan743x_pcidev_remove(struct pci_dev *pdev)
3789 {
3790 struct net_device *netdev = pci_get_drvdata(pdev);
3791 struct lan743x_adapter *adapter = netdev_priv(netdev);
3792
3793 lan743x_full_cleanup(adapter);
3794 }
3795
lan743x_pcidev_shutdown(struct pci_dev * pdev)3796 static void lan743x_pcidev_shutdown(struct pci_dev *pdev)
3797 {
3798 struct net_device *netdev = pci_get_drvdata(pdev);
3799 struct lan743x_adapter *adapter = netdev_priv(netdev);
3800
3801 rtnl_lock();
3802 netif_device_detach(netdev);
3803
3804 /* close netdev when netdev is at running state.
3805 * For instance, it is true when system goes to sleep by pm-suspend
3806 * However, it is false when system goes to sleep by suspend GUI menu
3807 */
3808 if (netif_running(netdev))
3809 lan743x_netdev_close(netdev);
3810 rtnl_unlock();
3811
3812 #ifdef CONFIG_PM
3813 pci_save_state(pdev);
3814 #endif
3815
3816 /* clean up lan743x portion */
3817 lan743x_hardware_cleanup(adapter);
3818 }
3819
3820 #ifdef CONFIG_PM_SLEEP
lan743x_pm_wakeframe_crc16(const u8 * buf,int len)3821 static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len)
3822 {
3823 return bitrev16(crc16(0xFFFF, buf, len));
3824 }
3825
lan743x_pm_set_wol(struct lan743x_adapter * adapter)3826 static void lan743x_pm_set_wol(struct lan743x_adapter *adapter)
3827 {
3828 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
3829 const u8 ipv6_multicast[3] = { 0x33, 0x33 };
3830 const u8 arp_type[2] = { 0x08, 0x06 };
3831 int mask_index;
3832 u32 sopass;
3833 u32 pmtctl;
3834 u32 wucsr;
3835 u32 macrx;
3836 u16 crc;
3837
3838 for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++)
3839 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0);
3840
3841 /* clear wake settings */
3842 pmtctl = lan743x_csr_read(adapter, PMT_CTL);
3843 pmtctl |= PMT_CTL_WUPS_MASK_ | PMT_CTL_RES_CLR_WKP_MASK_;
3844 pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ |
3845 PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ |
3846 PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_);
3847
3848 macrx = lan743x_csr_read(adapter, MAC_RX);
3849
3850 wucsr = 0;
3851 mask_index = 0;
3852
3853 pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_;
3854
3855 if (adapter->phy_wolopts)
3856 pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_;
3857
3858 if (adapter->wolopts & WAKE_MAGIC) {
3859 wucsr |= MAC_WUCSR_MPEN_;
3860 macrx |= MAC_RX_RXEN_;
3861 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3862 }
3863 if (adapter->wolopts & WAKE_UCAST) {
3864 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_;
3865 macrx |= MAC_RX_RXEN_;
3866 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3867 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3868 }
3869 if (adapter->wolopts & WAKE_BCAST) {
3870 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_;
3871 macrx |= MAC_RX_RXEN_;
3872 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3873 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3874 }
3875 if (adapter->wolopts & WAKE_MCAST) {
3876 /* IPv4 multicast */
3877 crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3);
3878 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
3879 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
3880 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
3881 (crc & MAC_WUF_CFG_CRC16_MASK_));
3882 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7);
3883 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
3884 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
3885 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
3886 mask_index++;
3887
3888 /* IPv6 multicast */
3889 crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2);
3890 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
3891 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
3892 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
3893 (crc & MAC_WUF_CFG_CRC16_MASK_));
3894 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3);
3895 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
3896 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
3897 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
3898 mask_index++;
3899
3900 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
3901 macrx |= MAC_RX_RXEN_;
3902 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3903 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3904 }
3905 if (adapter->wolopts & WAKE_ARP) {
3906 /* set MAC_WUF_CFG & WUF_MASK
3907 * for packettype (offset 12,13) = ARP (0x0806)
3908 */
3909 crc = lan743x_pm_wakeframe_crc16(arp_type, 2);
3910 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
3911 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ |
3912 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
3913 (crc & MAC_WUF_CFG_CRC16_MASK_));
3914 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000);
3915 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
3916 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
3917 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
3918 mask_index++;
3919
3920 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
3921 macrx |= MAC_RX_RXEN_;
3922 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3923 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3924 }
3925
3926 if (adapter->wolopts & WAKE_MAGICSECURE) {
3927 sopass = *(u32 *)adapter->sopass;
3928 lan743x_csr_write(adapter, MAC_MP_SO_LO, sopass);
3929 sopass = *(u16 *)&adapter->sopass[4];
3930 lan743x_csr_write(adapter, MAC_MP_SO_HI, sopass);
3931 wucsr |= MAC_MP_SO_EN_;
3932 }
3933
3934 lan743x_csr_write(adapter, MAC_WUCSR, wucsr);
3935 lan743x_csr_write(adapter, PMT_CTL, pmtctl);
3936 lan743x_csr_write(adapter, MAC_RX, macrx);
3937 }
3938
lan743x_pm_suspend(struct device * dev)3939 static int lan743x_pm_suspend(struct device *dev)
3940 {
3941 struct pci_dev *pdev = to_pci_dev(dev);
3942 struct net_device *netdev = pci_get_drvdata(pdev);
3943 struct lan743x_adapter *adapter = netdev_priv(netdev);
3944 u32 data;
3945
3946 lan743x_pcidev_shutdown(pdev);
3947
3948 /* clear all wakes */
3949 lan743x_csr_write(adapter, MAC_WUCSR, 0);
3950 lan743x_csr_write(adapter, MAC_WUCSR2, 0);
3951 lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF);
3952
3953 if (adapter->wolopts || adapter->phy_wolopts)
3954 lan743x_pm_set_wol(adapter);
3955
3956 if (adapter->is_pci11x1x) {
3957 /* Save HW_CFG to config again in PM resume */
3958 data = lan743x_csr_read(adapter, HW_CFG);
3959 adapter->hw_cfg = data;
3960 data |= (HW_CFG_RST_PROTECT_PCIE_ |
3961 HW_CFG_D3_RESET_DIS_ |
3962 HW_CFG_D3_VAUX_OVR_ |
3963 HW_CFG_HOT_RESET_DIS_ |
3964 HW_CFG_RST_PROTECT_);
3965 lan743x_csr_write(adapter, HW_CFG, data);
3966 }
3967
3968 /* Host sets PME_En, put D3hot */
3969 return pci_prepare_to_sleep(pdev);
3970 }
3971
lan743x_pm_resume(struct device * dev)3972 static int lan743x_pm_resume(struct device *dev)
3973 {
3974 struct pci_dev *pdev = to_pci_dev(dev);
3975 struct net_device *netdev = pci_get_drvdata(pdev);
3976 struct lan743x_adapter *adapter = netdev_priv(netdev);
3977 u32 data;
3978 int ret;
3979
3980 pci_set_power_state(pdev, PCI_D0);
3981 pci_restore_state(pdev);
3982
3983 /* Restore HW_CFG that was saved during pm suspend */
3984 if (adapter->is_pci11x1x)
3985 lan743x_csr_write(adapter, HW_CFG, adapter->hw_cfg);
3986
3987 ret = lan743x_hardware_init(adapter, pdev);
3988 if (ret) {
3989 netif_err(adapter, probe, adapter->netdev,
3990 "lan743x_hardware_init returned %d\n", ret);
3991 lan743x_pci_cleanup(adapter);
3992 return ret;
3993 }
3994
3995 ret = lan743x_csr_read(adapter, MAC_WK_SRC);
3996 netif_dbg(adapter, drv, adapter->netdev,
3997 "Wakeup source : 0x%08X\n", ret);
3998
3999 /* Clear the wol configuration and status bits. Note that
4000 * the status bits are "Write One to Clear (W1C)"
4001 */
4002 data = MAC_WUCSR_EEE_TX_WAKE_ | MAC_WUCSR_EEE_RX_WAKE_ |
4003 MAC_WUCSR_RFE_WAKE_FR_ | MAC_WUCSR_PFDA_FR_ | MAC_WUCSR_WUFR_ |
4004 MAC_WUCSR_MPR_ | MAC_WUCSR_BCAST_FR_;
4005 lan743x_csr_write(adapter, MAC_WUCSR, data);
4006
4007 data = MAC_WUCSR2_NS_RCD_ | MAC_WUCSR2_ARP_RCD_ |
4008 MAC_WUCSR2_IPV6_TCPSYN_RCD_ | MAC_WUCSR2_IPV4_TCPSYN_RCD_;
4009 lan743x_csr_write(adapter, MAC_WUCSR2, data);
4010
4011 data = MAC_WK_SRC_ETH_PHY_WK_ | MAC_WK_SRC_IPV6_TCPSYN_RCD_WK_ |
4012 MAC_WK_SRC_IPV4_TCPSYN_RCD_WK_ | MAC_WK_SRC_EEE_TX_WK_ |
4013 MAC_WK_SRC_EEE_RX_WK_ | MAC_WK_SRC_RFE_FR_WK_ |
4014 MAC_WK_SRC_PFDA_FR_WK_ | MAC_WK_SRC_MP_FR_WK_ |
4015 MAC_WK_SRC_BCAST_FR_WK_ | MAC_WK_SRC_WU_FR_WK_ |
4016 MAC_WK_SRC_WK_FR_SAVED_;
4017 lan743x_csr_write(adapter, MAC_WK_SRC, data);
4018
4019 rtnl_lock();
4020 /* open netdev when netdev is at running state while resume.
4021 * For instance, it is true when system wakesup after pm-suspend
4022 * However, it is false when system wakes up after suspend GUI menu
4023 */
4024 if (netif_running(netdev))
4025 lan743x_netdev_open(netdev);
4026
4027 netif_device_attach(netdev);
4028 rtnl_unlock();
4029
4030 return 0;
4031 }
4032
4033 static const struct dev_pm_ops lan743x_pm_ops = {
4034 SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume)
4035 };
4036 #endif /* CONFIG_PM_SLEEP */
4037
4038 static const struct pci_device_id lan743x_pcidev_tbl[] = {
4039 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) },
4040 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7431) },
4041 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A011) },
4042 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A041) },
4043 { 0, }
4044 };
4045
4046 MODULE_DEVICE_TABLE(pci, lan743x_pcidev_tbl);
4047
4048 static struct pci_driver lan743x_pcidev_driver = {
4049 .name = DRIVER_NAME,
4050 .id_table = lan743x_pcidev_tbl,
4051 .probe = lan743x_pcidev_probe,
4052 .remove = lan743x_pcidev_remove,
4053 #ifdef CONFIG_PM_SLEEP
4054 .driver.pm = &lan743x_pm_ops,
4055 #endif
4056 .shutdown = lan743x_pcidev_shutdown,
4057 };
4058
4059 module_pci_driver(lan743x_pcidev_driver);
4060
4061 MODULE_AUTHOR(DRIVER_AUTHOR);
4062 MODULE_DESCRIPTION(DRIVER_DESC);
4063 MODULE_LICENSE("GPL");
4064