1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2023 Theobroma Systems Design und Consulting GmbH 4 */ 5 6/dts-v1/; 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/input/input.h> 9#include <dt-bindings/leds/common.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include <dt-bindings/soc/rockchip,vop2.h> 12#include <dt-bindings/usb/pd.h> 13#include "rk3588.dtsi" 14 15/ { 16 model = "Theobroma Systems RK3588-SBC Jaguar"; 17 compatible = "tsd,rk3588-jaguar", "rockchip,rk3588"; 18 19 adc-keys { 20 compatible = "adc-keys"; 21 io-channels = <&saradc 0>; 22 io-channel-names = "buttons"; 23 keyup-threshold-microvolt = <1800000>; 24 poll-interval = <100>; 25 26 /* Can be controlled through SW2 but also GPIO1 on CP2102 on P20 */ 27 button-bios-disable { 28 label = "BIOS_DISABLE"; 29 linux,code = <KEY_VENDOR>; 30 press-threshold-microvolt = <0>; 31 }; 32 }; 33 34 aliases { 35 ethernet0 = &gmac0; 36 i2c10 = &i2c10; 37 mmc0 = &sdhci; 38 mmc1 = &sdmmc; 39 rtc0 = &rtc_twi; 40 }; 41 42 chosen { 43 stdout-path = "serial2:115200n8"; 44 }; 45 46 /* DCIN is 12-24V but standard is 12V */ 47 dc_12v: regulator-dc-12v { 48 compatible = "regulator-fixed"; 49 regulator-name = "dc_12v"; 50 regulator-always-on; 51 regulator-boot-on; 52 regulator-min-microvolt = <12000000>; 53 regulator-max-microvolt = <12000000>; 54 }; 55 56 emmc_pwrseq: emmc-pwrseq { 57 compatible = "mmc-pwrseq-emmc"; 58 pinctrl-0 = <&emmc_reset>; 59 pinctrl-names = "default"; 60 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>; 61 }; 62 63 hdmi-con { 64 compatible = "hdmi-connector"; 65 type = "a"; 66 67 port { 68 hdmi_con_in: endpoint { 69 remote-endpoint = <&hdmi0_out_con>; 70 }; 71 }; 72 }; 73 74 leds { 75 compatible = "gpio-leds"; 76 pinctrl-names = "default"; 77 pinctrl-0 = <&led1_pin>; 78 79 /* LED1 on PCB */ 80 led-1 { 81 gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; 82 function = LED_FUNCTION_HEARTBEAT; 83 linux,default-trigger = "heartbeat"; 84 color = <LED_COLOR_ID_AMBER>; 85 }; 86 }; 87 88 /* 89 * 100MHz reference clock for PCIe peripherals from PI6C557-05BLE 90 * clock generator. 91 * The clock output is gated via the OE pin on the clock generator. 92 * This is modeled as a fixed-clock plus a gpio-gate-clock. 93 */ 94 pcie_refclk_gen: pcie-refclk-gen-clock { 95 compatible = "fixed-clock"; 96 #clock-cells = <0>; 97 clock-frequency = <100000000>; 98 }; 99 100 pcie_refclk: pcie-refclk-clock { 101 compatible = "gpio-gate-clock"; 102 clocks = <&pcie_refclk_gen>; 103 #clock-cells = <0>; 104 enable-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>; /* PCIE30X4_CLKREQN_M0 */ 105 pinctrl-names = "default"; 106 pinctrl-0 = <&pcie30x4_clkreqn_m0>; 107 }; 108 109 pps { 110 compatible = "pps-gpio"; 111 gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; 112 }; 113 114 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 115 compatible = "regulator-fixed"; 116 regulator-name = "vcc_1v1_nldo_s3"; 117 regulator-always-on; 118 regulator-boot-on; 119 regulator-min-microvolt = <1100000>; 120 regulator-max-microvolt = <1100000>; 121 vin-supply = <&vcc5v0_sys>; 122 }; 123 124 vcc_1v2_s3: regulator-vcc-1v2-s3 { 125 compatible = "regulator-fixed"; 126 regulator-name = "vcc_1v2_s3"; 127 regulator-always-on; 128 regulator-boot-on; 129 regulator-min-microvolt = <1200000>; 130 regulator-max-microvolt = <1200000>; 131 vin-supply = <&vcc5v0_sys>; 132 }; 133 134 /* Exposed on P14 and P15 */ 135 vcc_2v8_s3: regulator-vcc-2v8-s3 { 136 compatible = "regulator-fixed"; 137 regulator-name = "vcc_2v8_s3"; 138 regulator-always-on; 139 regulator-boot-on; 140 regulator-min-microvolt = <2800000>; 141 regulator-max-microvolt = <2800000>; 142 vin-supply = <&vcc_3v3_s3>; 143 }; 144 145 vcc_5v0_usb_a: regulator-vcc-5v0-usb-a { 146 compatible = "regulator-fixed"; 147 regulator-name = "usb_a_vcc"; 148 regulator-min-microvolt = <5000000>; 149 regulator-max-microvolt = <5000000>; 150 vin-supply = <&vcc5v0_sys>; 151 gpio = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; 152 enable-active-high; 153 }; 154 155 vcc_5v0_usb_c1: regulator-vcc-5v0-usb-c1 { 156 compatible = "regulator-fixed"; 157 regulator-name = "5v_usbc1"; 158 regulator-min-microvolt = <5000000>; 159 regulator-max-microvolt = <5000000>; 160 vin-supply = <&vcc5v0_usb>; 161 gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; 162 enable-active-high; 163 }; 164 165 vcc_5v0_usb_c2: regulator-vcc-5v0-usb-c2 { 166 compatible = "regulator-fixed"; 167 regulator-name = "5v_usbc2"; 168 regulator-min-microvolt = <5000000>; 169 regulator-max-microvolt = <5000000>; 170 vin-supply = <&vcc5v0_usb>; 171 gpio = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 172 enable-active-high; 173 }; 174 175 vcc3v3_mdot2: regulator-vcc3v3-mdot2 { 176 compatible = "regulator-fixed"; 177 regulator-name = "vcc3v3_mdot2"; 178 regulator-always-on; 179 regulator-boot-on; 180 regulator-min-microvolt = <3300000>; 181 regulator-max-microvolt = <3300000>; 182 vin-supply = <&dc_12v>; 183 }; 184 185 vcc5v0_sys: regulator-vcc5v0-sys { 186 compatible = "regulator-fixed"; 187 regulator-name = "vcc5v0_sys"; 188 regulator-always-on; 189 regulator-boot-on; 190 regulator-min-microvolt = <5000000>; 191 regulator-max-microvolt = <5000000>; 192 vin-supply = <&dc_12v>; 193 }; 194 195 vcc5v0_usb: regulator-vcc5v0-usb { 196 compatible = "regulator-fixed"; 197 regulator-name = "vcc5v0_usb"; 198 regulator-always-on; 199 regulator-boot-on; 200 regulator-min-microvolt = <5000000>; 201 regulator-max-microvolt = <5000000>; 202 vin-supply = <&vcc5v0_sys>; 203 }; 204}; 205 206&combphy1_ps { 207 status = "okay"; 208}; 209 210&cpu_b0 { 211 cpu-supply = <&vdd_cpu_big0_s0>; 212}; 213 214&cpu_b1 { 215 cpu-supply = <&vdd_cpu_big0_s0>; 216}; 217 218&cpu_b2 { 219 cpu-supply = <&vdd_cpu_big1_s0>; 220}; 221 222&cpu_b3 { 223 cpu-supply = <&vdd_cpu_big1_s0>; 224}; 225 226&cpu_l0 { 227 cpu-supply = <&vdd_cpu_lit_s0>; 228}; 229 230&cpu_l1 { 231 cpu-supply = <&vdd_cpu_lit_s0>; 232}; 233 234&cpu_l2 { 235 cpu-supply = <&vdd_cpu_lit_s0>; 236}; 237 238&cpu_l3 { 239 cpu-supply = <&vdd_cpu_lit_s0>; 240}; 241 242&gmac0 { 243 clock_in_out = "output"; 244 phy-handle = <&rgmii_phy>; 245 phy-mode = "rgmii"; 246 phy-supply = <&vcc_1v2_s3>; 247 pinctrl-names = "default"; 248 pinctrl-0 = <&gmac0_miim 249 &gmac0_rx_bus2 250 &gmac0_tx_bus2 251 &gmac0_rgmii_clk 252 &gmac0_rgmii_bus 253 ð0_pins 254 ð_reset>; 255 tx_delay = <0x10>; 256 rx_delay = <0x10>; 257 snps,reset-gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>; 258 snps,reset-active-low; 259 snps,reset-delays-us = <0 10000 100000>; 260 261 status = "okay"; 262}; 263 264&gpio1 { 265 mdot2e-w-disable1-n-hog { 266 gpios = <RK_PB1 GPIO_ACTIVE_LOW>; 267 output-low; 268 line-name = "m.2 E-key W_DISABLE1#"; 269 gpio-hog; 270 }; 271}; 272 273&gpio4 { 274 mdot2e-w-disable2-n-hog { 275 gpios = <RK_PC1 GPIO_ACTIVE_LOW>; 276 output-low; 277 line-name = "m.2 E-key W_DISABLE2#"; 278 gpio-hog; 279 }; 280}; 281 282&gpu { 283 mali-supply = <&vdd_gpu_s0>; 284 status = "okay"; 285}; 286 287&hdmi0 { 288 /* No CEC on Jaguar */ 289 pinctrl-names = "default"; 290 pinctrl-0 = <&hdmim0_tx0_hpd &hdmim0_tx0_scl &hdmim0_tx0_sda>; 291 status = "okay"; 292}; 293 294&hdmi0_in { 295 hdmi0_in_vp0: endpoint { 296 remote-endpoint = <&vp0_out_hdmi0>; 297 }; 298}; 299 300&hdmi0_out { 301 hdmi0_out_con: endpoint { 302 remote-endpoint = <&hdmi_con_in>; 303 }; 304}; 305 306&hdmi0_sound { 307 status = "okay"; 308}; 309 310&hdptxphy0 { 311 status = "okay"; 312}; 313 314&i2c0 { 315 pinctrl-0 = <&i2c0m2_xfer>; 316 status = "okay"; 317 318 fan@18 { 319 compatible = "tsd,mule", "ti,amc6821"; 320 reg = <0x18>; 321 322 i2c-mux { 323 compatible = "tsd,mule-i2c-mux"; 324 #address-cells = <1>; 325 #size-cells = <0>; 326 327 i2c10: i2c@0 { 328 reg = <0x0>; 329 #address-cells = <1>; 330 #size-cells = <0>; 331 332 rtc_twi: rtc@6f { 333 compatible = "isil,isl1208"; 334 reg = <0x6f>; 335 }; 336 }; 337 }; 338 }; 339 340 typec-portc@22 { 341 compatible = "fcs,fusb302"; 342 reg = <0x22>; 343 interrupt-parent = <&gpio4>; 344 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 345 pinctrl-names = "default"; 346 pinctrl-0 = <&cc_int1>; 347 vbus-supply = <&vcc_5v0_usb_c1>; 348 349 connector { 350 compatible = "usb-c-connector"; 351 data-role = "dual"; 352 label = "USBC-1 P11"; 353 power-role = "source"; 354 self-powered; 355 source-pdos = 356 <PDO_FIXED(5000, 1500, PDO_FIXED_DATA_SWAP | PDO_FIXED_USB_COMM)>; 357 vbus-supply = <&vcc_5v0_usb_c1>; 358 359 ports { 360 #address-cells = <1>; 361 #size-cells = <0>; 362 363 port@0 { 364 reg = <0>; 365 366 usbc0_hs: endpoint { 367 remote-endpoint = <&usb_host0_xhci_drd_sw>; 368 }; 369 }; 370 371 port@1 { 372 reg = <1>; 373 374 usbc0_ss: endpoint { 375 remote-endpoint = <&usbdp_phy0_typec_ss>; 376 }; 377 }; 378 379 port@2 { 380 reg = <2>; 381 382 usbc0_sbu: endpoint { 383 remote-endpoint = <&usbdp_phy0_typec_sbu>; 384 }; 385 }; 386 }; 387 }; 388 }; 389 390 vdd_npu_s0: regulator@42 { 391 compatible = "rockchip,rk8602"; 392 reg = <0x42>; 393 fcs,suspend-voltage-selector = <1>; 394 regulator-name = "vdd_npu_s0"; 395 regulator-always-on; 396 regulator-boot-on; 397 regulator-min-microvolt = <550000>; 398 regulator-max-microvolt = <950000>; 399 regulator-ramp-delay = <2300>; 400 vin-supply = <&vcc5v0_sys>; 401 402 regulator-state-mem { 403 regulator-off-in-suspend; 404 }; 405 }; 406 407 vdd_cpu_big1_s0: regulator@43 { 408 compatible = "rockchip,rk8603", "rockchip,rk8602"; 409 reg = <0x43>; 410 fcs,suspend-voltage-selector = <1>; 411 regulator-name = "vdd_cpu_big1_s0"; 412 regulator-always-on; 413 regulator-boot-on; 414 regulator-min-microvolt = <550000>; 415 regulator-max-microvolt = <1050000>; 416 regulator-ramp-delay = <2300>; 417 vin-supply = <&vcc5v0_sys>; 418 419 regulator-state-mem { 420 regulator-off-in-suspend; 421 }; 422 }; 423}; 424 425&i2c1 { 426 pinctrl-0 = <&i2c1m4_xfer>; 427}; 428 429&i2c6 { 430 pinctrl-0 = <&i2c6m4_xfer>; 431}; 432 433&i2c7 { 434 status = "okay"; 435 436 /* SE050 Secure Element at 0x48; GPIO1_A4 for enable pin */ 437 438 /* Also on 0x55 */ 439 eeprom@54 { 440 compatible = "st,24c04", "atmel,24c04"; 441 reg = <0x54>; 442 pagesize = <16>; 443 vcc-supply = <&vcc_3v3_s3>; 444 }; 445}; 446 447&i2c8 { 448 pinctrl-0 = <&i2c8m2_xfer>; 449 status = "okay"; 450 451 typec-portc@22 { 452 compatible = "fcs,fusb302"; 453 reg = <0x22>; 454 interrupt-parent = <&gpio4>; 455 interrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>; 456 pinctrl-names = "default"; 457 pinctrl-0 = <&cc_int2>; 458 vbus-supply = <&vcc_5v0_usb_c2>; 459 460 connector { 461 compatible = "usb-c-connector"; 462 data-role = "dual"; 463 label = "USBC-2 P12"; 464 power-role = "source"; 465 self-powered; 466 source-pdos = 467 <PDO_FIXED(5000, 1500, PDO_FIXED_DATA_SWAP | PDO_FIXED_USB_COMM)>; 468 vbus-supply = <&vcc_5v0_usb_c2>; 469 470 ports { 471 #address-cells = <1>; 472 #size-cells = <0>; 473 474 port@0 { 475 reg = <0>; 476 477 usbc1_hs: endpoint { 478 remote-endpoint = <&usb_host1_xhci_drd_sw>; 479 }; 480 }; 481 482 port@1 { 483 reg = <1>; 484 485 usbc1_ss: endpoint { 486 remote-endpoint = <&usbdp_phy1_typec_ss>; 487 }; 488 }; 489 490 port@2 { 491 reg = <2>; 492 493 usbc1_sbu: endpoint { 494 remote-endpoint = <&usbdp_phy1_typec_sbu>; 495 }; 496 }; 497 }; 498 }; 499 }; 500 501 vdd_cpu_big0_s0: regulator@42 { 502 compatible = "rockchip,rk8602"; 503 reg = <0x42>; 504 fcs,suspend-voltage-selector = <1>; 505 regulator-name = "vdd_cpu_big0_s0"; 506 regulator-always-on; 507 regulator-boot-on; 508 regulator-min-microvolt = <550000>; 509 regulator-max-microvolt = <1050000>; 510 regulator-ramp-delay = <2300>; 511 vin-supply = <&vcc5v0_sys>; 512 513 regulator-state-mem { 514 regulator-off-in-suspend; 515 }; 516 }; 517}; 518 519&i2s5_8ch { 520 status = "okay"; 521}; 522 523&mdio0 { 524 rgmii_phy: ethernet-phy@6 { 525 /* KSZ9031 or KSZ9131 */ 526 compatible = "ethernet-phy-ieee802.3-c22"; 527 reg = <0x6>; 528 clocks = <&cru REFCLKO25M_ETH0_OUT>; 529 }; 530}; 531 532&pcie2x1l0 { 533 reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; /* WIFI_PERST0# */ 534 vpcie3v3-supply = <&vcc3v3_mdot2>; 535 status = "okay"; 536}; 537 538&pcie30phy { 539 status = "okay"; 540}; 541 542&pcie3x4 { 543 /* 544 * The board has a gpio-controlled "pcie_refclk" generator, 545 * so add it to the list of clocks. 546 */ 547 clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>, 548 <&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>, 549 <&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>, 550 <&pcie_refclk>; 551 clock-names = "aclk_mst", "aclk_slv", 552 "aclk_dbi", "pclk", 553 "aux", "pipe", 554 "ref"; 555 pinctrl-names = "default"; 556 pinctrl-0 = <&pcie30x4_waken_m0 &pcie30x4_perstn_m0>; 557 reset-gpios = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>; /* PCIE30X4_PERSTN_M0 */ 558 vpcie3v3-supply = <&vcc3v3_mdot2>; 559 status = "okay"; 560}; 561 562&pd_gpu { 563 domain-supply = <&vdd_gpu_s0>; 564}; 565 566&pinctrl { 567 emmc { 568 emmc_reset: emmc-reset { 569 rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 570 }; 571 }; 572 573 ethernet { 574 eth_reset: eth-reset { 575 rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 576 }; 577 }; 578 579 leds { 580 led1_pin: led1-pin { 581 rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; 582 }; 583 }; 584 585 pcie30x4 { 586 pcie30x4_clkreqn_m0: pcie30x4-clkreqn-m0 { 587 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 588 }; 589 590 pcie30x4_perstn_m0: pcie30x4-perstn-m0 { 591 rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; 592 }; 593 594 pcie30x4_waken_m0: pcie30x4-waken-m0 { 595 rockchip,pins = <0 RK_PC7 12 &pcfg_pull_none>; 596 }; 597 }; 598 599 usb3 { 600 cc_int1: cc-int1 { 601 rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 602 }; 603 604 cc_int2: cc-int2 { 605 rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 606 }; 607 608 typec0_sbu_dc_pins: typec0-sbu-dc-pins { 609 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>, 610 <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_down>; 611 }; 612 613 typec1_sbu_dc_pins: typec1-sbu-dc-pins { 614 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>, 615 <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>; 616 }; 617 }; 618}; 619 620&saradc { 621 vref-supply = <&vcc_1v8_s0>; 622 status = "okay"; 623}; 624 625&sdhci { 626 bus-width = <8>; 627 cap-mmc-highspeed; 628 mmc-ddr-1_8v; 629 mmc-hs200-1_8v; 630 mmc-hs400-1_8v; 631 mmc-hs400-enhanced-strobe; 632 mmc-pwrseq = <&emmc_pwrseq>; 633 no-sdio; 634 no-sd; 635 non-removable; 636 pinctrl-names = "default"; 637 pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_data_strobe>; 638 vmmc-supply = <&vcc_3v3_s3>; 639 vqmmc-supply = <&vcc_1v8_s3>; 640 status = "okay"; 641}; 642 643&sdmmc { 644 broken-cd; 645 bus-width = <4>; 646 cap-sd-highspeed; 647 disable-wp; 648 max-frequency = <150000000>; 649 pinctrl-names = "default"; 650 pinctrl-0 = <&sdmmc_bus4 &sdmmc_cmd &sdmmc_clk>; 651 sd-uhs-sdr12; 652 sd-uhs-sdr25; 653 sd-uhs-sdr50; 654 sd-uhs-ddr50; 655 sd-uhs-sdr104; 656 vmmc-supply = <&vcc_3v3_s3>; 657 vqmmc-supply = <&vccio_sd_s0>; 658 status = "okay"; 659}; 660 661&spi2 { 662 assigned-clocks = <&cru CLK_SPI2>; 663 assigned-clock-rates = <200000000>; 664 num-cs = <1>; 665 pinctrl-names = "default"; 666 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 667 status = "okay"; 668 669 pmic@0 { 670 compatible = "rockchip,rk806"; 671 reg = <0x0>; 672 interrupt-parent = <&gpio0>; 673 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 674 gpio-controller; 675 #gpio-cells = <2>; 676 pinctrl-names = "default"; 677 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 678 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 679 spi-max-frequency = <1000000>; 680 system-power-controller; 681 vcc1-supply = <&vcc5v0_sys>; 682 vcc2-supply = <&vcc5v0_sys>; 683 vcc3-supply = <&vcc5v0_sys>; 684 vcc4-supply = <&vcc5v0_sys>; 685 vcc5-supply = <&vcc5v0_sys>; 686 vcc6-supply = <&vcc5v0_sys>; 687 vcc7-supply = <&vcc5v0_sys>; 688 vcc8-supply = <&vcc5v0_sys>; 689 vcc9-supply = <&vcc5v0_sys>; 690 vcc10-supply = <&vcc5v0_sys>; 691 vcc11-supply = <&vcc_2v0_pldo_s3>; 692 vcc12-supply = <&vcc5v0_sys>; 693 vcc13-supply = <&vcc_1v1_nldo_s3>; 694 vcc14-supply = <&vcc_1v1_nldo_s3>; 695 vcca-supply = <&vcc5v0_sys>; 696 697 rk806_dvs1_null: dvs1-null-pins { 698 pins = "gpio_pwrctrl1"; 699 function = "pin_fun0"; 700 }; 701 702 rk806_dvs2_null: dvs2-null-pins { 703 pins = "gpio_pwrctrl2"; 704 function = "pin_fun0"; 705 }; 706 707 rk806_dvs3_null: dvs3-null-pins { 708 pins = "gpio_pwrctrl3"; 709 function = "pin_fun0"; 710 }; 711 712 regulators { 713 vdd_gpu_s0: dcdc-reg1 { 714 regulator-boot-on; 715 regulator-min-microvolt = <550000>; 716 regulator-max-microvolt = <950000>; 717 regulator-ramp-delay = <12500>; 718 regulator-name = "vdd_gpu_s0"; 719 regulator-enable-ramp-delay = <400>; 720 721 regulator-state-mem { 722 regulator-off-in-suspend; 723 }; 724 }; 725 726 vdd_cpu_lit_s0: dcdc-reg2 { 727 regulator-name = "vdd_cpu_lit_s0"; 728 regulator-always-on; 729 regulator-boot-on; 730 regulator-min-microvolt = <550000>; 731 regulator-max-microvolt = <950000>; 732 regulator-ramp-delay = <12500>; 733 734 regulator-state-mem { 735 regulator-off-in-suspend; 736 }; 737 }; 738 739 vdd_log_s0: dcdc-reg3 { 740 regulator-name = "vdd_log_s0"; 741 regulator-always-on; 742 regulator-boot-on; 743 regulator-min-microvolt = <675000>; 744 regulator-max-microvolt = <750000>; 745 regulator-ramp-delay = <12500>; 746 747 regulator-state-mem { 748 regulator-off-in-suspend; 749 regulator-suspend-microvolt = <750000>; 750 }; 751 }; 752 753 vdd_vdenc_s0: dcdc-reg4 { 754 regulator-name = "vdd_vdenc_s0"; 755 regulator-always-on; 756 regulator-boot-on; 757 regulator-min-microvolt = <550000>; 758 regulator-max-microvolt = <950000>; 759 regulator-ramp-delay = <12500>; 760 761 regulator-state-mem { 762 regulator-off-in-suspend; 763 }; 764 }; 765 766 vdd_ddr_s0: dcdc-reg5 { 767 regulator-name = "vdd_ddr_s0"; 768 regulator-always-on; 769 regulator-boot-on; 770 regulator-min-microvolt = <675000>; 771 regulator-max-microvolt = <900000>; 772 regulator-ramp-delay = <12500>; 773 774 regulator-state-mem { 775 regulator-off-in-suspend; 776 regulator-suspend-microvolt = <850000>; 777 }; 778 }; 779 780 vdd2_ddr_s3: dcdc-reg6 { 781 regulator-name = "vdd2_ddr_s3"; 782 regulator-always-on; 783 regulator-boot-on; 784 785 regulator-state-mem { 786 regulator-on-in-suspend; 787 }; 788 }; 789 790 vcc_2v0_pldo_s3: dcdc-reg7 { 791 regulator-name = "vdd_2v0_pldo_s3"; 792 regulator-always-on; 793 regulator-boot-on; 794 regulator-min-microvolt = <2000000>; 795 regulator-max-microvolt = <2000000>; 796 regulator-ramp-delay = <12500>; 797 798 regulator-state-mem { 799 regulator-on-in-suspend; 800 regulator-suspend-microvolt = <2000000>; 801 }; 802 }; 803 804 vcc_3v3_s3: dcdc-reg8 { 805 regulator-name = "vcc_3v3_s3"; 806 regulator-always-on; 807 regulator-boot-on; 808 regulator-min-microvolt = <3300000>; 809 regulator-max-microvolt = <3300000>; 810 811 regulator-state-mem { 812 regulator-on-in-suspend; 813 regulator-suspend-microvolt = <3300000>; 814 }; 815 }; 816 817 vddq_ddr_s0: dcdc-reg9 { 818 regulator-name = "vddq_ddr_s0"; 819 regulator-always-on; 820 regulator-boot-on; 821 822 regulator-state-mem { 823 regulator-off-in-suspend; 824 }; 825 }; 826 827 vcc_1v8_s3: dcdc-reg10 { 828 regulator-name = "vcc_1v8_s3"; 829 regulator-always-on; 830 regulator-boot-on; 831 regulator-min-microvolt = <1800000>; 832 regulator-max-microvolt = <1800000>; 833 834 regulator-state-mem { 835 regulator-on-in-suspend; 836 regulator-suspend-microvolt = <1800000>; 837 }; 838 }; 839 840 vcca_1v8_s0: pldo-reg1 { 841 regulator-name = "vcca_1v8_s0"; 842 regulator-always-on; 843 regulator-boot-on; 844 regulator-min-microvolt = <1800000>; 845 regulator-max-microvolt = <1800000>; 846 847 regulator-state-mem { 848 regulator-off-in-suspend; 849 }; 850 }; 851 852 vcc_1v8_s0: pldo-reg2 { 853 regulator-name = "vcc_1v8_s0"; 854 regulator-always-on; 855 regulator-boot-on; 856 regulator-min-microvolt = <1800000>; 857 regulator-max-microvolt = <1800000>; 858 859 regulator-state-mem { 860 regulator-off-in-suspend; 861 regulator-suspend-microvolt = <1800000>; 862 }; 863 }; 864 865 vdda_1v2_s0: pldo-reg3 { 866 regulator-name = "vdda_1v2_s0"; 867 regulator-always-on; 868 regulator-boot-on; 869 regulator-min-microvolt = <1200000>; 870 regulator-max-microvolt = <1200000>; 871 872 regulator-state-mem { 873 regulator-off-in-suspend; 874 }; 875 }; 876 877 vcca_3v3_s0: pldo-reg4 { 878 regulator-name = "vcca_3v3_s0"; 879 regulator-always-on; 880 regulator-boot-on; 881 regulator-min-microvolt = <3300000>; 882 regulator-max-microvolt = <3300000>; 883 regulator-ramp-delay = <12500>; 884 885 regulator-state-mem { 886 regulator-off-in-suspend; 887 }; 888 }; 889 890 vccio_sd_s0: pldo-reg5 { 891 regulator-name = "vccio_sd_s0"; 892 regulator-always-on; 893 regulator-boot-on; 894 regulator-min-microvolt = <1800000>; 895 regulator-max-microvolt = <3300000>; 896 regulator-ramp-delay = <12500>; 897 898 regulator-state-mem { 899 regulator-off-in-suspend; 900 }; 901 }; 902 903 pldo6_s3: pldo-reg6 { 904 regulator-name = "pldo6_s3"; 905 regulator-always-on; 906 regulator-boot-on; 907 regulator-min-microvolt = <1800000>; 908 regulator-max-microvolt = <1800000>; 909 910 regulator-state-mem { 911 regulator-on-in-suspend; 912 regulator-suspend-microvolt = <1800000>; 913 }; 914 }; 915 916 vdd_0v75_s3: nldo-reg1 { 917 regulator-name = "vdd_0v75_s3"; 918 regulator-always-on; 919 regulator-boot-on; 920 regulator-min-microvolt = <750000>; 921 regulator-max-microvolt = <750000>; 922 923 regulator-state-mem { 924 regulator-on-in-suspend; 925 regulator-suspend-microvolt = <750000>; 926 }; 927 }; 928 929 vdda_ddr_pll_s0: nldo-reg2 { 930 regulator-name = "vdda_ddr_pll_s0"; 931 regulator-always-on; 932 regulator-boot-on; 933 regulator-min-microvolt = <850000>; 934 regulator-max-microvolt = <850000>; 935 936 regulator-state-mem { 937 regulator-off-in-suspend; 938 regulator-suspend-microvolt = <850000>; 939 }; 940 }; 941 942 vdda_0v75_s0: nldo-reg3 { 943 regulator-name = "vdda_0v75_s0"; 944 regulator-always-on; 945 regulator-boot-on; 946 regulator-min-microvolt = <750000>; 947 regulator-max-microvolt = <750000>; 948 949 regulator-state-mem { 950 regulator-off-in-suspend; 951 }; 952 }; 953 954 vdda_0v85_s0: nldo-reg4 { 955 regulator-name = "vdda_0v85_s0"; 956 regulator-always-on; 957 regulator-boot-on; 958 regulator-min-microvolt = <850000>; 959 regulator-max-microvolt = <850000>; 960 961 regulator-state-mem { 962 regulator-off-in-suspend; 963 }; 964 }; 965 966 vdd_0v75_s0: nldo-reg5 { 967 regulator-name = "vdd_0v75_s0"; 968 regulator-always-on; 969 regulator-boot-on; 970 regulator-min-microvolt = <750000>; 971 regulator-max-microvolt = <750000>; 972 973 regulator-state-mem { 974 regulator-off-in-suspend; 975 }; 976 }; 977 }; 978 }; 979}; 980 981&tsadc { 982 status = "okay"; 983}; 984 985/* USB-C P11 connector */ 986&u2phy0 { 987 status = "okay"; 988}; 989 990&u2phy0_otg { 991 status = "okay"; 992}; 993 994/* USB-C P12 connector */ 995&u2phy1 { 996 status = "okay"; 997}; 998 999&u2phy1_otg { 1000 status = "okay"; 1001}; 1002 1003&u2phy2 { 1004 status = "okay"; 1005}; 1006 1007&u2phy2_host { 1008 phy-supply = <&vcc_5v0_usb_a>; 1009 status = "okay"; 1010}; 1011 1012&u2phy3 { 1013 status = "okay"; 1014}; 1015 1016&u2phy3_host { 1017 status = "okay"; 1018}; 1019 1020/* Mule-ATtiny debug UART; typically baudrate 9600 */ 1021&uart0 { 1022 pinctrl-0 = <&uart0m0_xfer>; 1023 status = "okay"; 1024}; 1025 1026/* Main debug interface on P20 micro-USB B port and P21 header */ 1027&uart2 { 1028 pinctrl-0 = <&uart2m0_xfer>; 1029 status = "okay"; 1030}; 1031 1032/* RS485 on P19 */ 1033&uart3 { 1034 pinctrl-0 = <&uart3m2_xfer &uart3_rtsn>; 1035 linux,rs485-enabled-at-boot-time; 1036 status = "okay"; 1037}; 1038 1039/* Mule-ATtiny UPDI flashing UART */ 1040&uart7 { 1041 pinctrl-0 = <&uart7m0_xfer>; 1042 status = "okay"; 1043}; 1044 1045/* Type-C on P11 */ 1046&usbdp_phy0 { 1047 orientation-switch; 1048 pinctrl-names = "default"; 1049 pinctrl-0 = <&typec0_sbu_dc_pins>; 1050 sbu1-dc-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; /* Q7_USB_C0_SBU1_DC */ 1051 sbu2-dc-gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>; /* Q7_USB_C0_SBU2_DC */ 1052 status = "okay"; 1053 1054 port { 1055 #address-cells = <1>; 1056 #size-cells = <0>; 1057 1058 usbdp_phy0_typec_ss: endpoint@0 { 1059 reg = <0>; 1060 remote-endpoint = <&usbc0_ss>; 1061 }; 1062 1063 usbdp_phy0_typec_sbu: endpoint@1 { 1064 reg = <1>; 1065 remote-endpoint = <&usbc0_sbu>; 1066 }; 1067 }; 1068}; 1069 1070/* Type-C on P12 */ 1071&usbdp_phy1 { 1072 orientation-switch; 1073 pinctrl-names = "default"; 1074 pinctrl-0 = <&typec1_sbu_dc_pins>; 1075 sbu1-dc-gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; /* Q7_USB_C1_SBU1_DC */ 1076 sbu2-dc-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; /* Q7_USB_C1_SBU2_DC */ 1077 status = "okay"; 1078 1079 port { 1080 #address-cells = <1>; 1081 #size-cells = <0>; 1082 1083 usbdp_phy1_typec_ss: endpoint@0 { 1084 reg = <0>; 1085 remote-endpoint = <&usbc1_ss>; 1086 }; 1087 1088 usbdp_phy1_typec_sbu: endpoint@1 { 1089 reg = <1>; 1090 remote-endpoint = <&usbc1_sbu>; 1091 }; 1092 }; 1093}; 1094 1095/* host0 on P10 USB-A */ 1096&usb_host0_ehci { 1097 status = "okay"; 1098}; 1099 1100/* host0 on P10 USB-A */ 1101&usb_host0_ohci { 1102 status = "okay"; 1103}; 1104 1105/* host0 on P11 USB-C */ 1106&usb_host0_xhci { 1107 usb-role-switch; 1108 status = "okay"; 1109 1110 port { 1111 #address-cells = <1>; 1112 #size-cells = <0>; 1113 1114 usb_host0_xhci_drd_sw: endpoint { 1115 remote-endpoint = <&usbc0_hs>; 1116 }; 1117 }; 1118}; 1119 1120/* host1 on P12 USB-C */ 1121&usb_host1_xhci { 1122 usb-role-switch; 1123 status = "okay"; 1124 1125 port { 1126 #address-cells = <1>; 1127 #size-cells = <0>; 1128 1129 usb_host1_xhci_drd_sw: endpoint { 1130 remote-endpoint = <&usbc1_hs>; 1131 }; 1132 }; 1133}; 1134 1135/* host1 on M.2 E-key */ 1136&usb_host1_ehci { 1137 status = "okay"; 1138}; 1139 1140/* host1 on M.2 E-key */ 1141&usb_host1_ohci { 1142 status = "okay"; 1143}; 1144 1145&vop { 1146 status = "okay"; 1147}; 1148 1149&vop_mmu { 1150 status = "okay"; 1151}; 1152 1153&vp0 { 1154 vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 1155 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 1156 remote-endpoint = <&hdmi0_in_vp0>; 1157 }; 1158}; 1159