1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2019, Linaro Ltd. 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/leds/common.h> 9#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 10#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 11#include <dt-bindings/sound/qcom,q6afe.h> 12#include <dt-bindings/sound/qcom,q6asm.h> 13#include "sdm845.dtsi" 14#include "sdm845-wcd9340.dtsi" 15#include "pm8998.dtsi" 16#include "pmi8998.dtsi" 17 18/ { 19 model = "Thundercomm Dragonboard 845c"; 20 compatible = "thundercomm,db845c", "qcom,sdm845"; 21 qcom,msm-id = <341 0x20001>; 22 qcom,board-id = <8 0>; 23 24 aliases { 25 serial0 = &uart9; 26 serial1 = &uart6; 27 }; 28 29 chosen { 30 stdout-path = "serial0:115200n8"; 31 }; 32 33 /* Fixed crystal oscillator dedicated to MCP2517FD */ 34 clk40m: can-clock { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <40000000>; 38 }; 39 40 dc12v: dc12v-regulator { 41 compatible = "regulator-fixed"; 42 regulator-name = "DC12V"; 43 regulator-min-microvolt = <12000000>; 44 regulator-max-microvolt = <12000000>; 45 regulator-always-on; 46 }; 47 48 gpio-keys { 49 compatible = "gpio-keys"; 50 autorepeat; 51 52 pinctrl-names = "default"; 53 pinctrl-0 = <&vol_up_pin_a>; 54 55 key-vol-up { 56 label = "Volume Up"; 57 linux,code = <KEY_VOLUMEUP>; 58 gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>; 59 }; 60 }; 61 62 leds { 63 compatible = "gpio-leds"; 64 65 led-0 { 66 label = "green:user4"; 67 function = LED_FUNCTION_INDICATOR; 68 color = <LED_COLOR_ID_GREEN>; 69 gpios = <&pm8998_gpios 13 GPIO_ACTIVE_HIGH>; 70 default-state = "off"; 71 panic-indicator; 72 }; 73 74 led-1 { 75 label = "yellow:wlan"; 76 function = LED_FUNCTION_WLAN; 77 color = <LED_COLOR_ID_YELLOW>; 78 gpios = <&pm8998_gpios 9 GPIO_ACTIVE_HIGH>; 79 linux,default-trigger = "phy0tx"; 80 default-state = "off"; 81 }; 82 83 led-2 { 84 label = "blue:bt"; 85 function = LED_FUNCTION_BLUETOOTH; 86 color = <LED_COLOR_ID_BLUE>; 87 gpios = <&pm8998_gpios 5 GPIO_ACTIVE_HIGH>; 88 linux,default-trigger = "bluetooth-power"; 89 default-state = "off"; 90 }; 91 }; 92 93 hdmi-out { 94 compatible = "hdmi-connector"; 95 type = "a"; 96 97 port { 98 hdmi_con: endpoint { 99 remote-endpoint = <<9611_out>; 100 }; 101 }; 102 }; 103 104 reserved-memory { 105 /* Cont splash region set up by the bootloader */ 106 cont_splash_mem: framebuffer@9d400000 { 107 reg = <0x0 0x9d400000 0x0 0x2400000>; 108 no-map; 109 }; 110 }; 111 112 lt9611_1v8: lt9611-vdd18-regulator { 113 compatible = "regulator-fixed"; 114 regulator-name = "LT9611_1V8"; 115 116 vin-supply = <&vdc_5v>; 117 regulator-min-microvolt = <1800000>; 118 regulator-max-microvolt = <1800000>; 119 120 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 121 enable-active-high; 122 }; 123 124 lt9611_3v3: lt9611-3v3 { 125 compatible = "regulator-fixed"; 126 regulator-name = "LT9611_3V3"; 127 128 vin-supply = <&vdc_3v3>; 129 regulator-min-microvolt = <3300000>; 130 regulator-max-microvolt = <3300000>; 131 132 /* 133 * TODO: make it possible to drive same GPIO from two clients 134 * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 135 * enable-active-high; 136 */ 137 }; 138 139 pcie0_1p05v: pcie-0-1p05v-regulator { 140 compatible = "regulator-fixed"; 141 regulator-name = "PCIE0_1.05V"; 142 143 vin-supply = <&vbat>; 144 regulator-min-microvolt = <1050000>; 145 regulator-max-microvolt = <1050000>; 146 147 /* 148 * TODO: make it possible to drive same GPIO from two clients 149 * gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 150 * enable-active-high; 151 */ 152 }; 153 154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator { 155 compatible = "regulator-fixed"; 156 regulator-name = "CAM0_DVDD_1V2"; 157 regulator-min-microvolt = <1200000>; 158 regulator-max-microvolt = <1200000>; 159 enable-active-high; 160 gpio = <&pm8998_gpios 12 GPIO_ACTIVE_HIGH>; 161 pinctrl-names = "default"; 162 pinctrl-0 = <&cam0_dvdd_1v2_en_default>; 163 vin-supply = <&vbat>; 164 }; 165 166 cam0_avdd_2v8: cam0-avdd-2v8-regulator { 167 compatible = "regulator-fixed"; 168 regulator-name = "CAM0_AVDD_2V8"; 169 regulator-min-microvolt = <2800000>; 170 regulator-max-microvolt = <2800000>; 171 enable-active-high; 172 gpio = <&pm8998_gpios 10 GPIO_ACTIVE_HIGH>; 173 pinctrl-names = "default"; 174 pinctrl-0 = <&cam0_avdd_2v8_en_default>; 175 vin-supply = <&vbat>; 176 }; 177 178 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */ 179 cam3_avdd_2v8: cam3-avdd-2v8-regulator { 180 compatible = "regulator-fixed"; 181 regulator-name = "CAM3_AVDD_2V8"; 182 regulator-min-microvolt = <2800000>; 183 regulator-max-microvolt = <2800000>; 184 regulator-always-on; 185 vin-supply = <&vbat>; 186 }; 187 188 pcie0_3p3v_dual: vldo-3v3-regulator { 189 compatible = "regulator-fixed"; 190 regulator-name = "VLDO_3V3"; 191 192 vin-supply = <&vbat>; 193 regulator-min-microvolt = <3300000>; 194 regulator-max-microvolt = <3300000>; 195 196 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 197 enable-active-high; 198 /* 199 * FIXME: this regulator is responsible for VBUS on the left USB 200 * port. Keep it always on until we can correctly model this 201 * relationship. 202 */ 203 regulator-always-on; 204 205 pinctrl-names = "default"; 206 pinctrl-0 = <&pcie0_pwren_state>; 207 }; 208 209 v5p0_hdmiout: v5p0-hdmiout-regulator { 210 compatible = "regulator-fixed"; 211 regulator-name = "V5P0_HDMIOUT"; 212 213 vin-supply = <&vdc_5v>; 214 regulator-min-microvolt = <500000>; 215 regulator-max-microvolt = <500000>; 216 217 /* 218 * TODO: make it possible to drive same GPIO from two clients 219 * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 220 * enable-active-high; 221 */ 222 }; 223 224 vbat: vbat-regulator { 225 compatible = "regulator-fixed"; 226 regulator-name = "VBAT"; 227 228 vin-supply = <&dc12v>; 229 regulator-min-microvolt = <4200000>; 230 regulator-max-microvolt = <4200000>; 231 regulator-always-on; 232 }; 233 234 vbat_som: vbat-som-regulator { 235 compatible = "regulator-fixed"; 236 regulator-name = "VBAT_SOM"; 237 238 vin-supply = <&dc12v>; 239 regulator-min-microvolt = <4200000>; 240 regulator-max-microvolt = <4200000>; 241 regulator-always-on; 242 }; 243 244 vdc_3v3: vdc-3v3-regulator { 245 compatible = "regulator-fixed"; 246 regulator-name = "VDC_3V3"; 247 vin-supply = <&dc12v>; 248 regulator-min-microvolt = <3300000>; 249 regulator-max-microvolt = <3300000>; 250 regulator-always-on; 251 }; 252 253 vdc_5v: vdc-5v-regulator { 254 compatible = "regulator-fixed"; 255 regulator-name = "VDC_5V"; 256 257 vin-supply = <&dc12v>; 258 regulator-min-microvolt = <500000>; 259 regulator-max-microvolt = <500000>; 260 regulator-always-on; 261 }; 262 263 vreg_s4a_1p8: vreg-s4a-1p8 { 264 compatible = "regulator-fixed"; 265 regulator-name = "vreg_s4a_1p8"; 266 267 regulator-min-microvolt = <1800000>; 268 regulator-max-microvolt = <1800000>; 269 regulator-always-on; 270 }; 271 272 vph_pwr: vph-pwr-regulator { 273 compatible = "regulator-fixed"; 274 regulator-name = "vph_pwr"; 275 276 vin-supply = <&vbat_som>; 277 }; 278}; 279 280&adsp_pas { 281 status = "okay"; 282 283 firmware-name = "qcom/sdm845/adsp.mbn"; 284}; 285 286&apps_rsc { 287 regulators-0 { 288 compatible = "qcom,pm8998-rpmh-regulators"; 289 qcom,pmic-id = "a"; 290 vdd-s1-supply = <&vph_pwr>; 291 vdd-s2-supply = <&vph_pwr>; 292 vdd-s3-supply = <&vph_pwr>; 293 vdd-s4-supply = <&vph_pwr>; 294 vdd-s5-supply = <&vph_pwr>; 295 vdd-s6-supply = <&vph_pwr>; 296 vdd-s7-supply = <&vph_pwr>; 297 vdd-s8-supply = <&vph_pwr>; 298 vdd-s9-supply = <&vph_pwr>; 299 vdd-s10-supply = <&vph_pwr>; 300 vdd-s11-supply = <&vph_pwr>; 301 vdd-s12-supply = <&vph_pwr>; 302 vdd-s13-supply = <&vph_pwr>; 303 vdd-l1-l27-supply = <&vreg_s7a_1p025>; 304 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; 305 vdd-l3-l11-supply = <&vreg_s7a_1p025>; 306 vdd-l4-l5-supply = <&vreg_s7a_1p025>; 307 vdd-l6-supply = <&vph_pwr>; 308 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; 309 vdd-l9-supply = <&vreg_bob>; 310 vdd-l10-l23-l25-supply = <&vreg_bob>; 311 vdd-l13-l19-l21-supply = <&vreg_bob>; 312 vdd-l16-l28-supply = <&vreg_bob>; 313 vdd-l18-l22-supply = <&vreg_bob>; 314 vdd-l20-l24-supply = <&vreg_bob>; 315 vdd-l26-supply = <&vreg_s3a_1p35>; 316 vin-lvs-1-2-supply = <&vreg_s4a_1p8>; 317 318 vreg_s3a_1p35: smps3 { 319 regulator-min-microvolt = <1352000>; 320 regulator-max-microvolt = <1352000>; 321 }; 322 323 vreg_s5a_2p04: smps5 { 324 regulator-min-microvolt = <1904000>; 325 regulator-max-microvolt = <2040000>; 326 }; 327 328 vreg_s7a_1p025: smps7 { 329 regulator-min-microvolt = <900000>; 330 regulator-max-microvolt = <1028000>; 331 }; 332 333 vreg_l1a_0p875: ldo1 { 334 regulator-min-microvolt = <880000>; 335 regulator-max-microvolt = <880000>; 336 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 337 }; 338 339 vreg_l5a_0p8: ldo5 { 340 regulator-min-microvolt = <800000>; 341 regulator-max-microvolt = <800000>; 342 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 343 }; 344 345 vreg_l12a_1p8: ldo12 { 346 regulator-min-microvolt = <1800000>; 347 regulator-max-microvolt = <1800000>; 348 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 349 }; 350 351 vreg_l7a_1p8: ldo7 { 352 regulator-min-microvolt = <1800000>; 353 regulator-max-microvolt = <1800000>; 354 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 355 }; 356 357 vreg_l13a_2p95: ldo13 { 358 regulator-min-microvolt = <1800000>; 359 regulator-max-microvolt = <2960000>; 360 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 361 }; 362 363 vreg_l17a_1p3: ldo17 { 364 regulator-min-microvolt = <1304000>; 365 regulator-max-microvolt = <1304000>; 366 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 367 }; 368 369 vreg_l20a_2p95: ldo20 { 370 regulator-min-microvolt = <2960000>; 371 regulator-max-microvolt = <2968000>; 372 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 373 }; 374 375 vreg_l21a_2p95: ldo21 { 376 regulator-min-microvolt = <2960000>; 377 regulator-max-microvolt = <2968000>; 378 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 379 }; 380 381 vreg_l24a_3p075: ldo24 { 382 regulator-min-microvolt = <3088000>; 383 regulator-max-microvolt = <3088000>; 384 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 385 }; 386 387 vreg_l25a_3p3: ldo25 { 388 regulator-min-microvolt = <3300000>; 389 regulator-max-microvolt = <3312000>; 390 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 391 }; 392 393 vreg_l26a_1p2: ldo26 { 394 regulator-min-microvolt = <1200000>; 395 regulator-max-microvolt = <1200000>; 396 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 397 }; 398 399 vreg_lvs1a_1p8: lvs1 { 400 regulator-min-microvolt = <1800000>; 401 regulator-max-microvolt = <1800000>; 402 regulator-always-on; 403 }; 404 405 vreg_lvs2a_1p8: lvs2 { 406 regulator-min-microvolt = <1800000>; 407 regulator-max-microvolt = <1800000>; 408 regulator-always-on; 409 }; 410 }; 411 412 regulators-1 { 413 compatible = "qcom,pmi8998-rpmh-regulators"; 414 qcom,pmic-id = "b"; 415 416 vdd-bob-supply = <&vph_pwr>; 417 418 vreg_bob: bob { 419 regulator-min-microvolt = <3312000>; 420 regulator-max-microvolt = <3600000>; 421 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 422 regulator-allow-bypass; 423 }; 424 }; 425}; 426 427&camss { 428 status = "okay"; 429 430 vdda-phy-supply = <&vreg_l1a_0p875>; 431 vdda-pll-supply = <&vreg_l26a_1p2>; 432}; 433 434&cdsp_pas { 435 status = "okay"; 436 firmware-name = "qcom/sdm845/cdsp.mbn"; 437}; 438 439&gcc { 440 protected-clocks = <GCC_QSPI_CORE_CLK>, 441 <GCC_QSPI_CORE_CLK_SRC>, 442 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, 443 <GCC_LPASS_Q6_AXI_CLK>, 444 <GCC_LPASS_SWAY_CLK>; 445}; 446 447&gpi_dma0 { 448 status = "okay"; 449}; 450 451&gpi_dma1 { 452 status = "okay"; 453}; 454 455&gpu { 456 status = "okay"; 457 zap-shader { 458 memory-region = <&gpu_mem>; 459 firmware-name = "qcom/sdm845/a630_zap.mbn"; 460 }; 461}; 462 463&i2c10 { 464 status = "okay"; 465 clock-frequency = <400000>; 466 467 lt9611_codec: hdmi-bridge@3b { 468 compatible = "lontium,lt9611"; 469 reg = <0x3b>; 470 #sound-dai-cells = <1>; 471 472 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>; 473 474 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>; 475 476 vdd-supply = <<9611_1v8>; 477 vcc-supply = <<9611_3v3>; 478 479 pinctrl-names = "default"; 480 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>; 481 482 ports { 483 #address-cells = <1>; 484 #size-cells = <0>; 485 486 port@0 { 487 reg = <0>; 488 489 lt9611_a: endpoint { 490 remote-endpoint = <&mdss_dsi0_out>; 491 }; 492 }; 493 494 port@1 { 495 reg = <1>; 496 497 lt9611_b: endpoint { 498 remote-endpoint = <&mdss_dsi1_out>; 499 }; 500 }; 501 502 port@2 { 503 reg = <2>; 504 505 lt9611_out: endpoint { 506 remote-endpoint = <&hdmi_con>; 507 }; 508 }; 509 }; 510 }; 511}; 512 513&i2c11 { 514 /* On Low speed expansion */ 515 clock-frequency = <100000>; 516 status = "okay"; 517}; 518 519&i2c14 { 520 /* On Low speed expansion */ 521 clock-frequency = <100000>; 522 status = "okay"; 523}; 524 525&mdss { 526 memory-region = <&cont_splash_mem>; 527 status = "okay"; 528}; 529 530&mdss_dsi0 { 531 status = "okay"; 532 vdda-supply = <&vreg_l26a_1p2>; 533 534 qcom,dual-dsi-mode; 535 qcom,master-dsi; 536 537 ports { 538 port@1 { 539 endpoint { 540 remote-endpoint = <<9611_a>; 541 data-lanes = <0 1 2 3>; 542 }; 543 }; 544 }; 545}; 546 547&mdss_dsi0_phy { 548 status = "okay"; 549 vdds-supply = <&vreg_l1a_0p875>; 550}; 551 552&mdss_dsi1 { 553 vdda-supply = <&vreg_l26a_1p2>; 554 555 qcom,dual-dsi-mode; 556 557 /* DSI1 is slave, so use DSI0 clocks */ 558 assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>, 559 <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>; 560 561 status = "okay"; 562 563 ports { 564 port@1 { 565 endpoint { 566 remote-endpoint = <<9611_b>; 567 data-lanes = <0 1 2 3>; 568 }; 569 }; 570 }; 571}; 572 573&mdss_dsi1_phy { 574 vdds-supply = <&vreg_l1a_0p875>; 575 status = "okay"; 576}; 577 578&mss_pil { 579 status = "okay"; 580 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn"; 581}; 582 583&pcie0 { 584 status = "okay"; 585 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; 586 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HIGH>; 587 588 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 589 590 pinctrl-names = "default"; 591 pinctrl-0 = <&pcie0_default_state>; 592}; 593 594&pcie0_phy { 595 status = "okay"; 596 597 vdda-phy-supply = <&vreg_l1a_0p875>; 598 vdda-pll-supply = <&vreg_l26a_1p2>; 599}; 600 601&pcie1 { 602 status = "okay"; 603 perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>; 604 605 pinctrl-names = "default"; 606 pinctrl-0 = <&pcie1_default_state>; 607}; 608 609&pcie1_phy { 610 status = "okay"; 611 612 vdda-phy-supply = <&vreg_l1a_0p875>; 613 vdda-pll-supply = <&vreg_l26a_1p2>; 614}; 615 616&pm8998_gpios { 617 gpio-line-names = 618 "NC", 619 "NC", 620 "WLAN_SW_CTRL", 621 "NC", 622 "PM_GPIO5_BLUE_BT_LED", 623 "VOL_UP_N", 624 "NC", 625 "ADC_IN1", 626 "PM_GPIO9_YEL_WIFI_LED", 627 "CAM0_AVDD_EN", 628 "NC", 629 "CAM0_DVDD_EN", 630 "PM_GPIO13_GREEN_U4_LED", 631 "DIV_CLK2", 632 "NC", 633 "NC", 634 "NC", 635 "SMB_STAT", 636 "NC", 637 "NC", 638 "ADC_IN2", 639 "OPTION1", 640 "WCSS_PWR_REQ", 641 "PM845_GPIO24", 642 "OPTION2", 643 "PM845_SLB"; 644 645 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en-state { 646 pins = "gpio12"; 647 function = "normal"; 648 649 bias-pull-up; 650 drive-push-pull; 651 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 652 }; 653 654 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state { 655 pins = "gpio10"; 656 function = "normal"; 657 658 bias-pull-up; 659 drive-push-pull; 660 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 661 }; 662 663 vol_up_pin_a: vol-up-active-state { 664 pins = "gpio6"; 665 function = "normal"; 666 input-enable; 667 bias-pull-up; 668 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 669 }; 670}; 671 672&pm8998_resin { 673 linux,code = <KEY_VOLUMEDOWN>; 674 status = "okay"; 675}; 676 677&pmi8998_lpg { 678 status = "okay"; 679 680 qcom,power-source = <1>; 681 682 led@3 { 683 reg = <3>; 684 color = <LED_COLOR_ID_GREEN>; 685 function = LED_FUNCTION_HEARTBEAT; 686 function-enumerator = <3>; 687 688 linux,default-trigger = "heartbeat"; 689 default-state = "on"; 690 }; 691 692 led@4 { 693 reg = <4>; 694 color = <LED_COLOR_ID_GREEN>; 695 function = LED_FUNCTION_INDICATOR; 696 function-enumerator = <2>; 697 }; 698 699 led@5 { 700 reg = <5>; 701 color = <LED_COLOR_ID_GREEN>; 702 function = LED_FUNCTION_INDICATOR; 703 function-enumerator = <1>; 704 }; 705}; 706 707/* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */ 708&q6afedai { 709 dai@22 { 710 reg = <QUATERNARY_MI2S_RX>; 711 qcom,sd-lines = <0 1 2 3>; 712 }; 713}; 714 715&q6asmdai { 716 dai@0 { 717 reg = <MSM_FRONTEND_DAI_MULTIMEDIA1>; 718 }; 719 720 dai@1 { 721 reg = <MSM_FRONTEND_DAI_MULTIMEDIA2>; 722 }; 723 724 dai@2 { 725 reg = <MSM_FRONTEND_DAI_MULTIMEDIA3>; 726 }; 727 728 dai@3 { 729 reg = <MSM_FRONTEND_DAI_MULTIMEDIA4>; 730 direction = <2>; 731 is-compress-dai; 732 }; 733}; 734 735&qupv3_id_0 { 736 status = "okay"; 737}; 738 739&qupv3_id_1 { 740 status = "okay"; 741}; 742 743&sdhc_2 { 744 status = "okay"; 745 746 pinctrl-names = "default"; 747 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; 748 749 vmmc-supply = <&vreg_l21a_2p95>; 750 vqmmc-supply = <&vreg_l13a_2p95>; 751 752 bus-width = <4>; 753 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>; 754}; 755 756&slpi_pas { 757 firmware-name = "qcom/sdm845/Thundercomm/db845c/slpi.mbn"; 758 759 status = "okay"; 760}; 761 762&sound { 763 compatible = "qcom,db845c-sndcard", "qcom,sdm845-sndcard"; 764 pinctrl-0 = <&quat_mi2s_active 765 &quat_mi2s_sd0_active 766 &quat_mi2s_sd1_active 767 &quat_mi2s_sd2_active 768 &quat_mi2s_sd3_active>; 769 pinctrl-names = "default"; 770 model = "DB845c"; 771 audio-routing = 772 "RX_BIAS", "MCLK", 773 "AMIC1", "MIC BIAS1", 774 "AMIC2", "MIC BIAS2", 775 "DMIC0", "MIC BIAS1", 776 "DMIC1", "MIC BIAS1", 777 "DMIC2", "MIC BIAS3", 778 "DMIC3", "MIC BIAS3", 779 "SpkrLeft IN", "SPK1 OUT", 780 "SpkrRight IN", "SPK2 OUT"; 781 782 mm1-dai-link { 783 link-name = "MultiMedia1"; 784 cpu { 785 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; 786 }; 787 }; 788 789 mm2-dai-link { 790 link-name = "MultiMedia2"; 791 cpu { 792 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; 793 }; 794 }; 795 796 mm3-dai-link { 797 link-name = "MultiMedia3"; 798 cpu { 799 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; 800 }; 801 }; 802 803 mm4-dai-link { 804 link-name = "MultiMedia4"; 805 cpu { 806 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>; 807 }; 808 }; 809 810 hdmi-dai-link { 811 link-name = "HDMI Playback"; 812 cpu { 813 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>; 814 }; 815 816 platform { 817 sound-dai = <&q6routing>; 818 }; 819 820 codec { 821 sound-dai = <<9611_codec 0>; 822 }; 823 }; 824 825 slim-dai-link { 826 link-name = "SLIM Playback"; 827 cpu { 828 sound-dai = <&q6afedai SLIMBUS_0_RX>; 829 }; 830 831 platform { 832 sound-dai = <&q6routing>; 833 }; 834 835 codec { 836 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>; 837 }; 838 }; 839 840 slimcap-dai-link { 841 link-name = "SLIM Capture"; 842 cpu { 843 sound-dai = <&q6afedai SLIMBUS_0_TX>; 844 }; 845 846 platform { 847 sound-dai = <&q6routing>; 848 }; 849 850 codec { 851 sound-dai = <&wcd9340 1>; 852 }; 853 }; 854}; 855 856&spi0 { 857 status = "okay"; 858 pinctrl-names = "default"; 859 pinctrl-0 = <&qup_spi0_default>; 860 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; 861 862 can@0 { 863 compatible = "microchip,mcp2517fd"; 864 reg = <0>; 865 clocks = <&clk40m>; 866 interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>; 867 spi-max-frequency = <10000000>; 868 vdd-supply = <&vdc_5v>; 869 xceiver-supply = <&vdc_5v>; 870 }; 871}; 872 873&spi2 { 874 /* On Low speed expansion */ 875 status = "okay"; 876}; 877 878&tlmm { 879 cam0_default: cam0-default-state { 880 rst-pins { 881 pins = "gpio9"; 882 function = "gpio"; 883 884 drive-strength = <16>; 885 bias-disable; 886 }; 887 888 mclk0-pins { 889 pins = "gpio13"; 890 function = "cam_mclk"; 891 892 drive-strength = <16>; 893 bias-disable; 894 }; 895 }; 896 897 cam3_default: cam3-default-state { 898 rst-pins { 899 function = "gpio"; 900 pins = "gpio21"; 901 902 drive-strength = <16>; 903 bias-disable; 904 }; 905 906 mclk3-pins { 907 function = "cam_mclk"; 908 pins = "gpio16"; 909 910 drive-strength = <16>; 911 bias-disable; 912 }; 913 }; 914 915 dsi_sw_sel: dsi-sw-sel-state { 916 pins = "gpio120"; 917 function = "gpio"; 918 919 drive-strength = <2>; 920 bias-disable; 921 output-high; 922 }; 923 924 lt9611_irq_pin: lt9611-irq-state { 925 pins = "gpio84"; 926 function = "gpio"; 927 bias-disable; 928 }; 929 930 pcie0_default_state: pcie0-default-state { 931 clkreq-pins { 932 pins = "gpio36"; 933 function = "pci_e0"; 934 bias-pull-up; 935 }; 936 937 reset-n-pins { 938 pins = "gpio35"; 939 function = "gpio"; 940 941 drive-strength = <2>; 942 output-low; 943 bias-pull-down; 944 }; 945 946 wake-n-pins { 947 pins = "gpio37"; 948 function = "gpio"; 949 950 drive-strength = <2>; 951 bias-pull-up; 952 }; 953 }; 954 955 pcie0_pwren_state: pcie0-pwren-state { 956 pins = "gpio90"; 957 function = "gpio"; 958 959 drive-strength = <2>; 960 bias-disable; 961 }; 962 963 pcie1_default_state: pcie1-default-state { 964 perst-n-pins { 965 pins = "gpio102"; 966 function = "gpio"; 967 968 drive-strength = <16>; 969 bias-disable; 970 }; 971 972 clkreq-pins { 973 pins = "gpio103"; 974 function = "pci_e1"; 975 bias-pull-up; 976 }; 977 978 wake-n-pins { 979 pins = "gpio11"; 980 function = "gpio"; 981 982 drive-strength = <2>; 983 bias-pull-up; 984 }; 985 986 reset-n-pins { 987 pins = "gpio75"; 988 function = "gpio"; 989 990 drive-strength = <16>; 991 bias-pull-up; 992 output-high; 993 }; 994 }; 995 996 sdc2_default_state: sdc2-default-state { 997 clk-pins { 998 pins = "sdc2_clk"; 999 bias-disable; 1000 1001 /* 1002 * It seems that mmc_test reports errors if drive 1003 * strength is not 16 on clk, cmd, and data pins. 1004 */ 1005 drive-strength = <16>; 1006 }; 1007 1008 cmd-pins { 1009 pins = "sdc2_cmd"; 1010 bias-pull-up; 1011 drive-strength = <10>; 1012 }; 1013 1014 data-pins { 1015 pins = "sdc2_data"; 1016 bias-pull-up; 1017 drive-strength = <10>; 1018 }; 1019 }; 1020 1021 sdc2_card_det_n: sd-card-det-n-state { 1022 pins = "gpio126"; 1023 function = "gpio"; 1024 bias-pull-up; 1025 }; 1026}; 1027 1028&uart3 { 1029 label = "LS-UART0"; 1030 pinctrl-0 = <&qup_uart3_4pin>; 1031 1032 status = "disabled"; 1033}; 1034 1035&uart6 { 1036 status = "okay"; 1037 1038 pinctrl-0 = <&qup_uart6_4pin>; 1039 1040 bluetooth { 1041 compatible = "qcom,wcn3990-bt"; 1042 1043 vddio-supply = <&vreg_s4a_1p8>; 1044 vddxo-supply = <&vreg_l7a_1p8>; 1045 vddrf-supply = <&vreg_l17a_1p3>; 1046 vddch0-supply = <&vreg_l25a_3p3>; 1047 max-speed = <3200000>; 1048 }; 1049}; 1050 1051&uart9 { 1052 label = "LS-UART1"; 1053 status = "okay"; 1054}; 1055 1056&usb_1 { 1057 status = "okay"; 1058}; 1059 1060&usb_1_dwc3 { 1061 dr_mode = "peripheral"; 1062}; 1063 1064&usb_1_hsphy { 1065 status = "okay"; 1066 1067 vdd-supply = <&vreg_l1a_0p875>; 1068 vdda-pll-supply = <&vreg_l12a_1p8>; 1069 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 1070 1071 qcom,imp-res-offset-value = <8>; 1072 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; 1073 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; 1074 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; 1075}; 1076 1077&usb_1_qmpphy { 1078 status = "okay"; 1079 1080 vdda-phy-supply = <&vreg_l26a_1p2>; 1081 vdda-pll-supply = <&vreg_l1a_0p875>; 1082}; 1083 1084&usb_2 { 1085 status = "okay"; 1086}; 1087 1088&usb_2_dwc3 { 1089 dr_mode = "host"; 1090}; 1091 1092&usb_2_hsphy { 1093 status = "okay"; 1094 1095 vdd-supply = <&vreg_l1a_0p875>; 1096 vdda-pll-supply = <&vreg_l12a_1p8>; 1097 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 1098 1099 qcom,imp-res-offset-value = <8>; 1100 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>; 1101}; 1102 1103&usb_2_qmpphy { 1104 status = "okay"; 1105 1106 vdda-phy-supply = <&vreg_l26a_1p2>; 1107 vdda-pll-supply = <&vreg_l1a_0p875>; 1108}; 1109 1110&ufs_mem_hc { 1111 status = "okay"; 1112 1113 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; 1114 1115 vcc-supply = <&vreg_l20a_2p95>; 1116 vcc-max-microamp = <800000>; 1117}; 1118 1119&ufs_mem_phy { 1120 status = "okay"; 1121 1122 vdda-phy-supply = <&vreg_l1a_0p875>; 1123 vdda-pll-supply = <&vreg_l26a_1p2>; 1124}; 1125 1126&venus { 1127 status = "okay"; 1128}; 1129 1130&wcd9340 { 1131 reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; 1132 vdd-buck-supply = <&vreg_s4a_1p8>; 1133 vdd-buck-sido-supply = <&vreg_s4a_1p8>; 1134 vdd-tx-supply = <&vreg_s4a_1p8>; 1135 vdd-rx-supply = <&vreg_s4a_1p8>; 1136 vdd-io-supply = <&vreg_s4a_1p8>; 1137 1138 swm: soundwire@c85 { 1139 left_spkr: speaker@0,1 { 1140 compatible = "sdw10217201000"; 1141 reg = <0 1>; 1142 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; 1143 #thermal-sensor-cells = <0>; 1144 sound-name-prefix = "SpkrLeft"; 1145 #sound-dai-cells = <0>; 1146 }; 1147 1148 right_spkr: speaker@0,2 { 1149 compatible = "sdw10217201000"; 1150 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; 1151 reg = <0 2>; 1152 #thermal-sensor-cells = <0>; 1153 sound-name-prefix = "SpkrRight"; 1154 #sound-dai-cells = <0>; 1155 }; 1156 }; 1157}; 1158 1159&wifi { 1160 status = "okay"; 1161 1162 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; 1163 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 1164 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 1165 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 1166 1167 qcom,snoc-host-cap-8bit-quirk; 1168 qcom,calibration-variant = "Thundercomm_DB845C"; 1169}; 1170 1171/* PINCTRL - additions to nodes defined in sdm845.dtsi */ 1172&qup_spi2_default { 1173 drive-strength = <16>; 1174}; 1175 1176&qup_i2c10_default { 1177 drive-strength = <2>; 1178 bias-disable; 1179}; 1180 1181&qup_uart9_rx { 1182 drive-strength = <2>; 1183 bias-pull-up; 1184}; 1185 1186&qup_uart9_tx { 1187 drive-strength = <2>; 1188 bias-disable; 1189}; 1190 1191/* PINCTRL - additions to nodes defined in sdm845.dtsi */ 1192&qup_spi0_default { 1193 drive-strength = <6>; 1194 bias-disable; 1195}; 1196