1 // SPDX-License-Identifier: BSD-3-Clause-Clear
2 /* Copyright (C) 2020 MediaTek Inc. */
3
4 #include <linux/fs.h>
5 #include "mt7915.h"
6 #include "mcu.h"
7 #include "mac.h"
8 #include "eeprom.h"
9
10 #define fw_name(_dev, name, ...) ({ \
11 char *_fw; \
12 switch (mt76_chip(&(_dev)->mt76)) { \
13 case 0x7915: \
14 _fw = MT7915_##name; \
15 break; \
16 case 0x7981: \
17 _fw = MT7981_##name; \
18 break; \
19 case 0x7986: \
20 _fw = MT7986_##name##__VA_ARGS__; \
21 break; \
22 default: \
23 _fw = MT7916_##name; \
24 break; \
25 } \
26 _fw; \
27 })
28
29 #define fw_name_var(_dev, name) (mt7915_check_adie(dev, false) ? \
30 fw_name(_dev, name) : \
31 fw_name(_dev, name, _MT7975))
32
33 #define MCU_PATCH_ADDRESS 0x200000
34
35 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p)
36 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m)
37
38 static bool sr_scene_detect = true;
39 module_param(sr_scene_detect, bool, 0644);
40 MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm");
41
42 static u8
mt7915_mcu_get_sta_nss(u16 mcs_map)43 mt7915_mcu_get_sta_nss(u16 mcs_map)
44 {
45 u8 nss;
46
47 for (nss = 8; nss > 0; nss--) {
48 u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3;
49
50 if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED)
51 break;
52 }
53
54 return nss ? nss - 1 : 0;
55 }
56
57 static void
mt7915_mcu_set_sta_he_mcs(struct ieee80211_sta * sta,__le16 * he_mcs,u16 mcs_map)58 mt7915_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs,
59 u16 mcs_map)
60 {
61 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
62 struct mt7915_dev *dev = msta->vif->phy->dev;
63 enum nl80211_band band = msta->vif->phy->mt76->chandef.chan->band;
64 const u16 *mask = msta->vif->bitrate_mask.control[band].he_mcs;
65 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
66
67 for (nss = 0; nss < max_nss; nss++) {
68 int mcs;
69
70 switch ((mcs_map >> (2 * nss)) & 0x3) {
71 case IEEE80211_HE_MCS_SUPPORT_0_11:
72 mcs = GENMASK(11, 0);
73 break;
74 case IEEE80211_HE_MCS_SUPPORT_0_9:
75 mcs = GENMASK(9, 0);
76 break;
77 case IEEE80211_HE_MCS_SUPPORT_0_7:
78 mcs = GENMASK(7, 0);
79 break;
80 default:
81 mcs = 0;
82 }
83
84 mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1;
85
86 switch (mcs) {
87 case 0 ... 7:
88 mcs = IEEE80211_HE_MCS_SUPPORT_0_7;
89 break;
90 case 8 ... 9:
91 mcs = IEEE80211_HE_MCS_SUPPORT_0_9;
92 break;
93 case 10 ... 11:
94 mcs = IEEE80211_HE_MCS_SUPPORT_0_11;
95 break;
96 default:
97 mcs = IEEE80211_HE_MCS_NOT_SUPPORTED;
98 break;
99 }
100 mcs_map &= ~(0x3 << (nss * 2));
101 mcs_map |= mcs << (nss * 2);
102
103 /* only support 2ss on 160MHz for mt7915 */
104 if (is_mt7915(&dev->mt76) && nss > 1 &&
105 sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
106 break;
107 }
108
109 *he_mcs = cpu_to_le16(mcs_map);
110 }
111
112 static void
mt7915_mcu_set_sta_vht_mcs(struct ieee80211_sta * sta,__le16 * vht_mcs,const u16 * mask)113 mt7915_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs,
114 const u16 *mask)
115 {
116 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
117 struct mt7915_dev *dev = msta->vif->phy->dev;
118 u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map);
119 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
120 u16 mcs;
121
122 for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) {
123 switch (mcs_map & 0x3) {
124 case IEEE80211_VHT_MCS_SUPPORT_0_9:
125 mcs = GENMASK(9, 0);
126 break;
127 case IEEE80211_VHT_MCS_SUPPORT_0_8:
128 mcs = GENMASK(8, 0);
129 break;
130 case IEEE80211_VHT_MCS_SUPPORT_0_7:
131 mcs = GENMASK(7, 0);
132 break;
133 default:
134 mcs = 0;
135 }
136
137 vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]);
138
139 /* only support 2ss on 160MHz for mt7915 */
140 if (is_mt7915(&dev->mt76) && nss > 1 &&
141 sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
142 break;
143 }
144 }
145
146 static void
mt7915_mcu_set_sta_ht_mcs(struct ieee80211_sta * sta,u8 * ht_mcs,const u8 * mask)147 mt7915_mcu_set_sta_ht_mcs(struct ieee80211_sta *sta, u8 *ht_mcs,
148 const u8 *mask)
149 {
150 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
151
152 for (nss = 0; nss < max_nss; nss++)
153 ht_mcs[nss] = sta->deflink.ht_cap.mcs.rx_mask[nss] & mask[nss];
154 }
155
156 static int
mt7915_mcu_parse_response(struct mt76_dev * mdev,int cmd,struct sk_buff * skb,int seq)157 mt7915_mcu_parse_response(struct mt76_dev *mdev, int cmd,
158 struct sk_buff *skb, int seq)
159 {
160 struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76);
161 struct mt76_connac2_mcu_rxd *rxd;
162 int ret = 0;
163
164 if (!skb) {
165 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n",
166 cmd, seq);
167
168 if (!test_and_set_bit(MT76_MCU_RESET, &dev->mphy.state)) {
169 dev->recovery.restart = true;
170 wake_up(&dev->mt76.mcu.wait);
171 queue_work(dev->mt76.wq, &dev->reset_work);
172 wake_up(&dev->reset_wait);
173 }
174
175 return -ETIMEDOUT;
176 }
177
178 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
179 if (seq != rxd->seq &&
180 !(rxd->eid == MCU_CMD_EXT_CID &&
181 rxd->ext_eid == MCU_EXT_EVENT_WA_TX_STAT))
182 return -EAGAIN;
183
184 if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) {
185 skb_pull(skb, sizeof(*rxd) - 4);
186 ret = *skb->data;
187 } else if (cmd == MCU_EXT_CMD(THERMAL_CTRL)) {
188 skb_pull(skb, sizeof(*rxd) + 4);
189 ret = le32_to_cpu(*(__le32 *)skb->data);
190 } else {
191 skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd));
192 }
193
194 return ret;
195 }
196
197 static void
mt7915_mcu_set_timeout(struct mt76_dev * mdev,int cmd)198 mt7915_mcu_set_timeout(struct mt76_dev *mdev, int cmd)
199 {
200 mdev->mcu.timeout = 5 * HZ;
201
202 if ((cmd & __MCU_CMD_FIELD_ID) != MCU_CMD_EXT_CID)
203 return;
204
205 switch (FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd)) {
206 case MCU_EXT_CMD_THERMAL_CTRL:
207 case MCU_EXT_CMD_GET_MIB_INFO:
208 case MCU_EXT_CMD_PHY_STAT_INFO:
209 case MCU_EXT_CMD_STA_REC_UPDATE:
210 case MCU_EXT_CMD_BSS_INFO_UPDATE:
211 mdev->mcu.timeout = 2 * HZ;
212 return;
213 case MCU_EXT_CMD_EFUSE_BUFFER_MODE:
214 mdev->mcu.timeout = 10 * HZ;
215 return;
216 default:
217 break;
218 }
219 }
220
221 static int
mt7915_mcu_send_message(struct mt76_dev * mdev,struct sk_buff * skb,int cmd,int * wait_seq)222 mt7915_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
223 int cmd, int *wait_seq)
224 {
225 struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76);
226 enum mt76_mcuq_id qid;
227
228 if (cmd == MCU_CMD(FW_SCATTER))
229 qid = MT_MCUQ_FWDL;
230 else if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state))
231 qid = MT_MCUQ_WA;
232 else
233 qid = MT_MCUQ_WM;
234
235 mt7915_mcu_set_timeout(mdev, cmd);
236
237 return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0);
238 }
239
mt7915_mcu_wa_cmd(struct mt7915_dev * dev,int cmd,u32 a1,u32 a2,u32 a3)240 int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3)
241 {
242 struct {
243 __le32 args[3];
244 } req = {
245 .args = {
246 cpu_to_le32(a1),
247 cpu_to_le32(a2),
248 cpu_to_le32(a3),
249 },
250 };
251
252 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), false);
253 }
254
255 static void
mt7915_mcu_csa_finish(void * priv,u8 * mac,struct ieee80211_vif * vif)256 mt7915_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)
257 {
258 if (!vif->bss_conf.csa_active || vif->type == NL80211_IFTYPE_STATION)
259 return;
260
261 ieee80211_csa_finish(vif, 0);
262 }
263
264 static void
mt7915_mcu_rx_csa_notify(struct mt7915_dev * dev,struct sk_buff * skb)265 mt7915_mcu_rx_csa_notify(struct mt7915_dev *dev, struct sk_buff *skb)
266 {
267 struct mt76_phy *mphy = &dev->mt76.phy;
268 struct mt7915_mcu_csa_notify *c;
269
270 c = (struct mt7915_mcu_csa_notify *)skb->data;
271
272 if (c->band_idx > MT_BAND1)
273 return;
274
275 if ((c->band_idx && !dev->phy.mt76->band_idx) &&
276 dev->mt76.phys[MT_BAND1])
277 mphy = dev->mt76.phys[MT_BAND1];
278
279 ieee80211_iterate_active_interfaces_atomic(mphy->hw,
280 IEEE80211_IFACE_ITER_RESUME_ALL,
281 mt7915_mcu_csa_finish, mphy->hw);
282 }
283
284 static void
mt7915_mcu_rx_thermal_notify(struct mt7915_dev * dev,struct sk_buff * skb)285 mt7915_mcu_rx_thermal_notify(struct mt7915_dev *dev, struct sk_buff *skb)
286 {
287 struct mt76_phy *mphy = &dev->mt76.phy;
288 struct mt7915_mcu_thermal_notify *t;
289 struct mt7915_phy *phy;
290
291 t = (struct mt7915_mcu_thermal_notify *)skb->data;
292 if (t->ctrl.ctrl_id != THERMAL_PROTECT_ENABLE)
293 return;
294
295 if (t->ctrl.band_idx > MT_BAND1)
296 return;
297
298 if ((t->ctrl.band_idx && !dev->phy.mt76->band_idx) &&
299 dev->mt76.phys[MT_BAND1])
300 mphy = dev->mt76.phys[MT_BAND1];
301
302 phy = mphy->priv;
303 phy->throttle_state = t->ctrl.duty.duty_cycle;
304 }
305
306 static void
mt7915_mcu_rx_radar_detected(struct mt7915_dev * dev,struct sk_buff * skb)307 mt7915_mcu_rx_radar_detected(struct mt7915_dev *dev, struct sk_buff *skb)
308 {
309 struct mt76_phy *mphy = &dev->mt76.phy;
310 struct mt7915_mcu_rdd_report *r;
311 u32 sku;
312
313 r = (struct mt7915_mcu_rdd_report *)skb->data;
314
315 switch (r->rdd_idx) {
316 case MT_RDD_IDX_BAND0:
317 break;
318 case MT_RDD_IDX_BAND1:
319 sku = mt7915_check_adie(dev, true);
320 /* the main phy is bound to band 1 for this sku */
321 if (is_mt7986(&dev->mt76) &&
322 (sku == MT7975_ONE_ADIE || sku == MT7976_ONE_ADIE))
323 break;
324 mphy = dev->mt76.phys[MT_BAND1];
325 break;
326 case MT_RDD_IDX_BACKGROUND:
327 if (!dev->rdd2_phy)
328 return;
329 mphy = dev->rdd2_phy->mt76;
330 break;
331 default:
332 dev_err(dev->mt76.dev, "Unknown RDD idx %d\n", r->rdd_idx);
333 return;
334 }
335
336 if (!mphy)
337 return;
338
339 if (r->rdd_idx == MT_RDD_IDX_BACKGROUND)
340 cfg80211_background_radar_event(mphy->hw->wiphy,
341 &dev->rdd2_chandef,
342 GFP_ATOMIC);
343 else
344 ieee80211_radar_detected(mphy->hw, NULL);
345 dev->hw_pattern++;
346 }
347
348 static void
mt7915_mcu_rx_log_message(struct mt7915_dev * dev,struct sk_buff * skb)349 mt7915_mcu_rx_log_message(struct mt7915_dev *dev, struct sk_buff *skb)
350 {
351 struct mt76_connac2_mcu_rxd *rxd;
352 int len = skb->len - sizeof(*rxd);
353 const char *data, *type;
354
355 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
356 data = (char *)&rxd[1];
357
358 switch (rxd->s2d_index) {
359 case 0:
360 if (mt7915_debugfs_rx_log(dev, data, len))
361 return;
362
363 type = "WM";
364 break;
365 case 2:
366 type = "WA";
367 break;
368 default:
369 type = "unknown";
370 break;
371 }
372
373 wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data);
374 }
375
376 static void
mt7915_mcu_cca_finish(void * priv,u8 * mac,struct ieee80211_vif * vif)377 mt7915_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)
378 {
379 if (!vif->bss_conf.color_change_active || vif->type == NL80211_IFTYPE_STATION)
380 return;
381
382 ieee80211_color_change_finish(vif, 0);
383 }
384
385 static void
mt7915_mcu_rx_bcc_notify(struct mt7915_dev * dev,struct sk_buff * skb)386 mt7915_mcu_rx_bcc_notify(struct mt7915_dev *dev, struct sk_buff *skb)
387 {
388 struct mt76_phy *mphy = &dev->mt76.phy;
389 struct mt7915_mcu_bcc_notify *b;
390
391 b = (struct mt7915_mcu_bcc_notify *)skb->data;
392
393 if (b->band_idx > MT_BAND1)
394 return;
395
396 if ((b->band_idx && !dev->phy.mt76->band_idx) &&
397 dev->mt76.phys[MT_BAND1])
398 mphy = dev->mt76.phys[MT_BAND1];
399
400 ieee80211_iterate_active_interfaces_atomic(mphy->hw,
401 IEEE80211_IFACE_ITER_RESUME_ALL,
402 mt7915_mcu_cca_finish, mphy->hw);
403 }
404
405 static void
mt7915_mcu_rx_ps_sync(struct mt7915_dev * dev,struct sk_buff * skb)406 mt7915_mcu_rx_ps_sync(struct mt7915_dev *dev, struct sk_buff *skb)
407 {
408 struct mt7915_mcu_ps_notify *p = (void *)skb->data;
409 struct mt76_wcid *wcid;
410 u16 wcid_idx;
411
412 wcid_idx = p->wtbl_lower | (p->wtbl_higher << 8);
413 wcid = mt76_wcid_ptr(dev, wcid_idx);
414 if (!wcid || !wcid_to_sta(wcid))
415 return;
416
417 mt76_sta_ps_transition(&dev->mt76, wcid, !!p->ps_bit);
418 }
419
420 static void
mt7915_mcu_rx_ext_event(struct mt7915_dev * dev,struct sk_buff * skb)421 mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb)
422 {
423 struct mt76_connac2_mcu_rxd *rxd;
424
425 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
426 switch (rxd->ext_eid) {
427 case MCU_EXT_EVENT_THERMAL_PROTECT:
428 mt7915_mcu_rx_thermal_notify(dev, skb);
429 break;
430 case MCU_EXT_EVENT_RDD_REPORT:
431 mt7915_mcu_rx_radar_detected(dev, skb);
432 break;
433 case MCU_EXT_EVENT_CSA_NOTIFY:
434 mt7915_mcu_rx_csa_notify(dev, skb);
435 break;
436 case MCU_EXT_EVENT_FW_LOG_2_HOST:
437 mt7915_mcu_rx_log_message(dev, skb);
438 break;
439 case MCU_EXT_EVENT_BCC_NOTIFY:
440 mt7915_mcu_rx_bcc_notify(dev, skb);
441 break;
442 case MCU_EXT_EVENT_PS_SYNC:
443 mt7915_mcu_rx_ps_sync(dev, skb);
444 break;
445 default:
446 break;
447 }
448 }
449
450 static void
mt7915_mcu_rx_unsolicited_event(struct mt7915_dev * dev,struct sk_buff * skb)451 mt7915_mcu_rx_unsolicited_event(struct mt7915_dev *dev, struct sk_buff *skb)
452 {
453 struct mt76_connac2_mcu_rxd *rxd;
454
455 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
456 switch (rxd->eid) {
457 case MCU_EVENT_EXT:
458 mt7915_mcu_rx_ext_event(dev, skb);
459 break;
460 default:
461 break;
462 }
463 dev_kfree_skb(skb);
464 }
465
mt7915_mcu_rx_event(struct mt7915_dev * dev,struct sk_buff * skb)466 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb)
467 {
468 struct mt76_connac2_mcu_rxd *rxd;
469
470 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
471 if ((rxd->ext_eid == MCU_EXT_EVENT_THERMAL_PROTECT ||
472 rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST ||
473 rxd->ext_eid == MCU_EXT_EVENT_ASSERT_DUMP ||
474 rxd->ext_eid == MCU_EXT_EVENT_PS_SYNC ||
475 rxd->ext_eid == MCU_EXT_EVENT_BCC_NOTIFY ||
476 !rxd->seq) &&
477 !(rxd->eid == MCU_CMD_EXT_CID &&
478 rxd->ext_eid == MCU_EXT_EVENT_WA_TX_STAT))
479 mt7915_mcu_rx_unsolicited_event(dev, skb);
480 else
481 mt76_mcu_rx_event(&dev->mt76, skb);
482 }
483
484 static struct tlv *
mt7915_mcu_add_nested_subtlv(struct sk_buff * skb,int sub_tag,int sub_len,__le16 * sub_ntlv,__le16 * len)485 mt7915_mcu_add_nested_subtlv(struct sk_buff *skb, int sub_tag, int sub_len,
486 __le16 *sub_ntlv, __le16 *len)
487 {
488 struct tlv *ptlv, tlv = {
489 .tag = cpu_to_le16(sub_tag),
490 .len = cpu_to_le16(sub_len),
491 };
492
493 ptlv = skb_put_zero(skb, sub_len);
494 memcpy(ptlv, &tlv, sizeof(tlv));
495
496 le16_add_cpu(sub_ntlv, 1);
497 le16_add_cpu(len, sub_len);
498
499 return ptlv;
500 }
501
502 /** bss info **/
503 struct mt7915_he_obss_narrow_bw_ru_data {
504 bool tolerated;
505 };
506
mt7915_check_he_obss_narrow_bw_ru_iter(struct wiphy * wiphy,struct cfg80211_bss * bss,void * _data)507 static void mt7915_check_he_obss_narrow_bw_ru_iter(struct wiphy *wiphy,
508 struct cfg80211_bss *bss,
509 void *_data)
510 {
511 struct mt7915_he_obss_narrow_bw_ru_data *data = _data;
512 const struct element *elem;
513
514 rcu_read_lock();
515 elem = ieee80211_bss_get_elem(bss, WLAN_EID_EXT_CAPABILITY);
516
517 if (!elem || elem->datalen <= 10 ||
518 !(elem->data[10] &
519 WLAN_EXT_CAPA10_OBSS_NARROW_BW_RU_TOLERANCE_SUPPORT))
520 data->tolerated = false;
521
522 rcu_read_unlock();
523 }
524
mt7915_check_he_obss_narrow_bw_ru(struct ieee80211_hw * hw,struct ieee80211_vif * vif)525 static bool mt7915_check_he_obss_narrow_bw_ru(struct ieee80211_hw *hw,
526 struct ieee80211_vif *vif)
527 {
528 struct mt7915_he_obss_narrow_bw_ru_data iter_data = {
529 .tolerated = true,
530 };
531
532 if (!(vif->bss_conf.chanreq.oper.chan->flags & IEEE80211_CHAN_RADAR))
533 return false;
534
535 cfg80211_bss_iter(hw->wiphy, &vif->bss_conf.chanreq.oper,
536 mt7915_check_he_obss_narrow_bw_ru_iter,
537 &iter_data);
538
539 /*
540 * If there is at least one AP on radar channel that cannot
541 * tolerate 26-tone RU UL OFDMA transmissions using HE TB PPDU.
542 */
543 return !iter_data.tolerated;
544 }
545
546 static void
mt7915_mcu_bss_rfch_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7915_phy * phy)547 mt7915_mcu_bss_rfch_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
548 struct mt7915_phy *phy)
549 {
550 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
551 struct bss_info_rf_ch *ch;
552 struct tlv *tlv;
553 int freq1 = chandef->center_freq1;
554
555 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_RF_CH, sizeof(*ch));
556
557 ch = (struct bss_info_rf_ch *)tlv;
558 ch->pri_ch = chandef->chan->hw_value;
559 ch->center_ch0 = ieee80211_frequency_to_channel(freq1);
560 ch->bw = mt76_connac_chan_bw(chandef);
561
562 if (chandef->width == NL80211_CHAN_WIDTH_80P80) {
563 int freq2 = chandef->center_freq2;
564
565 ch->center_ch1 = ieee80211_frequency_to_channel(freq2);
566 }
567
568 if (vif->bss_conf.he_support && vif->type == NL80211_IFTYPE_STATION) {
569 struct mt76_phy *mphy = phy->mt76;
570
571 ch->he_ru26_block =
572 mt7915_check_he_obss_narrow_bw_ru(mphy->hw, vif);
573 ch->he_all_disable = false;
574 } else {
575 ch->he_all_disable = true;
576 }
577 }
578
579 static void
mt7915_mcu_bss_ra_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7915_phy * phy)580 mt7915_mcu_bss_ra_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
581 struct mt7915_phy *phy)
582 {
583 int max_nss = hweight8(phy->mt76->antenna_mask);
584 struct bss_info_ra *ra;
585 struct tlv *tlv;
586
587 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_RA, sizeof(*ra));
588
589 ra = (struct bss_info_ra *)tlv;
590 ra->op_mode = vif->type == NL80211_IFTYPE_AP;
591 ra->adhoc_en = vif->type == NL80211_IFTYPE_ADHOC;
592 ra->short_preamble = true;
593 ra->tx_streams = max_nss;
594 ra->rx_streams = max_nss;
595 ra->algo = 4;
596 ra->train_up_rule = 2;
597 ra->train_up_high_thres = cpu_to_le16(110);
598 ra->train_up_rule_rssi = cpu_to_le16(-70);
599 ra->low_traffic_thres = cpu_to_le16(2);
600 ra->phy_cap = cpu_to_le32(0xfdf);
601 ra->interval = cpu_to_le32(500);
602 ra->fast_interval = cpu_to_le32(100);
603 }
604
605 static void
mt7915_mcu_bss_he_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7915_phy * phy)606 mt7915_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
607 struct mt7915_phy *phy)
608 {
609 #define DEFAULT_HE_PE_DURATION 4
610 #define DEFAULT_HE_DURATION_RTS_THRES 1023
611 const struct ieee80211_sta_he_cap *cap;
612 struct bss_info_he *he;
613 struct tlv *tlv;
614
615 cap = mt76_connac_get_he_phy_cap(phy->mt76, vif);
616 if (!cap)
617 return;
618
619 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_HE_BASIC, sizeof(*he));
620
621 he = (struct bss_info_he *)tlv;
622 he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext;
623 if (!he->he_pe_duration)
624 he->he_pe_duration = DEFAULT_HE_PE_DURATION;
625
626 he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th);
627 if (!he->he_rts_thres)
628 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES);
629
630 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80;
631 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160;
632 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80;
633 }
634
635 static void
mt7915_mcu_bss_hw_amsdu_tlv(struct sk_buff * skb)636 mt7915_mcu_bss_hw_amsdu_tlv(struct sk_buff *skb)
637 {
638 #define TXD_CMP_MAP1 GENMASK(15, 0)
639 #define TXD_CMP_MAP2 (GENMASK(31, 0) & ~BIT(23))
640 struct bss_info_hw_amsdu *amsdu;
641 struct tlv *tlv;
642
643 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_HW_AMSDU, sizeof(*amsdu));
644
645 amsdu = (struct bss_info_hw_amsdu *)tlv;
646 amsdu->cmp_bitmap_0 = cpu_to_le32(TXD_CMP_MAP1);
647 amsdu->cmp_bitmap_1 = cpu_to_le32(TXD_CMP_MAP2);
648 amsdu->trig_thres = cpu_to_le16(2);
649 amsdu->enable = true;
650 }
651
652 static void
mt7915_mcu_bss_bmc_tlv(struct sk_buff * skb,struct mt7915_phy * phy)653 mt7915_mcu_bss_bmc_tlv(struct sk_buff *skb, struct mt7915_phy *phy)
654 {
655 struct bss_info_bmc_rate *bmc;
656 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
657 enum nl80211_band band = chandef->chan->band;
658 struct tlv *tlv;
659
660 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BMC_RATE, sizeof(*bmc));
661
662 bmc = (struct bss_info_bmc_rate *)tlv;
663 if (band == NL80211_BAND_2GHZ) {
664 bmc->short_preamble = true;
665 } else {
666 bmc->bc_trans = cpu_to_le16(0x2000);
667 bmc->mc_trans = cpu_to_le16(0x2080);
668 }
669 }
670
671 static int
mt7915_mcu_muar_config(struct mt7915_phy * phy,struct ieee80211_vif * vif,bool bssid,bool enable)672 mt7915_mcu_muar_config(struct mt7915_phy *phy, struct ieee80211_vif *vif,
673 bool bssid, bool enable)
674 {
675 struct mt7915_dev *dev = phy->dev;
676 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
677 u32 idx = mvif->mt76.omac_idx - REPEATER_BSSID_START;
678 u32 mask = phy->omac_mask >> 32 & ~BIT(idx);
679 const u8 *addr = vif->addr;
680 struct {
681 u8 mode;
682 u8 force_clear;
683 u8 clear_bitmap[8];
684 u8 entry_count;
685 u8 write;
686 u8 band;
687
688 u8 index;
689 u8 bssid;
690 u8 addr[ETH_ALEN];
691 } __packed req = {
692 .mode = !!mask || enable,
693 .entry_count = 1,
694 .write = 1,
695 .band = phy->mt76->band_idx,
696 .index = idx * 2 + bssid,
697 };
698
699 if (bssid)
700 addr = vif->bss_conf.bssid;
701
702 if (enable)
703 ether_addr_copy(req.addr, addr);
704
705 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MUAR_UPDATE), &req,
706 sizeof(req), true);
707 }
708
mt7915_mcu_add_bss_info(struct mt7915_phy * phy,struct ieee80211_vif * vif,int enable)709 int mt7915_mcu_add_bss_info(struct mt7915_phy *phy,
710 struct ieee80211_vif *vif, int enable)
711 {
712 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
713 struct mt7915_dev *dev = phy->dev;
714 struct sk_buff *skb;
715
716 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) {
717 mt7915_mcu_muar_config(phy, vif, false, enable);
718 mt7915_mcu_muar_config(phy, vif, true, enable);
719 }
720
721 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, NULL,
722 MT7915_BSS_UPDATE_MAX_SIZE);
723 if (IS_ERR(skb))
724 return PTR_ERR(skb);
725
726 /* bss_omac must be first */
727 if (enable)
728 mt76_connac_mcu_bss_omac_tlv(skb, vif);
729
730 mt76_connac_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76,
731 mvif->sta.wcid.idx, enable);
732
733 if (vif->type == NL80211_IFTYPE_MONITOR)
734 goto out;
735
736 if (enable) {
737 mt7915_mcu_bss_rfch_tlv(skb, vif, phy);
738 mt7915_mcu_bss_bmc_tlv(skb, phy);
739 mt7915_mcu_bss_ra_tlv(skb, vif, phy);
740 mt7915_mcu_bss_hw_amsdu_tlv(skb);
741
742 if (vif->bss_conf.he_support)
743 mt7915_mcu_bss_he_tlv(skb, vif, phy);
744
745 if (mvif->mt76.omac_idx >= EXT_BSSID_START &&
746 mvif->mt76.omac_idx < REPEATER_BSSID_START)
747 mt76_connac_mcu_bss_ext_tlv(skb, &mvif->mt76);
748 }
749 out:
750 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
751 MCU_EXT_CMD(BSS_INFO_UPDATE), true);
752 }
753
754 /** starec & wtbl **/
mt7915_mcu_add_tx_ba(struct mt7915_dev * dev,struct ieee80211_ampdu_params * params,bool enable)755 int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev,
756 struct ieee80211_ampdu_params *params,
757 bool enable)
758 {
759 struct mt7915_sta *msta = (struct mt7915_sta *)params->sta->drv_priv;
760 struct mt7915_vif *mvif = msta->vif;
761 int ret;
762
763 mt76_worker_disable(&dev->mt76.tx_worker);
764 if (enable && !params->amsdu)
765 msta->wcid.amsdu = false;
766 ret = mt76_connac_mcu_sta_ba(&dev->mt76, &mvif->mt76, params,
767 MCU_EXT_CMD(STA_REC_UPDATE),
768 enable, true);
769 mt76_worker_enable(&dev->mt76.tx_worker);
770
771 return ret;
772 }
773
mt7915_mcu_add_rx_ba(struct mt7915_dev * dev,struct ieee80211_ampdu_params * params,bool enable)774 int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev,
775 struct ieee80211_ampdu_params *params,
776 bool enable)
777 {
778 struct mt7915_sta *msta = (struct mt7915_sta *)params->sta->drv_priv;
779 struct mt7915_vif *mvif = msta->vif;
780
781 return mt76_connac_mcu_sta_ba(&dev->mt76, &mvif->mt76, params,
782 MCU_EXT_CMD(STA_REC_UPDATE),
783 enable, false);
784 }
785
786 static void
mt7915_mcu_sta_he_tlv(struct sk_buff * skb,struct ieee80211_sta * sta,struct ieee80211_vif * vif)787 mt7915_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta,
788 struct ieee80211_vif *vif)
789 {
790 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
791 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
792 struct ieee80211_he_mcs_nss_supp mcs_map;
793 struct sta_rec_he *he;
794 struct tlv *tlv;
795 u32 cap = 0;
796
797 if (!sta->deflink.he_cap.has_he)
798 return;
799
800 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE, sizeof(*he));
801
802 he = (struct sta_rec_he *)tlv;
803
804 if (elem->mac_cap_info[0] & IEEE80211_HE_MAC_CAP0_HTC_HE)
805 cap |= STA_REC_HE_CAP_HTC;
806
807 if (elem->mac_cap_info[2] & IEEE80211_HE_MAC_CAP2_BSR)
808 cap |= STA_REC_HE_CAP_BSR;
809
810 if (elem->mac_cap_info[3] & IEEE80211_HE_MAC_CAP3_OMI_CONTROL)
811 cap |= STA_REC_HE_CAP_OM;
812
813 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU)
814 cap |= STA_REC_HE_CAP_AMSDU_IN_AMPDU;
815
816 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_BQR)
817 cap |= STA_REC_HE_CAP_BQR;
818
819 if (elem->phy_cap_info[0] &
820 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G |
821 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G))
822 cap |= STA_REC_HE_CAP_BW20_RU242_SUPPORT;
823
824 if (mvif->cap.he_ldpc &&
825 (elem->phy_cap_info[1] &
826 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD))
827 cap |= STA_REC_HE_CAP_LDPC;
828
829 if (elem->phy_cap_info[1] &
830 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US)
831 cap |= STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI;
832
833 if (elem->phy_cap_info[2] &
834 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US)
835 cap |= STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI;
836
837 if (elem->phy_cap_info[2] &
838 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ)
839 cap |= STA_REC_HE_CAP_LE_EQ_80M_TX_STBC;
840
841 if (elem->phy_cap_info[2] &
842 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ)
843 cap |= STA_REC_HE_CAP_LE_EQ_80M_RX_STBC;
844
845 if (elem->phy_cap_info[6] &
846 IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB)
847 cap |= STA_REC_HE_CAP_TRIG_CQI_FK;
848
849 if (elem->phy_cap_info[6] &
850 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE)
851 cap |= STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE;
852
853 if (elem->phy_cap_info[7] &
854 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI)
855 cap |= STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI;
856
857 if (elem->phy_cap_info[7] &
858 IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ)
859 cap |= STA_REC_HE_CAP_GT_80M_TX_STBC;
860
861 if (elem->phy_cap_info[7] &
862 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ)
863 cap |= STA_REC_HE_CAP_GT_80M_RX_STBC;
864
865 if (elem->phy_cap_info[8] &
866 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI)
867 cap |= STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI;
868
869 if (elem->phy_cap_info[8] &
870 IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI)
871 cap |= STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI;
872
873 if (elem->phy_cap_info[9] &
874 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU)
875 cap |= STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242;
876
877 if (elem->phy_cap_info[9] &
878 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU)
879 cap |= STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242;
880
881 he->he_cap = cpu_to_le32(cap);
882
883 mcs_map = sta->deflink.he_cap.he_mcs_nss_supp;
884 switch (sta->deflink.bandwidth) {
885 case IEEE80211_STA_RX_BW_160:
886 if (elem->phy_cap_info[0] &
887 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)
888 mt7915_mcu_set_sta_he_mcs(sta,
889 &he->max_nss_mcs[CMD_HE_MCS_BW8080],
890 le16_to_cpu(mcs_map.rx_mcs_80p80));
891
892 mt7915_mcu_set_sta_he_mcs(sta,
893 &he->max_nss_mcs[CMD_HE_MCS_BW160],
894 le16_to_cpu(mcs_map.rx_mcs_160));
895 fallthrough;
896 default:
897 mt7915_mcu_set_sta_he_mcs(sta,
898 &he->max_nss_mcs[CMD_HE_MCS_BW80],
899 le16_to_cpu(mcs_map.rx_mcs_80));
900 break;
901 }
902
903 he->t_frame_dur =
904 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);
905 he->max_ampdu_exp =
906 HE_MAC(CAP3_MAX_AMPDU_LEN_EXP_MASK, elem->mac_cap_info[3]);
907
908 he->bw_set =
909 HE_PHY(CAP0_CHANNEL_WIDTH_SET_MASK, elem->phy_cap_info[0]);
910 he->device_class =
911 HE_PHY(CAP1_DEVICE_CLASS_A, elem->phy_cap_info[1]);
912 he->punc_pream_rx =
913 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);
914
915 he->dcm_tx_mode =
916 HE_PHY(CAP3_DCM_MAX_CONST_TX_MASK, elem->phy_cap_info[3]);
917 he->dcm_tx_max_nss =
918 HE_PHY(CAP3_DCM_MAX_TX_NSS_2, elem->phy_cap_info[3]);
919 he->dcm_rx_mode =
920 HE_PHY(CAP3_DCM_MAX_CONST_RX_MASK, elem->phy_cap_info[3]);
921 he->dcm_rx_max_nss =
922 HE_PHY(CAP3_DCM_MAX_RX_NSS_2, elem->phy_cap_info[3]);
923 he->dcm_max_ru =
924 HE_PHY(CAP8_DCM_MAX_RU_MASK, elem->phy_cap_info[8]);
925
926 he->pkt_ext = 2;
927 }
928
929 static void
mt7915_mcu_sta_muru_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_sta * sta,struct ieee80211_vif * vif)930 mt7915_mcu_sta_muru_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
931 struct ieee80211_sta *sta, struct ieee80211_vif *vif)
932 {
933 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
934 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
935 struct sta_rec_muru *muru;
936 struct tlv *tlv;
937
938 if (vif->type != NL80211_IFTYPE_STATION &&
939 vif->type != NL80211_IFTYPE_AP)
940 return;
941
942 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru));
943
944 muru = (struct sta_rec_muru *)tlv;
945
946 muru->cfg.mimo_dl_en = mvif->cap.he_mu_ebfer ||
947 mvif->cap.vht_mu_ebfer ||
948 mvif->cap.vht_mu_ebfee;
949 if (!is_mt7915(&dev->mt76))
950 muru->cfg.mimo_ul_en = true;
951 muru->cfg.ofdma_dl_en = true;
952
953 if (sta->deflink.vht_cap.vht_supported)
954 muru->mimo_dl.vht_mu_bfee =
955 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE);
956
957 if (!sta->deflink.he_cap.has_he)
958 return;
959
960 muru->mimo_dl.partial_bw_dl_mimo =
961 HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]);
962
963 muru->mimo_ul.full_ul_mimo =
964 HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]);
965 muru->mimo_ul.partial_ul_mimo =
966 HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]);
967
968 muru->ofdma_dl.punc_pream_rx =
969 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);
970 muru->ofdma_dl.he_20m_in_40m_2g =
971 HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]);
972 muru->ofdma_dl.he_20m_in_160m =
973 HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
974 muru->ofdma_dl.he_80m_in_160m =
975 HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
976
977 muru->ofdma_ul.t_frame_dur =
978 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);
979 muru->ofdma_ul.mu_cascading =
980 HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]);
981 muru->ofdma_ul.uo_ra =
982 HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]);
983 muru->ofdma_ul.rx_ctrl_frame_to_mbss =
984 HE_MAC(CAP3_RX_CTRL_FRAME_TO_MULTIBSS, elem->mac_cap_info[3]);
985 }
986
987 static void
mt7915_mcu_sta_ht_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)988 mt7915_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
989 {
990 struct sta_rec_ht *ht;
991 struct tlv *tlv;
992
993 if (!sta->deflink.ht_cap.ht_supported)
994 return;
995
996 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht));
997
998 ht = (struct sta_rec_ht *)tlv;
999 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap);
1000 }
1001
1002 static void
mt7915_mcu_sta_vht_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)1003 mt7915_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
1004 {
1005 struct sta_rec_vht *vht;
1006 struct tlv *tlv;
1007
1008 if (!sta->deflink.vht_cap.vht_supported)
1009 return;
1010
1011 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht));
1012
1013 vht = (struct sta_rec_vht *)tlv;
1014 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap);
1015 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map;
1016 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map;
1017 }
1018
1019 static void
mt7915_mcu_sta_amsdu_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1020 mt7915_mcu_sta_amsdu_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
1021 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1022 {
1023 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
1024 struct sta_rec_amsdu *amsdu;
1025 struct tlv *tlv;
1026
1027 if (vif->type != NL80211_IFTYPE_STATION &&
1028 vif->type != NL80211_IFTYPE_AP)
1029 return;
1030
1031 if (!sta->deflink.agg.max_amsdu_len)
1032 return;
1033
1034 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu));
1035 amsdu = (struct sta_rec_amsdu *)tlv;
1036 amsdu->max_amsdu_num = 8;
1037 amsdu->amsdu_en = true;
1038 msta->wcid.amsdu = true;
1039
1040 switch (sta->deflink.agg.max_amsdu_len) {
1041 case IEEE80211_MAX_MPDU_LEN_VHT_11454:
1042 if (!is_mt7915(&dev->mt76)) {
1043 amsdu->max_mpdu_size =
1044 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
1045 return;
1046 }
1047 fallthrough;
1048 case IEEE80211_MAX_MPDU_LEN_HT_7935:
1049 case IEEE80211_MAX_MPDU_LEN_VHT_7991:
1050 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
1051 return;
1052 default:
1053 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
1054 return;
1055 }
1056 }
1057
1058 static int
mt7915_mcu_sta_wtbl_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1059 mt7915_mcu_sta_wtbl_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
1060 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1061 {
1062 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1063 struct mt7915_sta *msta;
1064 struct wtbl_req_hdr *wtbl_hdr;
1065 struct mt76_wcid *wcid;
1066 struct tlv *tlv;
1067
1068 msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta;
1069 wcid = sta ? &msta->wcid : NULL;
1070
1071 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, sizeof(struct tlv));
1072 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid,
1073 WTBL_RESET_AND_SET, tlv,
1074 &skb);
1075 if (IS_ERR(wtbl_hdr))
1076 return PTR_ERR(wtbl_hdr);
1077
1078 mt76_connac_mcu_wtbl_generic_tlv(&dev->mt76, skb, vif, sta, tlv,
1079 wtbl_hdr);
1080 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, tlv, wtbl_hdr);
1081 if (sta)
1082 mt76_connac_mcu_wtbl_ht_tlv(&dev->mt76, skb, sta, tlv,
1083 wtbl_hdr, mvif->cap.ht_ldpc,
1084 mvif->cap.vht_ldpc);
1085
1086 return 0;
1087 }
1088
1089 static inline bool
mt7915_is_ebf_supported(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_sta * sta,bool bfee)1090 mt7915_is_ebf_supported(struct mt7915_phy *phy, struct ieee80211_vif *vif,
1091 struct ieee80211_sta *sta, bool bfee)
1092 {
1093 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1094 int sts = hweight16(phy->mt76->chainmask);
1095
1096 if (vif->type != NL80211_IFTYPE_STATION &&
1097 vif->type != NL80211_IFTYPE_AP)
1098 return false;
1099
1100 if (!bfee && sts < 2)
1101 return false;
1102
1103 if (sta->deflink.he_cap.has_he) {
1104 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem;
1105
1106 if (bfee)
1107 return mvif->cap.he_su_ebfee &&
1108 HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]);
1109 else
1110 return mvif->cap.he_su_ebfer &&
1111 HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]);
1112 }
1113
1114 if (sta->deflink.vht_cap.vht_supported) {
1115 u32 cap = sta->deflink.vht_cap.cap;
1116
1117 if (bfee)
1118 return mvif->cap.vht_su_ebfee &&
1119 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE);
1120 else
1121 return mvif->cap.vht_su_ebfer &&
1122 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE);
1123 }
1124
1125 return false;
1126 }
1127
1128 static void
mt7915_mcu_sta_sounding_rate(struct sta_rec_bf * bf)1129 mt7915_mcu_sta_sounding_rate(struct sta_rec_bf *bf)
1130 {
1131 bf->sounding_phy = MT_PHY_TYPE_OFDM;
1132 bf->ndp_rate = 0; /* mcs0 */
1133 bf->ndpa_rate = MT7915_CFEND_RATE_DEFAULT; /* ofdm 24m */
1134 bf->rept_poll_rate = MT7915_CFEND_RATE_DEFAULT; /* ofdm 24m */
1135 }
1136
1137 static void
mt7915_mcu_sta_bfer_ht(struct ieee80211_sta * sta,struct mt7915_phy * phy,struct sta_rec_bf * bf)1138 mt7915_mcu_sta_bfer_ht(struct ieee80211_sta *sta, struct mt7915_phy *phy,
1139 struct sta_rec_bf *bf)
1140 {
1141 struct ieee80211_mcs_info *mcs = &sta->deflink.ht_cap.mcs;
1142 u8 n = 0;
1143
1144 bf->tx_mode = MT_PHY_TYPE_HT;
1145
1146 if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) &&
1147 (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED))
1148 n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK,
1149 mcs->tx_params);
1150 else if (mcs->rx_mask[3])
1151 n = 3;
1152 else if (mcs->rx_mask[2])
1153 n = 2;
1154 else if (mcs->rx_mask[1])
1155 n = 1;
1156
1157 bf->nrow = hweight8(phy->mt76->chainmask) - 1;
1158 bf->ncol = min_t(u8, bf->nrow, n);
1159 bf->ibf_ncol = n;
1160 }
1161
1162 static void
mt7915_mcu_sta_bfer_vht(struct ieee80211_sta * sta,struct mt7915_phy * phy,struct sta_rec_bf * bf,bool explicit)1163 mt7915_mcu_sta_bfer_vht(struct ieee80211_sta *sta, struct mt7915_phy *phy,
1164 struct sta_rec_bf *bf, bool explicit)
1165 {
1166 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap;
1167 struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap;
1168 u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map);
1169 u8 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);
1170 u8 tx_ant = hweight8(phy->mt76->chainmask) - 1;
1171
1172 bf->tx_mode = MT_PHY_TYPE_VHT;
1173
1174 if (explicit) {
1175 u8 sts, snd_dim;
1176
1177 mt7915_mcu_sta_sounding_rate(bf);
1178
1179 sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK,
1180 pc->cap);
1181 snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
1182 vc->cap);
1183 bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant);
1184 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1185 bf->ibf_ncol = bf->ncol;
1186
1187 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
1188 bf->nrow = 1;
1189 } else {
1190 bf->nrow = tx_ant;
1191 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1192 bf->ibf_ncol = nss_mcs;
1193
1194 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
1195 bf->ibf_nrow = 1;
1196 }
1197 }
1198
1199 static void
mt7915_mcu_sta_bfer_he(struct ieee80211_sta * sta,const struct ieee80211_sta_he_cap * vc,struct sta_rec_bf * bf)1200 mt7915_mcu_sta_bfer_he(struct ieee80211_sta *sta,
1201 const struct ieee80211_sta_he_cap *vc,
1202 struct sta_rec_bf *bf)
1203 {
1204 struct ieee80211_sta_he_cap *pc = &sta->deflink.he_cap;
1205 struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem;
1206 const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem;
1207 u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80);
1208 u8 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);
1209 u8 snd_dim, sts;
1210
1211 bf->tx_mode = MT_PHY_TYPE_HE_SU;
1212
1213 mt7915_mcu_sta_sounding_rate(bf);
1214
1215 bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB,
1216 pe->phy_cap_info[6]);
1217 bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB,
1218 pe->phy_cap_info[6]);
1219 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
1220 ve->phy_cap_info[5]);
1221 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK,
1222 pe->phy_cap_info[4]);
1223 bf->nrow = min_t(u8, snd_dim, sts);
1224 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1225 bf->ibf_ncol = bf->ncol;
1226
1227 if (sta->deflink.bandwidth != IEEE80211_STA_RX_BW_160)
1228 return;
1229
1230 /* go over for 160MHz and 80p80 */
1231 if (pe->phy_cap_info[0] &
1232 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) {
1233 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160);
1234 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);
1235
1236 bf->ncol_gt_bw80 = nss_mcs;
1237 }
1238
1239 if (pe->phy_cap_info[0] &
1240 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) {
1241 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80);
1242 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);
1243
1244 if (bf->ncol_gt_bw80)
1245 bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs);
1246 else
1247 bf->ncol_gt_bw80 = nss_mcs;
1248 }
1249
1250 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,
1251 ve->phy_cap_info[5]);
1252 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK,
1253 pe->phy_cap_info[4]);
1254
1255 bf->nrow_gt_bw80 = min_t(int, snd_dim, sts);
1256 }
1257
1258 static void
mt7915_mcu_sta_bfer_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1259 mt7915_mcu_sta_bfer_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
1260 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1261 {
1262 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1263 struct mt7915_phy *phy = mvif->phy;
1264 const struct ieee80211_sta_he_cap *vc = NULL;
1265 int tx_ant = hweight8(phy->mt76->chainmask) - 1;
1266 struct sta_rec_bf *bf;
1267 struct tlv *tlv;
1268 static const u8 matrix[4][4] = {
1269 {0, 0, 0, 0},
1270 {1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */
1271 {2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */
1272 {3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */
1273 };
1274 bool ebf;
1275
1276 if (!(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he))
1277 return;
1278
1279 ebf = mt7915_is_ebf_supported(phy, vif, sta, false);
1280 if (!ebf && !dev->ibf)
1281 return;
1282
1283 if (sta->deflink.he_cap.has_he && ebf) {
1284 vc = mt76_connac_get_he_phy_cap(phy->mt76, vif);
1285 if (!vc)
1286 return;
1287 }
1288
1289 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf));
1290 bf = (struct sta_rec_bf *)tlv;
1291
1292 /* he: eBF only, in accordance with spec
1293 * vht: support eBF and iBF
1294 * ht: iBF only, since mac80211 lacks of eBF support
1295 */
1296 if (sta->deflink.he_cap.has_he && ebf)
1297 mt7915_mcu_sta_bfer_he(sta, vc, bf);
1298 else if (sta->deflink.vht_cap.vht_supported)
1299 mt7915_mcu_sta_bfer_vht(sta, phy, bf, ebf);
1300 else if (sta->deflink.ht_cap.ht_supported)
1301 mt7915_mcu_sta_bfer_ht(sta, phy, bf);
1302 else
1303 return;
1304
1305 bf->bf_cap = ebf ? ebf : dev->ibf << 1;
1306 bf->bw = sta->deflink.bandwidth;
1307 bf->ibf_dbw = sta->deflink.bandwidth;
1308 bf->ibf_nrow = tx_ant;
1309
1310 if (!ebf && sta->deflink.bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol)
1311 bf->ibf_timeout = 0x48;
1312 else
1313 bf->ibf_timeout = 0x18;
1314
1315 if (ebf && bf->nrow != tx_ant)
1316 bf->mem_20m = matrix[tx_ant][bf->ncol];
1317 else
1318 bf->mem_20m = matrix[bf->nrow][bf->ncol];
1319
1320 switch (sta->deflink.bandwidth) {
1321 case IEEE80211_STA_RX_BW_160:
1322 case IEEE80211_STA_RX_BW_80:
1323 bf->mem_total = bf->mem_20m * 2;
1324 break;
1325 case IEEE80211_STA_RX_BW_40:
1326 bf->mem_total = bf->mem_20m;
1327 break;
1328 case IEEE80211_STA_RX_BW_20:
1329 default:
1330 break;
1331 }
1332 }
1333
1334 static void
mt7915_mcu_sta_bfee_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1335 mt7915_mcu_sta_bfee_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
1336 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1337 {
1338 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1339 struct mt7915_phy *phy = mvif->phy;
1340 int tx_ant = hweight8(phy->mt76->chainmask) - 1;
1341 struct sta_rec_bfee *bfee;
1342 struct tlv *tlv;
1343 u8 nrow = 0;
1344
1345 if (!(sta->deflink.vht_cap.vht_supported || sta->deflink.he_cap.has_he))
1346 return;
1347
1348 if (!mt7915_is_ebf_supported(phy, vif, sta, true))
1349 return;
1350
1351 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee));
1352 bfee = (struct sta_rec_bfee *)tlv;
1353
1354 if (sta->deflink.he_cap.has_he) {
1355 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem;
1356
1357 nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
1358 pe->phy_cap_info[5]);
1359 } else if (sta->deflink.vht_cap.vht_supported) {
1360 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap;
1361
1362 nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
1363 pc->cap);
1364 }
1365
1366 /* reply with identity matrix to avoid 2x2 BF negative gain */
1367 bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2);
1368 }
1369
1370 static enum mcu_mmps_mode
mt7915_mcu_get_mmps_mode(enum ieee80211_smps_mode smps)1371 mt7915_mcu_get_mmps_mode(enum ieee80211_smps_mode smps)
1372 {
1373 switch (smps) {
1374 case IEEE80211_SMPS_OFF:
1375 return MCU_MMPS_DISABLE;
1376 case IEEE80211_SMPS_STATIC:
1377 return MCU_MMPS_STATIC;
1378 case IEEE80211_SMPS_DYNAMIC:
1379 return MCU_MMPS_DYNAMIC;
1380 default:
1381 return MCU_MMPS_DISABLE;
1382 }
1383 }
1384
mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,void * data,u32 field)1385 int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev,
1386 struct ieee80211_vif *vif,
1387 struct ieee80211_sta *sta,
1388 void *data, u32 field)
1389 {
1390 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1391 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
1392 struct sta_phy *phy = data;
1393 struct sta_rec_ra_fixed *ra;
1394 struct sk_buff *skb;
1395 struct tlv *tlv;
1396
1397 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1398 &msta->wcid);
1399 if (IS_ERR(skb))
1400 return PTR_ERR(skb);
1401
1402 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra));
1403 ra = (struct sta_rec_ra_fixed *)tlv;
1404
1405 switch (field) {
1406 case RATE_PARAM_AUTO:
1407 break;
1408 case RATE_PARAM_FIXED:
1409 case RATE_PARAM_FIXED_MCS:
1410 case RATE_PARAM_FIXED_GI:
1411 case RATE_PARAM_FIXED_HE_LTF:
1412 if (phy)
1413 ra->phy = *phy;
1414 break;
1415 case RATE_PARAM_MMPS_UPDATE:
1416 ra->mmps_mode = mt7915_mcu_get_mmps_mode(sta->deflink.smps_mode);
1417 break;
1418 case RATE_PARAM_SPE_UPDATE:
1419 ra->spe_idx = *(u8 *)data;
1420 break;
1421 default:
1422 break;
1423 }
1424 ra->field = cpu_to_le32(field);
1425
1426 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1427 MCU_EXT_CMD(STA_REC_UPDATE), true);
1428 }
1429
mt7915_mcu_add_smps(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1430 int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1431 struct ieee80211_sta *sta)
1432 {
1433 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1434 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
1435 struct wtbl_req_hdr *wtbl_hdr;
1436 struct tlv *sta_wtbl;
1437 struct sk_buff *skb;
1438 int ret;
1439
1440 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1441 &msta->wcid);
1442 if (IS_ERR(skb))
1443 return PTR_ERR(skb);
1444
1445 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL,
1446 sizeof(struct tlv));
1447 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid,
1448 WTBL_SET, sta_wtbl, &skb);
1449 if (IS_ERR(wtbl_hdr))
1450 return PTR_ERR(wtbl_hdr);
1451
1452 mt76_connac_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_hdr);
1453
1454 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
1455 MCU_EXT_CMD(STA_REC_UPDATE), true);
1456 if (ret)
1457 return ret;
1458
1459 return mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, NULL,
1460 RATE_PARAM_MMPS_UPDATE);
1461 }
1462
1463 static int
mt7915_mcu_set_spe_idx(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1464 mt7915_mcu_set_spe_idx(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1465 struct ieee80211_sta *sta)
1466 {
1467 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1468 struct mt76_phy *mphy = mvif->phy->mt76;
1469 u8 spe_idx = mt76_connac_spe_idx(mphy->antenna_mask);
1470
1471 return mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &spe_idx,
1472 RATE_PARAM_SPE_UPDATE);
1473 }
1474
1475 static int
mt7915_mcu_add_rate_ctrl_fixed(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1476 mt7915_mcu_add_rate_ctrl_fixed(struct mt7915_dev *dev,
1477 struct ieee80211_vif *vif,
1478 struct ieee80211_sta *sta)
1479 {
1480 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1481 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef;
1482 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask;
1483 enum nl80211_band band = chandef->chan->band;
1484 struct sta_phy phy = {};
1485 int ret, nrates = 0;
1486
1487 #define __sta_phy_bitrate_mask_check(_mcs, _gi, _ht, _he) \
1488 do { \
1489 u8 i, gi = mask->control[band]._gi; \
1490 gi = (_he) ? gi : gi == NL80211_TXRATE_FORCE_SGI; \
1491 for (i = 0; i <= sta->deflink.bandwidth; i++) { \
1492 phy.sgi |= gi << (i << (_he)); \
1493 phy.he_ltf |= mask->control[band].he_ltf << (i << (_he));\
1494 } \
1495 for (i = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \
1496 if (!mask->control[band]._mcs[i]) \
1497 continue; \
1498 nrates += hweight16(mask->control[band]._mcs[i]); \
1499 phy.mcs = ffs(mask->control[band]._mcs[i]) - 1; \
1500 if (_ht) \
1501 phy.mcs += 8 * i; \
1502 } \
1503 } while (0)
1504
1505 if (sta->deflink.he_cap.has_he) {
1506 __sta_phy_bitrate_mask_check(he_mcs, he_gi, 0, 1);
1507 } else if (sta->deflink.vht_cap.vht_supported) {
1508 __sta_phy_bitrate_mask_check(vht_mcs, gi, 0, 0);
1509 } else if (sta->deflink.ht_cap.ht_supported) {
1510 __sta_phy_bitrate_mask_check(ht_mcs, gi, 1, 0);
1511 } else {
1512 nrates = hweight32(mask->control[band].legacy);
1513 phy.mcs = ffs(mask->control[band].legacy) - 1;
1514 }
1515 #undef __sta_phy_bitrate_mask_check
1516
1517 /* fall back to auto rate control */
1518 if (mask->control[band].gi == NL80211_TXRATE_DEFAULT_GI &&
1519 mask->control[band].he_gi == GENMASK(7, 0) &&
1520 mask->control[band].he_ltf == GENMASK(7, 0) &&
1521 nrates != 1)
1522 return 0;
1523
1524 /* fixed single rate */
1525 if (nrates == 1) {
1526 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy,
1527 RATE_PARAM_FIXED_MCS);
1528 if (ret)
1529 return ret;
1530 }
1531
1532 /* fixed GI */
1533 if (mask->control[band].gi != NL80211_TXRATE_DEFAULT_GI ||
1534 mask->control[band].he_gi != GENMASK(7, 0)) {
1535 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
1536 u32 addr;
1537
1538 /* firmware updates only TXCMD but doesn't take WTBL into
1539 * account, so driver should update here to reflect the
1540 * actual txrate hardware sends out.
1541 */
1542 addr = mt7915_mac_wtbl_lmac_addr(dev, msta->wcid.idx, 7);
1543 if (sta->deflink.he_cap.has_he)
1544 mt76_rmw_field(dev, addr, GENMASK(31, 24), phy.sgi);
1545 else
1546 mt76_rmw_field(dev, addr, GENMASK(15, 12), phy.sgi);
1547
1548 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy,
1549 RATE_PARAM_FIXED_GI);
1550 if (ret)
1551 return ret;
1552 }
1553
1554 /* fixed HE_LTF */
1555 if (mask->control[band].he_ltf != GENMASK(7, 0)) {
1556 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy,
1557 RATE_PARAM_FIXED_HE_LTF);
1558 if (ret)
1559 return ret;
1560 }
1561
1562 return mt7915_mcu_set_spe_idx(dev, vif, sta);
1563 }
1564
1565 static void
mt7915_mcu_sta_rate_ctrl_tlv(struct sk_buff * skb,struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1566 mt7915_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7915_dev *dev,
1567 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1568 {
1569 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1570 struct mt76_phy *mphy = mvif->phy->mt76;
1571 struct cfg80211_chan_def *chandef = &mphy->chandef;
1572 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask;
1573 enum nl80211_band band = chandef->chan->band;
1574 struct sta_rec_ra *ra;
1575 struct tlv *tlv;
1576 u32 supp_rate = sta->deflink.supp_rates[band];
1577 u32 cap = sta->wme ? STA_CAP_WMM : 0;
1578
1579 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra));
1580 ra = (struct sta_rec_ra *)tlv;
1581
1582 ra->valid = true;
1583 ra->auto_rate = true;
1584 ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, &sta->deflink);
1585 ra->channel = chandef->chan->hw_value;
1586 ra->bw = sta->deflink.bandwidth;
1587 ra->phy.bw = sta->deflink.bandwidth;
1588 ra->mmps_mode = mt7915_mcu_get_mmps_mode(sta->deflink.smps_mode);
1589
1590 if (supp_rate) {
1591 supp_rate &= mask->control[band].legacy;
1592 ra->rate_len = hweight32(supp_rate);
1593
1594 if (band == NL80211_BAND_2GHZ) {
1595 ra->supp_mode = MODE_CCK;
1596 ra->supp_cck_rate = supp_rate & GENMASK(3, 0);
1597
1598 if (ra->rate_len > 4) {
1599 ra->supp_mode |= MODE_OFDM;
1600 ra->supp_ofdm_rate = supp_rate >> 4;
1601 }
1602 } else {
1603 ra->supp_mode = MODE_OFDM;
1604 ra->supp_ofdm_rate = supp_rate;
1605 }
1606 }
1607
1608 if (sta->deflink.ht_cap.ht_supported) {
1609 ra->supp_mode |= MODE_HT;
1610 ra->af = sta->deflink.ht_cap.ampdu_factor;
1611 ra->ht_gf = !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD);
1612
1613 cap |= STA_CAP_HT;
1614 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20)
1615 cap |= STA_CAP_SGI_20;
1616 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
1617 cap |= STA_CAP_SGI_40;
1618 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_TX_STBC)
1619 cap |= STA_CAP_TX_STBC;
1620 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
1621 cap |= STA_CAP_RX_STBC;
1622 if (mvif->cap.ht_ldpc &&
1623 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING))
1624 cap |= STA_CAP_LDPC;
1625
1626 mt7915_mcu_set_sta_ht_mcs(sta, ra->ht_mcs,
1627 mask->control[band].ht_mcs);
1628 ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs;
1629 }
1630
1631 if (sta->deflink.vht_cap.vht_supported) {
1632 u8 af;
1633
1634 ra->supp_mode |= MODE_VHT;
1635 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK,
1636 sta->deflink.vht_cap.cap);
1637 ra->af = max_t(u8, ra->af, af);
1638
1639 cap |= STA_CAP_VHT;
1640 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
1641 cap |= STA_CAP_VHT_SGI_80;
1642 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160)
1643 cap |= STA_CAP_VHT_SGI_160;
1644 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC)
1645 cap |= STA_CAP_VHT_TX_STBC;
1646 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK)
1647 cap |= STA_CAP_VHT_RX_STBC;
1648 if (mvif->cap.vht_ldpc &&
1649 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC))
1650 cap |= STA_CAP_VHT_LDPC;
1651
1652 mt7915_mcu_set_sta_vht_mcs(sta, ra->supp_vht_mcs,
1653 mask->control[band].vht_mcs);
1654 }
1655
1656 if (sta->deflink.he_cap.has_he) {
1657 ra->supp_mode |= MODE_HE;
1658 cap |= STA_CAP_HE;
1659
1660 if (sta->deflink.he_6ghz_capa.capa)
1661 ra->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa,
1662 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP);
1663 }
1664
1665 ra->sta_cap = cpu_to_le32(cap);
1666 }
1667
mt7915_mcu_add_rate_ctrl(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,bool changed)1668 int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1669 struct ieee80211_sta *sta, bool changed)
1670 {
1671 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1672 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
1673 struct sk_buff *skb;
1674 int ret;
1675
1676 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1677 &msta->wcid);
1678 if (IS_ERR(skb))
1679 return PTR_ERR(skb);
1680
1681 /* firmware rc algorithm refers to sta_rec_he for HE control.
1682 * once dev->rc_work changes the settings driver should also
1683 * update sta_rec_he here.
1684 */
1685 if (changed)
1686 mt7915_mcu_sta_he_tlv(skb, sta, vif);
1687
1688 /* sta_rec_ra accommodates BW, NSS and only MCS range format
1689 * i.e 0-{7,8,9} for VHT.
1690 */
1691 mt7915_mcu_sta_rate_ctrl_tlv(skb, dev, vif, sta);
1692
1693 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
1694 MCU_EXT_CMD(STA_REC_UPDATE), true);
1695 if (ret)
1696 return ret;
1697
1698 /* sta_rec_ra_fixed accommodates single rate, (HE)GI and HE_LTE,
1699 * and updates as peer fixed rate parameters, which overrides
1700 * sta_rec_ra and firmware rate control algorithm.
1701 */
1702 return mt7915_mcu_add_rate_ctrl_fixed(dev, vif, sta);
1703 }
1704
1705 static int
mt7915_mcu_add_group(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1706 mt7915_mcu_add_group(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1707 struct ieee80211_sta *sta)
1708 {
1709 #define MT_STA_BSS_GROUP 1
1710 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1711 struct mt7915_sta *msta;
1712 struct {
1713 __le32 action;
1714 u8 wlan_idx_lo;
1715 u8 status;
1716 u8 wlan_idx_hi;
1717 u8 rsv0[5];
1718 __le32 val;
1719 u8 rsv1[8];
1720 } __packed req = {
1721 .action = cpu_to_le32(MT_STA_BSS_GROUP),
1722 .val = cpu_to_le32(mvif->mt76.idx % 16),
1723 };
1724
1725 msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta;
1726 req.wlan_idx_lo = to_wcid_lo(msta->wcid.idx);
1727 req.wlan_idx_hi = to_wcid_hi(msta->wcid.idx);
1728
1729 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_DRR_CTRL), &req,
1730 sizeof(req), true);
1731 }
1732
mt7915_mcu_add_sta(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,int conn_state,bool newly)1733 int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1734 struct ieee80211_sta *sta, int conn_state, bool newly)
1735 {
1736 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1737 struct ieee80211_link_sta *link_sta;
1738 struct mt7915_sta *msta;
1739 struct sk_buff *skb;
1740 int ret;
1741
1742 msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta;
1743 link_sta = sta ? &sta->deflink : NULL;
1744
1745 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1746 &msta->wcid);
1747 if (IS_ERR(skb))
1748 return PTR_ERR(skb);
1749
1750 /* starec basic */
1751 mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, &vif->bss_conf, link_sta,
1752 conn_state, newly);
1753 /* tag order is in accordance with firmware dependency. */
1754 if (sta && conn_state != CONN_STATE_DISCONNECT) {
1755 /* starec bfer */
1756 mt7915_mcu_sta_bfer_tlv(dev, skb, vif, sta);
1757 /* starec ht */
1758 mt7915_mcu_sta_ht_tlv(skb, sta);
1759 /* starec vht */
1760 mt7915_mcu_sta_vht_tlv(skb, sta);
1761 /* starec uapsd */
1762 mt76_connac_mcu_sta_uapsd(skb, vif, sta);
1763 }
1764
1765 if (newly || conn_state != CONN_STATE_DISCONNECT) {
1766 ret = mt7915_mcu_sta_wtbl_tlv(dev, skb, vif, sta);
1767 if (ret) {
1768 dev_kfree_skb(skb);
1769 return ret;
1770 }
1771 }
1772
1773 if (conn_state == CONN_STATE_DISCONNECT)
1774 goto out;
1775
1776 if (sta) {
1777 /* starec amsdu */
1778 mt7915_mcu_sta_amsdu_tlv(dev, skb, vif, sta);
1779 /* starec he */
1780 mt7915_mcu_sta_he_tlv(skb, sta, vif);
1781 /* starec muru */
1782 mt7915_mcu_sta_muru_tlv(dev, skb, sta, vif);
1783 /* starec bfee */
1784 mt7915_mcu_sta_bfee_tlv(dev, skb, vif, sta);
1785 }
1786
1787 ret = mt7915_mcu_add_group(dev, vif, sta);
1788 if (ret) {
1789 dev_kfree_skb(skb);
1790 return ret;
1791 }
1792 out:
1793 ret = mt76_connac_mcu_sta_wed_update(&dev->mt76, skb);
1794 if (ret) {
1795 dev_kfree_skb(skb);
1796 return ret;
1797 }
1798
1799 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1800 MCU_EXT_CMD(STA_REC_UPDATE), true);
1801 }
1802
mt7915_mcu_wed_enable_rx_stats(struct mt7915_dev * dev)1803 int mt7915_mcu_wed_enable_rx_stats(struct mt7915_dev *dev)
1804 {
1805 #ifdef CONFIG_NET_MEDIATEK_SOC_WED
1806 struct mtk_wed_device *wed = &dev->mt76.mmio.wed;
1807 struct {
1808 __le32 args[2];
1809 } req = {
1810 .args[0] = cpu_to_le32(1),
1811 .args[1] = cpu_to_le32(6),
1812 };
1813
1814 return mtk_wed_device_update_msg(wed, MTK_WED_WO_CMD_RXCNT_CTRL,
1815 &req, sizeof(req));
1816 #else
1817 return 0;
1818 #endif
1819 }
1820
mt7915_mcu_add_dev_info(struct mt7915_phy * phy,struct ieee80211_vif * vif,bool enable)1821 int mt7915_mcu_add_dev_info(struct mt7915_phy *phy,
1822 struct ieee80211_vif *vif, bool enable)
1823 {
1824 struct mt7915_dev *dev = phy->dev;
1825 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1826 struct {
1827 struct req_hdr {
1828 u8 omac_idx;
1829 u8 band_idx;
1830 __le16 tlv_num;
1831 u8 is_tlv_append;
1832 u8 rsv[3];
1833 } __packed hdr;
1834 struct req_tlv {
1835 __le16 tag;
1836 __le16 len;
1837 u8 active;
1838 u8 band_idx;
1839 u8 omac_addr[ETH_ALEN];
1840 } __packed tlv;
1841 } data = {
1842 .hdr = {
1843 .omac_idx = mvif->mt76.omac_idx,
1844 .band_idx = mvif->mt76.band_idx,
1845 .tlv_num = cpu_to_le16(1),
1846 .is_tlv_append = 1,
1847 },
1848 .tlv = {
1849 .tag = cpu_to_le16(DEV_INFO_ACTIVE),
1850 .len = cpu_to_le16(sizeof(struct req_tlv)),
1851 .active = enable,
1852 .band_idx = mvif->mt76.band_idx,
1853 },
1854 };
1855
1856 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START)
1857 return mt7915_mcu_muar_config(phy, vif, false, enable);
1858
1859 memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN);
1860 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(DEV_INFO_UPDATE),
1861 &data, sizeof(data), true);
1862 }
1863
1864 static void
mt7915_mcu_beacon_cntdwn(struct ieee80211_vif * vif,struct sk_buff * rskb,struct sk_buff * skb,struct bss_info_bcn * bcn,struct ieee80211_mutable_offsets * offs)1865 mt7915_mcu_beacon_cntdwn(struct ieee80211_vif *vif, struct sk_buff *rskb,
1866 struct sk_buff *skb, struct bss_info_bcn *bcn,
1867 struct ieee80211_mutable_offsets *offs)
1868 {
1869 struct bss_info_bcn_cntdwn *info;
1870 struct tlv *tlv;
1871 int sub_tag;
1872
1873 if (!offs->cntdwn_counter_offs[0])
1874 return;
1875
1876 sub_tag = vif->bss_conf.csa_active ? BSS_INFO_BCN_CSA : BSS_INFO_BCN_BCC;
1877 tlv = mt7915_mcu_add_nested_subtlv(rskb, sub_tag, sizeof(*info),
1878 &bcn->sub_ntlv, &bcn->len);
1879 info = (struct bss_info_bcn_cntdwn *)tlv;
1880 info->cnt = skb->data[offs->cntdwn_counter_offs[0]];
1881 }
1882
1883 static void
mt7915_mcu_beacon_mbss(struct sk_buff * rskb,struct sk_buff * skb,struct ieee80211_vif * vif,struct bss_info_bcn * bcn,struct ieee80211_mutable_offsets * offs)1884 mt7915_mcu_beacon_mbss(struct sk_buff *rskb, struct sk_buff *skb,
1885 struct ieee80211_vif *vif, struct bss_info_bcn *bcn,
1886 struct ieee80211_mutable_offsets *offs)
1887 {
1888 struct bss_info_bcn_mbss *mbss;
1889 const struct element *elem;
1890 struct tlv *tlv;
1891
1892 if (!vif->bss_conf.bssid_indicator)
1893 return;
1894
1895 tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_MBSSID,
1896 sizeof(*mbss), &bcn->sub_ntlv,
1897 &bcn->len);
1898
1899 mbss = (struct bss_info_bcn_mbss *)tlv;
1900 mbss->offset[0] = cpu_to_le16(offs->tim_offset);
1901 mbss->bitmap = cpu_to_le32(1);
1902
1903 for_each_element_id(elem, WLAN_EID_MULTIPLE_BSSID,
1904 &skb->data[offs->mbssid_off],
1905 skb->len - offs->mbssid_off) {
1906 const struct element *sub_elem;
1907
1908 if (elem->datalen < 2)
1909 continue;
1910
1911 for_each_element(sub_elem, elem->data + 1, elem->datalen - 1) {
1912 const struct ieee80211_bssid_index *idx;
1913 const u8 *idx_ie;
1914
1915 if (sub_elem->id || sub_elem->datalen < 4)
1916 continue; /* not a valid BSS profile */
1917
1918 /* Find WLAN_EID_MULTI_BSSID_IDX
1919 * in the merged nontransmitted profile
1920 */
1921 idx_ie = cfg80211_find_ie(WLAN_EID_MULTI_BSSID_IDX,
1922 sub_elem->data,
1923 sub_elem->datalen);
1924 if (!idx_ie || idx_ie[1] < sizeof(*idx))
1925 continue;
1926
1927 idx = (void *)(idx_ie + 2);
1928 if (!idx->bssid_index || idx->bssid_index > 31)
1929 continue;
1930
1931 mbss->offset[idx->bssid_index] =
1932 cpu_to_le16(idx_ie - skb->data);
1933 mbss->bitmap |= cpu_to_le32(BIT(idx->bssid_index));
1934 }
1935 }
1936 }
1937
1938 static void
mt7915_mcu_beacon_cont(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct sk_buff * rskb,struct sk_buff * skb,struct bss_info_bcn * bcn,struct ieee80211_mutable_offsets * offs)1939 mt7915_mcu_beacon_cont(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1940 struct sk_buff *rskb, struct sk_buff *skb,
1941 struct bss_info_bcn *bcn,
1942 struct ieee80211_mutable_offsets *offs)
1943 {
1944 struct mt76_wcid *wcid = &dev->mt76.global_wcid;
1945 struct bss_info_bcn_cont *cont;
1946 struct tlv *tlv;
1947 u8 *buf;
1948 int len = sizeof(*cont) + MT_TXD_SIZE + skb->len;
1949
1950 len = (len & 0x3) ? ((len | 0x3) + 1) : len;
1951 tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_CONTENT,
1952 len, &bcn->sub_ntlv, &bcn->len);
1953
1954 cont = (struct bss_info_bcn_cont *)tlv;
1955 cont->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
1956 cont->tim_ofs = cpu_to_le16(offs->tim_offset);
1957
1958 if (offs->cntdwn_counter_offs[0]) {
1959 u16 offset = offs->cntdwn_counter_offs[0];
1960
1961 if (vif->bss_conf.csa_active)
1962 cont->csa_ofs = cpu_to_le16(offset - 4);
1963 if (vif->bss_conf.color_change_active)
1964 cont->bcc_ofs = cpu_to_le16(offset - 3);
1965 }
1966
1967 buf = (u8 *)tlv + sizeof(*cont);
1968 mt7915_mac_write_txwi(&dev->mt76, (__le32 *)buf, skb, wcid, 0, NULL,
1969 0, BSS_CHANGED_BEACON);
1970 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len);
1971 }
1972
1973 int
mt7915_mcu_add_inband_discov(struct mt7915_dev * dev,struct ieee80211_vif * vif,u32 changed)1974 mt7915_mcu_add_inband_discov(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1975 u32 changed)
1976 {
1977 #define OFFLOAD_TX_MODE_SU BIT(0)
1978 #define OFFLOAD_TX_MODE_MU BIT(1)
1979 struct ieee80211_hw *hw = mt76_hw(dev);
1980 struct mt7915_phy *phy = mt7915_hw_phy(hw);
1981 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1982 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef;
1983 enum nl80211_band band = chandef->chan->band;
1984 struct mt76_wcid *wcid = &dev->mt76.global_wcid;
1985 struct bss_info_bcn *bcn;
1986 struct bss_info_inband_discovery *discov;
1987 struct ieee80211_tx_info *info;
1988 struct sk_buff *rskb, *skb = NULL;
1989 struct tlv *tlv, *sub_tlv;
1990 bool ext_phy = phy != &dev->phy;
1991 u8 *buf, interval;
1992 int len;
1993
1994 if (vif->bss_conf.nontransmitted)
1995 return 0;
1996
1997 rskb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, NULL,
1998 MT7915_MAX_BSS_OFFLOAD_SIZE);
1999 if (IS_ERR(rskb))
2000 return PTR_ERR(rskb);
2001
2002 tlv = mt76_connac_mcu_add_tlv(rskb, BSS_INFO_OFFLOAD, sizeof(*bcn));
2003 bcn = (struct bss_info_bcn *)tlv;
2004 bcn->enable = true;
2005
2006 if (changed & BSS_CHANGED_FILS_DISCOVERY) {
2007 interval = vif->bss_conf.fils_discovery.max_interval;
2008 skb = ieee80211_get_fils_discovery_tmpl(hw, vif, 0);
2009 } else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP &&
2010 vif->bss_conf.unsol_bcast_probe_resp_interval) {
2011 interval = vif->bss_conf.unsol_bcast_probe_resp_interval;
2012 skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif, 0);
2013 }
2014
2015 if (!skb) {
2016 dev_kfree_skb(rskb);
2017 return -EINVAL;
2018 }
2019
2020 info = IEEE80211_SKB_CB(skb);
2021 info->control.vif = vif;
2022 info->band = band;
2023 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, ext_phy);
2024
2025 len = sizeof(*discov) + MT_TXD_SIZE + skb->len;
2026 len = (len & 0x3) ? ((len | 0x3) + 1) : len;
2027
2028 if (skb->len > MT7915_MAX_BEACON_SIZE) {
2029 dev_err(dev->mt76.dev, "inband discovery size limit exceed\n");
2030 dev_kfree_skb(rskb);
2031 dev_kfree_skb(skb);
2032 return -EINVAL;
2033 }
2034
2035 sub_tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_DISCOV,
2036 len, &bcn->sub_ntlv, &bcn->len);
2037 discov = (struct bss_info_inband_discovery *)sub_tlv;
2038 discov->tx_mode = OFFLOAD_TX_MODE_SU;
2039 /* 0: UNSOL PROBE RESP, 1: FILS DISCOV */
2040 discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY);
2041 discov->tx_interval = interval;
2042 discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
2043 discov->enable = !!interval;
2044
2045 buf = (u8 *)sub_tlv + sizeof(*discov);
2046
2047 mt7915_mac_write_txwi(&dev->mt76, (__le32 *)buf, skb, wcid, 0, NULL,
2048 0, changed);
2049 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len);
2050
2051 dev_kfree_skb(skb);
2052
2053 return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb,
2054 MCU_EXT_CMD(BSS_INFO_UPDATE), true);
2055 }
2056
mt7915_mcu_add_beacon(struct ieee80211_hw * hw,struct ieee80211_vif * vif,int en,u32 changed)2057 int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2058 int en, u32 changed)
2059 {
2060 struct mt7915_dev *dev = mt7915_hw_dev(hw);
2061 struct mt7915_phy *phy = mt7915_hw_phy(hw);
2062 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
2063 struct ieee80211_mutable_offsets offs;
2064 struct ieee80211_tx_info *info;
2065 struct sk_buff *skb, *rskb;
2066 struct tlv *tlv;
2067 struct bss_info_bcn *bcn;
2068 int len = MT7915_MAX_BSS_OFFLOAD_SIZE;
2069 bool ext_phy = phy != &dev->phy;
2070
2071 if (vif->bss_conf.nontransmitted)
2072 return 0;
2073
2074 rskb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
2075 NULL, len);
2076 if (IS_ERR(rskb))
2077 return PTR_ERR(rskb);
2078
2079 tlv = mt76_connac_mcu_add_tlv(rskb, BSS_INFO_OFFLOAD, sizeof(*bcn));
2080 bcn = (struct bss_info_bcn *)tlv;
2081 bcn->enable = en;
2082
2083 if (!en)
2084 goto out;
2085
2086 skb = ieee80211_beacon_get_template(hw, vif, &offs, 0);
2087 if (!skb) {
2088 dev_kfree_skb(rskb);
2089 return -EINVAL;
2090 }
2091
2092 if (skb->len > MT7915_MAX_BEACON_SIZE) {
2093 dev_err(dev->mt76.dev, "Bcn size limit exceed\n");
2094 dev_kfree_skb(rskb);
2095 dev_kfree_skb(skb);
2096 return -EINVAL;
2097 }
2098
2099 info = IEEE80211_SKB_CB(skb);
2100 info->hw_queue = FIELD_PREP(MT_TX_HW_QUEUE_PHY, ext_phy);
2101
2102 mt7915_mcu_beacon_cntdwn(vif, rskb, skb, bcn, &offs);
2103 mt7915_mcu_beacon_mbss(rskb, skb, vif, bcn, &offs);
2104 mt7915_mcu_beacon_cont(dev, vif, rskb, skb, bcn, &offs);
2105 dev_kfree_skb(skb);
2106
2107 out:
2108 return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb,
2109 MCU_EXT_CMD(BSS_INFO_UPDATE), true);
2110 }
2111
mt7915_driver_own(struct mt7915_dev * dev,u8 band)2112 static int mt7915_driver_own(struct mt7915_dev *dev, u8 band)
2113 {
2114 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN);
2115 if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band),
2116 MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) {
2117 dev_err(dev->mt76.dev, "Timeout for driver own\n");
2118 return -EIO;
2119 }
2120
2121 /* clear irq when the driver own success */
2122 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band),
2123 MT_TOP_LPCR_HOST_BAND_STAT);
2124
2125 return 0;
2126 }
2127
2128 static int
mt7915_firmware_state(struct mt7915_dev * dev,bool wa)2129 mt7915_firmware_state(struct mt7915_dev *dev, bool wa)
2130 {
2131 u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE,
2132 wa ? FW_STATE_RDY : FW_STATE_FW_DOWNLOAD);
2133
2134 if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE,
2135 state, 1000)) {
2136 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n");
2137 return -EIO;
2138 }
2139 return 0;
2140 }
2141
mt7915_load_firmware(struct mt7915_dev * dev)2142 static int mt7915_load_firmware(struct mt7915_dev *dev)
2143 {
2144 int ret;
2145
2146 /* Release Semaphore if taken by previous failed attempt */
2147 ret = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, false);
2148 if (ret != PATCH_REL_SEM_SUCCESS) {
2149 dev_err(dev->mt76.dev, "Could not release semaphore\n");
2150 /* Continue anyways */
2151 }
2152
2153 /* Always restart MCU firmware */
2154 mt76_connac_mcu_restart(&dev->mt76);
2155
2156 /* Check if MCU is ready */
2157 ret = mt7915_firmware_state(dev, false);
2158 if (ret) {
2159 dev_err(dev->mt76.dev, "Firmware did not enter download state\n");
2160 return ret;
2161 }
2162
2163 ret = mt76_connac2_load_patch(&dev->mt76, fw_name_var(dev, ROM_PATCH));
2164 if (ret)
2165 return ret;
2166
2167 ret = mt76_connac2_load_ram(&dev->mt76, fw_name_var(dev, FIRMWARE_WM),
2168 fw_name(dev, FIRMWARE_WA));
2169 if (ret)
2170 return ret;
2171
2172 ret = mt7915_firmware_state(dev, true);
2173 if (ret)
2174 return ret;
2175
2176 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false);
2177
2178 dev_dbg(dev->mt76.dev, "Firmware init done\n");
2179
2180 return 0;
2181 }
2182
mt7915_mcu_fw_log_2_host(struct mt7915_dev * dev,u8 type,u8 ctrl)2183 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl)
2184 {
2185 struct {
2186 u8 ctrl_val;
2187 u8 pad[3];
2188 } data = {
2189 .ctrl_val = ctrl
2190 };
2191
2192 if (type == MCU_FW_LOG_WA)
2193 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(FW_LOG_2_HOST),
2194 &data, sizeof(data), true);
2195
2196 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(FW_LOG_2_HOST), &data,
2197 sizeof(data), true);
2198 }
2199
mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev * dev,u32 module,u8 level)2200 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level)
2201 {
2202 struct {
2203 u8 ver;
2204 u8 pad;
2205 __le16 len;
2206 u8 level;
2207 u8 rsv[3];
2208 __le32 module_idx;
2209 } data = {
2210 .module_idx = cpu_to_le32(module),
2211 .level = level,
2212 };
2213
2214 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(FW_DBG_CTRL), &data,
2215 sizeof(data), false);
2216 }
2217
mt7915_mcu_muru_debug_set(struct mt7915_dev * dev,bool enabled)2218 int mt7915_mcu_muru_debug_set(struct mt7915_dev *dev, bool enabled)
2219 {
2220 struct {
2221 __le32 cmd;
2222 u8 enable;
2223 } data = {
2224 .cmd = cpu_to_le32(MURU_SET_TXC_TX_STATS_EN),
2225 .enable = enabled,
2226 };
2227
2228 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &data,
2229 sizeof(data), false);
2230 }
2231
mt7915_mcu_muru_debug_get(struct mt7915_phy * phy)2232 int mt7915_mcu_muru_debug_get(struct mt7915_phy *phy)
2233 {
2234 struct mt7915_dev *dev = phy->dev;
2235 struct sk_buff *skb;
2236 struct mt7915_mcu_muru_stats *mu_stats;
2237 int ret;
2238
2239 struct {
2240 __le32 cmd;
2241 u8 band_idx;
2242 } req = {
2243 .cmd = cpu_to_le32(MURU_GET_TXC_TX_STATS),
2244 .band_idx = phy->mt76->band_idx,
2245 };
2246
2247 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL),
2248 &req, sizeof(req), true, &skb);
2249 if (ret)
2250 return ret;
2251
2252 mu_stats = (struct mt7915_mcu_muru_stats *)(skb->data);
2253
2254 /* accumulate stats, these are clear-on-read */
2255 #define __dl_u32(s) phy->mib.dl_##s += le32_to_cpu(mu_stats->dl.s)
2256 #define __ul_u32(s) phy->mib.ul_##s += le32_to_cpu(mu_stats->ul.s)
2257 __dl_u32(cck_cnt);
2258 __dl_u32(ofdm_cnt);
2259 __dl_u32(htmix_cnt);
2260 __dl_u32(htgf_cnt);
2261 __dl_u32(vht_su_cnt);
2262 __dl_u32(vht_2mu_cnt);
2263 __dl_u32(vht_3mu_cnt);
2264 __dl_u32(vht_4mu_cnt);
2265 __dl_u32(he_su_cnt);
2266 __dl_u32(he_2ru_cnt);
2267 __dl_u32(he_2mu_cnt);
2268 __dl_u32(he_3ru_cnt);
2269 __dl_u32(he_3mu_cnt);
2270 __dl_u32(he_4ru_cnt);
2271 __dl_u32(he_4mu_cnt);
2272 __dl_u32(he_5to8ru_cnt);
2273 __dl_u32(he_9to16ru_cnt);
2274 __dl_u32(he_gtr16ru_cnt);
2275
2276 __ul_u32(hetrig_su_cnt);
2277 __ul_u32(hetrig_2ru_cnt);
2278 __ul_u32(hetrig_3ru_cnt);
2279 __ul_u32(hetrig_4ru_cnt);
2280 __ul_u32(hetrig_5to8ru_cnt);
2281 __ul_u32(hetrig_9to16ru_cnt);
2282 __ul_u32(hetrig_gtr16ru_cnt);
2283 __ul_u32(hetrig_2mu_cnt);
2284 __ul_u32(hetrig_3mu_cnt);
2285 __ul_u32(hetrig_4mu_cnt);
2286 #undef __dl_u32
2287 #undef __ul_u32
2288
2289 dev_kfree_skb(skb);
2290
2291 return 0;
2292 }
2293
mt7915_mcu_set_mwds(struct mt7915_dev * dev,bool enabled)2294 static int mt7915_mcu_set_mwds(struct mt7915_dev *dev, bool enabled)
2295 {
2296 struct {
2297 u8 enable;
2298 u8 _rsv[3];
2299 } __packed req = {
2300 .enable = enabled
2301 };
2302
2303 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req,
2304 sizeof(req), false);
2305 }
2306
mt7915_mcu_set_muru_ctrl(struct mt7915_dev * dev,u32 cmd,u32 val)2307 int mt7915_mcu_set_muru_ctrl(struct mt7915_dev *dev, u32 cmd, u32 val)
2308 {
2309 struct {
2310 __le32 cmd;
2311 u8 val[4];
2312 } __packed req = {
2313 .cmd = cpu_to_le32(cmd),
2314 };
2315
2316 put_unaligned_le32(val, req.val);
2317
2318 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &req,
2319 sizeof(req), false);
2320 }
2321
2322 static int
mt7915_mcu_init_rx_airtime(struct mt7915_dev * dev)2323 mt7915_mcu_init_rx_airtime(struct mt7915_dev *dev)
2324 {
2325 #define RX_AIRTIME_FEATURE_CTRL 1
2326 #define RX_AIRTIME_BITWISE_CTRL 2
2327 #define RX_AIRTIME_CLEAR_EN 1
2328 struct {
2329 __le16 field;
2330 __le16 sub_field;
2331 __le32 set_status;
2332 __le32 get_status;
2333 u8 _rsv[12];
2334
2335 bool airtime_en;
2336 bool mibtime_en;
2337 bool earlyend_en;
2338 u8 _rsv1[9];
2339
2340 bool airtime_clear;
2341 bool mibtime_clear;
2342 u8 _rsv2[98];
2343 } __packed req = {
2344 .field = cpu_to_le16(RX_AIRTIME_BITWISE_CTRL),
2345 .sub_field = cpu_to_le16(RX_AIRTIME_CLEAR_EN),
2346 .airtime_clear = true,
2347 };
2348 int ret;
2349
2350 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_AIRTIME_CTRL), &req,
2351 sizeof(req), true);
2352 if (ret)
2353 return ret;
2354
2355 req.field = cpu_to_le16(RX_AIRTIME_FEATURE_CTRL);
2356 req.sub_field = cpu_to_le16(RX_AIRTIME_CLEAR_EN);
2357 req.airtime_en = true;
2358
2359 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_AIRTIME_CTRL), &req,
2360 sizeof(req), true);
2361 }
2362
mt7915_red_set_watermark(struct mt7915_dev * dev)2363 static int mt7915_red_set_watermark(struct mt7915_dev *dev)
2364 {
2365 #define RED_GLOBAL_TOKEN_WATERMARK 2
2366 struct {
2367 __le32 args[3];
2368 u8 cmd;
2369 u8 version;
2370 u8 __rsv1[4];
2371 __le16 len;
2372 __le16 high_mark;
2373 __le16 low_mark;
2374 u8 __rsv2[12];
2375 } __packed req = {
2376 .args[0] = cpu_to_le32(MCU_WA_PARAM_RED_SETTING),
2377 .cmd = RED_GLOBAL_TOKEN_WATERMARK,
2378 .len = cpu_to_le16(sizeof(req) - sizeof(req.args)),
2379 .high_mark = cpu_to_le16(MT7915_HW_TOKEN_SIZE - 256),
2380 .low_mark = cpu_to_le16(MT7915_HW_TOKEN_SIZE - 256 - 1536),
2381 };
2382
2383 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_PARAM_CMD(SET), &req,
2384 sizeof(req), false);
2385 }
2386
mt7915_mcu_set_red(struct mt7915_dev * dev,bool enabled)2387 static int mt7915_mcu_set_red(struct mt7915_dev *dev, bool enabled)
2388 {
2389 #define RED_DISABLE 0
2390 #define RED_BY_WA_ENABLE 2
2391 int ret;
2392 u32 red_type = enabled ? RED_BY_WA_ENABLE : RED_DISABLE;
2393 __le32 req = cpu_to_le32(red_type);
2394
2395 if (enabled) {
2396 ret = mt7915_red_set_watermark(dev);
2397 if (ret < 0)
2398 return ret;
2399 }
2400
2401 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RED_ENABLE), &req,
2402 sizeof(req), false);
2403 if (ret < 0)
2404 return ret;
2405
2406 return mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
2407 MCU_WA_PARAM_RED, enabled, 0);
2408 }
2409
mt7915_mcu_init_firmware(struct mt7915_dev * dev)2410 int mt7915_mcu_init_firmware(struct mt7915_dev *dev)
2411 {
2412 int ret;
2413
2414 /* force firmware operation mode into normal state,
2415 * which should be set before firmware download stage.
2416 */
2417 mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE);
2418
2419 ret = mt7915_driver_own(dev, 0);
2420 if (ret)
2421 return ret;
2422 /* set driver own for band1 when two hif exist */
2423 if (dev->hif2) {
2424 ret = mt7915_driver_own(dev, 1);
2425 if (ret)
2426 return ret;
2427 }
2428
2429 ret = mt7915_load_firmware(dev);
2430 if (ret)
2431 return ret;
2432
2433 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
2434 ret = mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0);
2435 if (ret)
2436 return ret;
2437
2438 ret = mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0);
2439 if (ret)
2440 return ret;
2441
2442 mt76_connac_mcu_del_wtbl_all(&dev->mt76);
2443
2444 if ((mtk_wed_device_active(&dev->mt76.mmio.wed) &&
2445 is_mt7915(&dev->mt76)) ||
2446 !mtk_wed_get_rx_capa(&dev->mt76.mmio.wed))
2447 mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(CAPABILITY), 0, 0, 0);
2448
2449 ret = mt7915_mcu_set_mwds(dev, 1);
2450 if (ret)
2451 return ret;
2452
2453 ret = mt7915_mcu_set_muru_ctrl(dev, MURU_SET_PLATFORM_TYPE,
2454 MURU_PLATFORM_TYPE_PERF_LEVEL_2);
2455 if (ret)
2456 return ret;
2457
2458 ret = mt7915_mcu_init_rx_airtime(dev);
2459 if (ret)
2460 return ret;
2461
2462 return mt7915_mcu_set_red(dev, mtk_wed_device_active(&dev->mt76.mmio.wed));
2463 }
2464
mt7915_mcu_init(struct mt7915_dev * dev)2465 int mt7915_mcu_init(struct mt7915_dev *dev)
2466 {
2467 static const struct mt76_mcu_ops mt7915_mcu_ops = {
2468 .max_retry = 1,
2469 .headroom = sizeof(struct mt76_connac2_mcu_txd),
2470 .mcu_skb_prepare_msg = mt76_connac2_mcu_fill_message,
2471 .mcu_skb_send_msg = mt7915_mcu_send_message,
2472 .mcu_parse_response = mt7915_mcu_parse_response,
2473 };
2474
2475 dev->mt76.mcu_ops = &mt7915_mcu_ops;
2476
2477 return mt7915_mcu_init_firmware(dev);
2478 }
2479
mt7915_mcu_exit(struct mt7915_dev * dev)2480 void mt7915_mcu_exit(struct mt7915_dev *dev)
2481 {
2482 mt76_connac_mcu_restart(&dev->mt76);
2483 if (mt7915_firmware_state(dev, false)) {
2484 dev_err(dev->mt76.dev, "Failed to exit mcu\n");
2485 goto out;
2486 }
2487
2488 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN);
2489 if (dev->hif2)
2490 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1),
2491 MT_TOP_LPCR_HOST_FW_OWN);
2492 out:
2493 skb_queue_purge(&dev->mt76.mcu.res_q);
2494 }
2495
2496 static int
mt7915_mcu_set_rx_hdr_trans_blacklist(struct mt7915_dev * dev,int band)2497 mt7915_mcu_set_rx_hdr_trans_blacklist(struct mt7915_dev *dev, int band)
2498 {
2499 struct {
2500 u8 operation;
2501 u8 count;
2502 u8 _rsv[2];
2503 u8 index;
2504 u8 enable;
2505 __le16 etype;
2506 } req = {
2507 .operation = 1,
2508 .count = 1,
2509 .enable = 1,
2510 .etype = cpu_to_le16(ETH_P_PAE),
2511 };
2512
2513 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_HDR_TRANS),
2514 &req, sizeof(req), false);
2515 }
2516
mt7915_mcu_set_mac(struct mt7915_dev * dev,int band,bool enable,bool hdr_trans)2517 int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band,
2518 bool enable, bool hdr_trans)
2519 {
2520 struct {
2521 u8 operation;
2522 u8 enable;
2523 u8 check_bssid;
2524 u8 insert_vlan;
2525 u8 remove_vlan;
2526 u8 tid;
2527 u8 mode;
2528 u8 rsv;
2529 } __packed req_trans = {
2530 .enable = hdr_trans,
2531 };
2532 struct {
2533 u8 enable;
2534 u8 band;
2535 u8 rsv[2];
2536 } __packed req_mac = {
2537 .enable = enable,
2538 .band = band,
2539 };
2540 int ret;
2541
2542 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_HDR_TRANS),
2543 &req_trans, sizeof(req_trans), false);
2544 if (ret)
2545 return ret;
2546
2547 if (hdr_trans)
2548 mt7915_mcu_set_rx_hdr_trans_blacklist(dev, band);
2549
2550 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MAC_INIT_CTRL),
2551 &req_mac, sizeof(req_mac), true);
2552 }
2553
mt7915_mcu_update_edca(struct mt7915_dev * dev,void * param)2554 int mt7915_mcu_update_edca(struct mt7915_dev *dev, void *param)
2555 {
2556 struct mt7915_mcu_tx *req = (struct mt7915_mcu_tx *)param;
2557 u8 num = req->total;
2558 size_t len = sizeof(*req) -
2559 (IEEE80211_NUM_ACS - num) * sizeof(struct edca);
2560
2561 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EDCA_UPDATE), req,
2562 len, true);
2563 }
2564
mt7915_mcu_set_tx(struct mt7915_dev * dev,struct ieee80211_vif * vif)2565 int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif)
2566 {
2567 #define TX_CMD_MODE 1
2568 struct mt7915_mcu_tx req = {
2569 .valid = true,
2570 .mode = TX_CMD_MODE,
2571 .total = IEEE80211_NUM_ACS,
2572 };
2573 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
2574 int ac;
2575
2576 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
2577 struct ieee80211_tx_queue_params *q = &mvif->queue_params[ac];
2578 struct edca *e = &req.edca[ac];
2579
2580 e->set = WMM_PARAM_SET;
2581 e->queue = ac + mvif->mt76.wmm_idx * MT76_CONNAC_MAX_WMM_SETS;
2582 e->aifs = q->aifs;
2583 e->txop = cpu_to_le16(q->txop);
2584
2585 if (q->cw_min)
2586 e->cw_min = fls(q->cw_min);
2587 else
2588 e->cw_min = 5;
2589
2590 if (q->cw_max)
2591 e->cw_max = cpu_to_le16(fls(q->cw_max));
2592 else
2593 e->cw_max = cpu_to_le16(10);
2594 }
2595
2596 return mt7915_mcu_update_edca(dev, &req);
2597 }
2598
mt7915_mcu_set_fcc5_lpn(struct mt7915_dev * dev,int val)2599 int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val)
2600 {
2601 struct {
2602 __le32 tag;
2603 __le16 min_lpn;
2604 u8 rsv[2];
2605 } __packed req = {
2606 .tag = cpu_to_le32(0x1),
2607 .min_lpn = cpu_to_le16(val),
2608 };
2609
2610 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req,
2611 sizeof(req), true);
2612 }
2613
mt7915_mcu_set_pulse_th(struct mt7915_dev * dev,const struct mt7915_dfs_pulse * pulse)2614 int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev,
2615 const struct mt7915_dfs_pulse *pulse)
2616 {
2617 struct {
2618 __le32 tag;
2619
2620 __le32 max_width; /* us */
2621 __le32 max_pwr; /* dbm */
2622 __le32 min_pwr; /* dbm */
2623 __le32 min_stgr_pri; /* us */
2624 __le32 max_stgr_pri; /* us */
2625 __le32 min_cr_pri; /* us */
2626 __le32 max_cr_pri; /* us */
2627 } __packed req = {
2628 .tag = cpu_to_le32(0x3),
2629
2630 #define __req_field(field) .field = cpu_to_le32(pulse->field)
2631 __req_field(max_width),
2632 __req_field(max_pwr),
2633 __req_field(min_pwr),
2634 __req_field(min_stgr_pri),
2635 __req_field(max_stgr_pri),
2636 __req_field(min_cr_pri),
2637 __req_field(max_cr_pri),
2638 #undef __req_field
2639 };
2640
2641 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req,
2642 sizeof(req), true);
2643 }
2644
mt7915_mcu_set_radar_th(struct mt7915_dev * dev,int index,const struct mt7915_dfs_pattern * pattern)2645 int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index,
2646 const struct mt7915_dfs_pattern *pattern)
2647 {
2648 struct {
2649 __le32 tag;
2650 __le16 radar_type;
2651
2652 u8 enb;
2653 u8 stgr;
2654 u8 min_crpn;
2655 u8 max_crpn;
2656 u8 min_crpr;
2657 u8 min_pw;
2658 __le32 min_pri;
2659 __le32 max_pri;
2660 u8 max_pw;
2661 u8 min_crbn;
2662 u8 max_crbn;
2663 u8 min_stgpn;
2664 u8 max_stgpn;
2665 u8 min_stgpr;
2666 u8 rsv[2];
2667 __le32 min_stgpr_diff;
2668 } __packed req = {
2669 .tag = cpu_to_le32(0x2),
2670 .radar_type = cpu_to_le16(index),
2671
2672 #define __req_field_u8(field) .field = pattern->field
2673 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field)
2674 __req_field_u8(enb),
2675 __req_field_u8(stgr),
2676 __req_field_u8(min_crpn),
2677 __req_field_u8(max_crpn),
2678 __req_field_u8(min_crpr),
2679 __req_field_u8(min_pw),
2680 __req_field_u32(min_pri),
2681 __req_field_u32(max_pri),
2682 __req_field_u8(max_pw),
2683 __req_field_u8(min_crbn),
2684 __req_field_u8(max_crbn),
2685 __req_field_u8(min_stgpn),
2686 __req_field_u8(max_stgpn),
2687 __req_field_u8(min_stgpr),
2688 __req_field_u32(min_stgpr_diff),
2689 #undef __req_field_u8
2690 #undef __req_field_u32
2691 };
2692
2693 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req,
2694 sizeof(req), true);
2695 }
2696
2697 static int
mt7915_mcu_background_chain_ctrl(struct mt7915_phy * phy,struct cfg80211_chan_def * chandef,int cmd)2698 mt7915_mcu_background_chain_ctrl(struct mt7915_phy *phy,
2699 struct cfg80211_chan_def *chandef,
2700 int cmd)
2701 {
2702 struct mt7915_dev *dev = phy->dev;
2703 struct mt76_phy *mphy = phy->mt76;
2704 struct ieee80211_channel *chan = mphy->chandef.chan;
2705 int freq = mphy->chandef.center_freq1;
2706 struct mt7915_mcu_background_chain_ctrl req = {
2707 .monitor_scan_type = 2, /* simple rx */
2708 };
2709
2710 if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP)
2711 return -EINVAL;
2712
2713 if (!cfg80211_chandef_valid(&mphy->chandef))
2714 return -EINVAL;
2715
2716 switch (cmd) {
2717 case CH_SWITCH_BACKGROUND_SCAN_START: {
2718 req.chan = chan->hw_value;
2719 req.central_chan = ieee80211_frequency_to_channel(freq);
2720 req.bw = mt76_connac_chan_bw(&mphy->chandef);
2721 req.monitor_chan = chandef->chan->hw_value;
2722 req.monitor_central_chan =
2723 ieee80211_frequency_to_channel(chandef->center_freq1);
2724 req.monitor_bw = mt76_connac_chan_bw(chandef);
2725 req.band_idx = phy->mt76->band_idx;
2726 req.scan_mode = 1;
2727 break;
2728 }
2729 case CH_SWITCH_BACKGROUND_SCAN_RUNNING:
2730 req.monitor_chan = chandef->chan->hw_value;
2731 req.monitor_central_chan =
2732 ieee80211_frequency_to_channel(chandef->center_freq1);
2733 req.band_idx = phy->mt76->band_idx;
2734 req.scan_mode = 2;
2735 break;
2736 case CH_SWITCH_BACKGROUND_SCAN_STOP:
2737 req.chan = chan->hw_value;
2738 req.central_chan = ieee80211_frequency_to_channel(freq);
2739 req.bw = mt76_connac_chan_bw(&mphy->chandef);
2740 req.tx_stream = hweight8(mphy->antenna_mask);
2741 req.rx_stream = mphy->antenna_mask;
2742 break;
2743 default:
2744 return -EINVAL;
2745 }
2746 req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1;
2747
2748 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(OFFCH_SCAN_CTRL),
2749 &req, sizeof(req), false);
2750 }
2751
mt7915_mcu_rdd_background_enable(struct mt7915_phy * phy,struct cfg80211_chan_def * chandef)2752 int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy,
2753 struct cfg80211_chan_def *chandef)
2754 {
2755 struct mt7915_dev *dev = phy->dev;
2756 int err, region, rdd_idx;
2757
2758 rdd_idx = mt7915_get_rdd_idx(phy, true);
2759 if (rdd_idx < 0)
2760 return -EINVAL;
2761
2762 if (!chandef) { /* disable offchain */
2763 err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_STOP, rdd_idx, 0, 0);
2764 if (err)
2765 return err;
2766
2767 return mt7915_mcu_background_chain_ctrl(phy, NULL,
2768 CH_SWITCH_BACKGROUND_SCAN_STOP);
2769 }
2770
2771 err = mt7915_mcu_background_chain_ctrl(phy, chandef,
2772 CH_SWITCH_BACKGROUND_SCAN_START);
2773 if (err)
2774 return err;
2775
2776 switch (dev->mt76.region) {
2777 case NL80211_DFS_ETSI:
2778 region = 0;
2779 break;
2780 case NL80211_DFS_JP:
2781 region = 2;
2782 break;
2783 case NL80211_DFS_FCC:
2784 default:
2785 region = 1;
2786 break;
2787 }
2788
2789 return mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_START, rdd_idx, 0, region);
2790 }
2791
mt7915_mcu_set_chan_info(struct mt7915_phy * phy,int cmd)2792 int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd)
2793 {
2794 static const u8 ch_band[] = {
2795 [NL80211_BAND_2GHZ] = 0,
2796 [NL80211_BAND_5GHZ] = 1,
2797 [NL80211_BAND_6GHZ] = 2,
2798 };
2799 struct mt7915_dev *dev = phy->dev;
2800 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
2801 int freq1 = chandef->center_freq1;
2802 u8 band = phy->mt76->band_idx;
2803 struct {
2804 u8 control_ch;
2805 u8 center_ch;
2806 u8 bw;
2807 u8 tx_path_num;
2808 u8 rx_path; /* mask or num */
2809 u8 switch_reason;
2810 u8 band_idx;
2811 u8 center_ch2; /* for 80+80 only */
2812 __le16 cac_case;
2813 u8 channel_band;
2814 u8 rsv0;
2815 __le32 outband_freq;
2816 u8 txpower_drop;
2817 u8 ap_bw;
2818 u8 ap_center_ch;
2819 u8 rsv1[57];
2820 } __packed req = {
2821 .control_ch = chandef->chan->hw_value,
2822 .center_ch = ieee80211_frequency_to_channel(freq1),
2823 .bw = mt76_connac_chan_bw(chandef),
2824 .tx_path_num = hweight16(phy->mt76->chainmask),
2825 .rx_path = mt7915_band_chainmask(phy),
2826 .band_idx = band,
2827 .channel_band = ch_band[chandef->chan->band],
2828 };
2829
2830 #ifdef CONFIG_NL80211_TESTMODE
2831 if (phy->mt76->test.tx_antenna_mask &&
2832 mt76_testmode_enabled(phy->mt76)) {
2833 req.tx_path_num = fls(phy->mt76->test.tx_antenna_mask);
2834 req.rx_path = phy->mt76->test.tx_antenna_mask;
2835 }
2836 #endif
2837
2838 if (mt76_connac_spe_idx(phy->mt76->antenna_mask))
2839 req.tx_path_num = fls(phy->mt76->antenna_mask);
2840
2841 if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR)
2842 req.switch_reason = CH_SWITCH_NORMAL;
2843 else if (phy->mt76->offchannel ||
2844 phy->mt76->hw->conf.flags & IEEE80211_CONF_IDLE)
2845 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD;
2846 else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef,
2847 NL80211_IFTYPE_AP))
2848 req.switch_reason = CH_SWITCH_DFS;
2849 else
2850 req.switch_reason = CH_SWITCH_NORMAL;
2851
2852 if (cmd == MCU_EXT_CMD(CHANNEL_SWITCH))
2853 req.rx_path = hweight8(req.rx_path);
2854
2855 if (chandef->width == NL80211_CHAN_WIDTH_80P80) {
2856 int freq2 = chandef->center_freq2;
2857
2858 req.center_ch2 = ieee80211_frequency_to_channel(freq2);
2859 }
2860
2861 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), true);
2862 }
2863
mt7915_mcu_set_eeprom_flash(struct mt7915_dev * dev)2864 static int mt7915_mcu_set_eeprom_flash(struct mt7915_dev *dev)
2865 {
2866 #define MAX_PAGE_IDX_MASK GENMASK(7, 5)
2867 #define PAGE_IDX_MASK GENMASK(4, 2)
2868 #define PER_PAGE_SIZE 0x400
2869 struct mt7915_mcu_eeprom req = { .buffer_mode = EE_MODE_BUFFER };
2870 u16 eeprom_size = mt7915_eeprom_size(dev);
2871 u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE);
2872 u8 *eep = (u8 *)dev->mt76.eeprom.data;
2873 int eep_len;
2874 int i;
2875
2876 for (i = 0; i < total; i++, eep += eep_len) {
2877 struct sk_buff *skb;
2878 int ret;
2879
2880 if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE))
2881 eep_len = eeprom_size % PER_PAGE_SIZE;
2882 else
2883 eep_len = PER_PAGE_SIZE;
2884
2885 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL,
2886 sizeof(req) + eep_len);
2887 if (!skb)
2888 return -ENOMEM;
2889
2890 req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) |
2891 FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE;
2892 req.len = cpu_to_le16(eep_len);
2893
2894 skb_put_data(skb, &req, sizeof(req));
2895 skb_put_data(skb, eep, eep_len);
2896
2897 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
2898 MCU_EXT_CMD(EFUSE_BUFFER_MODE), true);
2899 if (ret)
2900 return ret;
2901 }
2902
2903 return 0;
2904 }
2905
mt7915_mcu_set_eeprom(struct mt7915_dev * dev)2906 int mt7915_mcu_set_eeprom(struct mt7915_dev *dev)
2907 {
2908 struct mt7915_mcu_eeprom req = {
2909 .buffer_mode = EE_MODE_EFUSE,
2910 .format = EE_FORMAT_WHOLE,
2911 };
2912
2913 if (dev->flash_mode)
2914 return mt7915_mcu_set_eeprom_flash(dev);
2915
2916 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EFUSE_BUFFER_MODE),
2917 &req, sizeof(req), true);
2918 }
2919
mt7915_mcu_get_eeprom(struct mt7915_dev * dev,u32 offset,u8 * read_buf)2920 int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset, u8 *read_buf)
2921 {
2922 struct mt7915_mcu_eeprom_info req = {
2923 .addr = cpu_to_le32(round_down(offset,
2924 MT7915_EEPROM_BLOCK_SIZE)),
2925 };
2926 struct mt7915_mcu_eeprom_info *res;
2927 struct sk_buff *skb;
2928 u8 *buf = read_buf;
2929 int ret;
2930
2931 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
2932 MCU_EXT_QUERY(EFUSE_ACCESS),
2933 &req, sizeof(req), true, &skb);
2934 if (ret)
2935 return ret;
2936
2937 res = (struct mt7915_mcu_eeprom_info *)skb->data;
2938 if (!buf) {
2939 u32 addr = le32_to_cpu(res->addr);
2940
2941 if (addr > dev->mt76.eeprom.size - MT7915_EEPROM_BLOCK_SIZE) {
2942 dev_kfree_skb(skb);
2943 return -EINVAL;
2944 }
2945 buf = dev->mt76.eeprom.data + addr;
2946 }
2947 memcpy(buf, res->data, MT7915_EEPROM_BLOCK_SIZE);
2948
2949 dev_kfree_skb(skb);
2950
2951 return 0;
2952 }
2953
mt7915_mcu_get_eeprom_free_block(struct mt7915_dev * dev,u8 * block_num)2954 int mt7915_mcu_get_eeprom_free_block(struct mt7915_dev *dev, u8 *block_num)
2955 {
2956 struct {
2957 u8 _rsv;
2958 u8 version;
2959 u8 die_idx;
2960 u8 _rsv2;
2961 } __packed req = {
2962 .version = 1,
2963 };
2964 struct sk_buff *skb;
2965 int ret;
2966
2967 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
2968 MCU_EXT_QUERY(EFUSE_FREE_BLOCK),
2969 &req, sizeof(req), true, &skb);
2970 if (ret)
2971 return ret;
2972
2973 *block_num = *(u8 *)skb->data;
2974 dev_kfree_skb(skb);
2975
2976 return 0;
2977 }
2978
mt7915_mcu_set_pre_cal(struct mt7915_dev * dev,u8 idx,u8 * data,u32 len,int cmd)2979 static int mt7915_mcu_set_pre_cal(struct mt7915_dev *dev, u8 idx,
2980 u8 *data, u32 len, int cmd)
2981 {
2982 struct {
2983 u8 dir;
2984 u8 valid;
2985 __le16 bitmap;
2986 s8 precal;
2987 u8 action;
2988 u8 band;
2989 u8 idx;
2990 u8 rsv[4];
2991 __le32 len;
2992 } req = {};
2993 struct sk_buff *skb;
2994
2995 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, sizeof(req) + len);
2996 if (!skb)
2997 return -ENOMEM;
2998
2999 req.idx = idx;
3000 req.len = cpu_to_le32(len);
3001 skb_put_data(skb, &req, sizeof(req));
3002 skb_put_data(skb, data, len);
3003
3004 return mt76_mcu_skb_send_msg(&dev->mt76, skb, cmd, false);
3005 }
3006
mt7915_mcu_apply_group_cal(struct mt7915_dev * dev)3007 int mt7915_mcu_apply_group_cal(struct mt7915_dev *dev)
3008 {
3009 u8 idx = 0, *cal = dev->cal, *eep = dev->mt76.eeprom.data;
3010 u32 total = mt7915_get_cal_group_size(dev);
3011 u32 offs = is_mt7915(&dev->mt76) ? MT_EE_DO_PRE_CAL : MT_EE_DO_PRE_CAL_V2;
3012
3013 if (!(eep[offs] & MT_EE_WIFI_CAL_GROUP))
3014 return 0;
3015
3016 /*
3017 * Items: Rx DCOC, RSSI DCOC, Tx TSSI DCOC, Tx LPFG
3018 * Tx FDIQ, Tx DCIQ, Rx FDIQ, Rx FIIQ, ADCDCOC
3019 */
3020 while (total > 0) {
3021 int ret, len;
3022
3023 len = min_t(u32, total, MT_EE_CAL_UNIT);
3024
3025 ret = mt7915_mcu_set_pre_cal(dev, idx, cal, len,
3026 MCU_EXT_CMD(GROUP_PRE_CAL_INFO));
3027 if (ret)
3028 return ret;
3029
3030 total -= len;
3031 cal += len;
3032 idx++;
3033 }
3034
3035 return 0;
3036 }
3037
mt7915_find_freq_idx(const u16 * freqs,int n_freqs,u16 cur)3038 static int mt7915_find_freq_idx(const u16 *freqs, int n_freqs, u16 cur)
3039 {
3040 int i;
3041
3042 for (i = 0; i < n_freqs; i++)
3043 if (cur == freqs[i])
3044 return i;
3045
3046 return -1;
3047 }
3048
mt7915_dpd_freq_idx(struct mt7915_dev * dev,u16 freq,u8 bw)3049 static int mt7915_dpd_freq_idx(struct mt7915_dev *dev, u16 freq, u8 bw)
3050 {
3051 static const u16 freq_list_v1[] = {
3052 5180, 5200, 5220, 5240,
3053 5260, 5280, 5300, 5320,
3054 5500, 5520, 5540, 5560,
3055 5580, 5600, 5620, 5640,
3056 5660, 5680, 5700, 5745,
3057 5765, 5785, 5805, 5825
3058 };
3059 static const u16 freq_list_v2[] = {
3060 /* 6G BW20*/
3061 5955, 5975, 5995, 6015,
3062 6035, 6055, 6075, 6095,
3063 6115, 6135, 6155, 6175,
3064 6195, 6215, 6235, 6255,
3065 6275, 6295, 6315, 6335,
3066 6355, 6375, 6395, 6415,
3067 6435, 6455, 6475, 6495,
3068 6515, 6535, 6555, 6575,
3069 6595, 6615, 6635, 6655,
3070 6675, 6695, 6715, 6735,
3071 6755, 6775, 6795, 6815,
3072 6835, 6855, 6875, 6895,
3073 6915, 6935, 6955, 6975,
3074 6995, 7015, 7035, 7055,
3075 7075, 7095, 7115,
3076 /* 6G BW160 */
3077 6025, 6185, 6345, 6505,
3078 6665, 6825, 6985,
3079 /* 5G BW20 */
3080 5180, 5200, 5220, 5240,
3081 5260, 5280, 5300, 5320,
3082 5500, 5520, 5540, 5560,
3083 5580, 5600, 5620, 5640,
3084 5660, 5680, 5700, 5720,
3085 5745, 5765, 5785, 5805,
3086 5825, 5845, 5865, 5885,
3087 /* 5G BW160 */
3088 5250, 5570, 5815
3089 };
3090 const u16 *freq_list;
3091 int idx, n_freqs;
3092
3093 if (!is_mt7915(&dev->mt76)) {
3094 freq_list = freq_list_v2;
3095 n_freqs = ARRAY_SIZE(freq_list_v2);
3096 } else {
3097 freq_list = freq_list_v1;
3098 n_freqs = ARRAY_SIZE(freq_list_v1);
3099 }
3100
3101 if (freq < 4000) {
3102 if (freq < 2432)
3103 return n_freqs;
3104 if (freq < 2457)
3105 return n_freqs + 1;
3106
3107 return n_freqs + 2;
3108 }
3109
3110 if (bw == NL80211_CHAN_WIDTH_80P80)
3111 return -1;
3112
3113 if (bw != NL80211_CHAN_WIDTH_20) {
3114 idx = mt7915_find_freq_idx(freq_list, n_freqs, freq + 10);
3115 if (idx >= 0)
3116 return idx;
3117
3118 idx = mt7915_find_freq_idx(freq_list, n_freqs, freq - 10);
3119 if (idx >= 0)
3120 return idx;
3121 }
3122
3123 return mt7915_find_freq_idx(freq_list, n_freqs, freq);
3124 }
3125
mt7915_mcu_apply_tx_dpd(struct mt7915_phy * phy)3126 int mt7915_mcu_apply_tx_dpd(struct mt7915_phy *phy)
3127 {
3128 struct mt7915_dev *dev = phy->dev;
3129 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
3130 enum nl80211_band band = chandef->chan->band;
3131 u32 offs = is_mt7915(&dev->mt76) ? MT_EE_DO_PRE_CAL : MT_EE_DO_PRE_CAL_V2;
3132 u16 center_freq = chandef->center_freq1;
3133 u8 *cal = dev->cal, *eep = dev->mt76.eeprom.data;
3134 u8 dpd_mask, cal_num = is_mt7915(&dev->mt76) ? 2 : 3;
3135 int idx;
3136
3137 switch (band) {
3138 case NL80211_BAND_2GHZ:
3139 dpd_mask = MT_EE_WIFI_CAL_DPD_2G;
3140 break;
3141 case NL80211_BAND_5GHZ:
3142 dpd_mask = MT_EE_WIFI_CAL_DPD_5G;
3143 break;
3144 case NL80211_BAND_6GHZ:
3145 dpd_mask = MT_EE_WIFI_CAL_DPD_6G;
3146 break;
3147 default:
3148 dpd_mask = 0;
3149 break;
3150 }
3151
3152 if (!(eep[offs] & dpd_mask))
3153 return 0;
3154
3155 idx = mt7915_dpd_freq_idx(dev, center_freq, chandef->width);
3156 if (idx < 0)
3157 return -EINVAL;
3158
3159 /* Items: Tx DPD, Tx Flatness */
3160 idx = idx * cal_num;
3161 cal += mt7915_get_cal_group_size(dev) + (idx * MT_EE_CAL_UNIT);
3162
3163 while (cal_num--) {
3164 int ret;
3165
3166 ret = mt7915_mcu_set_pre_cal(dev, idx, cal, MT_EE_CAL_UNIT,
3167 MCU_EXT_CMD(DPD_PRE_CAL_INFO));
3168 if (ret)
3169 return ret;
3170
3171 idx++;
3172 cal += MT_EE_CAL_UNIT;
3173 }
3174
3175 return 0;
3176 }
3177
mt7915_mcu_get_chan_mib_info(struct mt7915_phy * phy,bool chan_switch)3178 int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch)
3179 {
3180 struct mt76_channel_state *state = phy->mt76->chan_state;
3181 struct mt76_channel_state *state_ts = &phy->state_ts;
3182 struct mt7915_dev *dev = phy->dev;
3183 struct mt7915_mcu_mib *res, req[5];
3184 struct sk_buff *skb;
3185 static const u32 *offs;
3186 int i, ret, len, offs_cc;
3187 u64 cc_tx;
3188
3189 /* strict order */
3190 if (is_mt7915(&dev->mt76)) {
3191 static const u32 chip_offs[] = {
3192 MIB_NON_WIFI_TIME,
3193 MIB_TX_TIME,
3194 MIB_RX_TIME,
3195 MIB_OBSS_AIRTIME,
3196 MIB_TXOP_INIT_COUNT,
3197 };
3198 len = ARRAY_SIZE(chip_offs);
3199 offs = chip_offs;
3200 offs_cc = 20;
3201 } else {
3202 static const u32 chip_offs[] = {
3203 MIB_NON_WIFI_TIME_V2,
3204 MIB_TX_TIME_V2,
3205 MIB_RX_TIME_V2,
3206 MIB_OBSS_AIRTIME_V2
3207 };
3208 len = ARRAY_SIZE(chip_offs);
3209 offs = chip_offs;
3210 offs_cc = 0;
3211 }
3212
3213 for (i = 0; i < len; i++) {
3214 req[i].band = cpu_to_le32(phy->mt76->band_idx);
3215 req[i].offs = cpu_to_le32(offs[i]);
3216 }
3217
3218 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(GET_MIB_INFO),
3219 req, len * sizeof(req[0]), true, &skb);
3220 if (ret)
3221 return ret;
3222
3223 res = (struct mt7915_mcu_mib *)(skb->data + offs_cc);
3224
3225 #define __res_u64(s) le64_to_cpu(res[s].data)
3226 /* subtract Tx backoff time from Tx duration for MT7915 */
3227 if (is_mt7915(&dev->mt76)) {
3228 u64 backoff = (__res_u64(4) & 0xffff) * 79; /* 16us + 9us * 7 */
3229 cc_tx = __res_u64(1) - backoff;
3230 } else {
3231 cc_tx = __res_u64(1);
3232 }
3233
3234 if (chan_switch)
3235 goto out;
3236
3237 state->cc_tx += cc_tx - state_ts->cc_tx;
3238 state->cc_bss_rx += __res_u64(2) - state_ts->cc_bss_rx;
3239 state->cc_rx += __res_u64(2) + __res_u64(3) - state_ts->cc_rx;
3240 state->cc_busy += __res_u64(0) + cc_tx + __res_u64(2) + __res_u64(3) -
3241 state_ts->cc_busy;
3242
3243 out:
3244 state_ts->cc_tx = cc_tx;
3245 state_ts->cc_bss_rx = __res_u64(2);
3246 state_ts->cc_rx = __res_u64(2) + __res_u64(3);
3247 state_ts->cc_busy = __res_u64(0) + cc_tx + __res_u64(2) + __res_u64(3);
3248 #undef __res_u64
3249
3250 dev_kfree_skb(skb);
3251
3252 return 0;
3253 }
3254
mt7915_mcu_get_temperature(struct mt7915_phy * phy)3255 int mt7915_mcu_get_temperature(struct mt7915_phy *phy)
3256 {
3257 struct mt7915_dev *dev = phy->dev;
3258 struct {
3259 u8 ctrl_id;
3260 u8 action;
3261 u8 band_idx;
3262 u8 rsv[5];
3263 } req = {
3264 .ctrl_id = THERMAL_SENSOR_TEMP_QUERY,
3265 .band_idx = phy->mt76->band_idx,
3266 };
3267
3268 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_CTRL), &req,
3269 sizeof(req), true);
3270 }
3271
mt7915_mcu_set_thermal_throttling(struct mt7915_phy * phy,u8 state)3272 int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state)
3273 {
3274 struct mt7915_dev *dev = phy->dev;
3275 struct mt7915_mcu_thermal_ctrl req = {
3276 .band_idx = phy->mt76->band_idx,
3277 .ctrl_id = THERMAL_PROTECT_DUTY_CONFIG,
3278 };
3279 int level, ret;
3280
3281 /* set duty cycle and level */
3282 for (level = 0; level < 4; level++) {
3283 req.duty.duty_level = level;
3284 req.duty.duty_cycle = state;
3285 state /= 2;
3286
3287 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT),
3288 &req, sizeof(req), false);
3289 if (ret)
3290 return ret;
3291 }
3292 return 0;
3293 }
3294
mt7915_mcu_set_thermal_protect(struct mt7915_phy * phy)3295 int mt7915_mcu_set_thermal_protect(struct mt7915_phy *phy)
3296 {
3297 struct mt7915_dev *dev = phy->dev;
3298 struct {
3299 struct mt7915_mcu_thermal_ctrl ctrl;
3300
3301 __le32 trigger_temp;
3302 __le32 restore_temp;
3303 __le16 sustain_time;
3304 u8 rsv[2];
3305 } __packed req = {
3306 .ctrl = {
3307 .band_idx = phy->mt76->band_idx,
3308 .type.protect_type = 1,
3309 .type.trigger_type = 1,
3310 },
3311 };
3312 int ret;
3313
3314 req.ctrl.ctrl_id = THERMAL_PROTECT_DISABLE;
3315 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT),
3316 &req, sizeof(req.ctrl), false);
3317
3318 if (ret)
3319 return ret;
3320
3321 /* set high-temperature trigger threshold */
3322 req.ctrl.ctrl_id = THERMAL_PROTECT_ENABLE;
3323 /* add a safety margin ~10 */
3324 req.restore_temp = cpu_to_le32(phy->throttle_temp[0] - 10);
3325 req.trigger_temp = cpu_to_le32(phy->throttle_temp[1]);
3326 req.sustain_time = cpu_to_le16(10);
3327
3328 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT),
3329 &req, sizeof(req), false);
3330 }
3331
mt7915_mcu_set_txpower_frame_min(struct mt7915_phy * phy,s8 txpower)3332 int mt7915_mcu_set_txpower_frame_min(struct mt7915_phy *phy, s8 txpower)
3333 {
3334 struct mt7915_dev *dev = phy->dev;
3335 struct {
3336 u8 format_id;
3337 u8 rsv;
3338 u8 band_idx;
3339 s8 txpower_min;
3340 } __packed req = {
3341 .format_id = TX_POWER_LIMIT_FRAME_MIN,
3342 .band_idx = phy->mt76->band_idx,
3343 .txpower_min = txpower * 2, /* 0.5db */
3344 };
3345
3346 return mt76_mcu_send_msg(&dev->mt76,
3347 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,
3348 sizeof(req), true);
3349 }
3350
mt7915_mcu_set_txpower_frame(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_sta * sta,s8 txpower)3351 int mt7915_mcu_set_txpower_frame(struct mt7915_phy *phy,
3352 struct ieee80211_vif *vif,
3353 struct ieee80211_sta *sta, s8 txpower)
3354 {
3355 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
3356 struct mt7915_dev *dev = phy->dev;
3357 struct mt76_phy *mphy = phy->mt76;
3358 struct {
3359 u8 format_id;
3360 u8 rsv[3];
3361 u8 band_idx;
3362 s8 txpower_max;
3363 __le16 wcid;
3364 s8 txpower_offs[48];
3365 } __packed req = {
3366 .format_id = TX_POWER_LIMIT_FRAME,
3367 .band_idx = phy->mt76->band_idx,
3368 .txpower_max = DIV_ROUND_UP(mphy->txpower_cur, 2),
3369 .wcid = cpu_to_le16(msta->wcid.idx),
3370 };
3371 int ret;
3372 s8 txpower_sku[MT7915_SKU_RATE_NUM];
3373
3374 ret = mt7915_mcu_get_txpower_sku(phy, txpower_sku, sizeof(txpower_sku),
3375 TX_POWER_INFO_RATE);
3376 if (ret)
3377 return ret;
3378
3379 txpower = mt76_get_power_bound(mphy, txpower);
3380 if (txpower > mphy->txpower_cur || txpower < 0)
3381 return -EINVAL;
3382
3383 if (txpower) {
3384 u32 offs, len, i;
3385
3386 if (sta->deflink.ht_cap.ht_supported) {
3387 const u8 *sku_len = mt7915_sku_group_len;
3388
3389 offs = sku_len[SKU_CCK] + sku_len[SKU_OFDM];
3390 len = sku_len[SKU_HT_BW20] + sku_len[SKU_HT_BW40];
3391
3392 if (sta->deflink.vht_cap.vht_supported) {
3393 offs += len;
3394 len = sku_len[SKU_VHT_BW20] * 4;
3395
3396 if (sta->deflink.he_cap.has_he) {
3397 offs += len + sku_len[SKU_HE_RU26] * 3;
3398 len = sku_len[SKU_HE_RU242] * 4;
3399 }
3400 }
3401 } else {
3402 return -EINVAL;
3403 }
3404
3405 for (i = 0; i < len; i++, offs++)
3406 req.txpower_offs[i] =
3407 DIV_ROUND_UP(txpower - txpower_sku[offs], 2);
3408 }
3409
3410 return mt76_mcu_send_msg(&dev->mt76,
3411 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,
3412 sizeof(req), true);
3413 }
3414
3415 static void
mt7915_update_txpower(struct mt7915_phy * phy,int tx_power)3416 mt7915_update_txpower(struct mt7915_phy *phy, int tx_power)
3417 {
3418 struct mt76_phy *mphy = phy->mt76;
3419 struct ieee80211_channel *chan = mphy->main_chandef.chan;
3420 int chain_idx, val, e2p_power_limit = 0;
3421
3422 if (!chan) {
3423 mphy->txpower_cur = tx_power;
3424 return;
3425 }
3426
3427 for (chain_idx = 0; chain_idx < hweight16(mphy->chainmask); chain_idx++) {
3428 val = mt7915_eeprom_get_target_power(phy->dev, chan, chain_idx);
3429 val += mt7915_eeprom_get_power_delta(phy->dev, chan->band);
3430
3431 e2p_power_limit = max_t(int, e2p_power_limit, val);
3432 }
3433
3434 if (phy->sku_limit_en)
3435 mphy->txpower_cur = min_t(int, e2p_power_limit, tx_power);
3436 else
3437 mphy->txpower_cur = e2p_power_limit;
3438 }
3439
mt7915_mcu_set_txpower_sku(struct mt7915_phy * phy)3440 int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy)
3441 {
3442 #define TX_POWER_LIMIT_TABLE_RATE 0
3443 #define TX_POWER_LIMIT_TABLE_PATH 1
3444 struct mt7915_dev *dev = phy->dev;
3445 struct mt76_phy *mphy = phy->mt76;
3446 struct ieee80211_hw *hw = mphy->hw;
3447 struct mt7915_sku_val {
3448 u8 format_id;
3449 u8 limit_type;
3450 u8 band_idx;
3451 } __packed hdr = {
3452 .format_id = TX_POWER_LIMIT_TABLE,
3453 .limit_type = TX_POWER_LIMIT_TABLE_RATE,
3454 .band_idx = phy->mt76->band_idx,
3455 };
3456 int i, ret, tx_power;
3457 const u8 *len = mt7915_sku_group_len;
3458 struct mt76_power_limits la = {};
3459 struct sk_buff *skb;
3460
3461 tx_power = mt76_get_power_bound(mphy, hw->conf.power_level);
3462 if (phy->sku_limit_en) {
3463 tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan,
3464 &la, tx_power);
3465 mt7915_update_txpower(phy, tx_power);
3466 } else {
3467 mt7915_update_txpower(phy, tx_power);
3468 return 0;
3469 }
3470
3471 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL,
3472 sizeof(hdr) + MT7915_SKU_RATE_NUM);
3473 if (!skb)
3474 return -ENOMEM;
3475
3476 skb_put_data(skb, &hdr, sizeof(hdr));
3477 skb_put_data(skb, &la.cck, len[SKU_CCK] + len[SKU_OFDM]);
3478 skb_put_data(skb, &la.mcs[0], len[SKU_HT_BW20]);
3479 skb_put_data(skb, &la.mcs[1], len[SKU_HT_BW40]);
3480
3481 /* vht */
3482 for (i = 0; i < 4; i++) {
3483 skb_put_data(skb, &la.mcs[i], sizeof(la.mcs[i]));
3484 skb_put_zero(skb, 2); /* padding */
3485 }
3486
3487 /* he */
3488 skb_put_data(skb, &la.ru[0], sizeof(la.ru));
3489 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
3490 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), true);
3491 if (ret)
3492 return ret;
3493
3494 /* only set per-path power table when it's configured */
3495 if (!phy->sku_path_en)
3496 return 0;
3497
3498 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL,
3499 sizeof(hdr) + MT7915_SKU_PATH_NUM);
3500 if (!skb)
3501 return -ENOMEM;
3502
3503 hdr.limit_type = TX_POWER_LIMIT_TABLE_PATH;
3504 skb_put_data(skb, &hdr, sizeof(hdr));
3505 skb_put_data(skb, &la.path.cck, sizeof(la.path.cck));
3506 skb_put_data(skb, &la.path.ofdm, sizeof(la.path.ofdm));
3507 skb_put_data(skb, &la.path.ofdm_bf[1], sizeof(la.path.ofdm_bf) - 1);
3508
3509 /* HT20 and HT40 */
3510 skb_put_data(skb, &la.path.ru[3], sizeof(la.path.ru[3]));
3511 skb_put_data(skb, &la.path.ru_bf[3][1], sizeof(la.path.ru_bf[3]) - 1);
3512 skb_put_data(skb, &la.path.ru[4], sizeof(la.path.ru[4]));
3513 skb_put_data(skb, &la.path.ru_bf[4][1], sizeof(la.path.ru_bf[4]) - 1);
3514
3515 /* start from non-bf and bf fields of
3516 * BW20/RU242, BW40/RU484, BW80/RU996, BW160/RU2x996,
3517 * RU26, RU52, and RU106
3518 */
3519
3520 for (i = 0; i < 8; i++) {
3521 bool bf = i % 2;
3522 u8 idx = (i + 6) / 2;
3523 s8 *buf = bf ? la.path.ru_bf[idx] : la.path.ru[idx];
3524 /* The non-bf fields of RU26 to RU106 are special cases */
3525 if (bf)
3526 skb_put_data(skb, buf + 1, 9);
3527 else
3528 skb_put_data(skb, buf, 10);
3529 }
3530
3531 for (i = 0; i < 6; i++) {
3532 bool bf = i % 2;
3533 u8 idx = i / 2;
3534 s8 *buf = bf ? la.path.ru_bf[idx] : la.path.ru[idx];
3535
3536 skb_put_data(skb, buf, 10);
3537 }
3538
3539 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
3540 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), true);
3541 }
3542
mt7915_mcu_get_txpower_sku(struct mt7915_phy * phy,s8 * txpower,int len,u8 category)3543 int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len,
3544 u8 category)
3545 {
3546 #define RATE_POWER_INFO 2
3547 struct mt7915_dev *dev = phy->dev;
3548 struct {
3549 u8 format_id;
3550 u8 category;
3551 u8 band_idx;
3552 u8 _rsv;
3553 } __packed req = {
3554 .format_id = TX_POWER_LIMIT_INFO,
3555 .category = category,
3556 .band_idx = phy->mt76->band_idx,
3557 };
3558 struct sk_buff *skb;
3559 int ret, i;
3560
3561 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
3562 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL),
3563 &req, sizeof(req), true, &skb);
3564 if (ret)
3565 return ret;
3566
3567 if (category == TX_POWER_INFO_RATE) {
3568 s8 res[MT7915_SKU_RATE_NUM][2];
3569
3570 if (skb->len < sizeof(res) + 4) {
3571 dev_kfree_skb(skb);
3572 return -EINVAL;
3573 }
3574 memcpy(res, skb->data + 4, sizeof(res));
3575 for (i = 0; i < len; i++)
3576 txpower[i] = res[i][req.band_idx];
3577 } else if (category == TX_POWER_INFO_PATH) {
3578 if (skb->len < len + 4) {
3579 dev_kfree_skb(skb);
3580 return -EINVAL;
3581 }
3582 memcpy(txpower, skb->data + 4, len);
3583 }
3584
3585 dev_kfree_skb(skb);
3586
3587 return 0;
3588 }
3589
mt7915_mcu_set_test_param(struct mt7915_dev * dev,u8 param,bool test_mode,u8 en)3590 int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode,
3591 u8 en)
3592 {
3593 struct {
3594 u8 test_mode_en;
3595 u8 param_idx;
3596 u8 _rsv[2];
3597
3598 u8 enable;
3599 u8 _rsv2[3];
3600
3601 u8 pad[8];
3602 } __packed req = {
3603 .test_mode_en = test_mode,
3604 .param_idx = param,
3605 .enable = en,
3606 };
3607
3608 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req,
3609 sizeof(req), false);
3610 }
3611
mt7915_mcu_set_sku_en(struct mt7915_phy * phy)3612 int mt7915_mcu_set_sku_en(struct mt7915_phy *phy)
3613 {
3614 struct mt7915_dev *dev = phy->dev;
3615 struct mt7915_sku {
3616 u8 format_id;
3617 u8 sku_enable;
3618 u8 band_idx;
3619 u8 rsv;
3620 } __packed req = {
3621 .band_idx = phy->mt76->band_idx,
3622 };
3623 int ret;
3624
3625 req.sku_enable = phy->sku_limit_en;
3626 req.format_id = TX_POWER_LIMIT_ENABLE;
3627
3628 ret = mt76_mcu_send_msg(&dev->mt76,
3629 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,
3630 sizeof(req), true);
3631 if (ret)
3632 return ret;
3633
3634 req.sku_enable = phy->sku_path_en;
3635 req.format_id = TX_POWER_LIMIT_PATH_ENABLE;
3636
3637 return mt76_mcu_send_msg(&dev->mt76,
3638 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,
3639 sizeof(req), true);
3640 }
3641
mt7915_mcu_set_ser(struct mt7915_dev * dev,u8 action,u8 set,u8 band)3642 int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band)
3643 {
3644 struct {
3645 u8 action;
3646 u8 set;
3647 u8 band;
3648 u8 rsv;
3649 } req = {
3650 .action = action,
3651 .set = set,
3652 .band = band,
3653 };
3654
3655 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SER_TRIGGER),
3656 &req, sizeof(req), false);
3657 }
3658
mt7915_mcu_set_txbf(struct mt7915_dev * dev,u8 action)3659 int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action)
3660 {
3661 struct {
3662 u8 action;
3663 union {
3664 struct {
3665 u8 snd_mode;
3666 u8 sta_num;
3667 u8 rsv;
3668 u8 wlan_idx[4];
3669 __le32 snd_period; /* ms */
3670 } __packed snd;
3671 struct {
3672 bool ebf;
3673 bool ibf;
3674 u8 rsv;
3675 } __packed type;
3676 struct {
3677 u8 bf_num;
3678 u8 bf_bitmap;
3679 u8 bf_sel[8];
3680 u8 rsv[5];
3681 } __packed mod;
3682 };
3683 } __packed req = {
3684 .action = action,
3685 };
3686
3687 #define MT_BF_PROCESSING 4
3688 switch (action) {
3689 case MT_BF_SOUNDING_ON:
3690 req.snd.snd_mode = MT_BF_PROCESSING;
3691 break;
3692 case MT_BF_TYPE_UPDATE:
3693 req.type.ebf = true;
3694 req.type.ibf = dev->ibf;
3695 break;
3696 case MT_BF_MODULE_UPDATE:
3697 req.mod.bf_num = 2;
3698 req.mod.bf_bitmap = GENMASK(1, 0);
3699 break;
3700 default:
3701 return -EINVAL;
3702 }
3703
3704 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req,
3705 sizeof(req), true);
3706 }
3707
3708 static int
mt7915_mcu_enable_obss_spr(struct mt7915_phy * phy,u8 action,u8 val)3709 mt7915_mcu_enable_obss_spr(struct mt7915_phy *phy, u8 action, u8 val)
3710 {
3711 struct mt7915_dev *dev = phy->dev;
3712 struct mt7915_mcu_sr_ctrl req = {
3713 .action = action,
3714 .argnum = 1,
3715 .band_idx = phy->mt76->band_idx,
3716 .val = cpu_to_le32(val),
3717 };
3718
3719 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,
3720 sizeof(req), true);
3721 }
3722
3723 static int
mt7915_mcu_set_obss_spr_pd(struct mt7915_phy * phy,struct ieee80211_he_obss_pd * he_obss_pd)3724 mt7915_mcu_set_obss_spr_pd(struct mt7915_phy *phy,
3725 struct ieee80211_he_obss_pd *he_obss_pd)
3726 {
3727 struct mt7915_dev *dev = phy->dev;
3728 struct {
3729 struct mt7915_mcu_sr_ctrl ctrl;
3730 struct {
3731 u8 pd_th_non_srg;
3732 u8 pd_th_srg;
3733 u8 period_offs;
3734 u8 rcpi_src;
3735 __le16 obss_pd_min;
3736 __le16 obss_pd_min_srg;
3737 u8 resp_txpwr_mode;
3738 u8 txpwr_restrict_mode;
3739 u8 txpwr_ref;
3740 u8 rsv[3];
3741 } __packed param;
3742 } __packed req = {
3743 .ctrl = {
3744 .action = SPR_SET_PARAM,
3745 .argnum = 9,
3746 .band_idx = phy->mt76->band_idx,
3747 },
3748 };
3749 int ret;
3750 u8 max_th = 82, non_srg_max_th = 62;
3751
3752 /* disable firmware dynamical PD asjustment */
3753 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_DPD, false);
3754 if (ret)
3755 return ret;
3756
3757 if (he_obss_pd->sr_ctrl &
3758 IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED)
3759 req.param.pd_th_non_srg = max_th;
3760 else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT)
3761 req.param.pd_th_non_srg = max_th - he_obss_pd->non_srg_max_offset;
3762 else
3763 req.param.pd_th_non_srg = non_srg_max_th;
3764
3765 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT)
3766 req.param.pd_th_srg = max_th - he_obss_pd->max_offset;
3767
3768 req.param.obss_pd_min = cpu_to_le16(82);
3769 req.param.obss_pd_min_srg = cpu_to_le16(82);
3770 req.param.txpwr_restrict_mode = 2;
3771 req.param.txpwr_ref = 21;
3772
3773 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,
3774 sizeof(req), true);
3775 }
3776
3777 static int
mt7915_mcu_set_obss_spr_siga(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_he_obss_pd * he_obss_pd)3778 mt7915_mcu_set_obss_spr_siga(struct mt7915_phy *phy, struct ieee80211_vif *vif,
3779 struct ieee80211_he_obss_pd *he_obss_pd)
3780 {
3781 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
3782 struct mt7915_dev *dev = phy->dev;
3783 u8 omac = mvif->mt76.omac_idx;
3784 struct {
3785 struct mt7915_mcu_sr_ctrl ctrl;
3786 struct {
3787 u8 omac;
3788 u8 rsv[3];
3789 u8 flag[20];
3790 } __packed siga;
3791 } __packed req = {
3792 .ctrl = {
3793 .action = SPR_SET_SIGA,
3794 .argnum = 1,
3795 .band_idx = phy->mt76->band_idx,
3796 },
3797 .siga = {
3798 .omac = omac > HW_BSSID_MAX ? omac - 12 : omac,
3799 },
3800 };
3801 int ret;
3802
3803 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED)
3804 req.siga.flag[req.siga.omac] = 0xf;
3805 else
3806 return 0;
3807
3808 /* switch to normal AP mode */
3809 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_MODE, 0);
3810 if (ret)
3811 return ret;
3812
3813 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,
3814 sizeof(req), true);
3815 }
3816
3817 static int
mt7915_mcu_set_obss_spr_bitmap(struct mt7915_phy * phy,struct ieee80211_he_obss_pd * he_obss_pd)3818 mt7915_mcu_set_obss_spr_bitmap(struct mt7915_phy *phy,
3819 struct ieee80211_he_obss_pd *he_obss_pd)
3820 {
3821 struct mt7915_dev *dev = phy->dev;
3822 struct {
3823 struct mt7915_mcu_sr_ctrl ctrl;
3824 struct {
3825 __le32 color_l[2];
3826 __le32 color_h[2];
3827 __le32 bssid_l[2];
3828 __le32 bssid_h[2];
3829 } __packed bitmap;
3830 } __packed req = {
3831 .ctrl = {
3832 .action = SPR_SET_SRG_BITMAP,
3833 .argnum = 4,
3834 .band_idx = phy->mt76->band_idx,
3835 },
3836 };
3837 u32 bitmap;
3838
3839 memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap));
3840 req.bitmap.color_l[req.ctrl.band_idx] = cpu_to_le32(bitmap);
3841
3842 memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap));
3843 req.bitmap.color_h[req.ctrl.band_idx] = cpu_to_le32(bitmap);
3844
3845 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap));
3846 req.bitmap.bssid_l[req.ctrl.band_idx] = cpu_to_le32(bitmap);
3847
3848 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap));
3849 req.bitmap.bssid_h[req.ctrl.band_idx] = cpu_to_le32(bitmap);
3850
3851 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,
3852 sizeof(req), true);
3853 }
3854
mt7915_mcu_add_obss_spr(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_he_obss_pd * he_obss_pd)3855 int mt7915_mcu_add_obss_spr(struct mt7915_phy *phy, struct ieee80211_vif *vif,
3856 struct ieee80211_he_obss_pd *he_obss_pd)
3857 {
3858 int ret;
3859
3860 /* enable firmware scene detection algorithms */
3861 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_SD, sr_scene_detect);
3862 if (ret)
3863 return ret;
3864
3865 /* firmware dynamically adjusts PD threshold so skip manual control */
3866 if (sr_scene_detect && !he_obss_pd->enable)
3867 return 0;
3868
3869 /* enable spatial reuse */
3870 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE, he_obss_pd->enable);
3871 if (ret)
3872 return ret;
3873
3874 if (sr_scene_detect || !he_obss_pd->enable)
3875 return 0;
3876
3877 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_TX, true);
3878 if (ret)
3879 return ret;
3880
3881 /* set SRG/non-SRG OBSS PD threshold */
3882 ret = mt7915_mcu_set_obss_spr_pd(phy, he_obss_pd);
3883 if (ret)
3884 return ret;
3885
3886 /* Set SR prohibit */
3887 ret = mt7915_mcu_set_obss_spr_siga(phy, vif, he_obss_pd);
3888 if (ret)
3889 return ret;
3890
3891 /* set SRG BSS color/BSSID bitmap */
3892 return mt7915_mcu_set_obss_spr_bitmap(phy, he_obss_pd);
3893 }
3894
mt7915_mcu_get_rx_rate(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct rate_info * rate)3895 int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif,
3896 struct ieee80211_sta *sta, struct rate_info *rate)
3897 {
3898 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
3899 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
3900 struct mt7915_dev *dev = phy->dev;
3901 struct mt76_phy *mphy = phy->mt76;
3902 struct {
3903 u8 category;
3904 u8 band;
3905 __le16 wcid;
3906 } __packed req = {
3907 .category = MCU_PHY_STATE_CONTENTION_RX_RATE,
3908 .band = mvif->mt76.band_idx,
3909 .wcid = cpu_to_le16(msta->wcid.idx),
3910 };
3911 struct ieee80211_supported_band *sband;
3912 struct mt7915_mcu_phy_rx_info *res;
3913 struct sk_buff *skb;
3914 int ret;
3915 bool cck = false;
3916
3917 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(PHY_STAT_INFO),
3918 &req, sizeof(req), true, &skb);
3919 if (ret)
3920 return ret;
3921
3922 res = (struct mt7915_mcu_phy_rx_info *)skb->data;
3923
3924 rate->mcs = res->rate;
3925 rate->nss = res->nsts + 1;
3926
3927 switch (res->mode) {
3928 case MT_PHY_TYPE_CCK:
3929 cck = true;
3930 fallthrough;
3931 case MT_PHY_TYPE_OFDM:
3932 if (mphy->chandef.chan->band == NL80211_BAND_5GHZ)
3933 sband = &mphy->sband_5g.sband;
3934 else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ)
3935 sband = &mphy->sband_6g.sband;
3936 else
3937 sband = &mphy->sband_2g.sband;
3938
3939 rate->mcs = mt76_get_rate(&dev->mt76, sband, rate->mcs, cck);
3940 rate->legacy = sband->bitrates[rate->mcs].bitrate;
3941 break;
3942 case MT_PHY_TYPE_HT:
3943 case MT_PHY_TYPE_HT_GF:
3944 if (rate->mcs > 31) {
3945 ret = -EINVAL;
3946 goto out;
3947 }
3948
3949 rate->flags = RATE_INFO_FLAGS_MCS;
3950 if (res->gi)
3951 rate->flags |= RATE_INFO_FLAGS_SHORT_GI;
3952 break;
3953 case MT_PHY_TYPE_VHT:
3954 if (rate->mcs > 9) {
3955 ret = -EINVAL;
3956 goto out;
3957 }
3958
3959 rate->flags = RATE_INFO_FLAGS_VHT_MCS;
3960 if (res->gi)
3961 rate->flags |= RATE_INFO_FLAGS_SHORT_GI;
3962 break;
3963 case MT_PHY_TYPE_HE_SU:
3964 case MT_PHY_TYPE_HE_EXT_SU:
3965 case MT_PHY_TYPE_HE_TB:
3966 case MT_PHY_TYPE_HE_MU:
3967 if (res->gi > NL80211_RATE_INFO_HE_GI_3_2 || rate->mcs > 11) {
3968 ret = -EINVAL;
3969 goto out;
3970 }
3971 rate->he_gi = res->gi;
3972 rate->flags = RATE_INFO_FLAGS_HE_MCS;
3973 break;
3974 default:
3975 ret = -EINVAL;
3976 goto out;
3977 }
3978
3979 switch (res->bw) {
3980 case IEEE80211_STA_RX_BW_160:
3981 rate->bw = RATE_INFO_BW_160;
3982 break;
3983 case IEEE80211_STA_RX_BW_80:
3984 rate->bw = RATE_INFO_BW_80;
3985 break;
3986 case IEEE80211_STA_RX_BW_40:
3987 rate->bw = RATE_INFO_BW_40;
3988 break;
3989 default:
3990 rate->bw = RATE_INFO_BW_20;
3991 break;
3992 }
3993
3994 out:
3995 dev_kfree_skb(skb);
3996
3997 return ret;
3998 }
3999
mt7915_mcu_set_protection(struct mt7915_phy * phy,struct ieee80211_vif * vif,u8 ht_mode,bool use_cts_prot)4000 int mt7915_mcu_set_protection(struct mt7915_phy *phy, struct ieee80211_vif *vif,
4001 u8 ht_mode, bool use_cts_prot)
4002 {
4003 struct mt7915_dev *dev = phy->dev;
4004 int len = sizeof(struct sta_req_hdr) + sizeof(struct bss_info_prot);
4005 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
4006 struct bss_info_prot *prot;
4007 struct sk_buff *skb;
4008 struct tlv *tlv;
4009 enum {
4010 PROT_NONMEMBER = BIT(1),
4011 PROT_20MHZ = BIT(2),
4012 PROT_NONHT_MIXED = BIT(3),
4013 PROT_LEGACY_ERP = BIT(5),
4014 PROT_NONGF_STA = BIT(7),
4015 };
4016 u32 rts_threshold;
4017
4018 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
4019 NULL, len);
4020 if (IS_ERR(skb))
4021 return PTR_ERR(skb);
4022
4023 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_PROTECT_INFO,
4024 sizeof(*prot));
4025 prot = (struct bss_info_prot *)tlv;
4026
4027 switch (ht_mode & IEEE80211_HT_OP_MODE_PROTECTION) {
4028 case IEEE80211_HT_OP_MODE_PROTECTION_NONMEMBER:
4029 prot->prot_mode = cpu_to_le32(PROT_NONMEMBER);
4030 break;
4031 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
4032 prot->prot_mode = cpu_to_le32(PROT_20MHZ);
4033 break;
4034 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
4035 prot->prot_mode = cpu_to_le32(PROT_NONHT_MIXED);
4036 break;
4037 }
4038
4039 if (ht_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT)
4040 prot->prot_mode |= cpu_to_le32(PROT_NONGF_STA);
4041
4042 if (use_cts_prot)
4043 prot->prot_mode |= cpu_to_le32(PROT_LEGACY_ERP);
4044
4045 /* reuse current RTS setting */
4046 rts_threshold = phy->mt76->hw->wiphy->rts_threshold;
4047 if (rts_threshold == (u32)-1)
4048 prot->rts_len_thres = cpu_to_le32(MT7915_RTS_LEN_THRES);
4049 else
4050 prot->rts_len_thres = cpu_to_le32(rts_threshold);
4051
4052 prot->rts_pkt_thres = 0x2;
4053
4054 prot->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th);
4055 if (!prot->he_rts_thres)
4056 prot->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES);
4057
4058 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
4059 MCU_EXT_CMD(BSS_INFO_UPDATE), true);
4060 }
4061
mt7915_mcu_update_bss_color(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct cfg80211_he_bss_color * he_bss_color)4062 int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif,
4063 struct cfg80211_he_bss_color *he_bss_color)
4064 {
4065 int len = sizeof(struct sta_req_hdr) + sizeof(struct bss_info_color);
4066 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
4067 struct bss_info_color *bss_color;
4068 struct sk_buff *skb;
4069 struct tlv *tlv;
4070
4071 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
4072 NULL, len);
4073 if (IS_ERR(skb))
4074 return PTR_ERR(skb);
4075
4076 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BSS_COLOR,
4077 sizeof(*bss_color));
4078 bss_color = (struct bss_info_color *)tlv;
4079 bss_color->disable = !he_bss_color->enabled;
4080 bss_color->color = he_bss_color->color;
4081
4082 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
4083 MCU_EXT_CMD(BSS_INFO_UPDATE), true);
4084 }
4085
4086 #define TWT_AGRT_TRIGGER BIT(0)
4087 #define TWT_AGRT_ANNOUNCE BIT(1)
4088 #define TWT_AGRT_PROTECT BIT(2)
4089
mt7915_mcu_twt_agrt_update(struct mt7915_dev * dev,struct mt7915_vif * mvif,struct mt7915_twt_flow * flow,int cmd)4090 int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev,
4091 struct mt7915_vif *mvif,
4092 struct mt7915_twt_flow *flow,
4093 int cmd)
4094 {
4095 struct {
4096 u8 tbl_idx;
4097 u8 cmd;
4098 u8 own_mac_idx;
4099 u8 flowid; /* 0xff for group id */
4100 __le16 peer_id; /* specify the peer_id (msb=0)
4101 * or group_id (msb=1)
4102 */
4103 u8 duration; /* 256 us */
4104 u8 bss_idx;
4105 __le64 start_tsf;
4106 __le16 mantissa;
4107 u8 exponent;
4108 u8 is_ap;
4109 u8 agrt_params;
4110 u8 rsv[23];
4111 } __packed req = {
4112 .tbl_idx = flow->table_id,
4113 .cmd = cmd,
4114 .own_mac_idx = mvif->mt76.omac_idx,
4115 .flowid = flow->id,
4116 .peer_id = cpu_to_le16(flow->wcid),
4117 .duration = flow->duration,
4118 .bss_idx = mvif->mt76.idx,
4119 .start_tsf = cpu_to_le64(flow->tsf),
4120 .mantissa = flow->mantissa,
4121 .exponent = flow->exp,
4122 .is_ap = true,
4123 };
4124
4125 if (flow->protection)
4126 req.agrt_params |= TWT_AGRT_PROTECT;
4127 if (!flow->flowtype)
4128 req.agrt_params |= TWT_AGRT_ANNOUNCE;
4129 if (flow->trigger)
4130 req.agrt_params |= TWT_AGRT_TRIGGER;
4131
4132 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TWT_AGRT_UPDATE),
4133 &req, sizeof(req), true);
4134 }
4135
mt7915_mcu_wed_wa_tx_stats(struct mt7915_dev * dev,u16 wlan_idx)4136 int mt7915_mcu_wed_wa_tx_stats(struct mt7915_dev *dev, u16 wlan_idx)
4137 {
4138 struct {
4139 __le32 cmd;
4140 __le32 arg0;
4141 __le32 arg1;
4142 __le16 arg2;
4143 } __packed req = {
4144 .cmd = cpu_to_le32(0x15),
4145 };
4146 struct mt7915_mcu_wa_tx_stat {
4147 __le16 wcid;
4148 u8 __rsv2[2];
4149
4150 /* tx_bytes is deprecated since WA byte counter uses u32,
4151 * which easily leads to overflow.
4152 */
4153 __le32 tx_bytes;
4154 __le32 tx_packets;
4155 } __packed *res;
4156 struct mt76_wcid *wcid;
4157 struct sk_buff *skb;
4158 int ret, len;
4159 u16 ret_wcid;
4160
4161 if (is_mt7915(&dev->mt76)) {
4162 req.arg0 = cpu_to_le32(wlan_idx);
4163 len = sizeof(req) - sizeof(req.arg2);
4164 } else {
4165 req.arg0 = cpu_to_le32(1);
4166 req.arg2 = cpu_to_le16(wlan_idx);
4167 len = sizeof(req);
4168 }
4169
4170 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WA_PARAM_CMD(QUERY),
4171 &req, len, true, &skb);
4172 if (ret)
4173 return ret;
4174
4175 if (!is_mt7915(&dev->mt76))
4176 skb_pull(skb, 4);
4177
4178 res = (struct mt7915_mcu_wa_tx_stat *)skb->data;
4179
4180 ret_wcid = le16_to_cpu(res->wcid);
4181 if (is_mt7915(&dev->mt76))
4182 ret_wcid &= 0xff;
4183
4184 if (ret_wcid != wlan_idx) {
4185 ret = -EINVAL;
4186 goto out;
4187 }
4188
4189 rcu_read_lock();
4190
4191 wcid = mt76_wcid_ptr(dev, wlan_idx);
4192 if (wcid)
4193 wcid->stats.tx_packets += le32_to_cpu(res->tx_packets);
4194 else
4195 ret = -EINVAL;
4196
4197 rcu_read_unlock();
4198 out:
4199 dev_kfree_skb(skb);
4200
4201 return ret;
4202 }
4203
mt7915_mcu_rf_regval(struct mt7915_dev * dev,u32 regidx,u32 * val,bool set)4204 int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set)
4205 {
4206 struct {
4207 __le32 idx;
4208 __le32 ofs;
4209 __le32 data;
4210 } __packed req = {
4211 .idx = cpu_to_le32(u32_get_bits(regidx, GENMASK(31, 24))),
4212 .ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))),
4213 .data = set ? cpu_to_le32(*val) : 0,
4214 };
4215 struct sk_buff *skb;
4216 int ret;
4217
4218 if (set)
4219 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RF_REG_ACCESS),
4220 &req, sizeof(req), false);
4221
4222 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_QUERY(RF_REG_ACCESS),
4223 &req, sizeof(req), true, &skb);
4224 if (ret)
4225 return ret;
4226
4227 *val = le32_to_cpu(*(__le32 *)(skb->data + 8));
4228 dev_kfree_skb(skb);
4229
4230 return 0;
4231 }
4232