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Searched defs:bus_p (Results 1 – 24 of 24) sorted by relevance

/titanic_50/usr/src/uts/common/sys/
H A Dpciev.h132 #define PCIE_ASSIGNED_TO_FMA_DOM(bus_p) \ argument
134 #define PCIE_ASSIGNED_TO_NFMA_DOM(bus_p) \ argument
136 #define PCIE_ASSIGNED_TO_ROOT_DOM(bus_p) \ argument
138 #define PCIE_BDG_HAS_CHILDREN_FMA_DOM(bus_p) \ argument
140 #define PCIE_BDG_HAS_CHILDREN_NFMA_DOM(bus_p) \ argument
142 #define PCIE_BDG_HAS_CHILDREN_ROOT_DOM(bus_p) \ argument
144 #define PCIE_IS_ASSIGNED(bus_p) \ argument
146 #define PCIE_BDG_IS_UNASSIGNED(bus_p) \ argument
152 #define PCIE_IN_DOMAIN(bus_p, id) (pcie_in_domain((bus_p), (id))) argument
155 #define PCIE_DOMAIN_ID_GET(bus_p) \ argument
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H A Dpcie_impl.h59 #define PCIE_BUS2DIP(bus_p) bus_p->bus_dip argument
60 #define PCIE_BUS2PFD(bus_p) PCIE_DIP2PFD(PCIE_BUS2DIP(bus_p)) argument
61 #define PCIE_BUS2DOM(bus_p) bus_p->bus_dom argument
67 #define PCIE_IS_PCIE(bus_p) (bus_p->bus_pcie_off) argument
68 #define PCIE_IS_PCIX(bus_p) (bus_p->bus_pcix_off) argument
69 #define PCIE_IS_PCI(bus_p) (!PCIE_IS_PCIE(bus_p)) argument
70 #define PCIE_HAS_AER(bus_p) (bus_p->bus_aer_off) argument
72 #define PCIE_IS_ROOT(bus_p) (PCIE_IS_RC(bus_p) || PCIE_IS_RP(bus_p)) argument
86 #define PCIE_IS_RC(bus_p) \ argument
88 #define PCIE_IS_RP(bus_p) \ argument
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/titanic_50/usr/src/uts/common/io/pciex/hotplug/
H A Dpciehpc.c268 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pciehpc_intr() local
505 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); in pciehpc_get_slot_state() local
561 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); in pciehpc_set_slot_name() local
638 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); in pciehpc_reg_get8() local
651 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); in pciehpc_reg_get16() local
664 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); in pciehpc_reg_get32() local
677 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); in pciehpc_reg_put8() local
690 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); in pciehpc_reg_put16() local
703 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); in pciehpc_reg_put32() local
725 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); in pciehpc_hpc_init() local
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H A Dpcie_hp.c214 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_hp_init() local
261 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_hp_uninit() local
303 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_hp_intr() local
470 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_hp_create_occupant_props() local
669 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_find_physical_slot() local
695 pcie_bus_t *bus_p = PCIE_DIP2BUS(pdip); in pcie_hp_create_port_name_num() local
905 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_hp_common_ops() local
H A Dpcishpc.c136 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcishpc_init() local
837 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcishpc_create_controller() local
935 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcishpc_destroy_controller() local
1883 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); in pcishpc_set_slot_name() local
2359 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); in pcishpc_read_reg() local
2387 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); in pcishpc_write_reg() local
/titanic_50/usr/src/uts/common/io/pciex/
H A Dpcie.c286 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_hpintr_enable() local
306 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_hpintr_disable() local
328 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_open() local
357 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_close() local
443 pcie_bus_t *bus_p; in pcie_init_cfghdl() local
464 pcie_bus_t *bus_p = PCIE_DIP2BUS(cdip); in pcie_fini_cfghdl() local
483 pcie_bus_t *bus_p; in pcie_initchild() local
632 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_init_pfd() local
716 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_fini_pfd() local
864 pcie_bus_t *bus_p; in pcie_rc_init_bus() local
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H A Dpcie_fault.c167 pf_eh_enter(pcie_bus_t *bus_p) { in pf_eh_enter()
172 pf_eh_exit(pcie_bus_t *bus_p) in pf_eh_exit()
322 pcie_bus_t *bus_p; in pf_dispatch() local
402 pf_in_bus_range(pcie_bus_t *bus_p, pcie_req_id_t bdf) in pf_in_bus_range()
420 pf_in_assigned_addr(pcie_bus_t *bus_p, uint64_t addr) in pf_in_assigned_addr()
440 pf_in_addr_range(pcie_bus_t *bus_p, uint64_t addr) in pf_in_addr_range()
482 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pf_is_ready() local
493 pcie_bus_t *bus_p, boolean_t bdg) in pf_pcix_ecc_regs_gather()
518 pf_pcix_regs_gather(pf_data_t *pfd_p, pcie_bus_t *bus_p) in pf_pcix_regs_gather()
566 pf_pcie_regs_gather(pf_data_t *pfd_p, pcie_bus_t *bus_p) in pf_pcie_regs_gather()
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H A Dpciev.c60 pcie_bus_t *bus_p; in pcie_find_dip_by_bdf() local
125 pcie_cache_domain_info(pcie_bus_t *bus_p) in pcie_cache_domain_info()
164 pcie_uncache_domain_info(pcie_bus_t *bus_p) in pcie_uncache_domain_info()
217 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_init_dom() local
256 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_fini_dom() local
404 pcie_bus_t *bus_p = PCIE_PFD2BUS(pfd_p); in pciev_get_affected_dev() local
483 pcie_in_domain(pcie_bus_t *bus_p, uint_t domain_id) in pcie_in_domain()
H A Dpcieb.c368 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(devi); in pcieb_attach() local
924 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcieb_is_pcie_device_type() local
1006 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(dip); in pcieb_intr_init() local
1735 pcie_bus_t *bus_p = PCIE_DIP2BUS(pcieb->pcieb_dip); in pcieb_id_props() local
H A Dpcie_pwr.c841 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_is_pcie() local
/titanic_50/usr/src/uts/i86pc/io/pciex/
H A Dpcie_x86.c44 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_init_plat() local
52 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_fini_plat() local
H A Dnpe.c857 pcie_bus_t *bus_p; in npe_initchild() local
/titanic_50/usr/src/uts/sparc/io/pciex/
H A Dpcie_sparc.c35 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_init_plat() local
60 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_fini_plat() local
H A Dpcieb_sparc.c201 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcieb_attach_plx_workarounds() local
336 pcie_bus_t *bus_p = PCIE_DIP2BUS(pcieb->pcieb_dip); in plx_ro_disable() local
/titanic_50/usr/src/uts/intel/io/pciex/
H A Dpcieb_x86.c153 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(dip); in pcieb_plat_msi_supported() local
205 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(devi); in pcieb_init_osc() local
465 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(dip); in pcieb_intel_serr_workaround() local
552 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(dip); in pcieb_intel_rber_workaround() local
584 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(dip); in pcieb_intel_mps_workaround() local
611 pcie_bus_t *bus_p = PCIE_DIP2UPBUS(dip); in pcieb_intel_sw_workaround() local
H A Dpcie_acpi.c58 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_acpi_osc() local
222 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in pcie_is_osc() local
H A Dpcie_nvidia.c180 pcie_bus_t *bus_p; in create_pcie_root_bus() local
/titanic_50/usr/src/uts/intel/io/pciex/hotplug/
H A Dpciehpc_acpi.c95 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); in pciehpc_update_ops() local
230 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); in pciehpc_acpi_slotinfo_init() local
312 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); in pciehpc_acpi_slot_poweron() local
384 pcie_bus_t *bus_p = PCIE_DIP2BUS(ctrl_p->hc_dip); in pciehpc_acpi_slot_poweroff() local
/titanic_50/usr/src/uts/sun4v/io/pciex/
H A Dpci_cfgacc_4v.c68 pcie_bus_t *bus_p; in pci_cfgacc_get() local
89 pcie_bus_t *bus_p; in pci_cfgacc_set() local
/titanic_50/usr/src/uts/sun4u/io/pciex/
H A Dpci_cfgacc_4u.c63 pcie_bus_t *bus_p; in pci_cfgacc_get() local
97 pcie_bus_t *bus_p; in pci_cfgacc_set() local
/titanic_50/usr/src/uts/sun4/io/px/
H A Dpx.c231 pcie_bus_t *bus_p; in px_attach() local
319 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in px_attach() local
457 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in px_detach() local
1436 pcie_bus_t *bus_p; in px_set_mps() local
H A Dpx_fm.c72 pcie_bus_t *bus_p; in px_fm_attach() local
810 pcie_bus_t *bus_p; in px_err_cfg_hdl_check() local
977 pcie_bus_t *bus_p, *root_bus_p; in px_guest_panic() local
/titanic_50/usr/src/uts/common/sys/hotplug/pci/
H A Dpcie_hp.h91 #define PCIE_IS_PCIE_HOTPLUG_CAPABLE(bus_p) \ argument
95 #define PCIE_IS_PCI_HOTPLUG_CAPABLE(bus_p) \ argument
98 #define PCIE_IS_PCIE_HOTPLUG_ENABLED(bus_p) \ argument
102 #define PCIE_IS_PCI_HOTPLUG_ENABLED(bus_p) \ argument
/titanic_50/usr/src/uts/sun4u/io/px/
H A Dpx_lib4u.c2618 pcie_bus_t *bus_p = PCIE_DIP2BUS(px_p->px_dip); in px_hp_intr_redist() local