1 /*
2 * Copyright 2013 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24 #include "priv.h"
25
26 #include <subdev/bios.h>
27 #include <subdev/bios/boost.h>
28 #include <subdev/bios/cstep.h>
29 #include <subdev/bios/perf.h>
30 #include <subdev/bios/vpstate.h>
31 #include <subdev/fb.h>
32 #include <subdev/therm.h>
33 #include <subdev/volt.h>
34
35 #include <core/option.h>
36
37 /******************************************************************************
38 * misc
39 *****************************************************************************/
40 static u32
nvkm_clk_adjust(struct nvkm_clk * clk,bool adjust,u8 pstate,u8 domain,u32 input)41 nvkm_clk_adjust(struct nvkm_clk *clk, bool adjust,
42 u8 pstate, u8 domain, u32 input)
43 {
44 struct nvkm_bios *bios = clk->subdev.device->bios;
45 struct nvbios_boostE boostE;
46 u8 ver, hdr, cnt, len;
47 u32 data;
48
49 data = nvbios_boostEm(bios, pstate, &ver, &hdr, &cnt, &len, &boostE);
50 if (data) {
51 struct nvbios_boostS boostS;
52 u8 idx = 0, sver, shdr;
53 u32 subd;
54
55 input = max(boostE.min, input);
56 input = min(boostE.max, input);
57 do {
58 sver = ver;
59 shdr = hdr;
60 subd = nvbios_boostSp(bios, idx++, data, &sver, &shdr,
61 cnt, len, &boostS);
62 if (subd && boostS.domain == domain) {
63 if (adjust)
64 input = input * boostS.percent / 100;
65 input = max(boostS.min, input);
66 input = min(boostS.max, input);
67 break;
68 }
69 } while (subd);
70 }
71
72 return input;
73 }
74
75 /******************************************************************************
76 * C-States
77 *****************************************************************************/
78 static bool
nvkm_cstate_valid(struct nvkm_clk * clk,struct nvkm_cstate * cstate,u32 max_volt,int temp)79 nvkm_cstate_valid(struct nvkm_clk *clk, struct nvkm_cstate *cstate,
80 u32 max_volt, int temp)
81 {
82 const struct nvkm_domain *domain = clk->domains;
83 struct nvkm_volt *volt = clk->subdev.device->volt;
84 int voltage;
85
86 while (domain && domain->name != nv_clk_src_max) {
87 if (domain->flags & NVKM_CLK_DOM_FLAG_VPSTATE) {
88 u32 freq = cstate->domain[domain->name];
89 switch (clk->boost_mode) {
90 case NVKM_CLK_BOOST_NONE:
91 if (clk->base_khz && freq > clk->base_khz)
92 return false;
93 fallthrough;
94 case NVKM_CLK_BOOST_BIOS:
95 if (clk->boost_khz && freq > clk->boost_khz)
96 return false;
97 }
98 }
99 domain++;
100 }
101
102 if (!volt)
103 return true;
104
105 voltage = nvkm_volt_map(volt, cstate->voltage, temp);
106 if (voltage < 0)
107 return false;
108 return voltage <= min(max_volt, volt->max_uv);
109 }
110
111 static struct nvkm_cstate *
nvkm_cstate_find_best(struct nvkm_clk * clk,struct nvkm_pstate * pstate,struct nvkm_cstate * cstate)112 nvkm_cstate_find_best(struct nvkm_clk *clk, struct nvkm_pstate *pstate,
113 struct nvkm_cstate *cstate)
114 {
115 struct nvkm_device *device = clk->subdev.device;
116 struct nvkm_volt *volt = device->volt;
117 int max_volt;
118
119 if (!pstate || !cstate)
120 return NULL;
121
122 if (!volt)
123 return cstate;
124
125 max_volt = volt->max_uv;
126 if (volt->max0_id != 0xff)
127 max_volt = min(max_volt,
128 nvkm_volt_map(volt, volt->max0_id, clk->temp));
129 if (volt->max1_id != 0xff)
130 max_volt = min(max_volt,
131 nvkm_volt_map(volt, volt->max1_id, clk->temp));
132 if (volt->max2_id != 0xff)
133 max_volt = min(max_volt,
134 nvkm_volt_map(volt, volt->max2_id, clk->temp));
135
136 list_for_each_entry_from_reverse(cstate, &pstate->list, head) {
137 if (nvkm_cstate_valid(clk, cstate, max_volt, clk->temp))
138 return cstate;
139 }
140
141 return NULL;
142 }
143
144 static struct nvkm_cstate *
nvkm_cstate_get(struct nvkm_clk * clk,struct nvkm_pstate * pstate,int cstatei)145 nvkm_cstate_get(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)
146 {
147 struct nvkm_cstate *cstate;
148 if (cstatei == NVKM_CLK_CSTATE_HIGHEST)
149 return list_last_entry(&pstate->list, typeof(*cstate), head);
150 else {
151 list_for_each_entry(cstate, &pstate->list, head) {
152 if (cstate->id == cstatei)
153 return cstate;
154 }
155 }
156 return NULL;
157 }
158
159 static int
nvkm_cstate_prog(struct nvkm_clk * clk,struct nvkm_pstate * pstate,int cstatei)160 nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)
161 {
162 struct nvkm_subdev *subdev = &clk->subdev;
163 struct nvkm_device *device = subdev->device;
164 struct nvkm_therm *therm = device->therm;
165 struct nvkm_volt *volt = device->volt;
166 struct nvkm_cstate *cstate;
167 int ret;
168
169 if (!list_empty(&pstate->list)) {
170 cstate = nvkm_cstate_get(clk, pstate, cstatei);
171 cstate = nvkm_cstate_find_best(clk, pstate, cstate);
172 if (!cstate)
173 return -EINVAL;
174 } else {
175 cstate = &pstate->base;
176 }
177
178 if (therm) {
179 ret = nvkm_therm_cstate(therm, pstate->fanspeed, +1);
180 if (ret && ret != -ENODEV) {
181 nvkm_error(subdev, "failed to raise fan speed: %d\n", ret);
182 return ret;
183 }
184 }
185
186 if (volt) {
187 ret = nvkm_volt_set_id(volt, cstate->voltage,
188 pstate->base.voltage, clk->temp, +1);
189 if (ret && ret != -ENODEV) {
190 nvkm_error(subdev, "failed to raise voltage: %d\n", ret);
191 return ret;
192 }
193 }
194
195 ret = clk->func->calc(clk, cstate);
196 if (ret == 0) {
197 ret = clk->func->prog(clk);
198 clk->func->tidy(clk);
199 }
200
201 if (volt) {
202 int err = nvkm_volt_set_id(volt, cstate->voltage,
203 pstate->base.voltage, clk->temp, -1);
204
205 if (err && err != -ENODEV)
206 nvkm_error(subdev, "failed to lower voltage: %d\n", err);
207 }
208
209 if (therm) {
210 int err = nvkm_therm_cstate(therm, pstate->fanspeed, -1);
211
212 if (err && err != -ENODEV)
213 nvkm_error(subdev, "failed to lower fan speed: %d\n", err);
214 }
215
216 return ret;
217 }
218
219 static void
nvkm_cstate_del(struct nvkm_cstate * cstate)220 nvkm_cstate_del(struct nvkm_cstate *cstate)
221 {
222 list_del(&cstate->head);
223 kfree(cstate);
224 }
225
226 static int
nvkm_cstate_new(struct nvkm_clk * clk,int idx,struct nvkm_pstate * pstate)227 nvkm_cstate_new(struct nvkm_clk *clk, int idx, struct nvkm_pstate *pstate)
228 {
229 struct nvkm_bios *bios = clk->subdev.device->bios;
230 struct nvkm_volt *volt = clk->subdev.device->volt;
231 const struct nvkm_domain *domain = clk->domains;
232 struct nvkm_cstate *cstate = NULL;
233 struct nvbios_cstepX cstepX;
234 u8 ver, hdr;
235 u32 data;
236
237 data = nvbios_cstepXp(bios, idx, &ver, &hdr, &cstepX);
238 if (!data)
239 return -ENOENT;
240
241 if (volt && nvkm_volt_map_min(volt, cstepX.voltage) > volt->max_uv)
242 return -EINVAL;
243
244 cstate = kzalloc_obj(*cstate);
245 if (!cstate)
246 return -ENOMEM;
247
248 *cstate = pstate->base;
249 cstate->voltage = cstepX.voltage;
250 cstate->id = idx;
251
252 while (domain && domain->name != nv_clk_src_max) {
253 if (domain->flags & NVKM_CLK_DOM_FLAG_CORE) {
254 u32 freq = nvkm_clk_adjust(clk, true, pstate->pstate,
255 domain->bios, cstepX.freq);
256 cstate->domain[domain->name] = freq;
257 }
258 domain++;
259 }
260
261 list_add(&cstate->head, &pstate->list);
262 return 0;
263 }
264
265 /******************************************************************************
266 * P-States
267 *****************************************************************************/
268 static int
nvkm_pstate_prog(struct nvkm_clk * clk,int pstatei)269 nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)
270 {
271 struct nvkm_subdev *subdev = &clk->subdev;
272 struct nvkm_fb *fb = subdev->device->fb;
273 struct nvkm_pci *pci = subdev->device->pci;
274 struct nvkm_pstate *pstate;
275 bool found = false;
276 int ret, idx = 0;
277
278 list_for_each_entry(pstate, &clk->states, head) {
279 if (idx++ == pstatei) {
280 found = true;
281 break;
282 }
283 }
284
285 if (!found)
286 return -EINVAL;
287
288 nvkm_debug(subdev, "setting performance state %d\n", pstatei);
289 clk->pstate = pstatei;
290
291 nvkm_pcie_set_link(pci, pstate->pcie_speed, pstate->pcie_width);
292
293 if (fb && fb->ram && fb->ram->func->calc) {
294 struct nvkm_ram *ram = fb->ram;
295 int khz = pstate->base.domain[nv_clk_src_mem];
296 do {
297 ret = ram->func->calc(ram, khz);
298 if (ret == 0)
299 ret = ram->func->prog(ram);
300 } while (ret > 0);
301 ram->func->tidy(ram);
302 }
303
304 return nvkm_cstate_prog(clk, pstate, NVKM_CLK_CSTATE_HIGHEST);
305 }
306
307 static void
nvkm_pstate_work(struct work_struct * work)308 nvkm_pstate_work(struct work_struct *work)
309 {
310 struct nvkm_clk *clk = container_of(work, typeof(*clk), work);
311 struct nvkm_subdev *subdev = &clk->subdev;
312 int pstate;
313
314 if (!atomic_xchg(&clk->waiting, 0))
315 return;
316 clk->pwrsrc = power_supply_is_system_supplied();
317
318 nvkm_trace(subdev, "P %d PWR %d U(AC) %d U(DC) %d A %d T %d°C D %d\n",
319 clk->pstate, clk->pwrsrc, clk->ustate_ac, clk->ustate_dc,
320 clk->astate, clk->temp, clk->dstate);
321
322 pstate = clk->pwrsrc ? clk->ustate_ac : clk->ustate_dc;
323 if (clk->state_nr && pstate != -1) {
324 pstate = (pstate < 0) ? clk->astate : pstate;
325 pstate = min(pstate, clk->state_nr - 1);
326 pstate = max(pstate, clk->dstate);
327 } else {
328 pstate = clk->pstate = -1;
329 }
330
331 nvkm_trace(subdev, "-> %d\n", pstate);
332 if (pstate != clk->pstate) {
333 int ret = nvkm_pstate_prog(clk, pstate);
334 if (ret) {
335 nvkm_error(subdev, "error setting pstate %d: %d\n",
336 pstate, ret);
337 }
338 }
339
340 wake_up_all(&clk->wait);
341 }
342
343 static int
nvkm_pstate_calc(struct nvkm_clk * clk,bool wait)344 nvkm_pstate_calc(struct nvkm_clk *clk, bool wait)
345 {
346 atomic_set(&clk->waiting, 1);
347 schedule_work(&clk->work);
348 if (wait)
349 wait_event(clk->wait, !atomic_read(&clk->waiting));
350 return 0;
351 }
352
353 static void
nvkm_pstate_info(struct nvkm_clk * clk,struct nvkm_pstate * pstate)354 nvkm_pstate_info(struct nvkm_clk *clk, struct nvkm_pstate *pstate)
355 {
356 const struct nvkm_domain *clock = clk->domains - 1;
357 struct nvkm_cstate *cstate;
358 struct nvkm_subdev *subdev = &clk->subdev;
359 char info[3][32] = { "", "", "" };
360 char name[4] = "--";
361 int i = -1;
362
363 if (pstate->pstate != 0xff)
364 snprintf(name, sizeof(name), "%02x", pstate->pstate);
365
366 while ((++clock)->name != nv_clk_src_max) {
367 u32 lo = pstate->base.domain[clock->name];
368 u32 hi = lo;
369 if (hi == 0)
370 continue;
371
372 nvkm_debug(subdev, "%02x: %10d KHz\n", clock->name, lo);
373 list_for_each_entry(cstate, &pstate->list, head) {
374 u32 freq = cstate->domain[clock->name];
375 lo = min(lo, freq);
376 hi = max(hi, freq);
377 nvkm_debug(subdev, "%10d KHz\n", freq);
378 }
379
380 if (clock->mname && ++i < ARRAY_SIZE(info)) {
381 lo /= clock->mdiv;
382 hi /= clock->mdiv;
383 if (lo == hi) {
384 snprintf(info[i], sizeof(info[i]), "%s %d MHz",
385 clock->mname, lo);
386 } else {
387 snprintf(info[i], sizeof(info[i]),
388 "%s %d-%d MHz", clock->mname, lo, hi);
389 }
390 }
391 }
392
393 nvkm_debug(subdev, "%s: %s %s %s\n", name, info[0], info[1], info[2]);
394 }
395
396 static void
nvkm_pstate_del(struct nvkm_pstate * pstate)397 nvkm_pstate_del(struct nvkm_pstate *pstate)
398 {
399 struct nvkm_cstate *cstate, *temp;
400
401 list_for_each_entry_safe(cstate, temp, &pstate->list, head) {
402 nvkm_cstate_del(cstate);
403 }
404
405 list_del(&pstate->head);
406 kfree(pstate);
407 }
408
409 static int
nvkm_pstate_new(struct nvkm_clk * clk,int idx)410 nvkm_pstate_new(struct nvkm_clk *clk, int idx)
411 {
412 struct nvkm_bios *bios = clk->subdev.device->bios;
413 const struct nvkm_domain *domain = clk->domains - 1;
414 struct nvkm_pstate *pstate;
415 struct nvkm_cstate *cstate;
416 struct nvbios_cstepE cstepE;
417 struct nvbios_perfE perfE;
418 u8 ver, hdr, cnt, len;
419 u32 data;
420
421 data = nvbios_perfEp(bios, idx, &ver, &hdr, &cnt, &len, &perfE);
422 if (!data)
423 return -EINVAL;
424 if (perfE.pstate == 0xff)
425 return 0;
426
427 pstate = kzalloc_obj(*pstate);
428 if (!pstate)
429 return -ENOMEM;
430
431 INIT_LIST_HEAD(&pstate->list);
432
433 pstate->pstate = perfE.pstate;
434 pstate->fanspeed = perfE.fanspeed;
435 pstate->pcie_speed = perfE.pcie_speed;
436 pstate->pcie_width = perfE.pcie_width;
437 cstate = &pstate->base;
438 cstate->voltage = perfE.voltage;
439 cstate->domain[nv_clk_src_core] = perfE.core;
440 cstate->domain[nv_clk_src_shader] = perfE.shader;
441 cstate->domain[nv_clk_src_mem] = perfE.memory;
442 cstate->domain[nv_clk_src_vdec] = perfE.vdec;
443 cstate->domain[nv_clk_src_dom6] = perfE.disp;
444
445 while (ver >= 0x40 && (++domain)->name != nv_clk_src_max) {
446 struct nvbios_perfS perfS;
447 u8 sver = ver, shdr = hdr;
448 u32 perfSe = nvbios_perfSp(bios, data, domain->bios,
449 &sver, &shdr, cnt, len, &perfS);
450 if (perfSe == 0 || sver != 0x40)
451 continue;
452
453 if (domain->flags & NVKM_CLK_DOM_FLAG_CORE) {
454 perfS.v40.freq = nvkm_clk_adjust(clk, false,
455 pstate->pstate,
456 domain->bios,
457 perfS.v40.freq);
458 }
459
460 cstate->domain[domain->name] = perfS.v40.freq;
461 }
462
463 data = nvbios_cstepEm(bios, pstate->pstate, &ver, &hdr, &cstepE);
464 if (data) {
465 int idx = cstepE.index;
466 do {
467 nvkm_cstate_new(clk, idx, pstate);
468 } while(idx--);
469 }
470
471 nvkm_pstate_info(clk, pstate);
472 list_add_tail(&pstate->head, &clk->states);
473 clk->state_nr++;
474 return 0;
475 }
476
477 /******************************************************************************
478 * Adjustment triggers
479 *****************************************************************************/
480 static int
nvkm_clk_ustate_update(struct nvkm_clk * clk,int req)481 nvkm_clk_ustate_update(struct nvkm_clk *clk, int req)
482 {
483 struct nvkm_pstate *pstate;
484 bool found = false;
485 int i = 0;
486
487 if (!clk->allow_reclock)
488 return -ENOSYS;
489
490 if (req != -1 && req != -2) {
491 list_for_each_entry(pstate, &clk->states, head) {
492 if (pstate->pstate == req) {
493 found = true;
494 break;
495 }
496 i++;
497 }
498
499 if (!found)
500 return -EINVAL;
501 req = i;
502 }
503
504 return req + 2;
505 }
506
507 static int
nvkm_clk_nstate(struct nvkm_clk * clk,const char * mode,int arglen)508 nvkm_clk_nstate(struct nvkm_clk *clk, const char *mode, int arglen)
509 {
510 int ret = 1;
511
512 if (clk->allow_reclock && !strncasecmpz(mode, "auto", arglen))
513 return -2;
514
515 if (strncasecmpz(mode, "disabled", arglen)) {
516 char save = mode[arglen];
517 long v;
518
519 ((char *)mode)[arglen] = '\0';
520 if (!kstrtol(mode, 0, &v)) {
521 ret = nvkm_clk_ustate_update(clk, v);
522 if (ret < 0)
523 ret = 1;
524 }
525 ((char *)mode)[arglen] = save;
526 }
527
528 return ret - 2;
529 }
530
531 int
nvkm_clk_ustate(struct nvkm_clk * clk,int req,int pwr)532 nvkm_clk_ustate(struct nvkm_clk *clk, int req, int pwr)
533 {
534 int ret = nvkm_clk_ustate_update(clk, req);
535 if (ret >= 0) {
536 if (ret -= 2, pwr) clk->ustate_ac = ret;
537 else clk->ustate_dc = ret;
538 return nvkm_pstate_calc(clk, true);
539 }
540 return ret;
541 }
542
543 int
nvkm_clk_astate(struct nvkm_clk * clk,int req,int rel,bool wait)544 nvkm_clk_astate(struct nvkm_clk *clk, int req, int rel, bool wait)
545 {
546 if (!rel) clk->astate = req;
547 if ( rel) clk->astate += rel;
548 clk->astate = min(clk->astate, clk->state_nr - 1);
549 clk->astate = max(clk->astate, 0);
550 return nvkm_pstate_calc(clk, wait);
551 }
552
553 int
nvkm_clk_tstate(struct nvkm_clk * clk,u8 temp)554 nvkm_clk_tstate(struct nvkm_clk *clk, u8 temp)
555 {
556 if (clk->temp == temp)
557 return 0;
558 clk->temp = temp;
559 return nvkm_pstate_calc(clk, false);
560 }
561
562 int
nvkm_clk_dstate(struct nvkm_clk * clk,int req,int rel)563 nvkm_clk_dstate(struct nvkm_clk *clk, int req, int rel)
564 {
565 if (!rel) clk->dstate = req;
566 if ( rel) clk->dstate += rel;
567 clk->dstate = min(clk->dstate, clk->state_nr - 1);
568 clk->dstate = max(clk->dstate, 0);
569 return nvkm_pstate_calc(clk, true);
570 }
571
572 int
nvkm_clk_pwrsrc(struct nvkm_device * device)573 nvkm_clk_pwrsrc(struct nvkm_device *device)
574 {
575 if (device->clk)
576 return nvkm_pstate_calc(device->clk, false);
577 return 0;
578 }
579
580 /******************************************************************************
581 * subdev base class implementation
582 *****************************************************************************/
583
584 int
nvkm_clk_read(struct nvkm_clk * clk,enum nv_clk_src src)585 nvkm_clk_read(struct nvkm_clk *clk, enum nv_clk_src src)
586 {
587 return clk->func->read(clk, src);
588 }
589
590 static int
nvkm_clk_fini(struct nvkm_subdev * subdev,enum nvkm_suspend_state suspend)591 nvkm_clk_fini(struct nvkm_subdev *subdev, enum nvkm_suspend_state suspend)
592 {
593 struct nvkm_clk *clk = nvkm_clk(subdev);
594 flush_work(&clk->work);
595 if (clk->func->fini)
596 clk->func->fini(clk);
597 return 0;
598 }
599
600 static int
nvkm_clk_init(struct nvkm_subdev * subdev)601 nvkm_clk_init(struct nvkm_subdev *subdev)
602 {
603 struct nvkm_clk *clk = nvkm_clk(subdev);
604 const struct nvkm_domain *clock = clk->domains;
605 int ret;
606
607 memset(&clk->bstate, 0x00, sizeof(clk->bstate));
608 INIT_LIST_HEAD(&clk->bstate.list);
609 clk->bstate.pstate = 0xff;
610
611 while (clock->name != nv_clk_src_max) {
612 ret = nvkm_clk_read(clk, clock->name);
613 if (ret < 0) {
614 nvkm_error(subdev, "%02x freq unknown\n", clock->name);
615 return ret;
616 }
617 clk->bstate.base.domain[clock->name] = ret;
618 clock++;
619 }
620
621 nvkm_pstate_info(clk, &clk->bstate);
622
623 if (clk->func->init)
624 return clk->func->init(clk);
625
626 clk->astate = clk->state_nr - 1;
627 clk->dstate = 0;
628 clk->pstate = -1;
629 clk->temp = 90; /* reasonable default value */
630 nvkm_pstate_calc(clk, true);
631 return 0;
632 }
633
634 static void *
nvkm_clk_dtor(struct nvkm_subdev * subdev)635 nvkm_clk_dtor(struct nvkm_subdev *subdev)
636 {
637 struct nvkm_clk *clk = nvkm_clk(subdev);
638 struct nvkm_pstate *pstate, *temp;
639
640 /* Early return if the pstates have been provided statically */
641 if (clk->func->pstates)
642 return clk;
643
644 list_for_each_entry_safe(pstate, temp, &clk->states, head) {
645 nvkm_pstate_del(pstate);
646 }
647
648 return clk;
649 }
650
651 static const struct nvkm_subdev_func
652 nvkm_clk = {
653 .dtor = nvkm_clk_dtor,
654 .init = nvkm_clk_init,
655 .fini = nvkm_clk_fini,
656 };
657
658 int
nvkm_clk_ctor(const struct nvkm_clk_func * func,struct nvkm_device * device,enum nvkm_subdev_type type,int inst,bool allow_reclock,struct nvkm_clk * clk)659 nvkm_clk_ctor(const struct nvkm_clk_func *func, struct nvkm_device *device,
660 enum nvkm_subdev_type type, int inst, bool allow_reclock, struct nvkm_clk *clk)
661 {
662 struct nvkm_subdev *subdev = &clk->subdev;
663 struct nvkm_bios *bios = device->bios;
664 int ret, idx, arglen;
665 const char *mode;
666 struct nvbios_vpstate_header h;
667
668 nvkm_subdev_ctor(&nvkm_clk, device, type, inst, subdev);
669
670 if (bios && !nvbios_vpstate_parse(bios, &h)) {
671 struct nvbios_vpstate_entry base, boost;
672 if (!nvbios_vpstate_entry(bios, &h, h.boost_id, &boost))
673 clk->boost_khz = boost.clock_mhz * 1000;
674 if (!nvbios_vpstate_entry(bios, &h, h.base_id, &base))
675 clk->base_khz = base.clock_mhz * 1000;
676 }
677
678 clk->func = func;
679 INIT_LIST_HEAD(&clk->states);
680 clk->domains = func->domains;
681 clk->ustate_ac = -1;
682 clk->ustate_dc = -1;
683 clk->allow_reclock = allow_reclock;
684
685 INIT_WORK(&clk->work, nvkm_pstate_work);
686 init_waitqueue_head(&clk->wait);
687 atomic_set(&clk->waiting, 0);
688
689 /* If no pstates are provided, try and fetch them from the BIOS */
690 if (!func->pstates) {
691 idx = 0;
692 do {
693 ret = nvkm_pstate_new(clk, idx++);
694 } while (ret == 0);
695 } else {
696 for (idx = 0; idx < func->nr_pstates; idx++)
697 list_add_tail(&func->pstates[idx].head, &clk->states);
698 clk->state_nr = func->nr_pstates;
699 }
700
701 mode = nvkm_stropt(device->cfgopt, "NvClkMode", &arglen);
702 if (mode) {
703 clk->ustate_ac = nvkm_clk_nstate(clk, mode, arglen);
704 clk->ustate_dc = nvkm_clk_nstate(clk, mode, arglen);
705 }
706
707 mode = nvkm_stropt(device->cfgopt, "NvClkModeAC", &arglen);
708 if (mode)
709 clk->ustate_ac = nvkm_clk_nstate(clk, mode, arglen);
710
711 mode = nvkm_stropt(device->cfgopt, "NvClkModeDC", &arglen);
712 if (mode)
713 clk->ustate_dc = nvkm_clk_nstate(clk, mode, arglen);
714
715 clk->boost_mode = nvkm_longopt(device->cfgopt, "NvBoost",
716 NVKM_CLK_BOOST_NONE);
717 return 0;
718 }
719
720 int
nvkm_clk_new_(const struct nvkm_clk_func * func,struct nvkm_device * device,enum nvkm_subdev_type type,int inst,bool allow_reclock,struct nvkm_clk ** pclk)721 nvkm_clk_new_(const struct nvkm_clk_func *func, struct nvkm_device *device,
722 enum nvkm_subdev_type type, int inst, bool allow_reclock, struct nvkm_clk **pclk)
723 {
724 if (!(*pclk = kzalloc_obj(**pclk)))
725 return -ENOMEM;
726 return nvkm_clk_ctor(func, device, type, inst, allow_reclock, *pclk);
727 }
728