1 // SPDX-License-Identifier: GPL-2.0
2 /* Marvell RVU Admin Function driver
3 *
4 * Copyright (C) 2019 Marvell.
5 *
6 */
7
8 #ifdef CONFIG_DEBUG_FS
9
10 #include <linux/fs.h>
11 #include <linux/debugfs.h>
12 #include <linux/module.h>
13 #include <linux/pci.h>
14
15 #include "rvu_struct.h"
16 #include "rvu_reg.h"
17 #include "rvu.h"
18 #include "cgx.h"
19 #include "lmac_common.h"
20 #include "npc.h"
21 #include "rvu_npc_hash.h"
22 #include "mcs.h"
23
24 #include "cn20k/reg.h"
25 #include "cn20k/debugfs.h"
26 #include "cn20k/npc.h"
27
28 #define DEBUGFS_DIR_NAME "octeontx2"
29
30 enum {
31 CGX_STAT0,
32 CGX_STAT1,
33 CGX_STAT2,
34 CGX_STAT3,
35 CGX_STAT4,
36 CGX_STAT5,
37 CGX_STAT6,
38 CGX_STAT7,
39 CGX_STAT8,
40 CGX_STAT9,
41 CGX_STAT10,
42 CGX_STAT11,
43 CGX_STAT12,
44 CGX_STAT13,
45 CGX_STAT14,
46 CGX_STAT15,
47 CGX_STAT16,
48 CGX_STAT17,
49 CGX_STAT18,
50 };
51
52 static char *cgx_rx_stats_fields[] = {
53 [CGX_STAT0] = "Received packets",
54 [CGX_STAT1] = "Octets of received packets",
55 [CGX_STAT2] = "Received PAUSE packets",
56 [CGX_STAT3] = "Received PAUSE and control packets",
57 [CGX_STAT4] = "Filtered DMAC0 (NIX-bound) packets",
58 [CGX_STAT5] = "Filtered DMAC0 (NIX-bound) octets",
59 [CGX_STAT6] = "Packets dropped due to RX FIFO full",
60 [CGX_STAT7] = "Octets dropped due to RX FIFO full",
61 [CGX_STAT8] = "Error packets",
62 [CGX_STAT9] = "Filtered DMAC1 (NCSI-bound) packets",
63 [CGX_STAT10] = "Filtered DMAC1 (NCSI-bound) octets",
64 [CGX_STAT11] = "NCSI-bound packets dropped",
65 [CGX_STAT12] = "NCSI-bound octets dropped",
66 };
67
68 static char *cgx_tx_stats_fields[] = {
69 [CGX_STAT0] = "Packets dropped due to excessive collisions",
70 [CGX_STAT1] = "Packets dropped due to excessive deferral",
71 [CGX_STAT2] = "Multiple collisions before successful transmission",
72 [CGX_STAT3] = "Single collisions before successful transmission",
73 [CGX_STAT4] = "Total octets sent on the interface",
74 [CGX_STAT5] = "Total frames sent on the interface",
75 [CGX_STAT6] = "Packets sent with an octet count < 64",
76 [CGX_STAT7] = "Packets sent with an octet count == 64",
77 [CGX_STAT8] = "Packets sent with an octet count of 65-127",
78 [CGX_STAT9] = "Packets sent with an octet count of 128-255",
79 [CGX_STAT10] = "Packets sent with an octet count of 256-511",
80 [CGX_STAT11] = "Packets sent with an octet count of 512-1023",
81 [CGX_STAT12] = "Packets sent with an octet count of 1024-1518",
82 [CGX_STAT13] = "Packets sent with an octet count of > 1518",
83 [CGX_STAT14] = "Packets sent to a broadcast DMAC",
84 [CGX_STAT15] = "Packets sent to the multicast DMAC",
85 [CGX_STAT16] = "Transmit underflow and were truncated",
86 [CGX_STAT17] = "Control/PAUSE packets sent",
87 };
88
89 static char *rpm_rx_stats_fields[] = {
90 "Octets of received packets",
91 "Octets of received packets with out error",
92 "Received packets with alignment errors",
93 "Control/PAUSE packets received",
94 "Packets received with Frame too long Errors",
95 "Packets received with a1nrange length Errors",
96 "Received packets",
97 "Packets received with FrameCheckSequenceErrors",
98 "Packets received with VLAN header",
99 "Error packets",
100 "Packets received with unicast DMAC",
101 "Packets received with multicast DMAC",
102 "Packets received with broadcast DMAC",
103 "Dropped packets",
104 "Total frames received on interface",
105 "Packets received with an octet count < 64",
106 "Packets received with an octet count == 64",
107 "Packets received with an octet count of 65-127",
108 "Packets received with an octet count of 128-255",
109 "Packets received with an octet count of 256-511",
110 "Packets received with an octet count of 512-1023",
111 "Packets received with an octet count of 1024-1518",
112 "Packets received with an octet count of > 1518",
113 "Oversized Packets",
114 "Jabber Packets",
115 "Fragmented Packets",
116 "CBFC(class based flow control) pause frames received for class 0",
117 "CBFC pause frames received for class 1",
118 "CBFC pause frames received for class 2",
119 "CBFC pause frames received for class 3",
120 "CBFC pause frames received for class 4",
121 "CBFC pause frames received for class 5",
122 "CBFC pause frames received for class 6",
123 "CBFC pause frames received for class 7",
124 "CBFC pause frames received for class 8",
125 "CBFC pause frames received for class 9",
126 "CBFC pause frames received for class 10",
127 "CBFC pause frames received for class 11",
128 "CBFC pause frames received for class 12",
129 "CBFC pause frames received for class 13",
130 "CBFC pause frames received for class 14",
131 "CBFC pause frames received for class 15",
132 "MAC control packets received",
133 };
134
135 static char *rpm_tx_stats_fields[] = {
136 "Total octets sent on the interface",
137 "Total octets transmitted OK",
138 "Control/Pause frames sent",
139 "Total frames transmitted OK",
140 "Total frames sent with VLAN header",
141 "Error Packets",
142 "Packets sent to unicast DMAC",
143 "Packets sent to the multicast DMAC",
144 "Packets sent to a broadcast DMAC",
145 "Packets sent with an octet count == 64",
146 "Packets sent with an octet count of 65-127",
147 "Packets sent with an octet count of 128-255",
148 "Packets sent with an octet count of 256-511",
149 "Packets sent with an octet count of 512-1023",
150 "Packets sent with an octet count of 1024-1518",
151 "Packets sent with an octet count of > 1518",
152 "CBFC(class based flow control) pause frames transmitted for class 0",
153 "CBFC pause frames transmitted for class 1",
154 "CBFC pause frames transmitted for class 2",
155 "CBFC pause frames transmitted for class 3",
156 "CBFC pause frames transmitted for class 4",
157 "CBFC pause frames transmitted for class 5",
158 "CBFC pause frames transmitted for class 6",
159 "CBFC pause frames transmitted for class 7",
160 "CBFC pause frames transmitted for class 8",
161 "CBFC pause frames transmitted for class 9",
162 "CBFC pause frames transmitted for class 10",
163 "CBFC pause frames transmitted for class 11",
164 "CBFC pause frames transmitted for class 12",
165 "CBFC pause frames transmitted for class 13",
166 "CBFC pause frames transmitted for class 14",
167 "CBFC pause frames transmitted for class 15",
168 "MAC control packets sent",
169 "Total frames sent on the interface"
170 };
171
172 enum cpt_eng_type {
173 CPT_AE_TYPE = 1,
174 CPT_SE_TYPE = 2,
175 CPT_IE_TYPE = 3,
176 };
177
178 #define rvu_dbg_NULL NULL
179 #define rvu_dbg_open_NULL NULL
180
181 #define RVU_DEBUG_SEQ_FOPS(name, read_op, write_op) \
182 static int rvu_dbg_open_##name(struct inode *inode, struct file *file) \
183 { \
184 return single_open(file, rvu_dbg_##read_op, inode->i_private); \
185 } \
186 static const struct file_operations rvu_dbg_##name##_fops = { \
187 .owner = THIS_MODULE, \
188 .open = rvu_dbg_open_##name, \
189 .read = seq_read, \
190 .write = rvu_dbg_##write_op, \
191 .llseek = seq_lseek, \
192 .release = single_release, \
193 }
194
195 #define RVU_DEBUG_FOPS(name, read_op, write_op) \
196 static const struct file_operations rvu_dbg_##name##_fops = { \
197 .owner = THIS_MODULE, \
198 .open = simple_open, \
199 .read = rvu_dbg_##read_op, \
200 .write = rvu_dbg_##write_op \
201 }
202
203 static void print_nix_qsize(struct seq_file *filp, struct rvu_pfvf *pfvf);
204
rvu_dbg_mcs_port_stats_display(struct seq_file * filp,void * unused,int dir)205 static int rvu_dbg_mcs_port_stats_display(struct seq_file *filp, void *unused, int dir)
206 {
207 struct mcs *mcs = filp->private;
208 struct mcs_port_stats stats;
209 int lmac;
210
211 seq_puts(filp, "\n port stats\n");
212 mutex_lock(&mcs->stats_lock);
213 for_each_set_bit(lmac, &mcs->hw->lmac_bmap, mcs->hw->lmac_cnt) {
214 mcs_get_port_stats(mcs, &stats, lmac, dir);
215 seq_printf(filp, "port%d: Tcam Miss: %lld\n", lmac, stats.tcam_miss_cnt);
216 seq_printf(filp, "port%d: Parser errors: %lld\n", lmac, stats.parser_err_cnt);
217
218 if (dir == MCS_RX && mcs->hw->mcs_blks > 1)
219 seq_printf(filp, "port%d: Preempt error: %lld\n", lmac,
220 stats.preempt_err_cnt);
221 if (dir == MCS_TX)
222 seq_printf(filp, "port%d: Sectag insert error: %lld\n", lmac,
223 stats.sectag_insert_err_cnt);
224 }
225 mutex_unlock(&mcs->stats_lock);
226 return 0;
227 }
228
rvu_dbg_mcs_rx_port_stats_display(struct seq_file * filp,void * unused)229 static int rvu_dbg_mcs_rx_port_stats_display(struct seq_file *filp, void *unused)
230 {
231 return rvu_dbg_mcs_port_stats_display(filp, unused, MCS_RX);
232 }
233
234 RVU_DEBUG_SEQ_FOPS(mcs_rx_port_stats, mcs_rx_port_stats_display, NULL);
235
rvu_dbg_mcs_tx_port_stats_display(struct seq_file * filp,void * unused)236 static int rvu_dbg_mcs_tx_port_stats_display(struct seq_file *filp, void *unused)
237 {
238 return rvu_dbg_mcs_port_stats_display(filp, unused, MCS_TX);
239 }
240
241 RVU_DEBUG_SEQ_FOPS(mcs_tx_port_stats, mcs_tx_port_stats_display, NULL);
242
rvu_dbg_mcs_sa_stats_display(struct seq_file * filp,void * unused,int dir)243 static int rvu_dbg_mcs_sa_stats_display(struct seq_file *filp, void *unused, int dir)
244 {
245 struct mcs *mcs = filp->private;
246 struct mcs_sa_stats stats;
247 struct rsrc_bmap *map;
248 int sa_id;
249
250 if (dir == MCS_TX) {
251 map = &mcs->tx.sa;
252 mutex_lock(&mcs->stats_lock);
253 for_each_set_bit(sa_id, map->bmap, mcs->hw->sa_entries) {
254 seq_puts(filp, "\n TX SA stats\n");
255 mcs_get_sa_stats(mcs, &stats, sa_id, MCS_TX);
256 seq_printf(filp, "sa%d: Pkts encrypted: %lld\n", sa_id,
257 stats.pkt_encrypt_cnt);
258
259 seq_printf(filp, "sa%d: Pkts protected: %lld\n", sa_id,
260 stats.pkt_protected_cnt);
261 }
262 mutex_unlock(&mcs->stats_lock);
263 return 0;
264 }
265
266 /* RX stats */
267 map = &mcs->rx.sa;
268 mutex_lock(&mcs->stats_lock);
269 for_each_set_bit(sa_id, map->bmap, mcs->hw->sa_entries) {
270 seq_puts(filp, "\n RX SA stats\n");
271 mcs_get_sa_stats(mcs, &stats, sa_id, MCS_RX);
272 seq_printf(filp, "sa%d: Invalid pkts: %lld\n", sa_id, stats.pkt_invalid_cnt);
273 seq_printf(filp, "sa%d: Pkts no sa error: %lld\n", sa_id, stats.pkt_nosaerror_cnt);
274 seq_printf(filp, "sa%d: Pkts not valid: %lld\n", sa_id, stats.pkt_notvalid_cnt);
275 seq_printf(filp, "sa%d: Pkts ok: %lld\n", sa_id, stats.pkt_ok_cnt);
276 seq_printf(filp, "sa%d: Pkts no sa: %lld\n", sa_id, stats.pkt_nosa_cnt);
277 }
278 mutex_unlock(&mcs->stats_lock);
279 return 0;
280 }
281
rvu_dbg_mcs_rx_sa_stats_display(struct seq_file * filp,void * unused)282 static int rvu_dbg_mcs_rx_sa_stats_display(struct seq_file *filp, void *unused)
283 {
284 return rvu_dbg_mcs_sa_stats_display(filp, unused, MCS_RX);
285 }
286
287 RVU_DEBUG_SEQ_FOPS(mcs_rx_sa_stats, mcs_rx_sa_stats_display, NULL);
288
rvu_dbg_mcs_tx_sa_stats_display(struct seq_file * filp,void * unused)289 static int rvu_dbg_mcs_tx_sa_stats_display(struct seq_file *filp, void *unused)
290 {
291 return rvu_dbg_mcs_sa_stats_display(filp, unused, MCS_TX);
292 }
293
294 RVU_DEBUG_SEQ_FOPS(mcs_tx_sa_stats, mcs_tx_sa_stats_display, NULL);
295
rvu_dbg_mcs_tx_sc_stats_display(struct seq_file * filp,void * unused)296 static int rvu_dbg_mcs_tx_sc_stats_display(struct seq_file *filp, void *unused)
297 {
298 struct mcs *mcs = filp->private;
299 struct mcs_sc_stats stats;
300 struct rsrc_bmap *map;
301 int sc_id;
302
303 map = &mcs->tx.sc;
304 seq_puts(filp, "\n SC stats\n");
305
306 mutex_lock(&mcs->stats_lock);
307 for_each_set_bit(sc_id, map->bmap, mcs->hw->sc_entries) {
308 mcs_get_sc_stats(mcs, &stats, sc_id, MCS_TX);
309 seq_printf(filp, "\n=======sc%d======\n\n", sc_id);
310 seq_printf(filp, "sc%d: Pkts encrypted: %lld\n", sc_id, stats.pkt_encrypt_cnt);
311 seq_printf(filp, "sc%d: Pkts protected: %lld\n", sc_id, stats.pkt_protected_cnt);
312
313 if (mcs->hw->mcs_blks == 1) {
314 seq_printf(filp, "sc%d: Octets encrypted: %lld\n", sc_id,
315 stats.octet_encrypt_cnt);
316 seq_printf(filp, "sc%d: Octets protected: %lld\n", sc_id,
317 stats.octet_protected_cnt);
318 }
319 }
320 mutex_unlock(&mcs->stats_lock);
321 return 0;
322 }
323
324 RVU_DEBUG_SEQ_FOPS(mcs_tx_sc_stats, mcs_tx_sc_stats_display, NULL);
325
rvu_dbg_mcs_rx_sc_stats_display(struct seq_file * filp,void * unused)326 static int rvu_dbg_mcs_rx_sc_stats_display(struct seq_file *filp, void *unused)
327 {
328 struct mcs *mcs = filp->private;
329 struct mcs_sc_stats stats;
330 struct rsrc_bmap *map;
331 int sc_id;
332
333 map = &mcs->rx.sc;
334 seq_puts(filp, "\n SC stats\n");
335
336 mutex_lock(&mcs->stats_lock);
337 for_each_set_bit(sc_id, map->bmap, mcs->hw->sc_entries) {
338 mcs_get_sc_stats(mcs, &stats, sc_id, MCS_RX);
339 seq_printf(filp, "\n=======sc%d======\n\n", sc_id);
340 seq_printf(filp, "sc%d: Cam hits: %lld\n", sc_id, stats.hit_cnt);
341 seq_printf(filp, "sc%d: Invalid pkts: %lld\n", sc_id, stats.pkt_invalid_cnt);
342 seq_printf(filp, "sc%d: Late pkts: %lld\n", sc_id, stats.pkt_late_cnt);
343 seq_printf(filp, "sc%d: Notvalid pkts: %lld\n", sc_id, stats.pkt_notvalid_cnt);
344 seq_printf(filp, "sc%d: Unchecked pkts: %lld\n", sc_id, stats.pkt_unchecked_cnt);
345
346 if (mcs->hw->mcs_blks > 1) {
347 seq_printf(filp, "sc%d: Delay pkts: %lld\n", sc_id, stats.pkt_delay_cnt);
348 seq_printf(filp, "sc%d: Pkts ok: %lld\n", sc_id, stats.pkt_ok_cnt);
349 }
350 if (mcs->hw->mcs_blks == 1) {
351 seq_printf(filp, "sc%d: Octets decrypted: %lld\n", sc_id,
352 stats.octet_decrypt_cnt);
353 seq_printf(filp, "sc%d: Octets validated: %lld\n", sc_id,
354 stats.octet_validate_cnt);
355 }
356 }
357 mutex_unlock(&mcs->stats_lock);
358 return 0;
359 }
360
361 RVU_DEBUG_SEQ_FOPS(mcs_rx_sc_stats, mcs_rx_sc_stats_display, NULL);
362
rvu_dbg_mcs_flowid_stats_display(struct seq_file * filp,void * unused,int dir)363 static int rvu_dbg_mcs_flowid_stats_display(struct seq_file *filp, void *unused, int dir)
364 {
365 struct mcs *mcs = filp->private;
366 struct mcs_flowid_stats stats;
367 struct rsrc_bmap *map;
368 int flow_id;
369
370 seq_puts(filp, "\n Flowid stats\n");
371
372 if (dir == MCS_RX)
373 map = &mcs->rx.flow_ids;
374 else
375 map = &mcs->tx.flow_ids;
376
377 mutex_lock(&mcs->stats_lock);
378 for_each_set_bit(flow_id, map->bmap, mcs->hw->tcam_entries) {
379 mcs_get_flowid_stats(mcs, &stats, flow_id, dir);
380 seq_printf(filp, "Flowid%d: Hit:%lld\n", flow_id, stats.tcam_hit_cnt);
381 }
382 mutex_unlock(&mcs->stats_lock);
383 return 0;
384 }
385
rvu_dbg_mcs_tx_flowid_stats_display(struct seq_file * filp,void * unused)386 static int rvu_dbg_mcs_tx_flowid_stats_display(struct seq_file *filp, void *unused)
387 {
388 return rvu_dbg_mcs_flowid_stats_display(filp, unused, MCS_TX);
389 }
390
391 RVU_DEBUG_SEQ_FOPS(mcs_tx_flowid_stats, mcs_tx_flowid_stats_display, NULL);
392
rvu_dbg_mcs_rx_flowid_stats_display(struct seq_file * filp,void * unused)393 static int rvu_dbg_mcs_rx_flowid_stats_display(struct seq_file *filp, void *unused)
394 {
395 return rvu_dbg_mcs_flowid_stats_display(filp, unused, MCS_RX);
396 }
397
398 RVU_DEBUG_SEQ_FOPS(mcs_rx_flowid_stats, mcs_rx_flowid_stats_display, NULL);
399
rvu_dbg_mcs_tx_secy_stats_display(struct seq_file * filp,void * unused)400 static int rvu_dbg_mcs_tx_secy_stats_display(struct seq_file *filp, void *unused)
401 {
402 struct mcs *mcs = filp->private;
403 struct mcs_secy_stats stats;
404 struct rsrc_bmap *map;
405 int secy_id;
406
407 map = &mcs->tx.secy;
408 seq_puts(filp, "\n MCS TX secy stats\n");
409
410 mutex_lock(&mcs->stats_lock);
411 for_each_set_bit(secy_id, map->bmap, mcs->hw->secy_entries) {
412 mcs_get_tx_secy_stats(mcs, &stats, secy_id);
413 seq_printf(filp, "\n=======Secy%d======\n\n", secy_id);
414 seq_printf(filp, "secy%d: Ctrl bcast pkts: %lld\n", secy_id,
415 stats.ctl_pkt_bcast_cnt);
416 seq_printf(filp, "secy%d: Ctrl Mcast pkts: %lld\n", secy_id,
417 stats.ctl_pkt_mcast_cnt);
418 seq_printf(filp, "secy%d: Ctrl ucast pkts: %lld\n", secy_id,
419 stats.ctl_pkt_ucast_cnt);
420 seq_printf(filp, "secy%d: Ctrl octets: %lld\n", secy_id, stats.ctl_octet_cnt);
421 seq_printf(filp, "secy%d: Unctrl bcast cnt: %lld\n", secy_id,
422 stats.unctl_pkt_bcast_cnt);
423 seq_printf(filp, "secy%d: Unctrl mcast pkts: %lld\n", secy_id,
424 stats.unctl_pkt_mcast_cnt);
425 seq_printf(filp, "secy%d: Unctrl ucast pkts: %lld\n", secy_id,
426 stats.unctl_pkt_ucast_cnt);
427 seq_printf(filp, "secy%d: Unctrl octets: %lld\n", secy_id, stats.unctl_octet_cnt);
428 seq_printf(filp, "secy%d: Octet encrypted: %lld\n", secy_id,
429 stats.octet_encrypted_cnt);
430 seq_printf(filp, "secy%d: octet protected: %lld\n", secy_id,
431 stats.octet_protected_cnt);
432 seq_printf(filp, "secy%d: Pkts on active sa: %lld\n", secy_id,
433 stats.pkt_noactivesa_cnt);
434 seq_printf(filp, "secy%d: Pkts too long: %lld\n", secy_id, stats.pkt_toolong_cnt);
435 seq_printf(filp, "secy%d: Pkts untagged: %lld\n", secy_id, stats.pkt_untagged_cnt);
436 }
437 mutex_unlock(&mcs->stats_lock);
438 return 0;
439 }
440
441 RVU_DEBUG_SEQ_FOPS(mcs_tx_secy_stats, mcs_tx_secy_stats_display, NULL);
442
rvu_dbg_mcs_rx_secy_stats_display(struct seq_file * filp,void * unused)443 static int rvu_dbg_mcs_rx_secy_stats_display(struct seq_file *filp, void *unused)
444 {
445 struct mcs *mcs = filp->private;
446 struct mcs_secy_stats stats;
447 struct rsrc_bmap *map;
448 int secy_id;
449
450 map = &mcs->rx.secy;
451 seq_puts(filp, "\n MCS secy stats\n");
452
453 mutex_lock(&mcs->stats_lock);
454 for_each_set_bit(secy_id, map->bmap, mcs->hw->secy_entries) {
455 mcs_get_rx_secy_stats(mcs, &stats, secy_id);
456 seq_printf(filp, "\n=======Secy%d======\n\n", secy_id);
457 seq_printf(filp, "secy%d: Ctrl bcast pkts: %lld\n", secy_id,
458 stats.ctl_pkt_bcast_cnt);
459 seq_printf(filp, "secy%d: Ctrl Mcast pkts: %lld\n", secy_id,
460 stats.ctl_pkt_mcast_cnt);
461 seq_printf(filp, "secy%d: Ctrl ucast pkts: %lld\n", secy_id,
462 stats.ctl_pkt_ucast_cnt);
463 seq_printf(filp, "secy%d: Ctrl octets: %lld\n", secy_id, stats.ctl_octet_cnt);
464 seq_printf(filp, "secy%d: Unctrl bcast cnt: %lld\n", secy_id,
465 stats.unctl_pkt_bcast_cnt);
466 seq_printf(filp, "secy%d: Unctrl mcast pkts: %lld\n", secy_id,
467 stats.unctl_pkt_mcast_cnt);
468 seq_printf(filp, "secy%d: Unctrl ucast pkts: %lld\n", secy_id,
469 stats.unctl_pkt_ucast_cnt);
470 seq_printf(filp, "secy%d: Unctrl octets: %lld\n", secy_id, stats.unctl_octet_cnt);
471 seq_printf(filp, "secy%d: Octet decrypted: %lld\n", secy_id,
472 stats.octet_decrypted_cnt);
473 seq_printf(filp, "secy%d: octet validated: %lld\n", secy_id,
474 stats.octet_validated_cnt);
475 seq_printf(filp, "secy%d: Pkts on disable port: %lld\n", secy_id,
476 stats.pkt_port_disabled_cnt);
477 seq_printf(filp, "secy%d: Pkts with badtag: %lld\n", secy_id, stats.pkt_badtag_cnt);
478 seq_printf(filp, "secy%d: Pkts with no SA(sectag.tci.c=0): %lld\n", secy_id,
479 stats.pkt_nosa_cnt);
480 seq_printf(filp, "secy%d: Pkts with nosaerror: %lld\n", secy_id,
481 stats.pkt_nosaerror_cnt);
482 seq_printf(filp, "secy%d: Tagged ctrl pkts: %lld\n", secy_id,
483 stats.pkt_tagged_ctl_cnt);
484 seq_printf(filp, "secy%d: Untaged pkts: %lld\n", secy_id, stats.pkt_untaged_cnt);
485 if (mcs->hw->mcs_blks > 1)
486 seq_printf(filp, "secy%d: pkts notag: %lld\n", secy_id,
487 stats.pkt_notag_cnt);
488 else
489 seq_printf(filp, "secy%d: Ctrl pkts: %lld\n", secy_id, stats.pkt_ctl_cnt);
490 }
491 mutex_unlock(&mcs->stats_lock);
492 return 0;
493 }
494
495 RVU_DEBUG_SEQ_FOPS(mcs_rx_secy_stats, mcs_rx_secy_stats_display, NULL);
496
rvu_dbg_mcs_init(struct rvu * rvu)497 static void rvu_dbg_mcs_init(struct rvu *rvu)
498 {
499 struct mcs *mcs;
500 char dname[10];
501 int i;
502
503 if (!rvu->mcs_blk_cnt)
504 return;
505
506 rvu->rvu_dbg.mcs_root = debugfs_create_dir("mcs", rvu->rvu_dbg.root);
507
508 for (i = 0; i < rvu->mcs_blk_cnt; i++) {
509 mcs = mcs_get_pdata(i);
510
511 sprintf(dname, "mcs%d", i);
512 rvu->rvu_dbg.mcs = debugfs_create_dir(dname,
513 rvu->rvu_dbg.mcs_root);
514
515 rvu->rvu_dbg.mcs_rx = debugfs_create_dir("rx_stats", rvu->rvu_dbg.mcs);
516
517 debugfs_create_file("flowid", 0600, rvu->rvu_dbg.mcs_rx, mcs,
518 &rvu_dbg_mcs_rx_flowid_stats_fops);
519
520 debugfs_create_file("secy", 0600, rvu->rvu_dbg.mcs_rx, mcs,
521 &rvu_dbg_mcs_rx_secy_stats_fops);
522
523 debugfs_create_file("sc", 0600, rvu->rvu_dbg.mcs_rx, mcs,
524 &rvu_dbg_mcs_rx_sc_stats_fops);
525
526 debugfs_create_file("sa", 0600, rvu->rvu_dbg.mcs_rx, mcs,
527 &rvu_dbg_mcs_rx_sa_stats_fops);
528
529 debugfs_create_file("port", 0600, rvu->rvu_dbg.mcs_rx, mcs,
530 &rvu_dbg_mcs_rx_port_stats_fops);
531
532 rvu->rvu_dbg.mcs_tx = debugfs_create_dir("tx_stats", rvu->rvu_dbg.mcs);
533
534 debugfs_create_file("flowid", 0600, rvu->rvu_dbg.mcs_tx, mcs,
535 &rvu_dbg_mcs_tx_flowid_stats_fops);
536
537 debugfs_create_file("secy", 0600, rvu->rvu_dbg.mcs_tx, mcs,
538 &rvu_dbg_mcs_tx_secy_stats_fops);
539
540 debugfs_create_file("sc", 0600, rvu->rvu_dbg.mcs_tx, mcs,
541 &rvu_dbg_mcs_tx_sc_stats_fops);
542
543 debugfs_create_file("sa", 0600, rvu->rvu_dbg.mcs_tx, mcs,
544 &rvu_dbg_mcs_tx_sa_stats_fops);
545
546 debugfs_create_file("port", 0600, rvu->rvu_dbg.mcs_tx, mcs,
547 &rvu_dbg_mcs_tx_port_stats_fops);
548 }
549 }
550
551 #define LMT_MAPTBL_ENTRY_SIZE 16
552 /* Dump LMTST map table */
rvu_dbg_lmtst_map_table_display(struct file * filp,char __user * buffer,size_t count,loff_t * ppos)553 static ssize_t rvu_dbg_lmtst_map_table_display(struct file *filp,
554 char __user *buffer,
555 size_t count, loff_t *ppos)
556 {
557 struct rvu *rvu = filp->private_data;
558 u64 lmt_addr, val, tbl_base;
559 int pf, vf, num_vfs, hw_vfs;
560 void __iomem *lmt_map_base;
561 int apr_pfs, apr_vfs;
562 int buf_size = 10240;
563 size_t off = 0;
564 int index = 0;
565 char *buf;
566 int ret;
567
568 /* don't allow partial reads */
569 if (*ppos != 0)
570 return 0;
571
572 buf = kzalloc(buf_size, GFP_KERNEL);
573 if (!buf)
574 return -ENOMEM;
575
576 tbl_base = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_MAP_BASE);
577 val = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_CFG);
578 apr_vfs = 1 << (val & 0xF);
579 apr_pfs = 1 << ((val >> 4) & 0x7);
580
581 lmt_map_base = ioremap_wc(tbl_base, apr_pfs * apr_vfs *
582 LMT_MAPTBL_ENTRY_SIZE);
583 if (!lmt_map_base) {
584 dev_err(rvu->dev, "Failed to setup lmt map table mapping!!\n");
585 kfree(buf);
586 return false;
587 }
588
589 off += scnprintf(&buf[off], buf_size - 1 - off,
590 "\n\t\t\t\t\tLmtst Map Table Entries");
591 off += scnprintf(&buf[off], buf_size - 1 - off,
592 "\n\t\t\t\t\t=======================");
593 off += scnprintf(&buf[off], buf_size - 1 - off, "\nPcifunc\t\t\t");
594 off += scnprintf(&buf[off], buf_size - 1 - off, "Table Index\t\t");
595 off += scnprintf(&buf[off], buf_size - 1 - off,
596 "Lmtline Base (word 0)\t\t");
597 off += scnprintf(&buf[off], buf_size - 1 - off,
598 "Lmt Map Entry (word 1)");
599 off += scnprintf(&buf[off], buf_size - 1 - off, "\n");
600 for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
601 off += scnprintf(&buf[off], buf_size - 1 - off, "PF%d \t\t\t",
602 pf);
603
604 index = pf * apr_vfs * LMT_MAPTBL_ENTRY_SIZE;
605 off += scnprintf(&buf[off], buf_size - 1 - off, " 0x%llx\t\t",
606 (tbl_base + index));
607 lmt_addr = readq(lmt_map_base + index);
608 off += scnprintf(&buf[off], buf_size - 1 - off,
609 " 0x%016llx\t\t", lmt_addr);
610 index += 8;
611 val = readq(lmt_map_base + index);
612 off += scnprintf(&buf[off], buf_size - 1 - off, " 0x%016llx\n",
613 val);
614 /* Reading num of VFs per PF */
615 rvu_get_pf_numvfs(rvu, pf, &num_vfs, &hw_vfs);
616 for (vf = 0; vf < num_vfs; vf++) {
617 index = (pf * apr_vfs * LMT_MAPTBL_ENTRY_SIZE) +
618 ((vf + 1) * LMT_MAPTBL_ENTRY_SIZE);
619 off += scnprintf(&buf[off], buf_size - 1 - off,
620 "PF%d:VF%d \t\t", pf, vf);
621 off += scnprintf(&buf[off], buf_size - 1 - off,
622 " 0x%llx\t\t", (tbl_base + index));
623 lmt_addr = readq(lmt_map_base + index);
624 off += scnprintf(&buf[off], buf_size - 1 - off,
625 " 0x%016llx\t\t", lmt_addr);
626 index += 8;
627 val = readq(lmt_map_base + index);
628 off += scnprintf(&buf[off], buf_size - 1 - off,
629 " 0x%016llx\n", val);
630 }
631 }
632 off += scnprintf(&buf[off], buf_size - 1 - off, "\n");
633
634 ret = min(off, count);
635 if (copy_to_user(buffer, buf, ret))
636 ret = -EFAULT;
637 kfree(buf);
638
639 iounmap(lmt_map_base);
640 if (ret < 0)
641 return ret;
642
643 *ppos = ret;
644 return ret;
645 }
646
647 RVU_DEBUG_FOPS(lmtst_map_table, lmtst_map_table_display, NULL);
648
get_lf_str_list(const struct rvu_block * block,int pcifunc,char * lfs)649 static void get_lf_str_list(const struct rvu_block *block, int pcifunc,
650 char *lfs)
651 {
652 int lf = 0, seq = 0, len = 0, prev_lf = block->lf.max;
653
654 for_each_set_bit(lf, block->lf.bmap, block->lf.max) {
655 if (lf >= block->lf.max)
656 break;
657
658 if (block->fn_map[lf] != pcifunc)
659 continue;
660
661 if (lf == prev_lf + 1) {
662 prev_lf = lf;
663 seq = 1;
664 continue;
665 }
666
667 if (seq)
668 len += sprintf(lfs + len, "-%d,%d", prev_lf, lf);
669 else
670 len += (len ? sprintf(lfs + len, ",%d", lf) :
671 sprintf(lfs + len, "%d", lf));
672
673 prev_lf = lf;
674 seq = 0;
675 }
676
677 if (seq)
678 len += sprintf(lfs + len, "-%d", prev_lf);
679
680 lfs[len] = '\0';
681 }
682
get_max_column_width(struct rvu * rvu)683 static int get_max_column_width(struct rvu *rvu)
684 {
685 int index, pf, vf, lf_str_size = 12, buf_size = 256;
686 struct rvu_block block;
687 u16 pcifunc;
688 char *buf;
689
690 buf = kzalloc(buf_size, GFP_KERNEL);
691 if (!buf)
692 return -ENOMEM;
693
694 for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
695 for (vf = 0; vf <= rvu->hw->total_vfs; vf++) {
696 pcifunc = rvu_make_pcifunc(rvu->pdev, pf, vf);
697 if (!pcifunc)
698 continue;
699
700 for (index = 0; index < BLK_COUNT; index++) {
701 block = rvu->hw->block[index];
702 if (!strlen(block.name))
703 continue;
704
705 get_lf_str_list(&block, pcifunc, buf);
706 if (lf_str_size <= strlen(buf))
707 lf_str_size = strlen(buf) + 1;
708 }
709 }
710 }
711
712 kfree(buf);
713 return lf_str_size;
714 }
715
716 /* Dumps current provisioning status of all RVU block LFs */
rvu_dbg_rsrc_attach_status(struct file * filp,char __user * buffer,size_t count,loff_t * ppos)717 static ssize_t rvu_dbg_rsrc_attach_status(struct file *filp,
718 char __user *buffer,
719 size_t count, loff_t *ppos)
720 {
721 int index, off = 0, flag = 0, len = 0, i = 0;
722 struct rvu *rvu = filp->private_data;
723 int bytes_not_copied = 0;
724 struct rvu_block block;
725 int pf, vf, pcifunc;
726 int buf_size = 2048;
727 int lf_str_size;
728 char *lfs;
729 char *buf;
730
731 /* don't allow partial reads */
732 if (*ppos != 0)
733 return 0;
734
735 buf = kzalloc(buf_size, GFP_KERNEL);
736 if (!buf)
737 return -ENOMEM;
738
739 /* Get the maximum width of a column */
740 lf_str_size = get_max_column_width(rvu);
741
742 lfs = kzalloc(lf_str_size, GFP_KERNEL);
743 if (!lfs) {
744 kfree(buf);
745 return -ENOMEM;
746 }
747 off += scnprintf(&buf[off], buf_size - 1 - off, "%-*s", lf_str_size,
748 "pcifunc");
749 for (index = 0; index < BLK_COUNT; index++)
750 if (strlen(rvu->hw->block[index].name)) {
751 off += scnprintf(&buf[off], buf_size - 1 - off,
752 "%-*s", lf_str_size,
753 rvu->hw->block[index].name);
754 }
755
756 off += scnprintf(&buf[off], buf_size - 1 - off, "\n");
757 bytes_not_copied = copy_to_user(buffer + (i * off), buf, off);
758 if (bytes_not_copied)
759 goto out;
760
761 i++;
762 *ppos += off;
763 for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
764 for (vf = 0; vf <= rvu->hw->total_vfs; vf++) {
765 off = 0;
766 flag = 0;
767 pcifunc = rvu_make_pcifunc(rvu->pdev, pf, vf);
768 if (!pcifunc)
769 continue;
770
771 if (vf) {
772 sprintf(lfs, "PF%d:VF%d", pf, vf - 1);
773 off = scnprintf(&buf[off],
774 buf_size - 1 - off,
775 "%-*s", lf_str_size, lfs);
776 } else {
777 sprintf(lfs, "PF%d", pf);
778 off = scnprintf(&buf[off],
779 buf_size - 1 - off,
780 "%-*s", lf_str_size, lfs);
781 }
782
783 for (index = 0; index < BLK_COUNT; index++) {
784 block = rvu->hw->block[index];
785 if (!strlen(block.name))
786 continue;
787 len = 0;
788 lfs[len] = '\0';
789 get_lf_str_list(&block, pcifunc, lfs);
790 if (strlen(lfs))
791 flag = 1;
792
793 off += scnprintf(&buf[off], buf_size - 1 - off,
794 "%-*s", lf_str_size, lfs);
795 }
796 if (flag) {
797 off += scnprintf(&buf[off],
798 buf_size - 1 - off, "\n");
799 bytes_not_copied = copy_to_user(buffer +
800 (i * off),
801 buf, off);
802 if (bytes_not_copied)
803 goto out;
804
805 i++;
806 *ppos += off;
807 }
808 }
809 }
810
811 out:
812 kfree(lfs);
813 kfree(buf);
814 if (bytes_not_copied)
815 return -EFAULT;
816
817 return *ppos;
818 }
819
820 RVU_DEBUG_FOPS(rsrc_status, rsrc_attach_status, NULL);
821
rvu_dbg_rvu_pf_cgx_map_display(struct seq_file * filp,void * unused)822 static int rvu_dbg_rvu_pf_cgx_map_display(struct seq_file *filp, void *unused)
823 {
824 char cgx[10], lmac[10], chan[10];
825 struct rvu *rvu = filp->private;
826 struct pci_dev *pdev = NULL;
827 struct mac_ops *mac_ops;
828 struct rvu_pfvf *pfvf;
829 int pf, domain, blkid;
830 u8 cgx_id, lmac_id;
831 u16 pcifunc;
832
833 domain = 2;
834 mac_ops = get_mac_ops(rvu_first_cgx_pdata(rvu));
835 /* There can be no CGX devices at all */
836 if (!mac_ops)
837 return 0;
838 seq_printf(filp, "PCI dev\t\tRVU PF Func\tNIX block\t%s\tLMAC\tCHAN\n",
839 mac_ops->name);
840 for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
841 if (!is_pf_cgxmapped(rvu, pf))
842 continue;
843
844 pdev = pci_get_domain_bus_and_slot(domain, pf + 1, 0);
845 if (!pdev)
846 continue;
847
848 cgx[0] = 0;
849 lmac[0] = 0;
850 pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);
851 pfvf = rvu_get_pfvf(rvu, pcifunc);
852
853 if (pfvf->nix_blkaddr == BLKADDR_NIX0)
854 blkid = 0;
855 else
856 blkid = 1;
857
858 rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id,
859 &lmac_id);
860 sprintf(cgx, "%s%d", mac_ops->name, cgx_id);
861 sprintf(lmac, "LMAC%d", lmac_id);
862 sprintf(chan, "%d",
863 rvu_nix_chan_cgx(rvu, cgx_id, lmac_id, 0));
864 seq_printf(filp, "%s\t0x%x\t\tNIX%d\t\t%s\t%s\t%s\n",
865 dev_name(&pdev->dev), pcifunc, blkid, cgx, lmac,
866 chan);
867
868 pci_dev_put(pdev);
869 }
870 return 0;
871 }
872
873 RVU_DEBUG_SEQ_FOPS(rvu_pf_cgx_map, rvu_pf_cgx_map_display, NULL);
874
rvu_dbg_rvu_fwdata_display(struct seq_file * s,void * unused)875 static int rvu_dbg_rvu_fwdata_display(struct seq_file *s, void *unused)
876 {
877 struct rvu *rvu = s->private;
878 struct rvu_fwdata *fwdata;
879 u8 mac[ETH_ALEN];
880 int count = 0, i;
881
882 if (!rvu->fwdata)
883 return -EAGAIN;
884
885 fwdata = rvu->fwdata;
886 seq_puts(s, "\nRVU Firmware Data:\n");
887 seq_puts(s, "\n\t\tPTP INFORMATION\n");
888 seq_puts(s, "\t\t===============\n");
889 seq_printf(s, "\t\texternal clockrate \t :%x\n",
890 fwdata->ptp_ext_clk_rate);
891 seq_printf(s, "\t\texternal timestamp \t :%x\n",
892 fwdata->ptp_ext_tstamp);
893 seq_puts(s, "\n");
894
895 seq_puts(s, "\n\t\tSDP CHANNEL INFORMATION\n");
896 seq_puts(s, "\t\t=======================\n");
897 seq_printf(s, "\t\tValid \t\t\t :%x\n", fwdata->channel_data.valid);
898 seq_printf(s, "\t\tNode ID \t\t :%x\n",
899 fwdata->channel_data.info.node_id);
900 seq_printf(s, "\t\tNumber of VFs \t\t :%x\n",
901 fwdata->channel_data.info.max_vfs);
902 seq_printf(s, "\t\tNumber of PF-Rings \t :%x\n",
903 fwdata->channel_data.info.num_pf_rings);
904 seq_printf(s, "\t\tPF SRN \t\t\t :%x\n",
905 fwdata->channel_data.info.pf_srn);
906 seq_puts(s, "\n");
907
908 seq_puts(s, "\n\t\tPF-INDEX MACADDRESS\n");
909 seq_puts(s, "\t\t====================\n");
910 for (i = 0; i < PF_MACNUM_MAX; i++) {
911 u64_to_ether_addr(fwdata->pf_macs[i], mac);
912 if (!is_zero_ether_addr(mac)) {
913 seq_printf(s, "\t\t %d %pM\n", i, mac);
914 count++;
915 }
916 }
917
918 if (!count)
919 seq_puts(s, "\t\tNo valid address found\n");
920
921 seq_puts(s, "\n\t\tVF-INDEX MACADDRESS\n");
922 seq_puts(s, "\t\t====================\n");
923 count = 0;
924 for (i = 0; i < VF_MACNUM_MAX; i++) {
925 u64_to_ether_addr(fwdata->vf_macs[i], mac);
926 if (!is_zero_ether_addr(mac)) {
927 seq_printf(s, "\t\t %d %pM\n", i, mac);
928 count++;
929 }
930 }
931
932 if (!count)
933 seq_puts(s, "\t\tNo valid address found\n");
934
935 return 0;
936 }
937
938 RVU_DEBUG_SEQ_FOPS(rvu_fwdata, rvu_fwdata_display, NULL);
939
rvu_dbg_is_valid_lf(struct rvu * rvu,int blkaddr,int lf,u16 * pcifunc)940 static bool rvu_dbg_is_valid_lf(struct rvu *rvu, int blkaddr, int lf,
941 u16 *pcifunc)
942 {
943 struct rvu_block *block;
944 struct rvu_hwinfo *hw;
945
946 hw = rvu->hw;
947 block = &hw->block[blkaddr];
948
949 if (lf < 0 || lf >= block->lf.max) {
950 dev_warn(rvu->dev, "Invalid LF: valid range: 0-%d\n",
951 block->lf.max - 1);
952 return false;
953 }
954
955 *pcifunc = block->fn_map[lf];
956 if (!*pcifunc) {
957 dev_warn(rvu->dev,
958 "This LF is not attached to any RVU PFFUNC\n");
959 return false;
960 }
961 return true;
962 }
963
print_npa_qsize(struct seq_file * m,struct rvu_pfvf * pfvf)964 static void print_npa_qsize(struct seq_file *m, struct rvu_pfvf *pfvf)
965 {
966 if (!pfvf->aura_ctx) {
967 seq_puts(m, "Aura context is not initialized\n");
968 } else {
969 seq_printf(m, "Aura count : %d\n", pfvf->aura_ctx->qsize);
970 seq_printf(m, "Aura context ena/dis bitmap : %*pb\n",
971 pfvf->aura_ctx->qsize, pfvf->aura_bmap);
972 }
973
974 if (!pfvf->pool_ctx) {
975 seq_puts(m, "Pool context is not initialized\n");
976 } else {
977 seq_printf(m, "Pool count : %d\n", pfvf->pool_ctx->qsize);
978 seq_printf(m, "Pool context ena/dis bitmap : %*pb\n",
979 pfvf->pool_ctx->qsize, pfvf->pool_bmap);
980 }
981 }
982
983 /* The 'qsize' entry dumps current Aura/Pool context Qsize
984 * and each context's current enable/disable status in a bitmap.
985 */
rvu_dbg_qsize_display(struct seq_file * s,void * unsused,int blktype)986 static int rvu_dbg_qsize_display(struct seq_file *s, void *unsused,
987 int blktype)
988 {
989 void (*print_qsize)(struct seq_file *s,
990 struct rvu_pfvf *pfvf) = NULL;
991 struct rvu_pfvf *pfvf;
992 struct rvu *rvu;
993 int qsize_id;
994 u16 pcifunc;
995 int blkaddr;
996
997 rvu = s->private;
998 switch (blktype) {
999 case BLKTYPE_NPA:
1000 qsize_id = rvu->rvu_dbg.npa_qsize_id;
1001 print_qsize = print_npa_qsize;
1002 break;
1003
1004 case BLKTYPE_NIX:
1005 qsize_id = rvu->rvu_dbg.nix_qsize_id;
1006 print_qsize = print_nix_qsize;
1007 break;
1008
1009 default:
1010 return -EINVAL;
1011 }
1012
1013 if (blktype == BLKTYPE_NPA)
1014 blkaddr = BLKADDR_NPA;
1015 else
1016 blkaddr = debugfs_get_aux_num(s->file);
1017
1018 if (!rvu_dbg_is_valid_lf(rvu, blkaddr, qsize_id, &pcifunc))
1019 return -EINVAL;
1020
1021 pfvf = rvu_get_pfvf(rvu, pcifunc);
1022 print_qsize(s, pfvf);
1023
1024 return 0;
1025 }
1026
rvu_dbg_qsize_write(struct file * file,const char __user * buffer,size_t count,loff_t * ppos,int blktype)1027 static ssize_t rvu_dbg_qsize_write(struct file *file,
1028 const char __user *buffer, size_t count,
1029 loff_t *ppos, int blktype)
1030 {
1031 char *blk_string = (blktype == BLKTYPE_NPA) ? "npa" : "nix";
1032 struct seq_file *seqfile = file->private_data;
1033 char *cmd_buf, *cmd_buf_tmp, *subtoken;
1034 struct rvu *rvu = seqfile->private;
1035 int blkaddr;
1036 u16 pcifunc;
1037 int ret, lf;
1038
1039 cmd_buf = memdup_user_nul(buffer, count);
1040 if (IS_ERR(cmd_buf))
1041 return -ENOMEM;
1042
1043 cmd_buf_tmp = strchr(cmd_buf, '\n');
1044 if (cmd_buf_tmp) {
1045 *cmd_buf_tmp = '\0';
1046 count = cmd_buf_tmp - cmd_buf + 1;
1047 }
1048
1049 cmd_buf_tmp = cmd_buf;
1050 subtoken = strsep(&cmd_buf, " ");
1051 ret = subtoken ? kstrtoint(subtoken, 10, &lf) : -EINVAL;
1052 if (cmd_buf)
1053 ret = -EINVAL;
1054
1055 if (ret < 0 || !strncmp(subtoken, "help", 4)) {
1056 dev_info(rvu->dev, "Use echo <%s-lf > qsize\n", blk_string);
1057 goto qsize_write_done;
1058 }
1059
1060 if (blktype == BLKTYPE_NPA)
1061 blkaddr = BLKADDR_NPA;
1062 else
1063 blkaddr = debugfs_get_aux_num(file);
1064
1065 if (!rvu_dbg_is_valid_lf(rvu, blkaddr, lf, &pcifunc)) {
1066 ret = -EINVAL;
1067 goto qsize_write_done;
1068 }
1069 if (blktype == BLKTYPE_NPA)
1070 rvu->rvu_dbg.npa_qsize_id = lf;
1071 else
1072 rvu->rvu_dbg.nix_qsize_id = lf;
1073
1074 qsize_write_done:
1075 kfree(cmd_buf_tmp);
1076 return ret ? ret : count;
1077 }
1078
rvu_dbg_npa_qsize_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos)1079 static ssize_t rvu_dbg_npa_qsize_write(struct file *filp,
1080 const char __user *buffer,
1081 size_t count, loff_t *ppos)
1082 {
1083 return rvu_dbg_qsize_write(filp, buffer, count, ppos,
1084 BLKTYPE_NPA);
1085 }
1086
rvu_dbg_npa_qsize_display(struct seq_file * filp,void * unused)1087 static int rvu_dbg_npa_qsize_display(struct seq_file *filp, void *unused)
1088 {
1089 return rvu_dbg_qsize_display(filp, unused, BLKTYPE_NPA);
1090 }
1091
1092 RVU_DEBUG_SEQ_FOPS(npa_qsize, npa_qsize_display, npa_qsize_write);
1093
1094 /* Dumps given NPA Aura's context */
print_npa_aura_ctx(struct seq_file * m,struct npa_aq_enq_rsp * rsp)1095 static void print_npa_aura_ctx(struct seq_file *m, struct npa_aq_enq_rsp *rsp)
1096 {
1097 struct npa_aura_s *aura = &rsp->aura;
1098 struct rvu *rvu = m->private;
1099
1100 if (is_cn20k(rvu->pdev)) {
1101 print_npa_cn20k_aura_ctx(m, (struct npa_cn20k_aq_enq_rsp *)rsp);
1102 return;
1103 }
1104
1105 seq_printf(m, "W0: Pool addr\t\t%llx\n", aura->pool_addr);
1106
1107 seq_printf(m, "W1: ena\t\t\t%d\nW1: pool caching\t%d\n",
1108 aura->ena, aura->pool_caching);
1109 seq_printf(m, "W1: pool way mask\t%d\nW1: avg con\t\t%d\n",
1110 aura->pool_way_mask, aura->avg_con);
1111 seq_printf(m, "W1: pool drop ena\t%d\nW1: aura drop ena\t%d\n",
1112 aura->pool_drop_ena, aura->aura_drop_ena);
1113 seq_printf(m, "W1: bp_ena\t\t%d\nW1: aura drop\t\t%d\n",
1114 aura->bp_ena, aura->aura_drop);
1115 seq_printf(m, "W1: aura shift\t\t%d\nW1: avg_level\t\t%d\n",
1116 aura->shift, aura->avg_level);
1117
1118 seq_printf(m, "W2: count\t\t%llu\nW2: nix0_bpid\t\t%d\nW2: nix1_bpid\t\t%d\n",
1119 (u64)aura->count, aura->nix0_bpid, aura->nix1_bpid);
1120
1121 seq_printf(m, "W3: limit\t\t%llu\nW3: bp\t\t\t%d\nW3: fc_ena\t\t%d\n",
1122 (u64)aura->limit, aura->bp, aura->fc_ena);
1123
1124 if (!is_rvu_otx2(rvu))
1125 seq_printf(m, "W3: fc_be\t\t%d\n", aura->fc_be);
1126 seq_printf(m, "W3: fc_up_crossing\t%d\nW3: fc_stype\t\t%d\n",
1127 aura->fc_up_crossing, aura->fc_stype);
1128 seq_printf(m, "W3: fc_hyst_bits\t%d\n", aura->fc_hyst_bits);
1129
1130 seq_printf(m, "W4: fc_addr\t\t%llx\n", aura->fc_addr);
1131
1132 seq_printf(m, "W5: pool_drop\t\t%d\nW5: update_time\t\t%d\n",
1133 aura->pool_drop, aura->update_time);
1134 seq_printf(m, "W5: err_int \t\t%d\nW5: err_int_ena\t\t%d\n",
1135 aura->err_int, aura->err_int_ena);
1136 seq_printf(m, "W5: thresh_int\t\t%d\nW5: thresh_int_ena \t%d\n",
1137 aura->thresh_int, aura->thresh_int_ena);
1138 seq_printf(m, "W5: thresh_up\t\t%d\nW5: thresh_qint_idx\t%d\n",
1139 aura->thresh_up, aura->thresh_qint_idx);
1140 seq_printf(m, "W5: err_qint_idx \t%d\n", aura->err_qint_idx);
1141
1142 seq_printf(m, "W6: thresh\t\t%llu\n", (u64)aura->thresh);
1143 if (!is_rvu_otx2(rvu))
1144 seq_printf(m, "W6: fc_msh_dst\t\t%d\n", aura->fc_msh_dst);
1145 }
1146
1147 /* Dumps given NPA Pool's context */
print_npa_pool_ctx(struct seq_file * m,struct npa_aq_enq_rsp * rsp)1148 static void print_npa_pool_ctx(struct seq_file *m, struct npa_aq_enq_rsp *rsp)
1149 {
1150 struct npa_pool_s *pool = &rsp->pool;
1151 struct rvu *rvu = m->private;
1152
1153 if (is_cn20k(rvu->pdev)) {
1154 print_npa_cn20k_pool_ctx(m, (struct npa_cn20k_aq_enq_rsp *)rsp);
1155 return;
1156 }
1157
1158 seq_printf(m, "W0: Stack base\t\t%llx\n", pool->stack_base);
1159
1160 seq_printf(m, "W1: ena \t\t%d\nW1: nat_align \t\t%d\n",
1161 pool->ena, pool->nat_align);
1162 seq_printf(m, "W1: stack_caching\t%d\nW1: stack_way_mask\t%d\n",
1163 pool->stack_caching, pool->stack_way_mask);
1164 seq_printf(m, "W1: buf_offset\t\t%d\nW1: buf_size\t\t%d\n",
1165 pool->buf_offset, pool->buf_size);
1166
1167 seq_printf(m, "W2: stack_max_pages \t%d\nW2: stack_pages\t\t%d\n",
1168 pool->stack_max_pages, pool->stack_pages);
1169
1170 seq_printf(m, "W3: op_pc \t\t%llu\n", (u64)pool->op_pc);
1171
1172 seq_printf(m, "W4: stack_offset\t%d\nW4: shift\t\t%d\nW4: avg_level\t\t%d\n",
1173 pool->stack_offset, pool->shift, pool->avg_level);
1174 seq_printf(m, "W4: avg_con \t\t%d\nW4: fc_ena\t\t%d\nW4: fc_stype\t\t%d\n",
1175 pool->avg_con, pool->fc_ena, pool->fc_stype);
1176 seq_printf(m, "W4: fc_hyst_bits\t%d\nW4: fc_up_crossing\t%d\n",
1177 pool->fc_hyst_bits, pool->fc_up_crossing);
1178 if (!is_rvu_otx2(rvu))
1179 seq_printf(m, "W4: fc_be\t\t%d\n", pool->fc_be);
1180 seq_printf(m, "W4: update_time\t\t%d\n", pool->update_time);
1181
1182 seq_printf(m, "W5: fc_addr\t\t%llx\n", pool->fc_addr);
1183
1184 seq_printf(m, "W6: ptr_start\t\t%llx\n", pool->ptr_start);
1185
1186 seq_printf(m, "W7: ptr_end\t\t%llx\n", pool->ptr_end);
1187
1188 seq_printf(m, "W8: err_int\t\t%d\nW8: err_int_ena\t\t%d\n",
1189 pool->err_int, pool->err_int_ena);
1190 seq_printf(m, "W8: thresh_int\t\t%d\n", pool->thresh_int);
1191 seq_printf(m, "W8: thresh_int_ena\t%d\nW8: thresh_up\t\t%d\n",
1192 pool->thresh_int_ena, pool->thresh_up);
1193 seq_printf(m, "W8: thresh_qint_idx\t%d\nW8: err_qint_idx\t%d\n",
1194 pool->thresh_qint_idx, pool->err_qint_idx);
1195 if (!is_rvu_otx2(rvu))
1196 seq_printf(m, "W8: fc_msh_dst\t\t%d\n", pool->fc_msh_dst);
1197 }
1198
1199 /* Reads aura/pool's ctx from admin queue */
rvu_dbg_npa_ctx_display(struct seq_file * m,void * unused,int ctype)1200 static int rvu_dbg_npa_ctx_display(struct seq_file *m, void *unused, int ctype)
1201 {
1202 void (*print_npa_ctx)(struct seq_file *m, struct npa_aq_enq_rsp *rsp);
1203 struct npa_aq_enq_req aq_req;
1204 struct npa_aq_enq_rsp rsp;
1205 struct rvu_pfvf *pfvf;
1206 int aura, rc, max_id;
1207 int npalf, id, all;
1208 struct rvu *rvu;
1209 u16 pcifunc;
1210
1211 rvu = m->private;
1212
1213 switch (ctype) {
1214 case NPA_AQ_CTYPE_AURA:
1215 npalf = rvu->rvu_dbg.npa_aura_ctx.lf;
1216 id = rvu->rvu_dbg.npa_aura_ctx.id;
1217 all = rvu->rvu_dbg.npa_aura_ctx.all;
1218 break;
1219
1220 case NPA_AQ_CTYPE_POOL:
1221 npalf = rvu->rvu_dbg.npa_pool_ctx.lf;
1222 id = rvu->rvu_dbg.npa_pool_ctx.id;
1223 all = rvu->rvu_dbg.npa_pool_ctx.all;
1224 break;
1225 default:
1226 return -EINVAL;
1227 }
1228
1229 if (!rvu_dbg_is_valid_lf(rvu, BLKADDR_NPA, npalf, &pcifunc))
1230 return -EINVAL;
1231
1232 pfvf = rvu_get_pfvf(rvu, pcifunc);
1233 if (ctype == NPA_AQ_CTYPE_AURA && !pfvf->aura_ctx) {
1234 seq_puts(m, "Aura context is not initialized\n");
1235 return -EINVAL;
1236 } else if (ctype == NPA_AQ_CTYPE_POOL && !pfvf->pool_ctx) {
1237 seq_puts(m, "Pool context is not initialized\n");
1238 return -EINVAL;
1239 }
1240
1241 memset(&aq_req, 0, sizeof(struct npa_aq_enq_req));
1242 aq_req.hdr.pcifunc = pcifunc;
1243 aq_req.ctype = ctype;
1244 aq_req.op = NPA_AQ_INSTOP_READ;
1245 if (ctype == NPA_AQ_CTYPE_AURA) {
1246 max_id = pfvf->aura_ctx->qsize;
1247 print_npa_ctx = print_npa_aura_ctx;
1248 } else {
1249 max_id = pfvf->pool_ctx->qsize;
1250 print_npa_ctx = print_npa_pool_ctx;
1251 }
1252
1253 if (id < 0 || id >= max_id) {
1254 seq_printf(m, "Invalid %s, valid range is 0-%d\n",
1255 (ctype == NPA_AQ_CTYPE_AURA) ? "aura" : "pool",
1256 max_id - 1);
1257 return -EINVAL;
1258 }
1259
1260 if (all)
1261 id = 0;
1262 else
1263 max_id = id + 1;
1264
1265 for (aura = id; aura < max_id; aura++) {
1266 aq_req.aura_id = aura;
1267
1268 /* Skip if queue is uninitialized */
1269 if (ctype == NPA_AQ_CTYPE_POOL && !test_bit(aura, pfvf->pool_bmap))
1270 continue;
1271
1272 seq_printf(m, "======%s : %d=======\n",
1273 (ctype == NPA_AQ_CTYPE_AURA) ? "AURA" : "POOL",
1274 aq_req.aura_id);
1275 rc = rvu_npa_aq_enq_inst(rvu, &aq_req, &rsp);
1276 if (rc) {
1277 seq_puts(m, "Failed to read context\n");
1278 return -EINVAL;
1279 }
1280 print_npa_ctx(m, &rsp);
1281 }
1282 return 0;
1283 }
1284
write_npa_ctx(struct rvu * rvu,bool all,int npalf,int id,int ctype)1285 static int write_npa_ctx(struct rvu *rvu, bool all,
1286 int npalf, int id, int ctype)
1287 {
1288 struct rvu_pfvf *pfvf;
1289 int max_id = 0;
1290 u16 pcifunc;
1291
1292 if (!rvu_dbg_is_valid_lf(rvu, BLKADDR_NPA, npalf, &pcifunc))
1293 return -EINVAL;
1294
1295 pfvf = rvu_get_pfvf(rvu, pcifunc);
1296
1297 if (ctype == NPA_AQ_CTYPE_AURA) {
1298 if (!pfvf->aura_ctx) {
1299 dev_warn(rvu->dev, "Aura context is not initialized\n");
1300 return -EINVAL;
1301 }
1302 max_id = pfvf->aura_ctx->qsize;
1303 } else if (ctype == NPA_AQ_CTYPE_POOL) {
1304 if (!pfvf->pool_ctx) {
1305 dev_warn(rvu->dev, "Pool context is not initialized\n");
1306 return -EINVAL;
1307 }
1308 max_id = pfvf->pool_ctx->qsize;
1309 }
1310
1311 if (id < 0 || id >= max_id) {
1312 dev_warn(rvu->dev, "Invalid %s, valid range is 0-%d\n",
1313 (ctype == NPA_AQ_CTYPE_AURA) ? "aura" : "pool",
1314 max_id - 1);
1315 return -EINVAL;
1316 }
1317
1318 switch (ctype) {
1319 case NPA_AQ_CTYPE_AURA:
1320 rvu->rvu_dbg.npa_aura_ctx.lf = npalf;
1321 rvu->rvu_dbg.npa_aura_ctx.id = id;
1322 rvu->rvu_dbg.npa_aura_ctx.all = all;
1323 break;
1324
1325 case NPA_AQ_CTYPE_POOL:
1326 rvu->rvu_dbg.npa_pool_ctx.lf = npalf;
1327 rvu->rvu_dbg.npa_pool_ctx.id = id;
1328 rvu->rvu_dbg.npa_pool_ctx.all = all;
1329 break;
1330 default:
1331 return -EINVAL;
1332 }
1333 return 0;
1334 }
1335
parse_cmd_buffer_ctx(char * cmd_buf,size_t * count,const char __user * buffer,int * npalf,int * id,bool * all)1336 static int parse_cmd_buffer_ctx(char *cmd_buf, size_t *count,
1337 const char __user *buffer, int *npalf,
1338 int *id, bool *all)
1339 {
1340 int bytes_not_copied;
1341 char *cmd_buf_tmp;
1342 char *subtoken;
1343 int ret;
1344
1345 bytes_not_copied = copy_from_user(cmd_buf, buffer, *count);
1346 if (bytes_not_copied)
1347 return -EFAULT;
1348
1349 cmd_buf[*count] = '\0';
1350 cmd_buf_tmp = strchr(cmd_buf, '\n');
1351
1352 if (cmd_buf_tmp) {
1353 *cmd_buf_tmp = '\0';
1354 *count = cmd_buf_tmp - cmd_buf + 1;
1355 }
1356
1357 subtoken = strsep(&cmd_buf, " ");
1358 ret = subtoken ? kstrtoint(subtoken, 10, npalf) : -EINVAL;
1359 if (ret < 0)
1360 return ret;
1361 subtoken = strsep(&cmd_buf, " ");
1362 if (subtoken && strcmp(subtoken, "all") == 0) {
1363 *all = true;
1364 } else {
1365 ret = subtoken ? kstrtoint(subtoken, 10, id) : -EINVAL;
1366 if (ret < 0)
1367 return ret;
1368 }
1369 if (cmd_buf)
1370 return -EINVAL;
1371 return ret;
1372 }
1373
rvu_dbg_npa_ctx_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos,int ctype)1374 static ssize_t rvu_dbg_npa_ctx_write(struct file *filp,
1375 const char __user *buffer,
1376 size_t count, loff_t *ppos, int ctype)
1377 {
1378 char *cmd_buf, *ctype_string = (ctype == NPA_AQ_CTYPE_AURA) ?
1379 "aura" : "pool";
1380 struct seq_file *seqfp = filp->private_data;
1381 struct rvu *rvu = seqfp->private;
1382 int npalf, id = 0, ret;
1383 bool all = false;
1384
1385 if ((*ppos != 0) || !count)
1386 return -EINVAL;
1387
1388 cmd_buf = kzalloc(count + 1, GFP_KERNEL);
1389 if (!cmd_buf)
1390 return count;
1391 ret = parse_cmd_buffer_ctx(cmd_buf, &count, buffer,
1392 &npalf, &id, &all);
1393 if (ret < 0) {
1394 dev_info(rvu->dev,
1395 "Usage: echo <npalf> [%s number/all] > %s_ctx\n",
1396 ctype_string, ctype_string);
1397 goto done;
1398 } else {
1399 ret = write_npa_ctx(rvu, all, npalf, id, ctype);
1400 }
1401 done:
1402 kfree(cmd_buf);
1403 return ret ? ret : count;
1404 }
1405
rvu_dbg_npa_aura_ctx_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos)1406 static ssize_t rvu_dbg_npa_aura_ctx_write(struct file *filp,
1407 const char __user *buffer,
1408 size_t count, loff_t *ppos)
1409 {
1410 return rvu_dbg_npa_ctx_write(filp, buffer, count, ppos,
1411 NPA_AQ_CTYPE_AURA);
1412 }
1413
rvu_dbg_npa_aura_ctx_display(struct seq_file * filp,void * unused)1414 static int rvu_dbg_npa_aura_ctx_display(struct seq_file *filp, void *unused)
1415 {
1416 return rvu_dbg_npa_ctx_display(filp, unused, NPA_AQ_CTYPE_AURA);
1417 }
1418
1419 RVU_DEBUG_SEQ_FOPS(npa_aura_ctx, npa_aura_ctx_display, npa_aura_ctx_write);
1420
rvu_dbg_npa_pool_ctx_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos)1421 static ssize_t rvu_dbg_npa_pool_ctx_write(struct file *filp,
1422 const char __user *buffer,
1423 size_t count, loff_t *ppos)
1424 {
1425 return rvu_dbg_npa_ctx_write(filp, buffer, count, ppos,
1426 NPA_AQ_CTYPE_POOL);
1427 }
1428
rvu_dbg_npa_pool_ctx_display(struct seq_file * filp,void * unused)1429 static int rvu_dbg_npa_pool_ctx_display(struct seq_file *filp, void *unused)
1430 {
1431 return rvu_dbg_npa_ctx_display(filp, unused, NPA_AQ_CTYPE_POOL);
1432 }
1433
1434 RVU_DEBUG_SEQ_FOPS(npa_pool_ctx, npa_pool_ctx_display, npa_pool_ctx_write);
1435
ndc_cache_stats(struct seq_file * s,int blk_addr,int ctype,int transaction)1436 static void ndc_cache_stats(struct seq_file *s, int blk_addr,
1437 int ctype, int transaction)
1438 {
1439 u64 req, out_req, lat, cant_alloc;
1440 struct nix_hw *nix_hw;
1441 struct rvu *rvu;
1442 int port;
1443
1444 if (blk_addr == BLKADDR_NDC_NPA0) {
1445 rvu = s->private;
1446 } else {
1447 nix_hw = s->private;
1448 rvu = nix_hw->rvu;
1449 }
1450
1451 for (port = 0; port < NDC_MAX_PORT; port++) {
1452 req = rvu_read64(rvu, blk_addr, NDC_AF_PORTX_RTX_RWX_REQ_PC
1453 (port, ctype, transaction));
1454 lat = rvu_read64(rvu, blk_addr, NDC_AF_PORTX_RTX_RWX_LAT_PC
1455 (port, ctype, transaction));
1456 out_req = rvu_read64(rvu, blk_addr,
1457 NDC_AF_PORTX_RTX_RWX_OSTDN_PC
1458 (port, ctype, transaction));
1459 cant_alloc = rvu_read64(rvu, blk_addr,
1460 NDC_AF_PORTX_RTX_CANT_ALLOC_PC
1461 (port, transaction));
1462 seq_printf(s, "\nPort:%d\n", port);
1463 seq_printf(s, "\tTotal Requests:\t\t%lld\n", req);
1464 seq_printf(s, "\tTotal Time Taken:\t%lld cycles\n", lat);
1465 seq_printf(s, "\tAvg Latency:\t\t%lld cycles\n", lat / req);
1466 seq_printf(s, "\tOutstanding Requests:\t%lld\n", out_req);
1467 seq_printf(s, "\tCant Alloc Requests:\t%lld\n", cant_alloc);
1468 }
1469 }
1470
ndc_blk_cache_stats(struct seq_file * s,int idx,int blk_addr)1471 static int ndc_blk_cache_stats(struct seq_file *s, int idx, int blk_addr)
1472 {
1473 seq_puts(s, "\n***** CACHE mode read stats *****\n");
1474 ndc_cache_stats(s, blk_addr, CACHING, NDC_READ_TRANS);
1475 seq_puts(s, "\n***** CACHE mode write stats *****\n");
1476 ndc_cache_stats(s, blk_addr, CACHING, NDC_WRITE_TRANS);
1477 seq_puts(s, "\n***** BY-PASS mode read stats *****\n");
1478 ndc_cache_stats(s, blk_addr, BYPASS, NDC_READ_TRANS);
1479 seq_puts(s, "\n***** BY-PASS mode write stats *****\n");
1480 ndc_cache_stats(s, blk_addr, BYPASS, NDC_WRITE_TRANS);
1481 return 0;
1482 }
1483
rvu_dbg_npa_ndc_cache_display(struct seq_file * filp,void * unused)1484 static int rvu_dbg_npa_ndc_cache_display(struct seq_file *filp, void *unused)
1485 {
1486 return ndc_blk_cache_stats(filp, NPA0_U, BLKADDR_NDC_NPA0);
1487 }
1488
1489 RVU_DEBUG_SEQ_FOPS(npa_ndc_cache, npa_ndc_cache_display, NULL);
1490
ndc_blk_hits_miss_stats(struct seq_file * s,int idx,int blk_addr)1491 static int ndc_blk_hits_miss_stats(struct seq_file *s, int idx, int blk_addr)
1492 {
1493 struct nix_hw *nix_hw;
1494 struct rvu *rvu;
1495 int bank, max_bank;
1496 u64 ndc_af_const;
1497
1498 if (blk_addr == BLKADDR_NDC_NPA0) {
1499 rvu = s->private;
1500 } else {
1501 nix_hw = s->private;
1502 rvu = nix_hw->rvu;
1503 }
1504
1505 ndc_af_const = rvu_read64(rvu, blk_addr, NDC_AF_CONST);
1506 max_bank = FIELD_GET(NDC_AF_BANK_MASK, ndc_af_const);
1507 for (bank = 0; bank < max_bank; bank++) {
1508 seq_printf(s, "BANK:%d\n", bank);
1509 seq_printf(s, "\tHits:\t%lld\n",
1510 (u64)rvu_read64(rvu, blk_addr,
1511 NDC_AF_BANKX_HIT_PC(bank)));
1512 seq_printf(s, "\tMiss:\t%lld\n",
1513 (u64)rvu_read64(rvu, blk_addr,
1514 NDC_AF_BANKX_MISS_PC(bank)));
1515 }
1516 return 0;
1517 }
1518
rvu_dbg_nix_ndc_rx_cache_display(struct seq_file * filp,void * unused)1519 static int rvu_dbg_nix_ndc_rx_cache_display(struct seq_file *filp, void *unused)
1520 {
1521 struct nix_hw *nix_hw = filp->private;
1522 int blkaddr = 0;
1523 int ndc_idx = 0;
1524
1525 blkaddr = (nix_hw->blkaddr == BLKADDR_NIX1 ?
1526 BLKADDR_NDC_NIX1_RX : BLKADDR_NDC_NIX0_RX);
1527 ndc_idx = (nix_hw->blkaddr == BLKADDR_NIX1 ? NIX1_RX : NIX0_RX);
1528
1529 return ndc_blk_cache_stats(filp, ndc_idx, blkaddr);
1530 }
1531
1532 RVU_DEBUG_SEQ_FOPS(nix_ndc_rx_cache, nix_ndc_rx_cache_display, NULL);
1533
rvu_dbg_nix_ndc_tx_cache_display(struct seq_file * filp,void * unused)1534 static int rvu_dbg_nix_ndc_tx_cache_display(struct seq_file *filp, void *unused)
1535 {
1536 struct nix_hw *nix_hw = filp->private;
1537 int blkaddr = 0;
1538 int ndc_idx = 0;
1539
1540 blkaddr = (nix_hw->blkaddr == BLKADDR_NIX1 ?
1541 BLKADDR_NDC_NIX1_TX : BLKADDR_NDC_NIX0_TX);
1542 ndc_idx = (nix_hw->blkaddr == BLKADDR_NIX1 ? NIX1_TX : NIX0_TX);
1543
1544 return ndc_blk_cache_stats(filp, ndc_idx, blkaddr);
1545 }
1546
1547 RVU_DEBUG_SEQ_FOPS(nix_ndc_tx_cache, nix_ndc_tx_cache_display, NULL);
1548
rvu_dbg_npa_ndc_hits_miss_display(struct seq_file * filp,void * unused)1549 static int rvu_dbg_npa_ndc_hits_miss_display(struct seq_file *filp,
1550 void *unused)
1551 {
1552 return ndc_blk_hits_miss_stats(filp, NPA0_U, BLKADDR_NDC_NPA0);
1553 }
1554
1555 RVU_DEBUG_SEQ_FOPS(npa_ndc_hits_miss, npa_ndc_hits_miss_display, NULL);
1556
rvu_dbg_nix_ndc_rx_hits_miss_display(struct seq_file * filp,void * unused)1557 static int rvu_dbg_nix_ndc_rx_hits_miss_display(struct seq_file *filp,
1558 void *unused)
1559 {
1560 struct nix_hw *nix_hw = filp->private;
1561 int ndc_idx = NPA0_U;
1562 int blkaddr = 0;
1563
1564 blkaddr = (nix_hw->blkaddr == BLKADDR_NIX1 ?
1565 BLKADDR_NDC_NIX1_RX : BLKADDR_NDC_NIX0_RX);
1566
1567 return ndc_blk_hits_miss_stats(filp, ndc_idx, blkaddr);
1568 }
1569
1570 RVU_DEBUG_SEQ_FOPS(nix_ndc_rx_hits_miss, nix_ndc_rx_hits_miss_display, NULL);
1571
rvu_dbg_nix_ndc_tx_hits_miss_display(struct seq_file * filp,void * unused)1572 static int rvu_dbg_nix_ndc_tx_hits_miss_display(struct seq_file *filp,
1573 void *unused)
1574 {
1575 struct nix_hw *nix_hw = filp->private;
1576 int ndc_idx = NPA0_U;
1577 int blkaddr = 0;
1578
1579 blkaddr = (nix_hw->blkaddr == BLKADDR_NIX1 ?
1580 BLKADDR_NDC_NIX1_TX : BLKADDR_NDC_NIX0_TX);
1581
1582 return ndc_blk_hits_miss_stats(filp, ndc_idx, blkaddr);
1583 }
1584
1585 RVU_DEBUG_SEQ_FOPS(nix_ndc_tx_hits_miss, nix_ndc_tx_hits_miss_display, NULL);
1586
print_nix_cn10k_sq_ctx(struct seq_file * m,struct nix_cn10k_sq_ctx_s * sq_ctx)1587 static void print_nix_cn10k_sq_ctx(struct seq_file *m,
1588 struct nix_cn10k_sq_ctx_s *sq_ctx)
1589 {
1590 seq_printf(m, "W0: ena \t\t\t%d\nW0: qint_idx \t\t\t%d\n",
1591 sq_ctx->ena, sq_ctx->qint_idx);
1592 seq_printf(m, "W0: substream \t\t\t0x%03x\nW0: sdp_mcast \t\t\t%d\n",
1593 sq_ctx->substream, sq_ctx->sdp_mcast);
1594 seq_printf(m, "W0: cq \t\t\t\t%d\nW0: sqe_way_mask \t\t%d\n\n",
1595 sq_ctx->cq, sq_ctx->sqe_way_mask);
1596
1597 seq_printf(m, "W1: smq \t\t\t%d\nW1: cq_ena \t\t\t%d\nW1: xoff\t\t\t%d\n",
1598 sq_ctx->smq, sq_ctx->cq_ena, sq_ctx->xoff);
1599 seq_printf(m, "W1: sso_ena \t\t\t%d\nW1: smq_rr_weight\t\t%d\n",
1600 sq_ctx->sso_ena, sq_ctx->smq_rr_weight);
1601 seq_printf(m, "W1: default_chan\t\t%d\nW1: sqb_count\t\t\t%d\n\n",
1602 sq_ctx->default_chan, sq_ctx->sqb_count);
1603
1604 seq_printf(m, "W2: smq_rr_count_lb \t\t%d\n", sq_ctx->smq_rr_count_lb);
1605 seq_printf(m, "W2: smq_rr_count_ub \t\t%d\n", sq_ctx->smq_rr_count_ub);
1606 seq_printf(m, "W2: sqb_aura \t\t\t%d\nW2: sq_int \t\t\t%d\n",
1607 sq_ctx->sqb_aura, sq_ctx->sq_int);
1608 seq_printf(m, "W2: sq_int_ena \t\t\t%d\nW2: sqe_stype \t\t\t%d\n",
1609 sq_ctx->sq_int_ena, sq_ctx->sqe_stype);
1610
1611 seq_printf(m, "W3: max_sqe_size\t\t%d\nW3: cq_limit\t\t\t%d\n",
1612 sq_ctx->max_sqe_size, sq_ctx->cq_limit);
1613 seq_printf(m, "W3: lmt_dis \t\t\t%d\nW3: mnq_dis \t\t\t%d\n",
1614 sq_ctx->mnq_dis, sq_ctx->lmt_dis);
1615 seq_printf(m, "W3: smq_next_sq\t\t\t%d\nW3: smq_lso_segnum\t\t%d\n",
1616 sq_ctx->smq_next_sq, sq_ctx->smq_lso_segnum);
1617 seq_printf(m, "W3: tail_offset \t\t%d\nW3: smenq_offset\t\t%d\n",
1618 sq_ctx->tail_offset, sq_ctx->smenq_offset);
1619 seq_printf(m, "W3: head_offset\t\t\t%d\nW3: smenq_next_sqb_vld\t\t%d\n\n",
1620 sq_ctx->head_offset, sq_ctx->smenq_next_sqb_vld);
1621
1622 seq_printf(m, "W3: smq_next_sq_vld\t\t%d\nW3: smq_pend\t\t\t%d\n",
1623 sq_ctx->smq_next_sq_vld, sq_ctx->smq_pend);
1624 seq_printf(m, "W4: next_sqb \t\t\t%llx\n\n", sq_ctx->next_sqb);
1625 seq_printf(m, "W5: tail_sqb \t\t\t%llx\n\n", sq_ctx->tail_sqb);
1626 seq_printf(m, "W6: smenq_sqb \t\t\t%llx\n\n", sq_ctx->smenq_sqb);
1627 seq_printf(m, "W7: smenq_next_sqb \t\t%llx\n\n",
1628 sq_ctx->smenq_next_sqb);
1629
1630 seq_printf(m, "W8: head_sqb\t\t\t%llx\n\n", sq_ctx->head_sqb);
1631
1632 seq_printf(m, "W9: vfi_lso_total\t\t%d\n", sq_ctx->vfi_lso_total);
1633 seq_printf(m, "W9: vfi_lso_sizem1\t\t%d\nW9: vfi_lso_sb\t\t\t%d\n",
1634 sq_ctx->vfi_lso_sizem1, sq_ctx->vfi_lso_sb);
1635 seq_printf(m, "W9: vfi_lso_mps\t\t\t%d\nW9: vfi_lso_vlan0_ins_ena\t%d\n",
1636 sq_ctx->vfi_lso_mps, sq_ctx->vfi_lso_vlan0_ins_ena);
1637 seq_printf(m, "W9: vfi_lso_vlan1_ins_ena\t%d\nW9: vfi_lso_vld \t\t%d\n\n",
1638 sq_ctx->vfi_lso_vld, sq_ctx->vfi_lso_vlan1_ins_ena);
1639
1640 seq_printf(m, "W10: scm_lso_rem \t\t%llu\n\n",
1641 (u64)sq_ctx->scm_lso_rem);
1642 seq_printf(m, "W11: octs \t\t\t%llu\n\n", (u64)sq_ctx->octs);
1643 seq_printf(m, "W12: pkts \t\t\t%llu\n\n", (u64)sq_ctx->pkts);
1644 seq_printf(m, "W14: dropped_octs \t\t%llu\n\n",
1645 (u64)sq_ctx->dropped_octs);
1646 seq_printf(m, "W15: dropped_pkts \t\t%llu\n\n",
1647 (u64)sq_ctx->dropped_pkts);
1648 }
1649
print_tm_tree(struct seq_file * m,struct nix_aq_enq_rsp * rsp,u64 sq)1650 static void print_tm_tree(struct seq_file *m,
1651 struct nix_aq_enq_rsp *rsp, u64 sq)
1652 {
1653 struct nix_sq_ctx_s *sq_ctx = &rsp->sq;
1654 struct nix_hw *nix_hw = m->private;
1655 struct rvu *rvu = nix_hw->rvu;
1656 u16 p1, p2, p3, p4, schq;
1657 int blkaddr;
1658 u64 cfg;
1659
1660 if (!sq_ctx->ena)
1661 return;
1662
1663 blkaddr = nix_hw->blkaddr;
1664 schq = sq_ctx->smq;
1665
1666 cfg = rvu_read64(rvu, blkaddr, NIX_AF_MDQX_PARENT(schq));
1667 p1 = FIELD_GET(NIX_AF_MDQ_PARENT_MASK, cfg);
1668
1669 cfg = rvu_read64(rvu, blkaddr, NIX_AF_TL4X_PARENT(p1));
1670 p2 = FIELD_GET(NIX_AF_TL4_PARENT_MASK, cfg);
1671
1672 cfg = rvu_read64(rvu, blkaddr, NIX_AF_TL3X_PARENT(p2));
1673 p3 = FIELD_GET(NIX_AF_TL3_PARENT_MASK, cfg);
1674
1675 cfg = rvu_read64(rvu, blkaddr, NIX_AF_TL2X_PARENT(p3));
1676 p4 = FIELD_GET(NIX_AF_TL2_PARENT_MASK, cfg);
1677 seq_printf(m,
1678 "SQ(%llu) -> SMQ(%u) -> TL4(%u) -> TL3(%u) -> TL2(%u) -> TL1(%u)\n",
1679 sq, schq, p1, p2, p3, p4);
1680 }
1681
1682 /*dumps given tm_tree registers*/
rvu_dbg_nix_tm_tree_display(struct seq_file * m,void * unused)1683 static int rvu_dbg_nix_tm_tree_display(struct seq_file *m, void *unused)
1684 {
1685 int qidx, nixlf, rc, id, max_id = 0;
1686 struct nix_hw *nix_hw = m->private;
1687 struct rvu *rvu = nix_hw->rvu;
1688 struct nix_aq_enq_req aq_req;
1689 struct nix_aq_enq_rsp rsp;
1690 struct rvu_pfvf *pfvf;
1691 u16 pcifunc;
1692
1693 nixlf = rvu->rvu_dbg.nix_tm_ctx.lf;
1694 id = rvu->rvu_dbg.nix_tm_ctx.id;
1695
1696 if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))
1697 return -EINVAL;
1698
1699 pfvf = rvu_get_pfvf(rvu, pcifunc);
1700 max_id = pfvf->sq_ctx->qsize;
1701
1702 memset(&aq_req, 0, sizeof(struct nix_aq_enq_req));
1703 aq_req.hdr.pcifunc = pcifunc;
1704 aq_req.ctype = NIX_AQ_CTYPE_SQ;
1705 aq_req.op = NIX_AQ_INSTOP_READ;
1706 seq_printf(m, "pcifunc is 0x%x\n", pcifunc);
1707 for (qidx = id; qidx < max_id; qidx++) {
1708 aq_req.qidx = qidx;
1709
1710 /* Skip SQ's if not initialized */
1711 if (!test_bit(qidx, pfvf->sq_bmap))
1712 continue;
1713
1714 rc = rvu_mbox_handler_nix_aq_enq(rvu, &aq_req, &rsp);
1715
1716 if (rc) {
1717 seq_printf(m, "Failed to read SQ(%d) context\n",
1718 aq_req.qidx);
1719 continue;
1720 }
1721 print_tm_tree(m, &rsp, aq_req.qidx);
1722 }
1723 return 0;
1724 }
1725
rvu_dbg_nix_tm_tree_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos)1726 static ssize_t rvu_dbg_nix_tm_tree_write(struct file *filp,
1727 const char __user *buffer,
1728 size_t count, loff_t *ppos)
1729 {
1730 struct seq_file *m = filp->private_data;
1731 struct nix_hw *nix_hw = m->private;
1732 struct rvu *rvu = nix_hw->rvu;
1733 struct rvu_pfvf *pfvf;
1734 u16 pcifunc;
1735 u64 nixlf;
1736 int ret;
1737
1738 ret = kstrtoull_from_user(buffer, count, 10, &nixlf);
1739 if (ret)
1740 return ret;
1741
1742 if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))
1743 return -EINVAL;
1744
1745 pfvf = rvu_get_pfvf(rvu, pcifunc);
1746 if (!pfvf->sq_ctx) {
1747 dev_warn(rvu->dev, "SQ context is not initialized\n");
1748 return -EINVAL;
1749 }
1750
1751 rvu->rvu_dbg.nix_tm_ctx.lf = nixlf;
1752 return count;
1753 }
1754
1755 RVU_DEBUG_SEQ_FOPS(nix_tm_tree, nix_tm_tree_display, nix_tm_tree_write);
1756
print_tm_topo(struct seq_file * m,u64 schq,u32 lvl)1757 static void print_tm_topo(struct seq_file *m, u64 schq, u32 lvl)
1758 {
1759 struct nix_hw *nix_hw = m->private;
1760 struct rvu *rvu = nix_hw->rvu;
1761 int blkaddr, link, link_level;
1762 struct rvu_hwinfo *hw;
1763
1764 hw = rvu->hw;
1765 blkaddr = nix_hw->blkaddr;
1766 if (lvl == NIX_TXSCH_LVL_MDQ) {
1767 seq_printf(m, "NIX_AF_SMQ[%llu]_CFG =0x%llx\n", schq,
1768 rvu_read64(rvu, blkaddr, NIX_AF_SMQX_CFG(schq)));
1769 seq_printf(m, "NIX_AF_SMQ[%llu]_STATUS =0x%llx\n", schq,
1770 rvu_read64(rvu, blkaddr, NIX_AF_SMQX_STATUS(schq)));
1771 seq_printf(m, "NIX_AF_MDQ[%llu]_OUT_MD_COUNT =0x%llx\n", schq,
1772 rvu_read64(rvu, blkaddr,
1773 NIX_AF_MDQX_OUT_MD_COUNT(schq)));
1774 seq_printf(m, "NIX_AF_MDQ[%llu]_SCHEDULE =0x%llx\n", schq,
1775 rvu_read64(rvu, blkaddr,
1776 NIX_AF_MDQX_SCHEDULE(schq)));
1777 seq_printf(m, "NIX_AF_MDQ[%llu]_SHAPE =0x%llx\n", schq,
1778 rvu_read64(rvu, blkaddr, NIX_AF_MDQX_SHAPE(schq)));
1779 seq_printf(m, "NIX_AF_MDQ[%llu]_CIR =0x%llx\n", schq,
1780 rvu_read64(rvu, blkaddr, NIX_AF_MDQX_CIR(schq)));
1781 seq_printf(m, "NIX_AF_MDQ[%llu]_PIR =0x%llx\n", schq,
1782 rvu_read64(rvu, blkaddr, NIX_AF_MDQX_PIR(schq)));
1783 seq_printf(m, "NIX_AF_MDQ[%llu]_SW_XOFF =0x%llx\n", schq,
1784 rvu_read64(rvu, blkaddr, NIX_AF_MDQX_SW_XOFF(schq)));
1785 seq_printf(m, "NIX_AF_MDQ[%llu]_PARENT =0x%llx\n", schq,
1786 rvu_read64(rvu, blkaddr, NIX_AF_MDQX_PARENT(schq)));
1787 seq_puts(m, "\n");
1788 }
1789
1790 if (lvl == NIX_TXSCH_LVL_TL4) {
1791 seq_printf(m, "NIX_AF_TL4[%llu]_SDP_LINK_CFG =0x%llx\n", schq,
1792 rvu_read64(rvu, blkaddr,
1793 NIX_AF_TL4X_SDP_LINK_CFG(schq)));
1794 seq_printf(m, "NIX_AF_TL4[%llu]_SCHEDULE =0x%llx\n", schq,
1795 rvu_read64(rvu, blkaddr,
1796 NIX_AF_TL4X_SCHEDULE(schq)));
1797 seq_printf(m, "NIX_AF_TL4[%llu]_SHAPE =0x%llx\n", schq,
1798 rvu_read64(rvu, blkaddr, NIX_AF_TL4X_SHAPE(schq)));
1799 seq_printf(m, "NIX_AF_TL4[%llu]_CIR =0x%llx\n", schq,
1800 rvu_read64(rvu, blkaddr, NIX_AF_TL4X_CIR(schq)));
1801 seq_printf(m, "NIX_AF_TL4[%llu]_PIR =0x%llx\n", schq,
1802 rvu_read64(rvu, blkaddr, NIX_AF_TL4X_PIR(schq)));
1803 seq_printf(m, "NIX_AF_TL4[%llu]_SW_XOFF =0x%llx\n", schq,
1804 rvu_read64(rvu, blkaddr, NIX_AF_TL4X_SW_XOFF(schq)));
1805 seq_printf(m, "NIX_AF_TL4[%llu]_TOPOLOGY =0x%llx\n", schq,
1806 rvu_read64(rvu, blkaddr,
1807 NIX_AF_TL4X_TOPOLOGY(schq)));
1808 seq_printf(m, "NIX_AF_TL4[%llu]_PARENT =0x%llx\n", schq,
1809 rvu_read64(rvu, blkaddr, NIX_AF_TL4X_PARENT(schq)));
1810 seq_printf(m, "NIX_AF_TL4[%llu]_MD_DEBUG0 =0x%llx\n", schq,
1811 rvu_read64(rvu, blkaddr,
1812 NIX_AF_TL4X_MD_DEBUG0(schq)));
1813 seq_printf(m, "NIX_AF_TL4[%llu]_MD_DEBUG1 =0x%llx\n", schq,
1814 rvu_read64(rvu, blkaddr,
1815 NIX_AF_TL4X_MD_DEBUG1(schq)));
1816 seq_puts(m, "\n");
1817 }
1818
1819 if (lvl == NIX_TXSCH_LVL_TL3) {
1820 seq_printf(m, "NIX_AF_TL3[%llu]_SCHEDULE =0x%llx\n", schq,
1821 rvu_read64(rvu, blkaddr,
1822 NIX_AF_TL3X_SCHEDULE(schq)));
1823 seq_printf(m, "NIX_AF_TL3[%llu]_SHAPE =0x%llx\n", schq,
1824 rvu_read64(rvu, blkaddr, NIX_AF_TL3X_SHAPE(schq)));
1825 seq_printf(m, "NIX_AF_TL3[%llu]_CIR =0x%llx\n", schq,
1826 rvu_read64(rvu, blkaddr, NIX_AF_TL3X_CIR(schq)));
1827 seq_printf(m, "NIX_AF_TL3[%llu]_PIR =0x%llx\n", schq,
1828 rvu_read64(rvu, blkaddr, NIX_AF_TL3X_PIR(schq)));
1829 seq_printf(m, "NIX_AF_TL3[%llu]_SW_XOFF =0x%llx\n", schq,
1830 rvu_read64(rvu, blkaddr, NIX_AF_TL3X_SW_XOFF(schq)));
1831 seq_printf(m, "NIX_AF_TL3[%llu]_TOPOLOGY =0x%llx\n", schq,
1832 rvu_read64(rvu, blkaddr,
1833 NIX_AF_TL3X_TOPOLOGY(schq)));
1834 seq_printf(m, "NIX_AF_TL3[%llu]_PARENT =0x%llx\n", schq,
1835 rvu_read64(rvu, blkaddr, NIX_AF_TL3X_PARENT(schq)));
1836 seq_printf(m, "NIX_AF_TL3[%llu]_MD_DEBUG0 =0x%llx\n", schq,
1837 rvu_read64(rvu, blkaddr,
1838 NIX_AF_TL3X_MD_DEBUG0(schq)));
1839 seq_printf(m, "NIX_AF_TL3[%llu]_MD_DEBUG1 =0x%llx\n", schq,
1840 rvu_read64(rvu, blkaddr,
1841 NIX_AF_TL3X_MD_DEBUG1(schq)));
1842
1843 link_level = rvu_read64(rvu, blkaddr, NIX_AF_PSE_CHANNEL_LEVEL)
1844 & 0x01 ? NIX_TXSCH_LVL_TL3 : NIX_TXSCH_LVL_TL2;
1845 if (lvl == link_level) {
1846 seq_printf(m,
1847 "NIX_AF_TL3_TL2[%llu]_BP_STATUS =0x%llx\n",
1848 schq, rvu_read64(rvu, blkaddr,
1849 NIX_AF_TL3_TL2X_BP_STATUS(schq)));
1850 for (link = 0; link < hw->cgx_links; link++)
1851 seq_printf(m,
1852 "NIX_AF_TL3_TL2[%llu]_LINK[%d]_CFG =0x%llx\n",
1853 schq, link,
1854 rvu_read64(rvu, blkaddr,
1855 NIX_AF_TL3_TL2X_LINKX_CFG(schq, link)));
1856 }
1857 seq_puts(m, "\n");
1858 }
1859
1860 if (lvl == NIX_TXSCH_LVL_TL2) {
1861 seq_printf(m, "NIX_AF_TL2[%llu]_SHAPE =0x%llx\n", schq,
1862 rvu_read64(rvu, blkaddr, NIX_AF_TL2X_SHAPE(schq)));
1863 seq_printf(m, "NIX_AF_TL2[%llu]_CIR =0x%llx\n", schq,
1864 rvu_read64(rvu, blkaddr, NIX_AF_TL2X_CIR(schq)));
1865 seq_printf(m, "NIX_AF_TL2[%llu]_PIR =0x%llx\n", schq,
1866 rvu_read64(rvu, blkaddr, NIX_AF_TL2X_PIR(schq)));
1867 seq_printf(m, "NIX_AF_TL2[%llu]_SW_XOFF =0x%llx\n", schq,
1868 rvu_read64(rvu, blkaddr, NIX_AF_TL2X_SW_XOFF(schq)));
1869 seq_printf(m, "NIX_AF_TL2[%llu]_TOPOLOGY =0x%llx\n", schq,
1870 rvu_read64(rvu, blkaddr,
1871 NIX_AF_TL2X_TOPOLOGY(schq)));
1872 seq_printf(m, "NIX_AF_TL2[%llu]_PARENT =0x%llx\n", schq,
1873 rvu_read64(rvu, blkaddr, NIX_AF_TL2X_PARENT(schq)));
1874 seq_printf(m, "NIX_AF_TL2[%llu]_MD_DEBUG0 =0x%llx\n", schq,
1875 rvu_read64(rvu, blkaddr,
1876 NIX_AF_TL2X_MD_DEBUG0(schq)));
1877 seq_printf(m, "NIX_AF_TL2[%llu]_MD_DEBUG1 =0x%llx\n", schq,
1878 rvu_read64(rvu, blkaddr,
1879 NIX_AF_TL2X_MD_DEBUG1(schq)));
1880
1881 link_level = rvu_read64(rvu, blkaddr, NIX_AF_PSE_CHANNEL_LEVEL)
1882 & 0x01 ? NIX_TXSCH_LVL_TL3 : NIX_TXSCH_LVL_TL2;
1883 if (lvl == link_level) {
1884 seq_printf(m,
1885 "NIX_AF_TL3_TL2[%llu]_BP_STATUS =0x%llx\n",
1886 schq, rvu_read64(rvu, blkaddr,
1887 NIX_AF_TL3_TL2X_BP_STATUS(schq)));
1888 for (link = 0; link < hw->cgx_links; link++)
1889 seq_printf(m,
1890 "NIX_AF_TL3_TL2[%llu]_LINK[%d]_CFG =0x%llx\n",
1891 schq, link, rvu_read64(rvu, blkaddr,
1892 NIX_AF_TL3_TL2X_LINKX_CFG(schq, link)));
1893 }
1894 seq_puts(m, "\n");
1895 }
1896
1897 if (lvl == NIX_TXSCH_LVL_TL1) {
1898 seq_printf(m, "NIX_AF_TX_LINK[%llu]_NORM_CREDIT =0x%llx\n",
1899 schq,
1900 rvu_read64(rvu, blkaddr,
1901 NIX_AF_TX_LINKX_NORM_CREDIT(schq)));
1902 seq_printf(m, "NIX_AF_TX_LINK[%llu]_HW_XOFF =0x%llx\n", schq,
1903 rvu_read64(rvu, blkaddr,
1904 NIX_AF_TX_LINKX_HW_XOFF(schq)));
1905 seq_printf(m, "NIX_AF_TL1[%llu]_SCHEDULE =0x%llx\n", schq,
1906 rvu_read64(rvu, blkaddr,
1907 NIX_AF_TL1X_SCHEDULE(schq)));
1908 seq_printf(m, "NIX_AF_TL1[%llu]_SHAPE =0x%llx\n", schq,
1909 rvu_read64(rvu, blkaddr, NIX_AF_TL1X_SHAPE(schq)));
1910 seq_printf(m, "NIX_AF_TL1[%llu]_CIR =0x%llx\n", schq,
1911 rvu_read64(rvu, blkaddr, NIX_AF_TL1X_CIR(schq)));
1912 seq_printf(m, "NIX_AF_TL1[%llu]_SW_XOFF =0x%llx\n", schq,
1913 rvu_read64(rvu, blkaddr, NIX_AF_TL1X_SW_XOFF(schq)));
1914 seq_printf(m, "NIX_AF_TL1[%llu]_TOPOLOGY =0x%llx\n", schq,
1915 rvu_read64(rvu, blkaddr,
1916 NIX_AF_TL1X_TOPOLOGY(schq)));
1917 seq_printf(m, "NIX_AF_TL1[%llu]_MD_DEBUG0 =0x%llx\n", schq,
1918 rvu_read64(rvu, blkaddr,
1919 NIX_AF_TL1X_MD_DEBUG0(schq)));
1920 seq_printf(m, "NIX_AF_TL1[%llu]_MD_DEBUG1 =0x%llx\n", schq,
1921 rvu_read64(rvu, blkaddr,
1922 NIX_AF_TL1X_MD_DEBUG1(schq)));
1923 seq_printf(m, "NIX_AF_TL1[%llu]_DROPPED_PACKETS =0x%llx\n",
1924 schq,
1925 rvu_read64(rvu, blkaddr,
1926 NIX_AF_TL1X_DROPPED_PACKETS(schq)));
1927 seq_printf(m, "NIX_AF_TL1[%llu]_DROPPED_BYTES =0x%llx\n", schq,
1928 rvu_read64(rvu, blkaddr,
1929 NIX_AF_TL1X_DROPPED_BYTES(schq)));
1930 seq_printf(m, "NIX_AF_TL1[%llu]_RED_PACKETS =0x%llx\n", schq,
1931 rvu_read64(rvu, blkaddr,
1932 NIX_AF_TL1X_RED_PACKETS(schq)));
1933 seq_printf(m, "NIX_AF_TL1[%llu]_RED_BYTES =0x%llx\n", schq,
1934 rvu_read64(rvu, blkaddr,
1935 NIX_AF_TL1X_RED_BYTES(schq)));
1936 seq_printf(m, "NIX_AF_TL1[%llu]_YELLOW_PACKETS =0x%llx\n", schq,
1937 rvu_read64(rvu, blkaddr,
1938 NIX_AF_TL1X_YELLOW_PACKETS(schq)));
1939 seq_printf(m, "NIX_AF_TL1[%llu]_YELLOW_BYTES =0x%llx\n", schq,
1940 rvu_read64(rvu, blkaddr,
1941 NIX_AF_TL1X_YELLOW_BYTES(schq)));
1942 seq_printf(m, "NIX_AF_TL1[%llu]_GREEN_PACKETS =0x%llx\n", schq,
1943 rvu_read64(rvu, blkaddr,
1944 NIX_AF_TL1X_GREEN_PACKETS(schq)));
1945 seq_printf(m, "NIX_AF_TL1[%llu]_GREEN_BYTES =0x%llx\n", schq,
1946 rvu_read64(rvu, blkaddr,
1947 NIX_AF_TL1X_GREEN_BYTES(schq)));
1948 seq_puts(m, "\n");
1949 }
1950 }
1951
1952 /*dumps given tm_topo registers*/
rvu_dbg_nix_tm_topo_display(struct seq_file * m,void * unused)1953 static int rvu_dbg_nix_tm_topo_display(struct seq_file *m, void *unused)
1954 {
1955 struct nix_hw *nix_hw = m->private;
1956 struct rvu *rvu = nix_hw->rvu;
1957 struct nix_aq_enq_req aq_req;
1958 struct nix_txsch *txsch;
1959 int nixlf, lvl, schq;
1960 u16 pcifunc;
1961
1962 nixlf = rvu->rvu_dbg.nix_tm_ctx.lf;
1963
1964 if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))
1965 return -EINVAL;
1966
1967 memset(&aq_req, 0, sizeof(struct nix_aq_enq_req));
1968 aq_req.hdr.pcifunc = pcifunc;
1969 aq_req.ctype = NIX_AQ_CTYPE_SQ;
1970 aq_req.op = NIX_AQ_INSTOP_READ;
1971 seq_printf(m, "pcifunc is 0x%x\n", pcifunc);
1972
1973 for (lvl = 0; lvl < NIX_TXSCH_LVL_CNT; lvl++) {
1974 txsch = &nix_hw->txsch[lvl];
1975 for (schq = 0; schq < txsch->schq.max; schq++) {
1976 if (TXSCH_MAP_FUNC(txsch->pfvf_map[schq]) == pcifunc)
1977 print_tm_topo(m, schq, lvl);
1978 }
1979 }
1980 return 0;
1981 }
1982
rvu_dbg_nix_tm_topo_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos)1983 static ssize_t rvu_dbg_nix_tm_topo_write(struct file *filp,
1984 const char __user *buffer,
1985 size_t count, loff_t *ppos)
1986 {
1987 struct seq_file *m = filp->private_data;
1988 struct nix_hw *nix_hw = m->private;
1989 struct rvu *rvu = nix_hw->rvu;
1990 struct rvu_pfvf *pfvf;
1991 u16 pcifunc;
1992 u64 nixlf;
1993 int ret;
1994
1995 ret = kstrtoull_from_user(buffer, count, 10, &nixlf);
1996 if (ret)
1997 return ret;
1998
1999 if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))
2000 return -EINVAL;
2001
2002 pfvf = rvu_get_pfvf(rvu, pcifunc);
2003 if (!pfvf->sq_ctx) {
2004 dev_warn(rvu->dev, "SQ context is not initialized\n");
2005 return -EINVAL;
2006 }
2007
2008 rvu->rvu_dbg.nix_tm_ctx.lf = nixlf;
2009 return count;
2010 }
2011
2012 RVU_DEBUG_SEQ_FOPS(nix_tm_topo, nix_tm_topo_display, nix_tm_topo_write);
2013
2014 /* Dumps given nix_sq's context */
print_nix_sq_ctx(struct seq_file * m,struct nix_aq_enq_rsp * rsp)2015 static void print_nix_sq_ctx(struct seq_file *m, struct nix_aq_enq_rsp *rsp)
2016 {
2017 struct nix_sq_ctx_s *sq_ctx = &rsp->sq;
2018 struct nix_hw *nix_hw = m->private;
2019 struct rvu *rvu = nix_hw->rvu;
2020
2021 if (is_cn20k(rvu->pdev)) {
2022 print_nix_cn20k_sq_ctx(m, (struct nix_cn20k_sq_ctx_s *)sq_ctx);
2023 return;
2024 }
2025
2026 if (!is_rvu_otx2(rvu)) {
2027 print_nix_cn10k_sq_ctx(m, (struct nix_cn10k_sq_ctx_s *)sq_ctx);
2028 return;
2029 }
2030
2031 seq_printf(m, "W0: sqe_way_mask \t\t%d\nW0: cq \t\t\t\t%d\n",
2032 sq_ctx->sqe_way_mask, sq_ctx->cq);
2033 seq_printf(m, "W0: sdp_mcast \t\t\t%d\nW0: substream \t\t\t0x%03x\n",
2034 sq_ctx->sdp_mcast, sq_ctx->substream);
2035 seq_printf(m, "W0: qint_idx \t\t\t%d\nW0: ena \t\t\t%d\n\n",
2036 sq_ctx->qint_idx, sq_ctx->ena);
2037
2038 seq_printf(m, "W1: sqb_count \t\t\t%d\nW1: default_chan \t\t%d\n",
2039 sq_ctx->sqb_count, sq_ctx->default_chan);
2040 seq_printf(m, "W1: smq_rr_quantum \t\t%d\nW1: sso_ena \t\t\t%d\n",
2041 sq_ctx->smq_rr_quantum, sq_ctx->sso_ena);
2042 seq_printf(m, "W1: xoff \t\t\t%d\nW1: cq_ena \t\t\t%d\nW1: smq\t\t\t\t%d\n\n",
2043 sq_ctx->xoff, sq_ctx->cq_ena, sq_ctx->smq);
2044
2045 seq_printf(m, "W2: sqe_stype \t\t\t%d\nW2: sq_int_ena \t\t\t%d\n",
2046 sq_ctx->sqe_stype, sq_ctx->sq_int_ena);
2047 seq_printf(m, "W2: sq_int \t\t\t%d\nW2: sqb_aura \t\t\t%d\n",
2048 sq_ctx->sq_int, sq_ctx->sqb_aura);
2049 seq_printf(m, "W2: smq_rr_count \t\t%d\n\n", sq_ctx->smq_rr_count);
2050
2051 seq_printf(m, "W3: smq_next_sq_vld\t\t%d\nW3: smq_pend\t\t\t%d\n",
2052 sq_ctx->smq_next_sq_vld, sq_ctx->smq_pend);
2053 seq_printf(m, "W3: smenq_next_sqb_vld \t\t%d\nW3: head_offset\t\t\t%d\n",
2054 sq_ctx->smenq_next_sqb_vld, sq_ctx->head_offset);
2055 seq_printf(m, "W3: smenq_offset\t\t%d\nW3: tail_offset\t\t\t%d\n",
2056 sq_ctx->smenq_offset, sq_ctx->tail_offset);
2057 seq_printf(m, "W3: smq_lso_segnum \t\t%d\nW3: smq_next_sq\t\t\t%d\n",
2058 sq_ctx->smq_lso_segnum, sq_ctx->smq_next_sq);
2059 seq_printf(m, "W3: mnq_dis \t\t\t%d\nW3: lmt_dis \t\t\t%d\n",
2060 sq_ctx->mnq_dis, sq_ctx->lmt_dis);
2061 seq_printf(m, "W3: cq_limit\t\t\t%d\nW3: max_sqe_size\t\t%d\n\n",
2062 sq_ctx->cq_limit, sq_ctx->max_sqe_size);
2063
2064 seq_printf(m, "W4: next_sqb \t\t\t%llx\n\n", sq_ctx->next_sqb);
2065 seq_printf(m, "W5: tail_sqb \t\t\t%llx\n\n", sq_ctx->tail_sqb);
2066 seq_printf(m, "W6: smenq_sqb \t\t\t%llx\n\n", sq_ctx->smenq_sqb);
2067 seq_printf(m, "W7: smenq_next_sqb \t\t%llx\n\n",
2068 sq_ctx->smenq_next_sqb);
2069
2070 seq_printf(m, "W8: head_sqb\t\t\t%llx\n\n", sq_ctx->head_sqb);
2071
2072 seq_printf(m, "W9: vfi_lso_vld\t\t\t%d\nW9: vfi_lso_vlan1_ins_ena\t%d\n",
2073 sq_ctx->vfi_lso_vld, sq_ctx->vfi_lso_vlan1_ins_ena);
2074 seq_printf(m, "W9: vfi_lso_vlan0_ins_ena\t%d\nW9: vfi_lso_mps\t\t\t%d\n",
2075 sq_ctx->vfi_lso_vlan0_ins_ena, sq_ctx->vfi_lso_mps);
2076 seq_printf(m, "W9: vfi_lso_sb\t\t\t%d\nW9: vfi_lso_sizem1\t\t%d\n",
2077 sq_ctx->vfi_lso_sb, sq_ctx->vfi_lso_sizem1);
2078 seq_printf(m, "W9: vfi_lso_total\t\t%d\n\n", sq_ctx->vfi_lso_total);
2079
2080 seq_printf(m, "W10: scm_lso_rem \t\t%llu\n\n",
2081 (u64)sq_ctx->scm_lso_rem);
2082 seq_printf(m, "W11: octs \t\t\t%llu\n\n", (u64)sq_ctx->octs);
2083 seq_printf(m, "W12: pkts \t\t\t%llu\n\n", (u64)sq_ctx->pkts);
2084 seq_printf(m, "W14: dropped_octs \t\t%llu\n\n",
2085 (u64)sq_ctx->dropped_octs);
2086 seq_printf(m, "W15: dropped_pkts \t\t%llu\n\n",
2087 (u64)sq_ctx->dropped_pkts);
2088 }
2089
print_nix_cn10k_rq_ctx(struct seq_file * m,struct nix_cn10k_rq_ctx_s * rq_ctx)2090 static void print_nix_cn10k_rq_ctx(struct seq_file *m,
2091 struct nix_cn10k_rq_ctx_s *rq_ctx)
2092 {
2093 seq_printf(m, "W0: ena \t\t\t%d\nW0: sso_ena \t\t\t%d\n",
2094 rq_ctx->ena, rq_ctx->sso_ena);
2095 seq_printf(m, "W0: ipsech_ena \t\t\t%d\nW0: ena_wqwd \t\t\t%d\n",
2096 rq_ctx->ipsech_ena, rq_ctx->ena_wqwd);
2097 seq_printf(m, "W0: cq \t\t\t\t%d\nW0: lenerr_dis \t\t\t%d\n",
2098 rq_ctx->cq, rq_ctx->lenerr_dis);
2099 seq_printf(m, "W0: csum_il4_dis \t\t%d\nW0: csum_ol4_dis \t\t%d\n",
2100 rq_ctx->csum_il4_dis, rq_ctx->csum_ol4_dis);
2101 seq_printf(m, "W0: len_il4_dis \t\t%d\nW0: len_il3_dis \t\t%d\n",
2102 rq_ctx->len_il4_dis, rq_ctx->len_il3_dis);
2103 seq_printf(m, "W0: len_ol4_dis \t\t%d\nW0: len_ol3_dis \t\t%d\n",
2104 rq_ctx->len_ol4_dis, rq_ctx->len_ol3_dis);
2105 seq_printf(m, "W0: wqe_aura \t\t\t%d\n\n", rq_ctx->wqe_aura);
2106
2107 seq_printf(m, "W1: spb_aura \t\t\t%d\nW1: lpb_aura \t\t\t%d\n",
2108 rq_ctx->spb_aura, rq_ctx->lpb_aura);
2109 seq_printf(m, "W1: spb_aura \t\t\t%d\n", rq_ctx->spb_aura);
2110 seq_printf(m, "W1: sso_grp \t\t\t%d\nW1: sso_tt \t\t\t%d\n",
2111 rq_ctx->sso_grp, rq_ctx->sso_tt);
2112 seq_printf(m, "W1: pb_caching \t\t\t%d\nW1: wqe_caching \t\t%d\n",
2113 rq_ctx->pb_caching, rq_ctx->wqe_caching);
2114 seq_printf(m, "W1: xqe_drop_ena \t\t%d\nW1: spb_drop_ena \t\t%d\n",
2115 rq_ctx->xqe_drop_ena, rq_ctx->spb_drop_ena);
2116 seq_printf(m, "W1: lpb_drop_ena \t\t%d\nW1: pb_stashing \t\t%d\n",
2117 rq_ctx->lpb_drop_ena, rq_ctx->pb_stashing);
2118 seq_printf(m, "W1: ipsecd_drop_ena \t\t%d\nW1: chi_ena \t\t\t%d\n\n",
2119 rq_ctx->ipsecd_drop_ena, rq_ctx->chi_ena);
2120
2121 seq_printf(m, "W2: band_prof_id \t\t%d\n",
2122 (u16)rq_ctx->band_prof_id_h << 10 | rq_ctx->band_prof_id);
2123
2124 seq_printf(m, "W2: policer_ena \t\t%d\n", rq_ctx->policer_ena);
2125 seq_printf(m, "W2: spb_sizem1 \t\t\t%d\n", rq_ctx->spb_sizem1);
2126 seq_printf(m, "W2: wqe_skip \t\t\t%d\nW2: sqb_ena \t\t\t%d\n",
2127 rq_ctx->wqe_skip, rq_ctx->spb_ena);
2128 seq_printf(m, "W2: lpb_size1 \t\t\t%d\nW2: first_skip \t\t\t%d\n",
2129 rq_ctx->lpb_sizem1, rq_ctx->first_skip);
2130 seq_printf(m, "W2: later_skip\t\t\t%d\nW2: xqe_imm_size\t\t%d\n",
2131 rq_ctx->later_skip, rq_ctx->xqe_imm_size);
2132 seq_printf(m, "W2: xqe_imm_copy \t\t%d\nW2: xqe_hdr_split \t\t%d\n\n",
2133 rq_ctx->xqe_imm_copy, rq_ctx->xqe_hdr_split);
2134
2135 seq_printf(m, "W3: xqe_drop \t\t\t%d\nW3: xqe_pass \t\t\t%d\n",
2136 rq_ctx->xqe_drop, rq_ctx->xqe_pass);
2137 seq_printf(m, "W3: wqe_pool_drop \t\t%d\nW3: wqe_pool_pass \t\t%d\n",
2138 rq_ctx->wqe_pool_drop, rq_ctx->wqe_pool_pass);
2139 seq_printf(m, "W3: spb_pool_drop \t\t%d\nW3: spb_pool_pass \t\t%d\n",
2140 rq_ctx->spb_pool_drop, rq_ctx->spb_pool_pass);
2141 seq_printf(m, "W3: spb_aura_drop \t\t%d\nW3: spb_aura_pass \t\t%d\n\n",
2142 rq_ctx->spb_aura_pass, rq_ctx->spb_aura_drop);
2143
2144 seq_printf(m, "W4: lpb_aura_drop \t\t%d\nW3: lpb_aura_pass \t\t%d\n",
2145 rq_ctx->lpb_aura_pass, rq_ctx->lpb_aura_drop);
2146 seq_printf(m, "W4: lpb_pool_drop \t\t%d\nW3: lpb_pool_pass \t\t%d\n",
2147 rq_ctx->lpb_pool_drop, rq_ctx->lpb_pool_pass);
2148 seq_printf(m, "W4: rq_int \t\t\t%d\nW4: rq_int_ena\t\t\t%d\n",
2149 rq_ctx->rq_int, rq_ctx->rq_int_ena);
2150 seq_printf(m, "W4: qint_idx \t\t\t%d\n\n", rq_ctx->qint_idx);
2151
2152 seq_printf(m, "W5: ltag \t\t\t%d\nW5: good_utag \t\t\t%d\n",
2153 rq_ctx->ltag, rq_ctx->good_utag);
2154 seq_printf(m, "W5: bad_utag \t\t\t%d\nW5: flow_tagw \t\t\t%d\n",
2155 rq_ctx->bad_utag, rq_ctx->flow_tagw);
2156 seq_printf(m, "W5: ipsec_vwqe \t\t\t%d\nW5: vwqe_ena \t\t\t%d\n",
2157 rq_ctx->ipsec_vwqe, rq_ctx->vwqe_ena);
2158 seq_printf(m, "W5: vwqe_wait \t\t\t%d\nW5: max_vsize_exp\t\t%d\n",
2159 rq_ctx->vwqe_wait, rq_ctx->max_vsize_exp);
2160 seq_printf(m, "W5: vwqe_skip \t\t\t%d\n\n", rq_ctx->vwqe_skip);
2161
2162 seq_printf(m, "W6: octs \t\t\t%llu\n\n", (u64)rq_ctx->octs);
2163 seq_printf(m, "W7: pkts \t\t\t%llu\n\n", (u64)rq_ctx->pkts);
2164 seq_printf(m, "W8: drop_octs \t\t\t%llu\n\n", (u64)rq_ctx->drop_octs);
2165 seq_printf(m, "W9: drop_pkts \t\t\t%llu\n\n", (u64)rq_ctx->drop_pkts);
2166 seq_printf(m, "W10: re_pkts \t\t\t%llu\n", (u64)rq_ctx->re_pkts);
2167 }
2168
2169 /* Dumps given nix_rq's context */
print_nix_rq_ctx(struct seq_file * m,struct nix_aq_enq_rsp * rsp)2170 static void print_nix_rq_ctx(struct seq_file *m, struct nix_aq_enq_rsp *rsp)
2171 {
2172 struct nix_rq_ctx_s *rq_ctx = &rsp->rq;
2173 struct nix_hw *nix_hw = m->private;
2174 struct rvu *rvu = nix_hw->rvu;
2175
2176 if (!is_rvu_otx2(rvu)) {
2177 print_nix_cn10k_rq_ctx(m, (struct nix_cn10k_rq_ctx_s *)rq_ctx);
2178 return;
2179 }
2180
2181 seq_printf(m, "W0: wqe_aura \t\t\t%d\nW0: substream \t\t\t0x%03x\n",
2182 rq_ctx->wqe_aura, rq_ctx->substream);
2183 seq_printf(m, "W0: cq \t\t\t\t%d\nW0: ena_wqwd \t\t\t%d\n",
2184 rq_ctx->cq, rq_ctx->ena_wqwd);
2185 seq_printf(m, "W0: ipsech_ena \t\t\t%d\nW0: sso_ena \t\t\t%d\n",
2186 rq_ctx->ipsech_ena, rq_ctx->sso_ena);
2187 seq_printf(m, "W0: ena \t\t\t%d\n\n", rq_ctx->ena);
2188
2189 seq_printf(m, "W1: lpb_drop_ena \t\t%d\nW1: spb_drop_ena \t\t%d\n",
2190 rq_ctx->lpb_drop_ena, rq_ctx->spb_drop_ena);
2191 seq_printf(m, "W1: xqe_drop_ena \t\t%d\nW1: wqe_caching \t\t%d\n",
2192 rq_ctx->xqe_drop_ena, rq_ctx->wqe_caching);
2193 seq_printf(m, "W1: pb_caching \t\t\t%d\nW1: sso_tt \t\t\t%d\n",
2194 rq_ctx->pb_caching, rq_ctx->sso_tt);
2195 seq_printf(m, "W1: sso_grp \t\t\t%d\nW1: lpb_aura \t\t\t%d\n",
2196 rq_ctx->sso_grp, rq_ctx->lpb_aura);
2197 seq_printf(m, "W1: spb_aura \t\t\t%d\n\n", rq_ctx->spb_aura);
2198
2199 seq_printf(m, "W2: xqe_hdr_split \t\t%d\nW2: xqe_imm_copy \t\t%d\n",
2200 rq_ctx->xqe_hdr_split, rq_ctx->xqe_imm_copy);
2201 seq_printf(m, "W2: xqe_imm_size \t\t%d\nW2: later_skip \t\t\t%d\n",
2202 rq_ctx->xqe_imm_size, rq_ctx->later_skip);
2203 seq_printf(m, "W2: first_skip \t\t\t%d\nW2: lpb_sizem1 \t\t\t%d\n",
2204 rq_ctx->first_skip, rq_ctx->lpb_sizem1);
2205 seq_printf(m, "W2: spb_ena \t\t\t%d\nW2: wqe_skip \t\t\t%d\n",
2206 rq_ctx->spb_ena, rq_ctx->wqe_skip);
2207 seq_printf(m, "W2: spb_sizem1 \t\t\t%d\n\n", rq_ctx->spb_sizem1);
2208
2209 seq_printf(m, "W3: spb_pool_pass \t\t%d\nW3: spb_pool_drop \t\t%d\n",
2210 rq_ctx->spb_pool_pass, rq_ctx->spb_pool_drop);
2211 seq_printf(m, "W3: spb_aura_pass \t\t%d\nW3: spb_aura_drop \t\t%d\n",
2212 rq_ctx->spb_aura_pass, rq_ctx->spb_aura_drop);
2213 seq_printf(m, "W3: wqe_pool_pass \t\t%d\nW3: wqe_pool_drop \t\t%d\n",
2214 rq_ctx->wqe_pool_pass, rq_ctx->wqe_pool_drop);
2215 seq_printf(m, "W3: xqe_pass \t\t\t%d\nW3: xqe_drop \t\t\t%d\n\n",
2216 rq_ctx->xqe_pass, rq_ctx->xqe_drop);
2217
2218 seq_printf(m, "W4: qint_idx \t\t\t%d\nW4: rq_int_ena \t\t\t%d\n",
2219 rq_ctx->qint_idx, rq_ctx->rq_int_ena);
2220 seq_printf(m, "W4: rq_int \t\t\t%d\nW4: lpb_pool_pass \t\t%d\n",
2221 rq_ctx->rq_int, rq_ctx->lpb_pool_pass);
2222 seq_printf(m, "W4: lpb_pool_drop \t\t%d\nW4: lpb_aura_pass \t\t%d\n",
2223 rq_ctx->lpb_pool_drop, rq_ctx->lpb_aura_pass);
2224 seq_printf(m, "W4: lpb_aura_drop \t\t%d\n\n", rq_ctx->lpb_aura_drop);
2225
2226 seq_printf(m, "W5: flow_tagw \t\t\t%d\nW5: bad_utag \t\t\t%d\n",
2227 rq_ctx->flow_tagw, rq_ctx->bad_utag);
2228 seq_printf(m, "W5: good_utag \t\t\t%d\nW5: ltag \t\t\t%d\n\n",
2229 rq_ctx->good_utag, rq_ctx->ltag);
2230
2231 seq_printf(m, "W6: octs \t\t\t%llu\n\n", (u64)rq_ctx->octs);
2232 seq_printf(m, "W7: pkts \t\t\t%llu\n\n", (u64)rq_ctx->pkts);
2233 seq_printf(m, "W8: drop_octs \t\t\t%llu\n\n", (u64)rq_ctx->drop_octs);
2234 seq_printf(m, "W9: drop_pkts \t\t\t%llu\n\n", (u64)rq_ctx->drop_pkts);
2235 seq_printf(m, "W10: re_pkts \t\t\t%llu\n", (u64)rq_ctx->re_pkts);
2236 }
2237
2238 /* Dumps given nix_cq's context */
print_nix_cq_ctx(struct seq_file * m,struct nix_aq_enq_rsp * rsp)2239 static void print_nix_cq_ctx(struct seq_file *m, struct nix_aq_enq_rsp *rsp)
2240 {
2241 struct nix_cq_ctx_s *cq_ctx = &rsp->cq;
2242 struct nix_hw *nix_hw = m->private;
2243 struct rvu *rvu = nix_hw->rvu;
2244
2245 if (is_cn20k(rvu->pdev)) {
2246 print_nix_cn20k_cq_ctx(m, (struct nix_cn20k_aq_enq_rsp *)rsp);
2247 return;
2248 }
2249
2250 seq_printf(m, "W0: base \t\t\t%llx\n\n", cq_ctx->base);
2251
2252 seq_printf(m, "W1: wrptr \t\t\t%llx\n", (u64)cq_ctx->wrptr);
2253 seq_printf(m, "W1: avg_con \t\t\t%d\nW1: cint_idx \t\t\t%d\n",
2254 cq_ctx->avg_con, cq_ctx->cint_idx);
2255 seq_printf(m, "W1: cq_err \t\t\t%d\nW1: qint_idx \t\t\t%d\n",
2256 cq_ctx->cq_err, cq_ctx->qint_idx);
2257 seq_printf(m, "W1: bpid \t\t\t%d\nW1: bp_ena \t\t\t%d\n\n",
2258 cq_ctx->bpid, cq_ctx->bp_ena);
2259
2260 if (!is_rvu_otx2(rvu)) {
2261 seq_printf(m, "W1: lbpid_high \t\t\t0x%03x\n", cq_ctx->lbpid_high);
2262 seq_printf(m, "W1: lbpid_med \t\t\t0x%03x\n", cq_ctx->lbpid_med);
2263 seq_printf(m, "W1: lbpid_low \t\t\t0x%03x\n", cq_ctx->lbpid_low);
2264 seq_printf(m, "(W1: lbpid) \t\t\t0x%03x\n",
2265 cq_ctx->lbpid_high << 6 | cq_ctx->lbpid_med << 3 |
2266 cq_ctx->lbpid_low);
2267 seq_printf(m, "W1: lbp_ena \t\t\t\t%d\n\n", cq_ctx->lbp_ena);
2268 }
2269
2270 seq_printf(m, "W2: update_time \t\t%d\nW2:avg_level \t\t\t%d\n",
2271 cq_ctx->update_time, cq_ctx->avg_level);
2272 seq_printf(m, "W2: head \t\t\t%d\nW2:tail \t\t\t%d\n\n",
2273 cq_ctx->head, cq_ctx->tail);
2274
2275 seq_printf(m, "W3: cq_err_int_ena \t\t%d\nW3:cq_err_int \t\t\t%d\n",
2276 cq_ctx->cq_err_int_ena, cq_ctx->cq_err_int);
2277 seq_printf(m, "W3: qsize \t\t\t%d\nW3:caching \t\t\t%d\n",
2278 cq_ctx->qsize, cq_ctx->caching);
2279
2280 seq_printf(m, "W3: substream \t\t\t0x%03x\nW3: ena \t\t\t%d\n",
2281 cq_ctx->substream, cq_ctx->ena);
2282 if (!is_rvu_otx2(rvu)) {
2283 seq_printf(m, "W3: lbp_frac \t\t\t%d\n", cq_ctx->lbp_frac);
2284 seq_printf(m, "W3: cpt_drop_err_en \t\t\t%d\n",
2285 cq_ctx->cpt_drop_err_en);
2286 }
2287 seq_printf(m, "W3: drop_ena \t\t\t%d\nW3: drop \t\t\t%d\n",
2288 cq_ctx->drop_ena, cq_ctx->drop);
2289 seq_printf(m, "W3: bp \t\t\t\t%d\n\n", cq_ctx->bp);
2290 }
2291
rvu_dbg_nix_queue_ctx_display(struct seq_file * filp,void * unused,int ctype)2292 static int rvu_dbg_nix_queue_ctx_display(struct seq_file *filp,
2293 void *unused, int ctype)
2294 {
2295 void (*print_nix_ctx)(struct seq_file *filp,
2296 struct nix_aq_enq_rsp *rsp) = NULL;
2297 struct nix_hw *nix_hw = filp->private;
2298 struct rvu *rvu = nix_hw->rvu;
2299 struct nix_aq_enq_req aq_req;
2300 struct nix_aq_enq_rsp rsp;
2301 char *ctype_string = NULL;
2302 int qidx, rc, max_id = 0;
2303 struct rvu_pfvf *pfvf;
2304 int nixlf, id, all;
2305 u16 pcifunc;
2306
2307 switch (ctype) {
2308 case NIX_AQ_CTYPE_CQ:
2309 nixlf = rvu->rvu_dbg.nix_cq_ctx.lf;
2310 id = rvu->rvu_dbg.nix_cq_ctx.id;
2311 all = rvu->rvu_dbg.nix_cq_ctx.all;
2312 break;
2313
2314 case NIX_AQ_CTYPE_SQ:
2315 nixlf = rvu->rvu_dbg.nix_sq_ctx.lf;
2316 id = rvu->rvu_dbg.nix_sq_ctx.id;
2317 all = rvu->rvu_dbg.nix_sq_ctx.all;
2318 break;
2319
2320 case NIX_AQ_CTYPE_RQ:
2321 nixlf = rvu->rvu_dbg.nix_rq_ctx.lf;
2322 id = rvu->rvu_dbg.nix_rq_ctx.id;
2323 all = rvu->rvu_dbg.nix_rq_ctx.all;
2324 break;
2325
2326 default:
2327 return -EINVAL;
2328 }
2329
2330 if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))
2331 return -EINVAL;
2332
2333 pfvf = rvu_get_pfvf(rvu, pcifunc);
2334 if (ctype == NIX_AQ_CTYPE_SQ && !pfvf->sq_ctx) {
2335 seq_puts(filp, "SQ context is not initialized\n");
2336 return -EINVAL;
2337 } else if (ctype == NIX_AQ_CTYPE_RQ && !pfvf->rq_ctx) {
2338 seq_puts(filp, "RQ context is not initialized\n");
2339 return -EINVAL;
2340 } else if (ctype == NIX_AQ_CTYPE_CQ && !pfvf->cq_ctx) {
2341 seq_puts(filp, "CQ context is not initialized\n");
2342 return -EINVAL;
2343 }
2344
2345 if (ctype == NIX_AQ_CTYPE_SQ) {
2346 max_id = pfvf->sq_ctx->qsize;
2347 ctype_string = "sq";
2348 print_nix_ctx = print_nix_sq_ctx;
2349 } else if (ctype == NIX_AQ_CTYPE_RQ) {
2350 max_id = pfvf->rq_ctx->qsize;
2351 ctype_string = "rq";
2352 print_nix_ctx = print_nix_rq_ctx;
2353 } else if (ctype == NIX_AQ_CTYPE_CQ) {
2354 max_id = pfvf->cq_ctx->qsize;
2355 ctype_string = "cq";
2356 print_nix_ctx = print_nix_cq_ctx;
2357 }
2358
2359 memset(&aq_req, 0, sizeof(struct nix_aq_enq_req));
2360 aq_req.hdr.pcifunc = pcifunc;
2361 aq_req.ctype = ctype;
2362 aq_req.op = NIX_AQ_INSTOP_READ;
2363 if (all)
2364 id = 0;
2365 else
2366 max_id = id + 1;
2367 for (qidx = id; qidx < max_id; qidx++) {
2368 aq_req.qidx = qidx;
2369 seq_printf(filp, "=====%s_ctx for nixlf:%d and qidx:%d is=====\n",
2370 ctype_string, nixlf, aq_req.qidx);
2371 rc = rvu_mbox_handler_nix_aq_enq(rvu, &aq_req, &rsp);
2372 if (rc) {
2373 seq_puts(filp, "Failed to read the context\n");
2374 return -EINVAL;
2375 }
2376 print_nix_ctx(filp, &rsp);
2377 }
2378 return 0;
2379 }
2380
write_nix_queue_ctx(struct rvu * rvu,bool all,int nixlf,int id,int ctype,char * ctype_string,struct seq_file * m)2381 static int write_nix_queue_ctx(struct rvu *rvu, bool all, int nixlf,
2382 int id, int ctype, char *ctype_string,
2383 struct seq_file *m)
2384 {
2385 struct nix_hw *nix_hw = m->private;
2386 struct rvu_pfvf *pfvf;
2387 int max_id = 0;
2388 u16 pcifunc;
2389
2390 if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))
2391 return -EINVAL;
2392
2393 pfvf = rvu_get_pfvf(rvu, pcifunc);
2394
2395 if (ctype == NIX_AQ_CTYPE_SQ) {
2396 if (!pfvf->sq_ctx) {
2397 dev_warn(rvu->dev, "SQ context is not initialized\n");
2398 return -EINVAL;
2399 }
2400 max_id = pfvf->sq_ctx->qsize;
2401 } else if (ctype == NIX_AQ_CTYPE_RQ) {
2402 if (!pfvf->rq_ctx) {
2403 dev_warn(rvu->dev, "RQ context is not initialized\n");
2404 return -EINVAL;
2405 }
2406 max_id = pfvf->rq_ctx->qsize;
2407 } else if (ctype == NIX_AQ_CTYPE_CQ) {
2408 if (!pfvf->cq_ctx) {
2409 dev_warn(rvu->dev, "CQ context is not initialized\n");
2410 return -EINVAL;
2411 }
2412 max_id = pfvf->cq_ctx->qsize;
2413 }
2414
2415 if (id < 0 || id >= max_id) {
2416 dev_warn(rvu->dev, "Invalid %s_ctx valid range 0-%d\n",
2417 ctype_string, max_id - 1);
2418 return -EINVAL;
2419 }
2420 switch (ctype) {
2421 case NIX_AQ_CTYPE_CQ:
2422 rvu->rvu_dbg.nix_cq_ctx.lf = nixlf;
2423 rvu->rvu_dbg.nix_cq_ctx.id = id;
2424 rvu->rvu_dbg.nix_cq_ctx.all = all;
2425 break;
2426
2427 case NIX_AQ_CTYPE_SQ:
2428 rvu->rvu_dbg.nix_sq_ctx.lf = nixlf;
2429 rvu->rvu_dbg.nix_sq_ctx.id = id;
2430 rvu->rvu_dbg.nix_sq_ctx.all = all;
2431 break;
2432
2433 case NIX_AQ_CTYPE_RQ:
2434 rvu->rvu_dbg.nix_rq_ctx.lf = nixlf;
2435 rvu->rvu_dbg.nix_rq_ctx.id = id;
2436 rvu->rvu_dbg.nix_rq_ctx.all = all;
2437 break;
2438 default:
2439 return -EINVAL;
2440 }
2441 return 0;
2442 }
2443
rvu_dbg_nix_queue_ctx_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos,int ctype)2444 static ssize_t rvu_dbg_nix_queue_ctx_write(struct file *filp,
2445 const char __user *buffer,
2446 size_t count, loff_t *ppos,
2447 int ctype)
2448 {
2449 struct seq_file *m = filp->private_data;
2450 struct nix_hw *nix_hw = m->private;
2451 struct rvu *rvu = nix_hw->rvu;
2452 char *cmd_buf, *ctype_string;
2453 int nixlf, id = 0, ret;
2454 bool all = false;
2455
2456 if ((*ppos != 0) || !count)
2457 return -EINVAL;
2458
2459 switch (ctype) {
2460 case NIX_AQ_CTYPE_SQ:
2461 ctype_string = "sq";
2462 break;
2463 case NIX_AQ_CTYPE_RQ:
2464 ctype_string = "rq";
2465 break;
2466 case NIX_AQ_CTYPE_CQ:
2467 ctype_string = "cq";
2468 break;
2469 default:
2470 return -EINVAL;
2471 }
2472
2473 cmd_buf = kzalloc(count + 1, GFP_KERNEL);
2474
2475 if (!cmd_buf)
2476 return count;
2477
2478 ret = parse_cmd_buffer_ctx(cmd_buf, &count, buffer,
2479 &nixlf, &id, &all);
2480 if (ret < 0) {
2481 dev_info(rvu->dev,
2482 "Usage: echo <nixlf> [%s number/all] > %s_ctx\n",
2483 ctype_string, ctype_string);
2484 goto done;
2485 } else {
2486 ret = write_nix_queue_ctx(rvu, all, nixlf, id, ctype,
2487 ctype_string, m);
2488 }
2489 done:
2490 kfree(cmd_buf);
2491 return ret ? ret : count;
2492 }
2493
rvu_dbg_nix_sq_ctx_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos)2494 static ssize_t rvu_dbg_nix_sq_ctx_write(struct file *filp,
2495 const char __user *buffer,
2496 size_t count, loff_t *ppos)
2497 {
2498 return rvu_dbg_nix_queue_ctx_write(filp, buffer, count, ppos,
2499 NIX_AQ_CTYPE_SQ);
2500 }
2501
rvu_dbg_nix_sq_ctx_display(struct seq_file * filp,void * unused)2502 static int rvu_dbg_nix_sq_ctx_display(struct seq_file *filp, void *unused)
2503 {
2504 return rvu_dbg_nix_queue_ctx_display(filp, unused, NIX_AQ_CTYPE_SQ);
2505 }
2506
2507 RVU_DEBUG_SEQ_FOPS(nix_sq_ctx, nix_sq_ctx_display, nix_sq_ctx_write);
2508
rvu_dbg_nix_rq_ctx_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos)2509 static ssize_t rvu_dbg_nix_rq_ctx_write(struct file *filp,
2510 const char __user *buffer,
2511 size_t count, loff_t *ppos)
2512 {
2513 return rvu_dbg_nix_queue_ctx_write(filp, buffer, count, ppos,
2514 NIX_AQ_CTYPE_RQ);
2515 }
2516
rvu_dbg_nix_rq_ctx_display(struct seq_file * filp,void * unused)2517 static int rvu_dbg_nix_rq_ctx_display(struct seq_file *filp, void *unused)
2518 {
2519 return rvu_dbg_nix_queue_ctx_display(filp, unused, NIX_AQ_CTYPE_RQ);
2520 }
2521
2522 RVU_DEBUG_SEQ_FOPS(nix_rq_ctx, nix_rq_ctx_display, nix_rq_ctx_write);
2523
rvu_dbg_nix_cq_ctx_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos)2524 static ssize_t rvu_dbg_nix_cq_ctx_write(struct file *filp,
2525 const char __user *buffer,
2526 size_t count, loff_t *ppos)
2527 {
2528 return rvu_dbg_nix_queue_ctx_write(filp, buffer, count, ppos,
2529 NIX_AQ_CTYPE_CQ);
2530 }
2531
rvu_dbg_nix_cq_ctx_display(struct seq_file * filp,void * unused)2532 static int rvu_dbg_nix_cq_ctx_display(struct seq_file *filp, void *unused)
2533 {
2534 return rvu_dbg_nix_queue_ctx_display(filp, unused, NIX_AQ_CTYPE_CQ);
2535 }
2536
2537 RVU_DEBUG_SEQ_FOPS(nix_cq_ctx, nix_cq_ctx_display, nix_cq_ctx_write);
2538
print_nix_qctx_qsize(struct seq_file * filp,int qsize,unsigned long * bmap,char * qtype)2539 static void print_nix_qctx_qsize(struct seq_file *filp, int qsize,
2540 unsigned long *bmap, char *qtype)
2541 {
2542 seq_printf(filp, "%s context count : %d\n", qtype, qsize);
2543 seq_printf(filp, "%s context ena/dis bitmap : %*pb\n", qtype, qsize, bmap);
2544 }
2545
print_nix_qsize(struct seq_file * filp,struct rvu_pfvf * pfvf)2546 static void print_nix_qsize(struct seq_file *filp, struct rvu_pfvf *pfvf)
2547 {
2548 if (!pfvf->cq_ctx)
2549 seq_puts(filp, "cq context is not initialized\n");
2550 else
2551 print_nix_qctx_qsize(filp, pfvf->cq_ctx->qsize, pfvf->cq_bmap,
2552 "cq");
2553
2554 if (!pfvf->rq_ctx)
2555 seq_puts(filp, "rq context is not initialized\n");
2556 else
2557 print_nix_qctx_qsize(filp, pfvf->rq_ctx->qsize, pfvf->rq_bmap,
2558 "rq");
2559
2560 if (!pfvf->sq_ctx)
2561 seq_puts(filp, "sq context is not initialized\n");
2562 else
2563 print_nix_qctx_qsize(filp, pfvf->sq_ctx->qsize, pfvf->sq_bmap,
2564 "sq");
2565 }
2566
rvu_dbg_nix_qsize_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos)2567 static ssize_t rvu_dbg_nix_qsize_write(struct file *filp,
2568 const char __user *buffer,
2569 size_t count, loff_t *ppos)
2570 {
2571 return rvu_dbg_qsize_write(filp, buffer, count, ppos,
2572 BLKTYPE_NIX);
2573 }
2574
rvu_dbg_nix_qsize_display(struct seq_file * filp,void * unused)2575 static int rvu_dbg_nix_qsize_display(struct seq_file *filp, void *unused)
2576 {
2577 return rvu_dbg_qsize_display(filp, unused, BLKTYPE_NIX);
2578 }
2579
2580 RVU_DEBUG_SEQ_FOPS(nix_qsize, nix_qsize_display, nix_qsize_write);
2581
print_band_prof_ctx(struct seq_file * m,struct nix_bandprof_s * prof)2582 static void print_band_prof_ctx(struct seq_file *m,
2583 struct nix_bandprof_s *prof)
2584 {
2585 char *str;
2586
2587 switch (prof->pc_mode) {
2588 case NIX_RX_PC_MODE_VLAN:
2589 str = "VLAN";
2590 break;
2591 case NIX_RX_PC_MODE_DSCP:
2592 str = "DSCP";
2593 break;
2594 case NIX_RX_PC_MODE_GEN:
2595 str = "Generic";
2596 break;
2597 case NIX_RX_PC_MODE_RSVD:
2598 str = "Reserved";
2599 break;
2600 }
2601 seq_printf(m, "W0: pc_mode\t\t%s\n", str);
2602 str = (prof->icolor == 3) ? "Color blind" :
2603 (prof->icolor == 0) ? "Green" :
2604 (prof->icolor == 1) ? "Yellow" : "Red";
2605 seq_printf(m, "W0: icolor\t\t%s\n", str);
2606 seq_printf(m, "W0: tnl_ena\t\t%d\n", prof->tnl_ena);
2607 seq_printf(m, "W0: peir_exponent\t%d\n", prof->peir_exponent);
2608 seq_printf(m, "W0: pebs_exponent\t%d\n", prof->pebs_exponent);
2609 seq_printf(m, "W0: cir_exponent\t%d\n", prof->cir_exponent);
2610 seq_printf(m, "W0: cbs_exponent\t%d\n", prof->cbs_exponent);
2611 seq_printf(m, "W0: peir_mantissa\t%d\n", prof->peir_mantissa);
2612 seq_printf(m, "W0: pebs_mantissa\t%d\n", prof->pebs_mantissa);
2613 seq_printf(m, "W0: cir_mantissa\t%d\n", prof->cir_mantissa);
2614
2615 seq_printf(m, "W1: cbs_mantissa\t%d\n", prof->cbs_mantissa);
2616 str = (prof->lmode == 0) ? "byte" : "packet";
2617 seq_printf(m, "W1: lmode\t\t%s\n", str);
2618 seq_printf(m, "W1: l_select\t\t%d\n", prof->l_sellect);
2619 seq_printf(m, "W1: rdiv\t\t%d\n", prof->rdiv);
2620 seq_printf(m, "W1: adjust_exponent\t%d\n", prof->adjust_exponent);
2621 seq_printf(m, "W1: adjust_mantissa\t%d\n", prof->adjust_mantissa);
2622 str = (prof->gc_action == 0) ? "PASS" :
2623 (prof->gc_action == 1) ? "DROP" : "RED";
2624 seq_printf(m, "W1: gc_action\t\t%s\n", str);
2625 str = (prof->yc_action == 0) ? "PASS" :
2626 (prof->yc_action == 1) ? "DROP" : "RED";
2627 seq_printf(m, "W1: yc_action\t\t%s\n", str);
2628 str = (prof->rc_action == 0) ? "PASS" :
2629 (prof->rc_action == 1) ? "DROP" : "RED";
2630 seq_printf(m, "W1: rc_action\t\t%s\n", str);
2631 seq_printf(m, "W1: meter_algo\t\t%d\n", prof->meter_algo);
2632
2633 seq_printf(m, "W1: band_prof_id\t%d\n",
2634 (u16)prof->band_prof_id_h << 7 | prof->band_prof_id);
2635
2636 seq_printf(m, "W1: hl_en\t\t%d\n", prof->hl_en);
2637
2638 seq_printf(m, "W2: ts\t\t\t%lld\n", (u64)prof->ts);
2639 seq_printf(m, "W3: pe_accum\t\t%d\n", prof->pe_accum);
2640 seq_printf(m, "W3: c_accum\t\t%d\n", prof->c_accum);
2641 seq_printf(m, "W4: green_pkt_pass\t%lld\n",
2642 (u64)prof->green_pkt_pass);
2643 seq_printf(m, "W5: yellow_pkt_pass\t%lld\n",
2644 (u64)prof->yellow_pkt_pass);
2645 seq_printf(m, "W6: red_pkt_pass\t%lld\n", (u64)prof->red_pkt_pass);
2646 seq_printf(m, "W7: green_octs_pass\t%lld\n",
2647 (u64)prof->green_octs_pass);
2648 seq_printf(m, "W8: yellow_octs_pass\t%lld\n",
2649 (u64)prof->yellow_octs_pass);
2650 seq_printf(m, "W9: red_octs_pass\t%lld\n", (u64)prof->red_octs_pass);
2651 seq_printf(m, "W10: green_pkt_drop\t%lld\n",
2652 (u64)prof->green_pkt_drop);
2653 seq_printf(m, "W11: yellow_pkt_drop\t%lld\n",
2654 (u64)prof->yellow_pkt_drop);
2655 seq_printf(m, "W12: red_pkt_drop\t%lld\n", (u64)prof->red_pkt_drop);
2656 seq_printf(m, "W13: green_octs_drop\t%lld\n",
2657 (u64)prof->green_octs_drop);
2658 seq_printf(m, "W14: yellow_octs_drop\t%lld\n",
2659 (u64)prof->yellow_octs_drop);
2660 seq_printf(m, "W15: red_octs_drop\t%lld\n", (u64)prof->red_octs_drop);
2661 seq_puts(m, "==============================\n");
2662 }
2663
rvu_dbg_nix_band_prof_ctx_display(struct seq_file * m,void * unused)2664 static int rvu_dbg_nix_band_prof_ctx_display(struct seq_file *m, void *unused)
2665 {
2666 struct nix_hw *nix_hw = m->private;
2667 struct nix_cn10k_aq_enq_req aq_req;
2668 struct nix_cn10k_aq_enq_rsp aq_rsp;
2669 struct rvu *rvu = nix_hw->rvu;
2670 struct nix_ipolicer *ipolicer;
2671 int layer, prof_idx, idx, rc;
2672 u16 pcifunc;
2673 char *str;
2674
2675 /* Ingress policers do not exist on all platforms */
2676 if (!nix_hw->ipolicer)
2677 return 0;
2678
2679 for (layer = 0; layer < BAND_PROF_NUM_LAYERS; layer++) {
2680 if (layer == BAND_PROF_INVAL_LAYER)
2681 continue;
2682 str = (layer == BAND_PROF_LEAF_LAYER) ? "Leaf" :
2683 (layer == BAND_PROF_MID_LAYER) ? "Mid" : "Top";
2684
2685 seq_printf(m, "\n%s bandwidth profiles\n", str);
2686 seq_puts(m, "=======================\n");
2687
2688 ipolicer = &nix_hw->ipolicer[layer];
2689
2690 for (idx = 0; idx < ipolicer->band_prof.max; idx++) {
2691 if (is_rsrc_free(&ipolicer->band_prof, idx))
2692 continue;
2693
2694 prof_idx = (idx & 0x3FFF) | (layer << 14);
2695 rc = nix_aq_context_read(rvu, nix_hw, &aq_req, &aq_rsp,
2696 0x00, NIX_AQ_CTYPE_BANDPROF,
2697 prof_idx);
2698 if (rc) {
2699 dev_err(rvu->dev,
2700 "%s: Failed to fetch context of %s profile %d, err %d\n",
2701 __func__, str, idx, rc);
2702 return 0;
2703 }
2704 seq_printf(m, "\n%s bandwidth profile:: %d\n", str, idx);
2705 pcifunc = ipolicer->pfvf_map[idx];
2706 if (!(pcifunc & RVU_PFVF_FUNC_MASK))
2707 seq_printf(m, "Allocated to :: PF %d\n",
2708 rvu_get_pf(rvu->pdev, pcifunc));
2709 else
2710 seq_printf(m, "Allocated to :: PF %d VF %d\n",
2711 rvu_get_pf(rvu->pdev, pcifunc),
2712 (pcifunc & RVU_PFVF_FUNC_MASK) - 1);
2713 print_band_prof_ctx(m, &aq_rsp.prof);
2714 }
2715 }
2716 return 0;
2717 }
2718
2719 RVU_DEBUG_SEQ_FOPS(nix_band_prof_ctx, nix_band_prof_ctx_display, NULL);
2720
rvu_dbg_nix_band_prof_rsrc_display(struct seq_file * m,void * unused)2721 static int rvu_dbg_nix_band_prof_rsrc_display(struct seq_file *m, void *unused)
2722 {
2723 struct nix_hw *nix_hw = m->private;
2724 struct nix_ipolicer *ipolicer;
2725 int layer;
2726 char *str;
2727
2728 /* Ingress policers do not exist on all platforms */
2729 if (!nix_hw->ipolicer)
2730 return 0;
2731
2732 seq_puts(m, "\nBandwidth profile resource free count\n");
2733 seq_puts(m, "=====================================\n");
2734 for (layer = 0; layer < BAND_PROF_NUM_LAYERS; layer++) {
2735 if (layer == BAND_PROF_INVAL_LAYER)
2736 continue;
2737 str = (layer == BAND_PROF_LEAF_LAYER) ? "Leaf" :
2738 (layer == BAND_PROF_MID_LAYER) ? "Mid " : "Top ";
2739
2740 ipolicer = &nix_hw->ipolicer[layer];
2741 seq_printf(m, "%s :: Max: %4d Free: %4d\n", str,
2742 ipolicer->band_prof.max,
2743 rvu_rsrc_free_count(&ipolicer->band_prof));
2744 }
2745 seq_puts(m, "=====================================\n");
2746
2747 return 0;
2748 }
2749
2750 RVU_DEBUG_SEQ_FOPS(nix_band_prof_rsrc, nix_band_prof_rsrc_display, NULL);
2751
rvu_dbg_nix_init(struct rvu * rvu,int blkaddr)2752 static void rvu_dbg_nix_init(struct rvu *rvu, int blkaddr)
2753 {
2754 struct nix_hw *nix_hw;
2755
2756 if (!is_block_implemented(rvu->hw, blkaddr))
2757 return;
2758
2759 if (blkaddr == BLKADDR_NIX0) {
2760 rvu->rvu_dbg.nix = debugfs_create_dir("nix", rvu->rvu_dbg.root);
2761 nix_hw = &rvu->hw->nix[0];
2762 } else {
2763 rvu->rvu_dbg.nix = debugfs_create_dir("nix1",
2764 rvu->rvu_dbg.root);
2765 nix_hw = &rvu->hw->nix[1];
2766 }
2767
2768 debugfs_create_file("tm_tree", 0600, rvu->rvu_dbg.nix, nix_hw,
2769 &rvu_dbg_nix_tm_tree_fops);
2770 debugfs_create_file("tm_topo", 0600, rvu->rvu_dbg.nix, nix_hw,
2771 &rvu_dbg_nix_tm_topo_fops);
2772 debugfs_create_file("sq_ctx", 0600, rvu->rvu_dbg.nix, nix_hw,
2773 &rvu_dbg_nix_sq_ctx_fops);
2774 debugfs_create_file("rq_ctx", 0600, rvu->rvu_dbg.nix, nix_hw,
2775 &rvu_dbg_nix_rq_ctx_fops);
2776 debugfs_create_file("cq_ctx", 0600, rvu->rvu_dbg.nix, nix_hw,
2777 &rvu_dbg_nix_cq_ctx_fops);
2778 debugfs_create_file("ndc_tx_cache", 0600, rvu->rvu_dbg.nix, nix_hw,
2779 &rvu_dbg_nix_ndc_tx_cache_fops);
2780 debugfs_create_file("ndc_rx_cache", 0600, rvu->rvu_dbg.nix, nix_hw,
2781 &rvu_dbg_nix_ndc_rx_cache_fops);
2782 debugfs_create_file("ndc_tx_hits_miss", 0600, rvu->rvu_dbg.nix, nix_hw,
2783 &rvu_dbg_nix_ndc_tx_hits_miss_fops);
2784 debugfs_create_file("ndc_rx_hits_miss", 0600, rvu->rvu_dbg.nix, nix_hw,
2785 &rvu_dbg_nix_ndc_rx_hits_miss_fops);
2786 debugfs_create_file_aux_num("qsize", 0600, rvu->rvu_dbg.nix, rvu,
2787 blkaddr, &rvu_dbg_nix_qsize_fops);
2788 debugfs_create_file("ingress_policer_ctx", 0600, rvu->rvu_dbg.nix, nix_hw,
2789 &rvu_dbg_nix_band_prof_ctx_fops);
2790 debugfs_create_file("ingress_policer_rsrc", 0600, rvu->rvu_dbg.nix, nix_hw,
2791 &rvu_dbg_nix_band_prof_rsrc_fops);
2792 }
2793
rvu_dbg_npa_init(struct rvu * rvu)2794 static void rvu_dbg_npa_init(struct rvu *rvu)
2795 {
2796 rvu->rvu_dbg.npa = debugfs_create_dir("npa", rvu->rvu_dbg.root);
2797
2798 debugfs_create_file("qsize", 0600, rvu->rvu_dbg.npa, rvu,
2799 &rvu_dbg_npa_qsize_fops);
2800 debugfs_create_file("aura_ctx", 0600, rvu->rvu_dbg.npa, rvu,
2801 &rvu_dbg_npa_aura_ctx_fops);
2802 debugfs_create_file("pool_ctx", 0600, rvu->rvu_dbg.npa, rvu,
2803 &rvu_dbg_npa_pool_ctx_fops);
2804
2805 if (is_cn20k(rvu->pdev)) /* NDC not appliable for cn20k */
2806 return;
2807 debugfs_create_file("ndc_cache", 0600, rvu->rvu_dbg.npa, rvu,
2808 &rvu_dbg_npa_ndc_cache_fops);
2809 debugfs_create_file("ndc_hits_miss", 0600, rvu->rvu_dbg.npa, rvu,
2810 &rvu_dbg_npa_ndc_hits_miss_fops);
2811 }
2812
2813 /* Per-lmac CGX debugfs files need both RVU and CGX handle; inode->i_private
2814 * points here so seq_file ops avoid pci_get_device(PCI_DEVID_OCTEONTX2_RVU_AF).
2815 */
2816 struct rvu_cgx_lmac_dbgfs_ctx {
2817 struct rvu *rvu;
2818 void *cgxd;
2819 };
2820
2821 #define PRINT_CGX_CUML_NIXRX_STATUS(idx, name) \
2822 ({ \
2823 u64 cnt; \
2824 err = rvu_cgx_nix_cuml_stats(rvu, cgxd, lmac_id, (idx), \
2825 NIX_STATS_RX, &(cnt)); \
2826 if (!err) \
2827 seq_printf(s, "%s: %llu\n", name, cnt); \
2828 cnt; \
2829 })
2830
2831 #define PRINT_CGX_CUML_NIXTX_STATUS(idx, name) \
2832 ({ \
2833 u64 cnt; \
2834 err = rvu_cgx_nix_cuml_stats(rvu, cgxd, lmac_id, (idx), \
2835 NIX_STATS_TX, &(cnt)); \
2836 if (!err) \
2837 seq_printf(s, "%s: %llu\n", name, cnt); \
2838 cnt; \
2839 })
2840
cgx_print_stats(struct seq_file * s,int lmac_id)2841 static int cgx_print_stats(struct seq_file *s, int lmac_id)
2842 {
2843 struct rvu_cgx_lmac_dbgfs_ctx *dctx = s->private;
2844 struct cgx_link_user_info linfo;
2845 struct rvu *rvu = dctx->rvu;
2846 struct mac_ops *mac_ops;
2847 void *cgxd = dctx->cgxd;
2848 u64 ucast, mcast, bcast;
2849 int stat = 0, err = 0;
2850 u64 tx_stat, rx_stat;
2851
2852 mac_ops = get_mac_ops(cgxd);
2853 /* There can be no CGX devices at all */
2854 if (!mac_ops)
2855 return 0;
2856
2857 /* Link status */
2858 seq_puts(s, "\n=======Link Status======\n\n");
2859 err = cgx_get_link_info(cgxd, lmac_id, &linfo);
2860 if (err)
2861 seq_puts(s, "Failed to read link status\n");
2862 seq_printf(s, "\nLink is %s %d Mbps\n\n",
2863 linfo.link_up ? "UP" : "DOWN", linfo.speed);
2864
2865 /* Rx stats */
2866 seq_printf(s, "\n=======NIX RX_STATS(%s port level)======\n\n",
2867 mac_ops->name);
2868 ucast = PRINT_CGX_CUML_NIXRX_STATUS(RX_UCAST, "rx_ucast_frames");
2869 if (err)
2870 return err;
2871 mcast = PRINT_CGX_CUML_NIXRX_STATUS(RX_MCAST, "rx_mcast_frames");
2872 if (err)
2873 return err;
2874 bcast = PRINT_CGX_CUML_NIXRX_STATUS(RX_BCAST, "rx_bcast_frames");
2875 if (err)
2876 return err;
2877 seq_printf(s, "rx_frames: %llu\n", ucast + mcast + bcast);
2878 PRINT_CGX_CUML_NIXRX_STATUS(RX_OCTS, "rx_bytes");
2879 if (err)
2880 return err;
2881 PRINT_CGX_CUML_NIXRX_STATUS(RX_DROP, "rx_drops");
2882 if (err)
2883 return err;
2884 PRINT_CGX_CUML_NIXRX_STATUS(RX_ERR, "rx_errors");
2885 if (err)
2886 return err;
2887
2888 /* Tx stats */
2889 seq_printf(s, "\n=======NIX TX_STATS(%s port level)======\n\n",
2890 mac_ops->name);
2891 ucast = PRINT_CGX_CUML_NIXTX_STATUS(TX_UCAST, "tx_ucast_frames");
2892 if (err)
2893 return err;
2894 mcast = PRINT_CGX_CUML_NIXTX_STATUS(TX_MCAST, "tx_mcast_frames");
2895 if (err)
2896 return err;
2897 bcast = PRINT_CGX_CUML_NIXTX_STATUS(TX_BCAST, "tx_bcast_frames");
2898 if (err)
2899 return err;
2900 seq_printf(s, "tx_frames: %llu\n", ucast + mcast + bcast);
2901 PRINT_CGX_CUML_NIXTX_STATUS(TX_OCTS, "tx_bytes");
2902 if (err)
2903 return err;
2904 PRINT_CGX_CUML_NIXTX_STATUS(TX_DROP, "tx_drops");
2905 if (err)
2906 return err;
2907
2908 /* Rx stats */
2909 seq_printf(s, "\n=======%s RX_STATS======\n\n", mac_ops->name);
2910 while (stat < mac_ops->rx_stats_cnt) {
2911 err = mac_ops->mac_get_rx_stats(cgxd, lmac_id, stat, &rx_stat);
2912 if (err)
2913 return err;
2914 if (is_rvu_otx2(rvu))
2915 seq_printf(s, "%s: %llu\n", cgx_rx_stats_fields[stat],
2916 rx_stat);
2917 else
2918 seq_printf(s, "%s: %llu\n", rpm_rx_stats_fields[stat],
2919 rx_stat);
2920 stat++;
2921 }
2922
2923 /* Tx stats */
2924 stat = 0;
2925 seq_printf(s, "\n=======%s TX_STATS======\n\n", mac_ops->name);
2926 while (stat < mac_ops->tx_stats_cnt) {
2927 err = mac_ops->mac_get_tx_stats(cgxd, lmac_id, stat, &tx_stat);
2928 if (err)
2929 return err;
2930
2931 if (is_rvu_otx2(rvu))
2932 seq_printf(s, "%s: %llu\n", cgx_tx_stats_fields[stat],
2933 tx_stat);
2934 else
2935 seq_printf(s, "%s: %llu\n", rpm_tx_stats_fields[stat],
2936 tx_stat);
2937 stat++;
2938 }
2939
2940 return err;
2941 }
2942
rvu_dbg_derive_lmacid(struct seq_file * s)2943 static int rvu_dbg_derive_lmacid(struct seq_file *s)
2944 {
2945 return debugfs_get_aux_num(s->file);
2946 }
2947
rvu_dbg_cgx_stat_display(struct seq_file * s,void * unused)2948 static int rvu_dbg_cgx_stat_display(struct seq_file *s, void *unused)
2949 {
2950 return cgx_print_stats(s, rvu_dbg_derive_lmacid(s));
2951 }
2952
2953 RVU_DEBUG_SEQ_FOPS(cgx_stat, cgx_stat_display, NULL);
2954
cgx_print_dmac_flt(struct seq_file * s,int lmac_id)2955 static int cgx_print_dmac_flt(struct seq_file *s, int lmac_id)
2956 {
2957 struct rvu_cgx_lmac_dbgfs_ctx *dctx = s->private;
2958 struct rvu *rvu = dctx->rvu;
2959 struct pci_dev *pdev = NULL;
2960 void *cgxd = dctx->cgxd;
2961 char *bcast, *mcast;
2962 u16 index, domain;
2963 u8 dmac[ETH_ALEN];
2964 u64 cfg, mac;
2965 int pf;
2966
2967 pf = cgxlmac_to_pf(rvu, cgx_get_cgxid(cgxd), lmac_id);
2968 domain = 2;
2969
2970 pdev = pci_get_domain_bus_and_slot(domain, pf + 1, 0);
2971 if (!pdev)
2972 return 0;
2973
2974 cfg = cgx_read_dmac_ctrl(cgxd, lmac_id);
2975 bcast = cfg & CGX_DMAC_BCAST_MODE ? "ACCEPT" : "REJECT";
2976 mcast = cfg & CGX_DMAC_MCAST_MODE ? "ACCEPT" : "REJECT";
2977
2978 seq_puts(s,
2979 "PCI dev RVUPF BROADCAST MULTICAST FILTER-MODE\n");
2980 seq_printf(s, "%s PF%d %9s %9s",
2981 dev_name(&pdev->dev), pf, bcast, mcast);
2982 if (cfg & CGX_DMAC_CAM_ACCEPT)
2983 seq_printf(s, "%12s\n\n", "UNICAST");
2984 else
2985 seq_printf(s, "%16s\n\n", "PROMISCUOUS");
2986
2987 seq_puts(s, "\nDMAC-INDEX ADDRESS\n");
2988
2989 for (index = 0 ; index < 32 ; index++) {
2990 cfg = cgx_read_dmac_entry(cgxd, index);
2991 /* Display enabled dmac entries associated with current lmac */
2992 if (lmac_id == FIELD_GET(CGX_DMAC_CAM_ENTRY_LMACID, cfg) &&
2993 FIELD_GET(CGX_DMAC_CAM_ADDR_ENABLE, cfg)) {
2994 mac = FIELD_GET(CGX_RX_DMAC_ADR_MASK, cfg);
2995 u64_to_ether_addr(mac, dmac);
2996 seq_printf(s, "%7d %pM\n", index, dmac);
2997 }
2998 }
2999
3000 pci_dev_put(pdev);
3001 return 0;
3002 }
3003
rvu_dbg_cgx_dmac_flt_display(struct seq_file * s,void * unused)3004 static int rvu_dbg_cgx_dmac_flt_display(struct seq_file *s, void *unused)
3005 {
3006 return cgx_print_dmac_flt(s, rvu_dbg_derive_lmacid(s));
3007 }
3008
3009 RVU_DEBUG_SEQ_FOPS(cgx_dmac_flt, cgx_dmac_flt_display, NULL);
3010
cgx_print_fwdata(struct seq_file * s,int lmac_id)3011 static int cgx_print_fwdata(struct seq_file *s, int lmac_id)
3012 {
3013 struct rvu_cgx_lmac_dbgfs_ctx *dctx = s->private;
3014 struct cgx_lmac_fwdata_s *fwdata;
3015 struct rvu *rvu = dctx->rvu;
3016 void *cgxd = dctx->cgxd;
3017 struct phy_s *phy;
3018 int cgx_id, i;
3019
3020 if (!rvu->fwdata)
3021 return -EAGAIN;
3022
3023 cgx_id = cgx_get_cgxid(cgxd);
3024
3025 if (rvu->hw->lmac_per_cgx == CGX_LMACS_USX)
3026 fwdata = &rvu->fwdata->cgx_fw_data_usx[cgx_id][lmac_id];
3027 else
3028 fwdata = &rvu->fwdata->cgx_fw_data[cgx_id][lmac_id];
3029
3030 seq_puts(s, "\nFIRMWARE SHARED:\n");
3031 seq_puts(s, "\t\tSUPPORTED LINK INFORMATION\t\t\n");
3032 seq_puts(s, "\t\t==========================\n");
3033 seq_printf(s, "\t\t Link modes \t\t :%llx\n",
3034 fwdata->supported_link_modes);
3035 seq_printf(s, "\t\t Autoneg \t\t :%llx\n", fwdata->supported_an);
3036 seq_printf(s, "\t\t FEC \t\t\t :%llx\n", fwdata->supported_fec);
3037 seq_puts(s, "\n");
3038
3039 seq_puts(s, "\t\tADVERTISED LINK INFORMATION\t\t\n");
3040 seq_puts(s, "\t\t==========================\n");
3041 seq_printf(s, "\t\t Link modes \t\t :%llx\n",
3042 (u64)fwdata->advertised_link_modes);
3043 seq_printf(s, "\t\t Autoneg \t\t :%x\n", fwdata->advertised_an);
3044 seq_printf(s, "\t\t FEC \t\t\t :%llx\n", fwdata->advertised_fec);
3045 seq_puts(s, "\n");
3046
3047 seq_puts(s, "\t\tLMAC CONFIG\t\t\n");
3048 seq_puts(s, "\t\t============\n");
3049 seq_printf(s, "\t\t rw_valid \t\t :%x\n", fwdata->rw_valid);
3050 seq_printf(s, "\t\t lmac_type \t\t :%x\n", fwdata->lmac_type);
3051 seq_printf(s, "\t\t portm_idx \t\t :%x\n", fwdata->portm_idx);
3052 seq_printf(s, "\t\t mgmt_port \t\t :%x\n", fwdata->mgmt_port);
3053 seq_printf(s, "\t\t Link modes own \t :%llx\n",
3054 (u64)fwdata->advertised_link_modes_own);
3055 seq_puts(s, "\n");
3056
3057 seq_puts(s, "\n\t\tEEPROM DATA\n");
3058 seq_puts(s, "\t\t===========\n");
3059 seq_printf(s, "\t\t sff_id \t\t :%x\n", fwdata->sfp_eeprom.sff_id);
3060 seq_puts(s, "\t\t data \t\t\t :\n");
3061 seq_puts(s, "\t\t");
3062 for (i = 0; i < SFP_EEPROM_SIZE; i++) {
3063 seq_printf(s, "%x", fwdata->sfp_eeprom.buf[i]);
3064 if ((i + 1) % 16 == 0) {
3065 seq_puts(s, "\n");
3066 seq_puts(s, "\t\t");
3067 }
3068 }
3069 seq_puts(s, "\n");
3070
3071 phy = &fwdata->phy;
3072 seq_puts(s, "\n\t\tPHY INFORMATION\n");
3073 seq_puts(s, "\t\t===============\n");
3074 seq_printf(s, "\t\t Mod type configurable \t\t :%x\n",
3075 phy->misc.can_change_mod_type);
3076 seq_printf(s, "\t\t Mod type \t\t\t :%x\n", phy->misc.mod_type);
3077 seq_printf(s, "\t\t Support FEC \t\t\t :%x\n", phy->misc.has_fec_stats);
3078 seq_printf(s, "\t\t RSFEC corrected words \t\t :%x\n",
3079 phy->fec_stats.rsfec_corr_cws);
3080 seq_printf(s, "\t\t RSFEC uncorrected words \t :%x\n",
3081 phy->fec_stats.rsfec_uncorr_cws);
3082 seq_printf(s, "\t\t BRFEC corrected words \t\t :%x\n",
3083 phy->fec_stats.brfec_corr_blks);
3084 seq_printf(s, "\t\t BRFEC uncorrected words \t :%x\n",
3085 phy->fec_stats.brfec_uncorr_blks);
3086 seq_puts(s, "\n");
3087
3088 return 0;
3089 }
3090
rvu_dbg_cgx_fwdata_display(struct seq_file * s,void * unused)3091 static int rvu_dbg_cgx_fwdata_display(struct seq_file *s, void *unused)
3092 {
3093 return cgx_print_fwdata(s, rvu_dbg_derive_lmacid(s));
3094 }
3095
3096 RVU_DEBUG_SEQ_FOPS(cgx_fwdata, cgx_fwdata_display, NULL);
3097
rvu_dbg_cgx_init(struct rvu * rvu)3098 static void rvu_dbg_cgx_init(struct rvu *rvu)
3099 {
3100 struct rvu_cgx_lmac_dbgfs_ctx *ctx;
3101 struct mac_ops *mac_ops;
3102 unsigned long lmac_bmap;
3103 int i, lmac_id;
3104 char dname[20];
3105 void *cgx;
3106
3107 if (!cgx_get_cgxcnt_max())
3108 return;
3109
3110 mac_ops = get_mac_ops(rvu_first_cgx_pdata(rvu));
3111 if (!mac_ops)
3112 return;
3113
3114 rvu->rvu_dbg.cgx_root = debugfs_create_dir(mac_ops->name,
3115 rvu->rvu_dbg.root);
3116
3117 for (i = 0; i < cgx_get_cgxcnt_max(); i++) {
3118 cgx = rvu_cgx_pdata(i, rvu);
3119 if (!cgx)
3120 continue;
3121 lmac_bmap = cgx_get_lmac_bmap(cgx);
3122 /* cgx debugfs dir */
3123 sprintf(dname, "%s%d", mac_ops->name, i);
3124 rvu->rvu_dbg.cgx = debugfs_create_dir(dname,
3125 rvu->rvu_dbg.cgx_root);
3126
3127 ctx = devm_kzalloc(rvu->dev, sizeof(*ctx), GFP_KERNEL);
3128 if (!ctx)
3129 continue;
3130
3131 ctx->rvu = rvu;
3132 ctx->cgxd = cgx;
3133
3134 for_each_set_bit(lmac_id, &lmac_bmap, rvu->hw->lmac_per_cgx) {
3135 /* lmac debugfs dir */
3136 sprintf(dname, "lmac%d", lmac_id);
3137 rvu->rvu_dbg.lmac =
3138 debugfs_create_dir(dname, rvu->rvu_dbg.cgx);
3139
3140 debugfs_create_file_aux_num("stats", 0600, rvu->rvu_dbg.lmac,
3141 ctx, lmac_id, &rvu_dbg_cgx_stat_fops);
3142 debugfs_create_file_aux_num("mac_filter", 0600,
3143 rvu->rvu_dbg.lmac, ctx, lmac_id,
3144 &rvu_dbg_cgx_dmac_flt_fops);
3145 debugfs_create_file_aux_num("fwdata", 0600,
3146 rvu->rvu_dbg.lmac, ctx,
3147 lmac_id, &rvu_dbg_cgx_fwdata_fops);
3148 }
3149 }
3150 }
3151
3152 /* NPC debugfs APIs */
rvu_print_npc_mcam_info(struct seq_file * s,u16 pcifunc,int blkaddr)3153 static void rvu_print_npc_mcam_info(struct seq_file *s,
3154 u16 pcifunc, int blkaddr)
3155 {
3156 struct rvu *rvu = s->private;
3157 int entry_acnt, entry_ecnt;
3158 int cntr_acnt, cntr_ecnt;
3159
3160 rvu_npc_get_mcam_entry_alloc_info(rvu, pcifunc, blkaddr,
3161 &entry_acnt, &entry_ecnt);
3162 rvu_npc_get_mcam_counter_alloc_info(rvu, pcifunc, blkaddr,
3163 &cntr_acnt, &cntr_ecnt);
3164 if (!entry_acnt && !cntr_acnt)
3165 return;
3166
3167 if (!(pcifunc & RVU_PFVF_FUNC_MASK))
3168 seq_printf(s, "\n\t\t Device \t\t: PF%d\n",
3169 rvu_get_pf(rvu->pdev, pcifunc));
3170 else
3171 seq_printf(s, "\n\t\t Device \t\t: PF%d VF%d\n",
3172 rvu_get_pf(rvu->pdev, pcifunc),
3173 (pcifunc & RVU_PFVF_FUNC_MASK) - 1);
3174
3175 if (entry_acnt) {
3176 seq_printf(s, "\t\t Entries allocated \t: %d\n", entry_acnt);
3177 seq_printf(s, "\t\t Entries enabled \t: %d\n", entry_ecnt);
3178 }
3179 if (cntr_acnt) {
3180 seq_printf(s, "\t\t Counters allocated \t: %d\n", cntr_acnt);
3181 seq_printf(s, "\t\t Counters enabled \t: %d\n", cntr_ecnt);
3182 }
3183 }
3184
rvu_dbg_npc_mcam_info_display(struct seq_file * filp,void * unsued)3185 static int rvu_dbg_npc_mcam_info_display(struct seq_file *filp, void *unsued)
3186 {
3187 struct rvu *rvu = filp->private;
3188 int x4_free, x2_free, sb_free;
3189 int pf, vf, numvfs, blkaddr;
3190 struct npc_priv_t *npc_priv;
3191 struct npc_mcam *mcam;
3192 u16 pcifunc, counters;
3193 u64 cfg;
3194
3195 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
3196 if (blkaddr < 0)
3197 return -ENODEV;
3198
3199 mcam = &rvu->hw->mcam;
3200 counters = rvu->hw->npc_counters;
3201
3202 seq_puts(filp, "\nNPC MCAM info:\n");
3203 /* MCAM keywidth on receive and transmit sides */
3204 if (is_cn20k(rvu->pdev)) {
3205 npc_priv = npc_priv_get();
3206 seq_printf(filp, "\t\t RX keywidth \t: %s\n",
3207 (npc_priv->kw == NPC_MCAM_KEY_X1) ?
3208 "256bits" : "512bits");
3209
3210 npc_cn20k_subbank_calc_free(rvu, &x2_free, &x4_free, &sb_free);
3211 seq_printf(filp, "\t\t free x4 slots\t: %d\n", x4_free);
3212
3213 seq_printf(filp, "\t\t free x2 slots\t: %d\n", x2_free);
3214
3215 seq_printf(filp, "\t\t free subbanks\t: %d\n", sb_free);
3216 } else {
3217 cfg = rvu_read64(rvu, blkaddr,
3218 NPC_AF_INTFX_KEX_CFG(NIX_INTF_RX));
3219 cfg = (cfg >> 32) & 0x07;
3220 seq_printf(filp, "\t\t RX keywidth \t: %s\n",
3221 (cfg == NPC_MCAM_KEY_X1) ?
3222 "112bits" : ((cfg == NPC_MCAM_KEY_X2) ?
3223 "224bits" : "448bits"));
3224 cfg = rvu_read64(rvu, blkaddr,
3225 NPC_AF_INTFX_KEX_CFG(NIX_INTF_TX));
3226 cfg = (cfg >> 32) & 0x07;
3227 seq_printf(filp, "\t\t TX keywidth \t: %s\n",
3228 (cfg == NPC_MCAM_KEY_X1) ?
3229 "112bits" : ((cfg == NPC_MCAM_KEY_X2) ?
3230 "224bits" : "448bits"));
3231 }
3232
3233 mutex_lock(&mcam->lock);
3234 /* MCAM entries */
3235 seq_printf(filp, "\n\t\t MCAM entries \t: %d\n", mcam->total_entries);
3236 seq_printf(filp, "\t\t Reserved \t: %d\n",
3237 mcam->total_entries - mcam->bmap_entries);
3238 seq_printf(filp, "\t\t Available \t: %d\n", mcam->bmap_fcnt);
3239
3240 /* MCAM counters */
3241 seq_printf(filp, "\n\t\t MCAM counters \t: %d\n", counters);
3242 seq_printf(filp, "\t\t Reserved \t: %d\n",
3243 counters - mcam->counters.max);
3244 seq_printf(filp, "\t\t Available \t: %d\n",
3245 rvu_rsrc_free_count(&mcam->counters));
3246
3247 if (mcam->bmap_entries == mcam->bmap_fcnt) {
3248 mutex_unlock(&mcam->lock);
3249 return 0;
3250 }
3251
3252 seq_puts(filp, "\n\t\t Current allocation\n");
3253 seq_puts(filp, "\t\t====================\n");
3254 for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
3255 pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);
3256 rvu_print_npc_mcam_info(filp, pcifunc, blkaddr);
3257
3258 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));
3259 numvfs = (cfg >> 12) & 0xFF;
3260 for (vf = 0; vf < numvfs; vf++) {
3261 pcifunc = rvu_make_pcifunc(rvu->pdev, pf, (vf + 1));
3262 rvu_print_npc_mcam_info(filp, pcifunc, blkaddr);
3263 }
3264 }
3265
3266 mutex_unlock(&mcam->lock);
3267 return 0;
3268 }
3269
3270 RVU_DEBUG_SEQ_FOPS(npc_mcam_info, npc_mcam_info_display, NULL);
3271
rvu_dbg_npc_rx_miss_stats_display(struct seq_file * filp,void * unused)3272 static int rvu_dbg_npc_rx_miss_stats_display(struct seq_file *filp,
3273 void *unused)
3274 {
3275 struct rvu *rvu = filp->private;
3276 struct npc_mcam *mcam;
3277 int blkaddr;
3278
3279 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
3280 if (blkaddr < 0)
3281 return -ENODEV;
3282
3283 mcam = &rvu->hw->mcam;
3284
3285 seq_puts(filp, "\nNPC MCAM RX miss action stats\n");
3286 seq_printf(filp, "\t\tStat %d: \t%lld\n", mcam->rx_miss_act_cntr,
3287 rvu_read64(rvu, blkaddr,
3288 NPC_AF_MATCH_STATX(mcam->rx_miss_act_cntr)));
3289
3290 return 0;
3291 }
3292
3293 RVU_DEBUG_SEQ_FOPS(npc_rx_miss_act, npc_rx_miss_stats_display, NULL);
3294
3295 #define RVU_DBG_PRINT_MPLS_TTL(pkt, mask) \
3296 do { \
3297 seq_printf(s, "%ld ", FIELD_GET(OTX2_FLOWER_MASK_MPLS_TTL, pkt)); \
3298 seq_printf(s, "mask 0x%lx\n", \
3299 FIELD_GET(OTX2_FLOWER_MASK_MPLS_TTL, mask)); \
3300 } while (0) \
3301
3302 #define RVU_DBG_PRINT_MPLS_LBTCBOS(_pkt, _mask) \
3303 do { \
3304 typeof(_pkt) (pkt) = (_pkt); \
3305 typeof(_mask) (mask) = (_mask); \
3306 seq_printf(s, "%ld %ld %ld\n", \
3307 FIELD_GET(OTX2_FLOWER_MASK_MPLS_LB, pkt), \
3308 FIELD_GET(OTX2_FLOWER_MASK_MPLS_TC, pkt), \
3309 FIELD_GET(OTX2_FLOWER_MASK_MPLS_BOS, pkt)); \
3310 seq_printf(s, "\tmask 0x%lx 0x%lx 0x%lx\n", \
3311 FIELD_GET(OTX2_FLOWER_MASK_MPLS_LB, mask), \
3312 FIELD_GET(OTX2_FLOWER_MASK_MPLS_TC, mask), \
3313 FIELD_GET(OTX2_FLOWER_MASK_MPLS_BOS, mask)); \
3314 } while (0) \
3315
rvu_dbg_npc_mcam_show_flows(struct seq_file * s,struct rvu_npc_mcam_rule * rule)3316 static void rvu_dbg_npc_mcam_show_flows(struct seq_file *s,
3317 struct rvu_npc_mcam_rule *rule)
3318 {
3319 u8 bit;
3320
3321 for_each_set_bit(bit, (unsigned long *)&rule->features, 64) {
3322 seq_printf(s, "\t%s ", npc_get_field_name(bit));
3323 switch (bit) {
3324 case NPC_LXMB:
3325 if (rule->lxmb == 1)
3326 seq_puts(s, "\tL2M nibble is set\n");
3327 else
3328 seq_puts(s, "\tL2B nibble is set\n");
3329 break;
3330 case NPC_DMAC:
3331 seq_printf(s, "%pM ", rule->packet.dmac);
3332 seq_printf(s, "mask %pM\n", rule->mask.dmac);
3333 break;
3334 case NPC_SMAC:
3335 seq_printf(s, "%pM ", rule->packet.smac);
3336 seq_printf(s, "mask %pM\n", rule->mask.smac);
3337 break;
3338 case NPC_ETYPE:
3339 seq_printf(s, "0x%x ", ntohs(rule->packet.etype));
3340 seq_printf(s, "mask 0x%x\n", ntohs(rule->mask.etype));
3341 break;
3342 case NPC_OUTER_VID:
3343 seq_printf(s, "0x%x ", ntohs(rule->packet.vlan_tci));
3344 seq_printf(s, "mask 0x%x\n",
3345 ntohs(rule->mask.vlan_tci));
3346 break;
3347 case NPC_INNER_VID:
3348 seq_printf(s, "0x%x ", ntohs(rule->packet.vlan_itci));
3349 seq_printf(s, "mask 0x%x\n",
3350 ntohs(rule->mask.vlan_itci));
3351 break;
3352 case NPC_TOS:
3353 seq_printf(s, "%d ", rule->packet.tos);
3354 seq_printf(s, "mask 0x%x\n", rule->mask.tos);
3355 break;
3356 case NPC_SIP_IPV4:
3357 seq_printf(s, "%pI4 ", &rule->packet.ip4src);
3358 seq_printf(s, "mask %pI4\n", &rule->mask.ip4src);
3359 break;
3360 case NPC_DIP_IPV4:
3361 seq_printf(s, "%pI4 ", &rule->packet.ip4dst);
3362 seq_printf(s, "mask %pI4\n", &rule->mask.ip4dst);
3363 break;
3364 case NPC_SIP_IPV6:
3365 seq_printf(s, "%pI6 ", rule->packet.ip6src);
3366 seq_printf(s, "mask %pI6\n", rule->mask.ip6src);
3367 break;
3368 case NPC_DIP_IPV6:
3369 seq_printf(s, "%pI6 ", rule->packet.ip6dst);
3370 seq_printf(s, "mask %pI6\n", rule->mask.ip6dst);
3371 break;
3372 case NPC_IPFRAG_IPV6:
3373 seq_printf(s, "0x%x ", rule->packet.next_header);
3374 seq_printf(s, "mask 0x%x\n", rule->mask.next_header);
3375 break;
3376 case NPC_IPFRAG_IPV4:
3377 seq_printf(s, "0x%x ", rule->packet.ip_flag);
3378 seq_printf(s, "mask 0x%x\n", rule->mask.ip_flag);
3379 break;
3380 case NPC_SPORT_TCP:
3381 case NPC_SPORT_UDP:
3382 case NPC_SPORT_SCTP:
3383 seq_printf(s, "%d ", ntohs(rule->packet.sport));
3384 seq_printf(s, "mask 0x%x\n", ntohs(rule->mask.sport));
3385 break;
3386 case NPC_DPORT_TCP:
3387 case NPC_DPORT_UDP:
3388 case NPC_DPORT_SCTP:
3389 seq_printf(s, "%d ", ntohs(rule->packet.dport));
3390 seq_printf(s, "mask 0x%x\n", ntohs(rule->mask.dport));
3391 break;
3392 case NPC_TCP_FLAGS:
3393 seq_printf(s, "%d ", rule->packet.tcp_flags);
3394 seq_printf(s, "mask 0x%x\n", rule->mask.tcp_flags);
3395 break;
3396 case NPC_IPSEC_SPI:
3397 seq_printf(s, "0x%x ", ntohl(rule->packet.spi));
3398 seq_printf(s, "mask 0x%x\n", ntohl(rule->mask.spi));
3399 break;
3400 case NPC_MPLS1_LBTCBOS:
3401 RVU_DBG_PRINT_MPLS_LBTCBOS(rule->packet.mpls_lse[0],
3402 rule->mask.mpls_lse[0]);
3403 break;
3404 case NPC_MPLS1_TTL:
3405 RVU_DBG_PRINT_MPLS_TTL(rule->packet.mpls_lse[0],
3406 rule->mask.mpls_lse[0]);
3407 break;
3408 case NPC_MPLS2_LBTCBOS:
3409 RVU_DBG_PRINT_MPLS_LBTCBOS(rule->packet.mpls_lse[1],
3410 rule->mask.mpls_lse[1]);
3411 break;
3412 case NPC_MPLS2_TTL:
3413 RVU_DBG_PRINT_MPLS_TTL(rule->packet.mpls_lse[1],
3414 rule->mask.mpls_lse[1]);
3415 break;
3416 case NPC_MPLS3_LBTCBOS:
3417 RVU_DBG_PRINT_MPLS_LBTCBOS(rule->packet.mpls_lse[2],
3418 rule->mask.mpls_lse[2]);
3419 break;
3420 case NPC_MPLS3_TTL:
3421 RVU_DBG_PRINT_MPLS_TTL(rule->packet.mpls_lse[2],
3422 rule->mask.mpls_lse[2]);
3423 break;
3424 case NPC_MPLS4_LBTCBOS:
3425 RVU_DBG_PRINT_MPLS_LBTCBOS(rule->packet.mpls_lse[3],
3426 rule->mask.mpls_lse[3]);
3427 break;
3428 case NPC_MPLS4_TTL:
3429 RVU_DBG_PRINT_MPLS_TTL(rule->packet.mpls_lse[3],
3430 rule->mask.mpls_lse[3]);
3431 break;
3432 case NPC_TYPE_ICMP:
3433 seq_printf(s, "%d ", rule->packet.icmp_type);
3434 seq_printf(s, "mask 0x%x\n", rule->mask.icmp_type);
3435 break;
3436 case NPC_CODE_ICMP:
3437 seq_printf(s, "%d ", rule->packet.icmp_code);
3438 seq_printf(s, "mask 0x%x\n", rule->mask.icmp_code);
3439 break;
3440 default:
3441 seq_puts(s, "\n");
3442 break;
3443 }
3444 }
3445 }
3446
rvu_dbg_npc_mcam_show_action(struct seq_file * s,struct rvu_npc_mcam_rule * rule)3447 static void rvu_dbg_npc_mcam_show_action(struct seq_file *s,
3448 struct rvu_npc_mcam_rule *rule)
3449 {
3450 if (is_npc_intf_tx(rule->intf)) {
3451 switch (rule->tx_action.op) {
3452 case NIX_TX_ACTIONOP_DROP:
3453 seq_puts(s, "\taction: Drop\n");
3454 break;
3455 case NIX_TX_ACTIONOP_UCAST_DEFAULT:
3456 seq_puts(s, "\taction: Unicast to default channel\n");
3457 break;
3458 case NIX_TX_ACTIONOP_UCAST_CHAN:
3459 seq_printf(s, "\taction: Unicast to channel %d\n",
3460 rule->tx_action.index);
3461 break;
3462 case NIX_TX_ACTIONOP_MCAST:
3463 seq_puts(s, "\taction: Multicast\n");
3464 break;
3465 case NIX_TX_ACTIONOP_DROP_VIOL:
3466 seq_puts(s, "\taction: Lockdown Violation Drop\n");
3467 break;
3468 default:
3469 break;
3470 }
3471 } else {
3472 switch (rule->rx_action.op) {
3473 case NIX_RX_ACTIONOP_DROP:
3474 seq_puts(s, "\taction: Drop\n");
3475 break;
3476 case NIX_RX_ACTIONOP_UCAST:
3477 seq_printf(s, "\taction: Direct to queue %d\n",
3478 rule->rx_action.index);
3479 break;
3480 case NIX_RX_ACTIONOP_RSS:
3481 seq_puts(s, "\taction: RSS\n");
3482 break;
3483 case NIX_RX_ACTIONOP_UCAST_IPSEC:
3484 seq_puts(s, "\taction: Unicast ipsec\n");
3485 break;
3486 case NIX_RX_ACTIONOP_MCAST:
3487 seq_puts(s, "\taction: Multicast\n");
3488 break;
3489 default:
3490 break;
3491 }
3492 }
3493 }
3494
rvu_dbg_get_intf_name(int intf)3495 static const char *rvu_dbg_get_intf_name(int intf)
3496 {
3497 switch (intf) {
3498 case NIX_INTFX_RX(0):
3499 return "NIX0_RX";
3500 case NIX_INTFX_RX(1):
3501 return "NIX1_RX";
3502 case NIX_INTFX_TX(0):
3503 return "NIX0_TX";
3504 case NIX_INTFX_TX(1):
3505 return "NIX1_TX";
3506 default:
3507 break;
3508 }
3509
3510 return "unknown";
3511 }
3512
rvu_dbg_npc_mcam_show_rules(struct seq_file * s,void * unused)3513 static int rvu_dbg_npc_mcam_show_rules(struct seq_file *s, void *unused)
3514 {
3515 struct rvu_npc_mcam_rule *iter;
3516 struct rvu *rvu = s->private;
3517 struct npc_mcam *mcam;
3518 int pf, vf = -1, bank;
3519 u16 target, index;
3520 bool enabled;
3521 u64 hits, off;
3522 int blkaddr;
3523
3524 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
3525 if (blkaddr < 0)
3526 return 0;
3527
3528 mcam = &rvu->hw->mcam;
3529
3530 mutex_lock(&mcam->lock);
3531 list_for_each_entry(iter, &mcam->mcam_rules, list) {
3532 pf = rvu_get_pf(rvu->pdev, iter->owner);
3533 seq_printf(s, "\n\tInstalled by: PF%d ", pf);
3534
3535 if (iter->owner & RVU_PFVF_FUNC_MASK) {
3536 vf = (iter->owner & RVU_PFVF_FUNC_MASK) - 1;
3537 seq_printf(s, "VF%d", vf);
3538 }
3539 seq_puts(s, "\n");
3540
3541 seq_printf(s, "\tdirection: %s\n", is_npc_intf_rx(iter->intf) ?
3542 "RX" : "TX");
3543 seq_printf(s, "\tinterface: %s\n",
3544 rvu_dbg_get_intf_name(iter->intf));
3545 seq_printf(s, "\tmcam entry: %d\n", iter->entry);
3546
3547 rvu_dbg_npc_mcam_show_flows(s, iter);
3548 if (is_npc_intf_rx(iter->intf)) {
3549 target = iter->rx_action.pf_func;
3550 pf = rvu_get_pf(rvu->pdev, target);
3551 seq_printf(s, "\tForward to: PF%d ", pf);
3552
3553 if (target & RVU_PFVF_FUNC_MASK) {
3554 vf = (target & RVU_PFVF_FUNC_MASK) - 1;
3555 seq_printf(s, "VF%d", vf);
3556 }
3557 seq_puts(s, "\n");
3558 seq_printf(s, "\tchannel: 0x%x\n", iter->chan);
3559 seq_printf(s, "\tchannel_mask: 0x%x\n", iter->chan_mask);
3560 }
3561
3562 rvu_dbg_npc_mcam_show_action(s, iter);
3563
3564 enabled = is_mcam_entry_enabled(rvu, mcam, blkaddr, iter->entry);
3565 seq_printf(s, "\tenabled: %s\n", enabled ? "yes" : "no");
3566 if (is_cn20k(rvu->pdev)) {
3567 seq_printf(s, "\tpriority: %u\n", iter->hw_prio);
3568 index = iter->entry & (mcam->banksize - 1);
3569 bank = npc_get_bank(mcam, iter->entry);
3570 off = NPC_AF_CN20K_MCAMEX_BANKX_STAT_EXT(index, bank);
3571 hits = rvu_read64(rvu, blkaddr, off);
3572 seq_printf(s, "\thits: %lld\n", hits);
3573 continue;
3574 }
3575
3576 if (!iter->has_cntr)
3577 continue;
3578 seq_printf(s, "\tcounter: %d\n", iter->cntr);
3579
3580 hits = rvu_read64(rvu, blkaddr, NPC_AF_MATCH_STATX(iter->cntr));
3581 seq_printf(s, "\thits: %lld\n", hits);
3582 }
3583 mutex_unlock(&mcam->lock);
3584
3585 return 0;
3586 }
3587
3588 RVU_DEBUG_SEQ_FOPS(npc_mcam_rules, npc_mcam_show_rules, NULL);
3589
rvu_dbg_npc_exact_show_entries(struct seq_file * s,void * unused)3590 static int rvu_dbg_npc_exact_show_entries(struct seq_file *s, void *unused)
3591 {
3592 struct npc_exact_table_entry *mem_entry[NPC_EXACT_TBL_MAX_WAYS] = { 0 };
3593 struct npc_exact_table_entry *cam_entry;
3594 struct npc_exact_table *table;
3595 struct rvu *rvu = s->private;
3596 int i, j;
3597
3598 u8 bitmap = 0;
3599
3600 table = rvu->hw->table;
3601
3602 mutex_lock(&table->lock);
3603
3604 /* Check if there is at least one entry in mem table */
3605 if (!table->mem_tbl_entry_cnt)
3606 goto dump_cam_table;
3607
3608 /* Print table headers */
3609 seq_puts(s, "\n\tExact Match MEM Table\n");
3610 seq_puts(s, "Index\t");
3611
3612 for (i = 0; i < table->mem_table.ways; i++) {
3613 mem_entry[i] = list_first_entry_or_null(&table->lhead_mem_tbl_entry[i],
3614 struct npc_exact_table_entry, list);
3615
3616 seq_printf(s, "Way-%d\t\t\t\t\t", i);
3617 }
3618
3619 seq_puts(s, "\n");
3620 for (i = 0; i < table->mem_table.ways; i++)
3621 seq_puts(s, "\tChan MAC \t");
3622
3623 seq_puts(s, "\n\n");
3624
3625 /* Print mem table entries */
3626 for (i = 0; i < table->mem_table.depth; i++) {
3627 bitmap = 0;
3628 for (j = 0; j < table->mem_table.ways; j++) {
3629 if (!mem_entry[j])
3630 continue;
3631
3632 if (mem_entry[j]->index != i)
3633 continue;
3634
3635 bitmap |= BIT(j);
3636 }
3637
3638 /* No valid entries */
3639 if (!bitmap)
3640 continue;
3641
3642 seq_printf(s, "%d\t", i);
3643 for (j = 0; j < table->mem_table.ways; j++) {
3644 if (!(bitmap & BIT(j))) {
3645 seq_puts(s, "nil\t\t\t\t\t");
3646 continue;
3647 }
3648
3649 seq_printf(s, "0x%x %pM\t\t\t", mem_entry[j]->chan,
3650 mem_entry[j]->mac);
3651 mem_entry[j] = list_next_entry(mem_entry[j], list);
3652 }
3653 seq_puts(s, "\n");
3654 }
3655
3656 dump_cam_table:
3657
3658 if (!table->cam_tbl_entry_cnt)
3659 goto done;
3660
3661 seq_puts(s, "\n\tExact Match CAM Table\n");
3662 seq_puts(s, "index\tchan\tMAC\n");
3663
3664 /* Traverse cam table entries */
3665 list_for_each_entry(cam_entry, &table->lhead_cam_tbl_entry, list) {
3666 seq_printf(s, "%d\t0x%x\t%pM\n", cam_entry->index, cam_entry->chan,
3667 cam_entry->mac);
3668 }
3669
3670 done:
3671 mutex_unlock(&table->lock);
3672 return 0;
3673 }
3674
3675 RVU_DEBUG_SEQ_FOPS(npc_exact_entries, npc_exact_show_entries, NULL);
3676
rvu_dbg_npc_exact_show_info(struct seq_file * s,void * unused)3677 static int rvu_dbg_npc_exact_show_info(struct seq_file *s, void *unused)
3678 {
3679 struct npc_exact_table *table;
3680 struct rvu *rvu = s->private;
3681 int i;
3682
3683 table = rvu->hw->table;
3684
3685 seq_puts(s, "\n\tExact Table Info\n");
3686 seq_printf(s, "Exact Match Feature : %s\n",
3687 rvu->hw->cap.npc_exact_match_enabled ? "enabled" : "disable");
3688 if (!rvu->hw->cap.npc_exact_match_enabled)
3689 return 0;
3690
3691 seq_puts(s, "\nMCAM Index\tMAC Filter Rules Count\n");
3692 for (i = 0; i < table->num_drop_rules; i++)
3693 seq_printf(s, "%d\t\t%d\n", i, table->cnt_cmd_rules[i]);
3694
3695 seq_puts(s, "\nMcam Index\tPromisc Mode Status\n");
3696 for (i = 0; i < table->num_drop_rules; i++)
3697 seq_printf(s, "%d\t\t%s\n", i, table->promisc_mode[i] ? "on" : "off");
3698
3699 seq_puts(s, "\n\tMEM Table Info\n");
3700 seq_printf(s, "Ways : %d\n", table->mem_table.ways);
3701 seq_printf(s, "Depth : %d\n", table->mem_table.depth);
3702 seq_printf(s, "Mask : 0x%llx\n", table->mem_table.mask);
3703 seq_printf(s, "Hash Mask : 0x%x\n", table->mem_table.hash_mask);
3704 seq_printf(s, "Hash Offset : 0x%x\n", table->mem_table.hash_offset);
3705
3706 seq_puts(s, "\n\tCAM Table Info\n");
3707 seq_printf(s, "Depth : %d\n", table->cam_table.depth);
3708
3709 return 0;
3710 }
3711
3712 RVU_DEBUG_SEQ_FOPS(npc_exact_info, npc_exact_show_info, NULL);
3713
rvu_dbg_npc_exact_drop_cnt(struct seq_file * s,void * unused)3714 static int rvu_dbg_npc_exact_drop_cnt(struct seq_file *s, void *unused)
3715 {
3716 struct npc_exact_table *table;
3717 struct rvu *rvu = s->private;
3718 struct npc_key_field *field;
3719 u64 cfg, cam1, off;
3720 u16 chan, pcifunc;
3721 int blkaddr, i;
3722 char *str;
3723
3724 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
3725 table = rvu->hw->table;
3726
3727 field = &rvu->hw->mcam.rx_key_fields[NPC_CHAN];
3728
3729 seq_puts(s, "\n\t Exact Hit on drop status\n");
3730 seq_puts(s, "\npcifunc\tmcam_idx\tHits\tchan\tstatus\n");
3731
3732 for (i = 0; i < table->num_drop_rules; i++) {
3733 pcifunc = rvu_npc_exact_drop_rule_to_pcifunc(rvu, i);
3734 cfg = rvu_read64(rvu, blkaddr, NPC_AF_MCAMEX_BANKX_CFG(i, 0));
3735
3736 /* channel will be always in keyword 0 */
3737 cam1 = rvu_read64(rvu, blkaddr,
3738 NPC_AF_MCAMEX_BANKX_CAMX_W0(i, 0, 1));
3739 chan = field->kw_mask[0] & cam1;
3740
3741 str = (cfg & 1) ? "enabled" : "disabled";
3742 if (is_cn20k(rvu->pdev)) {
3743 off = NPC_AF_CN20K_MCAMEX_BANKX_STAT_EXT(i, 0);
3744 seq_printf(s, "0x%x\t%d\t\t%llu\t0x%x\t%s\n", pcifunc,
3745 i, rvu_read64(rvu, blkaddr, off), chan, str);
3746 } else {
3747 off = NPC_AF_MATCH_STATX(table->counter_idx[i]);
3748 seq_printf(s, "0x%x\t%d\t\t%llu\t0x%x\t%s\n", pcifunc,
3749 i, rvu_read64(rvu, blkaddr, off),
3750 chan, str);
3751 }
3752
3753 }
3754
3755 return 0;
3756 }
3757
3758 RVU_DEBUG_SEQ_FOPS(npc_exact_drop_cnt, npc_exact_drop_cnt, NULL);
3759
rvu_dbg_npc_init(struct rvu * rvu)3760 static void rvu_dbg_npc_init(struct rvu *rvu)
3761 {
3762 rvu->rvu_dbg.npc = debugfs_create_dir("npc", rvu->rvu_dbg.root);
3763
3764 debugfs_create_file("mcam_info", 0444, rvu->rvu_dbg.npc, rvu,
3765 &rvu_dbg_npc_mcam_info_fops);
3766 debugfs_create_file("mcam_rules", 0444, rvu->rvu_dbg.npc, rvu,
3767 &rvu_dbg_npc_mcam_rules_fops);
3768
3769 debugfs_create_file("rx_miss_act_stats", 0444, rvu->rvu_dbg.npc, rvu,
3770 &rvu_dbg_npc_rx_miss_act_fops);
3771
3772 if (is_cn20k(rvu->pdev))
3773 npc_cn20k_debugfs_init(rvu);
3774
3775 if (!rvu->hw->cap.npc_exact_match_enabled)
3776 return;
3777
3778 debugfs_create_file("exact_entries", 0444, rvu->rvu_dbg.npc, rvu,
3779 &rvu_dbg_npc_exact_entries_fops);
3780
3781 debugfs_create_file("exact_info", 0444, rvu->rvu_dbg.npc, rvu,
3782 &rvu_dbg_npc_exact_info_fops);
3783
3784 debugfs_create_file("exact_drop_cnt", 0444, rvu->rvu_dbg.npc, rvu,
3785 &rvu_dbg_npc_exact_drop_cnt_fops);
3786
3787 }
3788
cpt_eng_sts_display(struct seq_file * filp,u8 eng_type)3789 static int cpt_eng_sts_display(struct seq_file *filp, u8 eng_type)
3790 {
3791 struct cpt_ctx *ctx = filp->private;
3792 u64 busy_sts = 0, free_sts = 0;
3793 u32 e_min = 0, e_max = 0, e, i;
3794 u16 max_ses, max_ies, max_aes;
3795 struct rvu *rvu = ctx->rvu;
3796 int blkaddr = ctx->blkaddr;
3797 u64 reg;
3798
3799 reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS1);
3800 max_ses = reg & 0xffff;
3801 max_ies = (reg >> 16) & 0xffff;
3802 max_aes = (reg >> 32) & 0xffff;
3803
3804 switch (eng_type) {
3805 case CPT_AE_TYPE:
3806 e_min = max_ses + max_ies;
3807 e_max = max_ses + max_ies + max_aes;
3808 break;
3809 case CPT_SE_TYPE:
3810 e_min = 0;
3811 e_max = max_ses;
3812 break;
3813 case CPT_IE_TYPE:
3814 e_min = max_ses;
3815 e_max = max_ses + max_ies;
3816 break;
3817 default:
3818 return -EINVAL;
3819 }
3820
3821 for (e = e_min, i = 0; e < e_max; e++, i++) {
3822 reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_STS(e));
3823 if (reg & 0x1)
3824 busy_sts |= 1ULL << i;
3825
3826 if (reg & 0x2)
3827 free_sts |= 1ULL << i;
3828 }
3829 seq_printf(filp, "FREE STS : 0x%016llx\n", free_sts);
3830 seq_printf(filp, "BUSY STS : 0x%016llx\n", busy_sts);
3831
3832 return 0;
3833 }
3834
rvu_dbg_cpt_ae_sts_display(struct seq_file * filp,void * unused)3835 static int rvu_dbg_cpt_ae_sts_display(struct seq_file *filp, void *unused)
3836 {
3837 return cpt_eng_sts_display(filp, CPT_AE_TYPE);
3838 }
3839
3840 RVU_DEBUG_SEQ_FOPS(cpt_ae_sts, cpt_ae_sts_display, NULL);
3841
rvu_dbg_cpt_se_sts_display(struct seq_file * filp,void * unused)3842 static int rvu_dbg_cpt_se_sts_display(struct seq_file *filp, void *unused)
3843 {
3844 return cpt_eng_sts_display(filp, CPT_SE_TYPE);
3845 }
3846
3847 RVU_DEBUG_SEQ_FOPS(cpt_se_sts, cpt_se_sts_display, NULL);
3848
rvu_dbg_cpt_ie_sts_display(struct seq_file * filp,void * unused)3849 static int rvu_dbg_cpt_ie_sts_display(struct seq_file *filp, void *unused)
3850 {
3851 return cpt_eng_sts_display(filp, CPT_IE_TYPE);
3852 }
3853
3854 RVU_DEBUG_SEQ_FOPS(cpt_ie_sts, cpt_ie_sts_display, NULL);
3855
rvu_dbg_cpt_engines_info_display(struct seq_file * filp,void * unused)3856 static int rvu_dbg_cpt_engines_info_display(struct seq_file *filp, void *unused)
3857 {
3858 struct cpt_ctx *ctx = filp->private;
3859 u16 max_ses, max_ies, max_aes;
3860 struct rvu *rvu = ctx->rvu;
3861 int blkaddr = ctx->blkaddr;
3862 u32 e_max, e;
3863 u64 reg;
3864
3865 reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS1);
3866 max_ses = reg & 0xffff;
3867 max_ies = (reg >> 16) & 0xffff;
3868 max_aes = (reg >> 32) & 0xffff;
3869
3870 e_max = max_ses + max_ies + max_aes;
3871
3872 seq_puts(filp, "===========================================\n");
3873 for (e = 0; e < e_max; e++) {
3874 reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL2(e));
3875 seq_printf(filp, "CPT Engine[%u] Group Enable 0x%02llx\n", e,
3876 reg & 0xff);
3877 reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_ACTIVE(e));
3878 seq_printf(filp, "CPT Engine[%u] Active Info 0x%llx\n", e,
3879 reg);
3880 reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL(e));
3881 seq_printf(filp, "CPT Engine[%u] Control 0x%llx\n", e,
3882 reg);
3883 seq_puts(filp, "===========================================\n");
3884 }
3885 return 0;
3886 }
3887
3888 RVU_DEBUG_SEQ_FOPS(cpt_engines_info, cpt_engines_info_display, NULL);
3889
rvu_dbg_cpt_lfs_info_display(struct seq_file * filp,void * unused)3890 static int rvu_dbg_cpt_lfs_info_display(struct seq_file *filp, void *unused)
3891 {
3892 struct cpt_ctx *ctx = filp->private;
3893 int blkaddr = ctx->blkaddr;
3894 struct rvu *rvu = ctx->rvu;
3895 struct rvu_block *block;
3896 struct rvu_hwinfo *hw;
3897 u64 reg;
3898 u32 lf;
3899
3900 hw = rvu->hw;
3901 block = &hw->block[blkaddr];
3902 if (!block->lf.bmap)
3903 return -ENODEV;
3904
3905 seq_puts(filp, "===========================================\n");
3906 for (lf = 0; lf < block->lf.max; lf++) {
3907 reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(lf));
3908 seq_printf(filp, "CPT Lf[%u] CTL 0x%llx\n", lf, reg);
3909 reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(lf));
3910 seq_printf(filp, "CPT Lf[%u] CTL2 0x%llx\n", lf, reg);
3911 reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_PTR_CTL(lf));
3912 seq_printf(filp, "CPT Lf[%u] PTR_CTL 0x%llx\n", lf, reg);
3913 reg = rvu_read64(rvu, blkaddr, block->lfcfg_reg |
3914 (lf << block->lfshift));
3915 seq_printf(filp, "CPT Lf[%u] CFG 0x%llx\n", lf, reg);
3916 seq_puts(filp, "===========================================\n");
3917 }
3918 return 0;
3919 }
3920
3921 RVU_DEBUG_SEQ_FOPS(cpt_lfs_info, cpt_lfs_info_display, NULL);
3922
rvu_dbg_cpt_err_info_display(struct seq_file * filp,void * unused)3923 static int rvu_dbg_cpt_err_info_display(struct seq_file *filp, void *unused)
3924 {
3925 struct cpt_ctx *ctx = filp->private;
3926 struct rvu *rvu = ctx->rvu;
3927 int blkaddr = ctx->blkaddr;
3928 u64 reg0, reg1;
3929
3930 reg0 = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(0));
3931 reg1 = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(1));
3932 seq_printf(filp, "CPT_AF_FLTX_INT: 0x%llx 0x%llx\n", reg0, reg1);
3933 reg0 = rvu_read64(rvu, blkaddr, CPT_AF_PSNX_EXE(0));
3934 reg1 = rvu_read64(rvu, blkaddr, CPT_AF_PSNX_EXE(1));
3935 seq_printf(filp, "CPT_AF_PSNX_EXE: 0x%llx 0x%llx\n", reg0, reg1);
3936 reg0 = rvu_read64(rvu, blkaddr, CPT_AF_PSNX_LF(0));
3937 seq_printf(filp, "CPT_AF_PSNX_LF: 0x%llx\n", reg0);
3938 reg0 = rvu_read64(rvu, blkaddr, CPT_AF_RVU_INT);
3939 seq_printf(filp, "CPT_AF_RVU_INT: 0x%llx\n", reg0);
3940 reg0 = rvu_read64(rvu, blkaddr, CPT_AF_RAS_INT);
3941 seq_printf(filp, "CPT_AF_RAS_INT: 0x%llx\n", reg0);
3942 reg0 = rvu_read64(rvu, blkaddr, CPT_AF_EXE_ERR_INFO);
3943 seq_printf(filp, "CPT_AF_EXE_ERR_INFO: 0x%llx\n", reg0);
3944
3945 return 0;
3946 }
3947
3948 RVU_DEBUG_SEQ_FOPS(cpt_err_info, cpt_err_info_display, NULL);
3949
rvu_dbg_cpt_pc_display(struct seq_file * filp,void * unused)3950 static int rvu_dbg_cpt_pc_display(struct seq_file *filp, void *unused)
3951 {
3952 struct cpt_ctx *ctx = filp->private;
3953 struct rvu *rvu = ctx->rvu;
3954 int blkaddr = ctx->blkaddr;
3955 u64 reg;
3956
3957 reg = rvu_read64(rvu, blkaddr, CPT_AF_INST_REQ_PC);
3958 seq_printf(filp, "CPT instruction requests %llu\n", reg);
3959 reg = rvu_read64(rvu, blkaddr, CPT_AF_INST_LATENCY_PC);
3960 seq_printf(filp, "CPT instruction latency %llu\n", reg);
3961 reg = rvu_read64(rvu, blkaddr, CPT_AF_RD_REQ_PC);
3962 seq_printf(filp, "CPT NCB read requests %llu\n", reg);
3963 reg = rvu_read64(rvu, blkaddr, CPT_AF_RD_LATENCY_PC);
3964 seq_printf(filp, "CPT NCB read latency %llu\n", reg);
3965 reg = rvu_read64(rvu, blkaddr, CPT_AF_RD_UC_PC);
3966 seq_printf(filp, "CPT read requests caused by UC fills %llu\n", reg);
3967 reg = rvu_read64(rvu, blkaddr, CPT_AF_ACTIVE_CYCLES_PC);
3968 seq_printf(filp, "CPT active cycles pc %llu\n", reg);
3969 reg = rvu_read64(rvu, blkaddr, CPT_AF_CPTCLK_CNT);
3970 seq_printf(filp, "CPT clock count pc %llu\n", reg);
3971
3972 return 0;
3973 }
3974
3975 RVU_DEBUG_SEQ_FOPS(cpt_pc, cpt_pc_display, NULL);
3976
rvu_dbg_cpt_init(struct rvu * rvu,int blkaddr)3977 static void rvu_dbg_cpt_init(struct rvu *rvu, int blkaddr)
3978 {
3979 struct cpt_ctx *ctx;
3980
3981 if (!is_block_implemented(rvu->hw, blkaddr))
3982 return;
3983
3984 if (blkaddr == BLKADDR_CPT0) {
3985 rvu->rvu_dbg.cpt = debugfs_create_dir("cpt", rvu->rvu_dbg.root);
3986 ctx = &rvu->rvu_dbg.cpt_ctx[0];
3987 ctx->blkaddr = BLKADDR_CPT0;
3988 ctx->rvu = rvu;
3989 } else {
3990 rvu->rvu_dbg.cpt = debugfs_create_dir("cpt1",
3991 rvu->rvu_dbg.root);
3992 ctx = &rvu->rvu_dbg.cpt_ctx[1];
3993 ctx->blkaddr = BLKADDR_CPT1;
3994 ctx->rvu = rvu;
3995 }
3996
3997 debugfs_create_file("cpt_pc", 0600, rvu->rvu_dbg.cpt, ctx,
3998 &rvu_dbg_cpt_pc_fops);
3999 debugfs_create_file("cpt_ae_sts", 0600, rvu->rvu_dbg.cpt, ctx,
4000 &rvu_dbg_cpt_ae_sts_fops);
4001 debugfs_create_file("cpt_se_sts", 0600, rvu->rvu_dbg.cpt, ctx,
4002 &rvu_dbg_cpt_se_sts_fops);
4003 debugfs_create_file("cpt_ie_sts", 0600, rvu->rvu_dbg.cpt, ctx,
4004 &rvu_dbg_cpt_ie_sts_fops);
4005 debugfs_create_file("cpt_engines_info", 0600, rvu->rvu_dbg.cpt, ctx,
4006 &rvu_dbg_cpt_engines_info_fops);
4007 debugfs_create_file("cpt_lfs_info", 0600, rvu->rvu_dbg.cpt, ctx,
4008 &rvu_dbg_cpt_lfs_info_fops);
4009 debugfs_create_file("cpt_err_info", 0600, rvu->rvu_dbg.cpt, ctx,
4010 &rvu_dbg_cpt_err_info_fops);
4011 }
4012
rvu_get_dbg_dir_name(struct rvu * rvu)4013 static const char *rvu_get_dbg_dir_name(struct rvu *rvu)
4014 {
4015 if (is_cn20k(rvu->pdev))
4016 return "cn20k";
4017
4018 if (!is_rvu_otx2(rvu))
4019 return "cn10k";
4020 else
4021 return "octeontx2";
4022 }
4023
rvu_dbg_init(struct rvu * rvu)4024 void rvu_dbg_init(struct rvu *rvu)
4025 {
4026 rvu->rvu_dbg.root = debugfs_create_dir(rvu_get_dbg_dir_name(rvu), NULL);
4027
4028 debugfs_create_file("rsrc_alloc", 0444, rvu->rvu_dbg.root, rvu,
4029 &rvu_dbg_rsrc_status_fops);
4030
4031 if (!is_rvu_otx2(rvu))
4032 debugfs_create_file("lmtst_map_table", 0444, rvu->rvu_dbg.root,
4033 rvu, &rvu_dbg_lmtst_map_table_fops);
4034
4035 debugfs_create_file("rvu_fwdata", 0444, rvu->rvu_dbg.root, rvu,
4036 &rvu_dbg_rvu_fwdata_fops);
4037
4038 if (!cgx_get_cgxcnt_max())
4039 goto create;
4040
4041 if (is_rvu_otx2(rvu))
4042 debugfs_create_file("rvu_pf_cgx_map", 0444, rvu->rvu_dbg.root,
4043 rvu, &rvu_dbg_rvu_pf_cgx_map_fops);
4044 else
4045 debugfs_create_file("rvu_pf_rpm_map", 0444, rvu->rvu_dbg.root,
4046 rvu, &rvu_dbg_rvu_pf_cgx_map_fops);
4047
4048 create:
4049 rvu_dbg_npa_init(rvu);
4050 rvu_dbg_nix_init(rvu, BLKADDR_NIX0);
4051
4052 rvu_dbg_nix_init(rvu, BLKADDR_NIX1);
4053 rvu_dbg_cgx_init(rvu);
4054 rvu_dbg_npc_init(rvu);
4055 rvu_dbg_cpt_init(rvu, BLKADDR_CPT0);
4056 rvu_dbg_cpt_init(rvu, BLKADDR_CPT1);
4057 rvu_dbg_mcs_init(rvu);
4058 }
4059
rvu_dbg_exit(struct rvu * rvu)4060 void rvu_dbg_exit(struct rvu *rvu)
4061 {
4062 debugfs_remove_recursive(rvu->rvu_dbg.root);
4063 }
4064
4065 #endif /* CONFIG_DEBUG_FS */
4066