xref: /linux/arch/arm/boot/dts/arm/mps2.dtsi (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)
1/*
2 * Copyright (C) 2015 ARM Limited
3 *
4 * Author: Vladimir Murzin <vladimir.murzin@arm.com>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 *  a) This file is free software; you can redistribute it and/or
12 *     modify it under the terms of the GNU General Public License as
13 *     published by the Free Software Foundation; either version 2 of the
14 *     License, or (at your option) any later version.
15 *
16 *     This file is distributed in the hope that it will be useful,
17 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
18 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19 *     GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 *  b) Permission is hereby granted, free of charge, to any person
24 *     obtaining a copy of this software and associated documentation
25 *     files (the "Software"), to deal in the Software without
26 *     restriction, including without limitation the rights to use,
27 *     copy, modify, merge, publish, distribute, sublicense, and/or
28 *     sell copies of the Software, and to permit persons to whom the
29 *     Software is furnished to do so, subject to the following
30 *     conditions:
31 *
32 *     The above copyright notice and this permission notice shall be
33 *     included in all copies or substantial portions of the Software.
34 *
35 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 *     OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45#include "../armv7-m.dtsi"
46
47/ {
48	#address-cells = <1>;
49	#size-cells = <1>;
50
51	oscclk0: clock-50000000 {
52		compatible = "fixed-clock";
53		#clock-cells = <0>;
54		clock-frequency = <50000000>;
55	};
56
57	oscclk1: clock-24576000 {
58		compatible = "fixed-clock";
59		#clock-cells = <0>;
60		clock-frequency = <24576000>;
61	};
62
63	oscclk2: clock-25000000 {
64		compatible = "fixed-clock";
65		#clock-cells = <0>;
66		clock-frequency = <25000000>;
67	};
68
69	cfgclk: clock-5000000 {
70		compatible = "fixed-clock";
71		#clock-cells = <0>;
72		clock-frequency = <5000000>;
73	};
74
75	spicfgclk: clock-75000000 {
76		compatible = "fixed-clock";
77		#clock-cells = <0>;
78		clock-frequency = <75000000>;
79	};
80
81	sysclk: spiclcd: spicon: i2cclcd: i2caud: clock-sys {
82		compatible = "fixed-factor-clock";
83		clocks = <&oscclk0>;
84		#clock-cells = <0>;
85		clock-div = <2>;
86		clock-mult = <1>;
87	};
88
89	audmclk: clk-12388000 {
90		compatible = "fixed-factor-clock";
91		clocks = <&oscclk1>;
92		#clock-cells = <0>;
93		clock-div = <2>;
94		clock-mult = <1>;
95	};
96
97	audsclk: clk-3072000 {
98		compatible = "fixed-factor-clock";
99		clocks = <&oscclk1>;
100		#clock-cells = <0>;
101		clock-div = <8>;
102		clock-mult = <1>;
103	};
104
105	soc {
106		compatible = "simple-bus";
107		ranges;
108
109		apb@40000000 {
110			compatible = "simple-bus";
111			#address-cells = <1>;
112			#size-cells = <1>;
113			ranges = <0 0x40000000 0x10000>;
114
115			timer0: mps2-timer0@0 {
116				compatible = "arm,mps2-timer";
117				reg = <0x0 0x1000>;
118				interrupts = <8>;
119				clocks = <&sysclk>;
120				status = "disabled";
121			};
122
123			timer1: mps2-timer1@1000 {
124				compatible = "arm,mps2-timer";
125				reg = <0x1000 0x1000>;
126				interrupts = <9>;
127				clocks = <&sysclk>;
128				status = "disabled";
129			};
130
131			timer2: dual-timer@2000 {
132				compatible = "arm,sp804", "arm,primecell";
133				reg = <0x2000 0x1000>;
134				clocks = <&sysclk>, <&sysclk>, <&sysclk>;
135				clock-names = "timer0clk", "timer1clk",
136					       "apb_pclk";
137				interrupts = <10>;
138				status = "disabled";
139			};
140
141			uart0: serial@4000 {
142				compatible = "arm,mps2-uart";
143				reg = <0x4000 0x1000>;
144				interrupts = <0>, <1>, <12>;
145				clocks = <&sysclk>;
146				status = "disabled";
147			};
148
149			uart1: serial@5000 {
150				compatible = "arm,mps2-uart";
151				reg = <0x5000 0x1000>;
152				interrupts = <2>, <3>, <12>;
153				clocks = <&sysclk>;
154				status = "disabled";
155			};
156
157			uart2: serial@6000 {
158				compatible = "arm,mps2-uart";
159				reg = <0x6000 0x1000>;
160				interrupts = <4>, <5>, <12>;
161				clocks = <&sysclk>;
162				status = "disabled";
163			};
164
165			wdt: watchdog@8000 {
166				compatible = "arm,sp805", "arm,primecell";
167				arm,primecell-periphid = <0x00141805>;
168				reg = <0x8000 0x1000>;
169				interrupts = <0>;
170				clocks = <&sysclk>, <&sysclk>;
171				clock-names = "wdog_clk", "apb_pclk";
172				status = "disabled";
173			};
174		};
175	};
176
177	fpga@40020000 {
178		compatible = "simple-bus";
179		#address-cells = <1>;
180		#size-cells = <1>;
181		ranges = <0 0x40020000 0x10000>;
182
183		fpgaio@8000 {
184			compatible = "syscon", "simple-mfd";
185			reg = <0x8000 0x10>;
186
187			ranges = <0x0 0x8000 0x10>;
188			#address-cells = <1>;
189			#size-cells = <1>;
190
191			led@0,0 {
192				compatible = "register-bit-led";
193				reg = <0x00 0x04>;
194				offset = <0x0>;
195				mask = <0x01>;
196				label = "userled:0";
197				linux,default-trigger = "heartbeat";
198				default-state = "on";
199			};
200
201			led@0,1 {
202				compatible = "register-bit-led";
203				reg = <0x00 0x04>;
204				offset = <0x0>;
205				mask = <0x02>;
206				label = "userled:1";
207				linux,default-trigger = "usr";
208				default-state = "off";
209			};
210		};
211	};
212
213	smb {
214		compatible = "simple-bus";
215		#address-cells = <2>;
216		#size-cells = <1>;
217		ranges = <0 0 0x40200000 0x10000>,
218			 <1 0 0xa0000000 0x10000>;
219	};
220};
221