1 // SPDX-License-Identifier: ISC
2 /*
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
7 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
8 */
9
10 #include <linux/skbuff.h>
11 #include <linux/ctype.h>
12
13 #include "core.h"
14 #include "htc.h"
15 #include "debug.h"
16 #include "wmi.h"
17 #include "wmi-tlv.h"
18 #include "mac.h"
19 #include "testmode.h"
20 #include "wmi-ops.h"
21 #include "p2p.h"
22 #include "hw.h"
23 #include "hif.h"
24 #include "txrx.h"
25
26 #define ATH10K_WMI_BARRIER_ECHO_ID 0xBA991E9
27 #define ATH10K_WMI_BARRIER_TIMEOUT_HZ (3 * HZ)
28 #define ATH10K_WMI_DFS_CONF_TIMEOUT_HZ (HZ / 6)
29
30 /* MAIN WMI cmd track */
31 static struct wmi_cmd_map wmi_cmd_map = {
32 .init_cmdid = WMI_INIT_CMDID,
33 .start_scan_cmdid = WMI_START_SCAN_CMDID,
34 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
35 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
36 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
37 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
38 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
39 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
40 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
41 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
42 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
43 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
44 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
45 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
46 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
47 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
48 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
49 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
50 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
51 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
52 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
53 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
54 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
55 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
56 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
57 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
58 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
59 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
60 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
61 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
62 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
63 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
64 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
65 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
66 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
67 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
68 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
69 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
70 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
71 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
72 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
73 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
74 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
75 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
76 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
77 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
78 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
79 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
80 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
81 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
82 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
83 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
84 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
85 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
86 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
87 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
88 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
89 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
90 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
91 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
92 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
93 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
94 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
95 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
96 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
97 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
98 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
99 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
100 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
101 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
102 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
103 .wlan_profile_set_hist_intvl_cmdid =
104 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
105 .wlan_profile_get_profile_data_cmdid =
106 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
107 .wlan_profile_enable_profile_id_cmdid =
108 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
109 .wlan_profile_list_profile_id_cmdid =
110 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
111 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
112 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
113 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
114 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
115 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
116 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
117 .wow_enable_disable_wake_event_cmdid =
118 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
119 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
120 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
121 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
122 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
123 .vdev_spectral_scan_configure_cmdid =
124 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
125 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
126 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
127 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
128 .network_list_offload_config_cmdid =
129 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
130 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
131 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
132 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
133 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
134 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
135 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
136 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
137 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
138 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
139 .echo_cmdid = WMI_ECHO_CMDID,
140 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
141 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
142 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
143 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
144 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
145 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
146 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
147 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
148 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
149 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
150 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
151 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
152 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
153 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
154 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
155 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
156 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
157 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
158 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
159 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
160 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
161 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
162 .nan_cmdid = WMI_CMD_UNSUPPORTED,
163 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
164 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
165 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
166 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
167 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
168 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
169 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
170 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
171 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
172 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
173 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
174 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
175 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
176 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
177 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
178 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
179 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
180 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
181 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
182 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
183 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
184 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
185 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
186 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
187 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
188 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
189 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
190 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
191 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
192 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
193 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
194 .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
195 };
196
197 /* 10.X WMI cmd track */
198 static struct wmi_cmd_map wmi_10x_cmd_map = {
199 .init_cmdid = WMI_10X_INIT_CMDID,
200 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
201 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
202 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
203 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
204 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
205 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
206 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
207 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
208 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
209 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
210 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
211 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
212 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
213 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
214 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
215 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
216 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
217 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
218 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
219 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
220 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
221 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
222 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
223 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
224 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
225 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
226 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
227 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
228 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
229 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
230 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
231 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
232 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
233 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
234 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
235 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
236 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
237 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
238 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
239 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
240 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
241 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
242 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
243 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
244 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
245 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
246 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
247 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
248 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
249 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
250 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
251 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
252 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
253 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
254 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
255 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
256 .roam_scan_rssi_change_threshold =
257 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
258 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
259 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
260 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
261 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
262 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
263 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
264 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
265 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
266 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
267 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
268 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
269 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
270 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
271 .wlan_profile_set_hist_intvl_cmdid =
272 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
273 .wlan_profile_get_profile_data_cmdid =
274 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
275 .wlan_profile_enable_profile_id_cmdid =
276 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
277 .wlan_profile_list_profile_id_cmdid =
278 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
279 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
280 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
281 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
282 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
283 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
284 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
285 .wow_enable_disable_wake_event_cmdid =
286 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
287 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
288 .wow_hostwakeup_from_sleep_cmdid =
289 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
290 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
291 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
292 .vdev_spectral_scan_configure_cmdid =
293 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
294 .vdev_spectral_scan_enable_cmdid =
295 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
296 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
297 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
298 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
299 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
300 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
301 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
302 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
303 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
304 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
305 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
306 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
307 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
308 .echo_cmdid = WMI_10X_ECHO_CMDID,
309 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
310 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
311 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
312 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
313 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
314 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
315 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
316 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
317 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
318 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
319 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
320 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
321 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
322 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
323 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
324 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
325 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
326 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
327 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
328 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
329 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
330 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
331 .nan_cmdid = WMI_CMD_UNSUPPORTED,
332 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
333 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
334 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
335 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
336 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
337 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
338 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
339 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
340 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
341 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
342 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
343 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
344 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
345 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
346 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
347 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
348 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
349 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
350 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
351 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
352 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
353 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
354 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
355 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
356 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
357 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
358 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
359 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
360 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
361 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
362 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
363 .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
364 };
365
366 /* 10.2.4 WMI cmd track */
367 static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
368 .init_cmdid = WMI_10_2_INIT_CMDID,
369 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
370 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
371 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
372 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
373 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
374 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
375 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
376 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
377 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
378 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
379 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
380 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
381 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
382 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
383 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
384 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
385 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
386 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
387 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
388 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
389 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
390 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
391 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
392 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
393 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
394 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
395 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
396 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
397 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
398 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
399 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
400 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
401 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
402 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
403 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
404 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
405 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
406 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
407 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
408 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
409 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
410 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
411 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
412 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
413 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
414 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
415 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
416 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
417 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
418 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
419 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
420 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
421 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
422 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
423 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
424 .roam_scan_rssi_change_threshold =
425 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
426 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
427 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
428 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
429 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
430 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
431 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
432 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
433 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
434 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
435 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
436 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
437 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
438 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
439 .wlan_profile_set_hist_intvl_cmdid =
440 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
441 .wlan_profile_get_profile_data_cmdid =
442 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
443 .wlan_profile_enable_profile_id_cmdid =
444 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
445 .wlan_profile_list_profile_id_cmdid =
446 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
447 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
448 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
449 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
450 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
451 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
452 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
453 .wow_enable_disable_wake_event_cmdid =
454 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
455 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
456 .wow_hostwakeup_from_sleep_cmdid =
457 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
458 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
459 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
460 .vdev_spectral_scan_configure_cmdid =
461 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
462 .vdev_spectral_scan_enable_cmdid =
463 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
464 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
465 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
466 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
467 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
468 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
469 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
470 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
471 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
472 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
473 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
474 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
475 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
476 .echo_cmdid = WMI_10_2_ECHO_CMDID,
477 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
478 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
479 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
480 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
481 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
482 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
483 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
484 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
485 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
486 .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
487 .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS,
488 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
489 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
490 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
491 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
492 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
493 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
494 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
495 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
496 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
497 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
498 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
499 .nan_cmdid = WMI_CMD_UNSUPPORTED,
500 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
501 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
502 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
503 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
504 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
505 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
506 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
507 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
508 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
509 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
510 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
511 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
512 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
513 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
514 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
515 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
516 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
517 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
518 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
519 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
520 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
521 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
522 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
523 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
524 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
525 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
526 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
527 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
528 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
529 .pdev_bss_chan_info_request_cmdid =
530 WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
531 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
532 .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
533 .set_bb_timing_cmdid = WMI_10_2_PDEV_SET_BB_TIMING_CONFIG_CMDID,
534 };
535
536 /* 10.4 WMI cmd track */
537 static struct wmi_cmd_map wmi_10_4_cmd_map = {
538 .init_cmdid = WMI_10_4_INIT_CMDID,
539 .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID,
540 .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID,
541 .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID,
542 .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
543 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
544 .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
545 .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID,
546 .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID,
547 .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
548 .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
549 .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
550 .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
551 .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
552 .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
553 .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
554 .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
555 .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
556 .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
557 .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID,
558 .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID,
559 .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID,
560 .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
561 .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID,
562 .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID,
563 .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID,
564 .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID,
565 .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID,
566 .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID,
567 .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID,
568 .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID,
569 .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID,
570 .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID,
571 .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
572 .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
573 .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID,
574 .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID,
575 .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID,
576 .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID,
577 .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID,
578 .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
579 .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID,
580 .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID,
581 .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
582 .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID,
583 .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID,
584 .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID,
585 .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID,
586 .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID,
587 .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID,
588 .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
589 .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID,
590 .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID,
591 .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID,
592 .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE,
593 .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
594 .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD,
595 .roam_scan_rssi_change_threshold =
596 WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
597 .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE,
598 .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
599 .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
600 .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD,
601 .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
602 .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
603 .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE,
604 .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
605 .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
606 .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID,
607 .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
608 .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
609 .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
610 .wlan_profile_set_hist_intvl_cmdid =
611 WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
612 .wlan_profile_get_profile_data_cmdid =
613 WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
614 .wlan_profile_enable_profile_id_cmdid =
615 WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
616 .wlan_profile_list_profile_id_cmdid =
617 WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
618 .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID,
619 .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID,
620 .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID,
621 .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID,
622 .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
623 .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
624 .wow_enable_disable_wake_event_cmdid =
625 WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
626 .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID,
627 .wow_hostwakeup_from_sleep_cmdid =
628 WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
629 .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID,
630 .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID,
631 .vdev_spectral_scan_configure_cmdid =
632 WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
633 .vdev_spectral_scan_enable_cmdid =
634 WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
635 .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID,
636 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
637 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
638 .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID,
639 .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
640 .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
641 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
642 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
643 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
644 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
645 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
646 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
647 .echo_cmdid = WMI_10_4_ECHO_CMDID,
648 .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID,
649 .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID,
650 .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID,
651 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
652 .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
653 .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
654 .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID,
655 .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID,
656 .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID,
657 .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
658 .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED,
659 .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED,
660 .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
661 .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
662 .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
663 .wlan_peer_caching_add_peer_cmdid =
664 WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
665 .wlan_peer_caching_evict_peer_cmdid =
666 WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
667 .wlan_peer_caching_restore_peer_cmdid =
668 WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
669 .wlan_peer_caching_print_all_peers_info_cmdid =
670 WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
671 .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
672 .peer_add_proxy_sta_entry_cmdid =
673 WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
674 .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID,
675 .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID,
676 .nan_cmdid = WMI_10_4_NAN_CMDID,
677 .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID,
678 .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID,
679 .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
680 .pdev_smart_ant_set_rx_antenna_cmdid =
681 WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
682 .peer_smart_ant_set_tx_antenna_cmdid =
683 WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
684 .peer_smart_ant_set_train_info_cmdid =
685 WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
686 .peer_smart_ant_set_node_config_ops_cmdid =
687 WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
688 .pdev_set_antenna_switch_table_cmdid =
689 WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
690 .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
691 .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
692 .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
693 .pdev_ratepwr_chainmsk_table_cmdid =
694 WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
695 .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID,
696 .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID,
697 .fwtest_cmdid = WMI_10_4_FWTEST_CMDID,
698 .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID,
699 .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID,
700 .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
701 .pdev_get_ani_ofdm_config_cmdid =
702 WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
703 .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
704 .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
705 .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID,
706 .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID,
707 .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
708 .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID,
709 .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID,
710 .vdev_filter_neighbor_rx_packets_cmdid =
711 WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
712 .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID,
713 .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID,
714 .pdev_bss_chan_info_request_cmdid =
715 WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
716 .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID,
717 .vdev_set_ie_cmdid = WMI_10_4_VDEV_SET_IE_CMDID,
718 .set_lteu_config_cmdid = WMI_10_4_SET_LTEU_CONFIG_CMDID,
719 .atf_ssid_grouping_request_cmdid =
720 WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
721 .peer_atf_ext_request_cmdid = WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
722 .set_periodic_channel_stats_cfg_cmdid =
723 WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
724 .peer_bwf_request_cmdid = WMI_10_4_PEER_BWF_REQUEST_CMDID,
725 .btcoex_cfg_cmdid = WMI_10_4_BTCOEX_CFG_CMDID,
726 .peer_tx_mu_txmit_count_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
727 .peer_tx_mu_txmit_rstcnt_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
728 .peer_gid_userpos_list_cmdid = WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
729 .pdev_check_cal_version_cmdid = WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
730 .coex_version_cfg_cmid = WMI_10_4_COEX_VERSION_CFG_CMID,
731 .pdev_get_rx_filter_cmdid = WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
732 .pdev_extended_nss_cfg_cmdid = WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
733 .vdev_set_scan_nac_rssi_cmdid = WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
734 .prog_gpio_band_select_cmdid = WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
735 .config_smart_logging_cmdid = WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
736 .debug_fatal_condition_cmdid = WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
737 .get_tsf_timer_cmdid = WMI_10_4_GET_TSF_TIMER_CMDID,
738 .pdev_get_tpc_table_cmdid = WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
739 .vdev_sifs_trigger_time_cmdid = WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
740 .pdev_wds_entry_list_cmdid = WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
741 .tdls_set_state_cmdid = WMI_10_4_TDLS_SET_STATE_CMDID,
742 .tdls_peer_update_cmdid = WMI_10_4_TDLS_PEER_UPDATE_CMDID,
743 .tdls_set_offchan_mode_cmdid = WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
744 .radar_found_cmdid = WMI_10_4_RADAR_FOUND_CMDID,
745 .per_peer_per_tid_config_cmdid = WMI_10_4_PER_PEER_PER_TID_CONFIG_CMDID,
746 };
747
748 static struct wmi_peer_param_map wmi_peer_param_map = {
749 .smps_state = WMI_PEER_SMPS_STATE,
750 .ampdu = WMI_PEER_AMPDU,
751 .authorize = WMI_PEER_AUTHORIZE,
752 .chan_width = WMI_PEER_CHAN_WIDTH,
753 .nss = WMI_PEER_NSS,
754 .use_4addr = WMI_PEER_USE_4ADDR,
755 .use_fixed_power = WMI_PEER_USE_FIXED_PWR,
756 .debug = WMI_PEER_DEBUG,
757 .phymode = WMI_PEER_PHYMODE,
758 .dummy_var = WMI_PEER_DUMMY_VAR,
759 };
760
761 /* MAIN WMI VDEV param map */
762 static struct wmi_vdev_param_map wmi_vdev_param_map = {
763 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
764 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
765 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
766 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
767 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
768 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
769 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
770 .preamble = WMI_VDEV_PARAM_PREAMBLE,
771 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
772 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
773 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
774 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
775 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
776 .wmi_vdev_oc_scheduler_air_time_limit =
777 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
778 .wds = WMI_VDEV_PARAM_WDS,
779 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
780 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
781 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
782 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
783 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
784 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
785 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
786 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
787 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
788 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
789 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
790 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
791 .sgi = WMI_VDEV_PARAM_SGI,
792 .ldpc = WMI_VDEV_PARAM_LDPC,
793 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
794 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
795 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
796 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
797 .nss = WMI_VDEV_PARAM_NSS,
798 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
799 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
800 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
801 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
802 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
803 .ap_keepalive_min_idle_inactive_time_secs =
804 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
805 .ap_keepalive_max_idle_inactive_time_secs =
806 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
807 .ap_keepalive_max_unresponsive_time_secs =
808 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
809 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
810 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
811 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
812 .txbf = WMI_VDEV_PARAM_TXBF,
813 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
814 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
815 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
816 .ap_detect_out_of_sync_sleeping_sta_time_secs =
817 WMI_VDEV_PARAM_UNSUPPORTED,
818 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
819 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
820 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
821 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
822 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
823 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
824 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
825 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
826 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
827 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
828 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
829 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
830 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
831 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
832 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
833 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
834 .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED,
835 .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED,
836 };
837
838 /* 10.X WMI VDEV param map */
839 static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
840 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
841 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
842 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
843 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
844 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
845 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
846 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
847 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
848 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
849 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
850 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
851 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
852 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
853 .wmi_vdev_oc_scheduler_air_time_limit =
854 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
855 .wds = WMI_10X_VDEV_PARAM_WDS,
856 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
857 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
858 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
859 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
860 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
861 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
862 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
863 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
864 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
865 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
866 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
867 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
868 .sgi = WMI_10X_VDEV_PARAM_SGI,
869 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
870 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
871 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
872 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
873 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
874 .nss = WMI_10X_VDEV_PARAM_NSS,
875 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
876 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
877 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
878 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
879 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
880 .ap_keepalive_min_idle_inactive_time_secs =
881 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
882 .ap_keepalive_max_idle_inactive_time_secs =
883 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
884 .ap_keepalive_max_unresponsive_time_secs =
885 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
886 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
887 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
888 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
889 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
890 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
891 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
892 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
893 .ap_detect_out_of_sync_sleeping_sta_time_secs =
894 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
895 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
896 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
897 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
898 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
899 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
900 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
901 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
902 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
903 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
904 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
905 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
906 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
907 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
908 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
909 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
910 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
911 .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED,
912 .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED,
913 };
914
915 static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
916 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
917 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
918 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
919 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
920 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
921 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
922 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
923 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
924 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
925 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
926 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
927 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
928 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
929 .wmi_vdev_oc_scheduler_air_time_limit =
930 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
931 .wds = WMI_10X_VDEV_PARAM_WDS,
932 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
933 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
934 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
935 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
936 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
937 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
938 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
939 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
940 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
941 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
942 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
943 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
944 .sgi = WMI_10X_VDEV_PARAM_SGI,
945 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
946 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
947 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
948 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
949 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
950 .nss = WMI_10X_VDEV_PARAM_NSS,
951 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
952 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
953 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
954 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
955 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
956 .ap_keepalive_min_idle_inactive_time_secs =
957 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
958 .ap_keepalive_max_idle_inactive_time_secs =
959 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
960 .ap_keepalive_max_unresponsive_time_secs =
961 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
962 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
963 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
964 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
965 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
966 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
967 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
968 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
969 .ap_detect_out_of_sync_sleeping_sta_time_secs =
970 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
971 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
972 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
973 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
974 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
975 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
976 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
977 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
978 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
979 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
980 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
981 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
982 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
983 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
984 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
985 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
986 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
987 .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED,
988 .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED,
989 };
990
991 static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = {
992 .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD,
993 .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
994 .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
995 .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
996 .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
997 .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
998 .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME,
999 .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE,
1000 .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME,
1001 .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
1002 .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
1003 .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
1004 .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
1005 .wmi_vdev_oc_scheduler_air_time_limit =
1006 WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
1007 .wds = WMI_10_4_VDEV_PARAM_WDS,
1008 .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
1009 .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
1010 .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
1011 .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
1012 .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM,
1013 .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH,
1014 .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
1015 .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
1016 .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
1017 .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE,
1018 .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
1019 .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE,
1020 .sgi = WMI_10_4_VDEV_PARAM_SGI,
1021 .ldpc = WMI_10_4_VDEV_PARAM_LDPC,
1022 .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC,
1023 .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC,
1024 .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
1025 .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID,
1026 .nss = WMI_10_4_VDEV_PARAM_NSS,
1027 .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
1028 .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
1029 .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
1030 .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
1031 .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
1032 .ap_keepalive_min_idle_inactive_time_secs =
1033 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
1034 .ap_keepalive_max_idle_inactive_time_secs =
1035 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
1036 .ap_keepalive_max_unresponsive_time_secs =
1037 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
1038 .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
1039 .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
1040 .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
1041 .txbf = WMI_10_4_VDEV_PARAM_TXBF,
1042 .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
1043 .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
1044 .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
1045 .ap_detect_out_of_sync_sleeping_sta_time_secs =
1046 WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
1047 .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
1048 .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
1049 .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET,
1050 .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
1051 .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
1052 .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
1053 .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
1054 .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
1055 .early_rx_bmiss_sample_cycle =
1056 WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
1057 .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
1058 .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
1059 .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
1060 .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA,
1061 .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC,
1062 .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
1063 .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
1064 .inc_tsf = WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
1065 .dec_tsf = WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
1066 .disable_4addr_src_lrn = WMI_10_4_VDEV_PARAM_DISABLE_4_ADDR_SRC_LRN,
1067 .rtt_responder_role = WMI_10_4_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE,
1068 };
1069
1070 static struct wmi_pdev_param_map wmi_pdev_param_map = {
1071 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
1072 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
1073 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
1074 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
1075 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
1076 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
1077 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
1078 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1079 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
1080 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
1081 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1082 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
1083 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
1084 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1085 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
1086 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
1087 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
1088 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
1089 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
1090 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1091 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1092 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
1093 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1094 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
1095 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
1096 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
1097 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1098 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1099 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
1100 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1101 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1102 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1103 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1104 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
1105 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
1106 .dcs = WMI_PDEV_PARAM_DCS,
1107 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
1108 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
1109 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
1110 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
1111 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
1112 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
1113 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
1114 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
1115 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
1116 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1117 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
1118 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1119 .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
1120 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1121 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1122 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1123 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1124 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1125 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1126 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1127 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1128 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1129 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1130 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1131 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1132 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1133 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1134 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1135 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1136 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1137 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1138 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1139 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1140 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1141 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1142 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1143 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1144 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1145 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1146 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1147 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1148 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1149 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1150 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1151 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1152 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1153 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1154 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1155 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1156 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1157 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1158 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1159 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1160 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1161 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1162 .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
1163 };
1164
1165 static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
1166 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
1167 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
1168 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
1169 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
1170 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
1171 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
1172 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
1173 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1174 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
1175 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
1176 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1177 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
1178 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
1179 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1180 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
1181 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
1182 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
1183 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
1184 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
1185 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1186 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1187 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
1188 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1189 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
1190 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
1191 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
1192 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
1193 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
1194 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
1195 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1196 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1197 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1198 .bcnflt_stats_update_period =
1199 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1200 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
1201 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
1202 .dcs = WMI_10X_PDEV_PARAM_DCS,
1203 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
1204 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
1205 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
1206 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
1207 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
1208 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
1209 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
1210 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
1211 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
1212 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
1213 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
1214 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
1215 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
1216 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1217 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1218 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1219 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1220 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1221 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1222 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1223 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1224 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1225 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1226 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1227 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1228 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1229 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1230 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1231 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1232 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1233 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1234 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1235 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1236 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1237 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1238 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1239 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1240 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1241 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1242 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1243 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1244 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1245 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1246 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1247 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1248 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1249 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1250 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1251 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1252 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1253 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1254 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1255 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1256 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1257 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1258 .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
1259 };
1260
1261 static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
1262 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
1263 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
1264 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
1265 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
1266 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
1267 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
1268 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
1269 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1270 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
1271 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
1272 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1273 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
1274 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
1275 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1276 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
1277 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
1278 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
1279 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
1280 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
1281 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1282 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1283 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
1284 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1285 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
1286 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
1287 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
1288 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
1289 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
1290 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
1291 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1292 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1293 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1294 .bcnflt_stats_update_period =
1295 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1296 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
1297 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
1298 .dcs = WMI_10X_PDEV_PARAM_DCS,
1299 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
1300 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
1301 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
1302 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
1303 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
1304 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
1305 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
1306 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
1307 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
1308 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
1309 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
1310 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
1311 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
1312 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1313 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1314 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1315 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1316 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1317 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1318 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1319 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1320 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1321 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1322 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1323 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1324 .peer_sta_ps_statechg_enable =
1325 WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
1326 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1327 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1328 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1329 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1330 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1331 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1332 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1333 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1334 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1335 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1336 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1337 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1338 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1339 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1340 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1341 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1342 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1343 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1344 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1345 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1346 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1347 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1348 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1349 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1350 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1351 .pdev_reset = WMI_10X_PDEV_PARAM_PDEV_RESET,
1352 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1353 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1354 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1355 .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
1356 };
1357
1358 /* firmware 10.2 specific mappings */
1359 static struct wmi_cmd_map wmi_10_2_cmd_map = {
1360 .init_cmdid = WMI_10_2_INIT_CMDID,
1361 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
1362 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
1363 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
1364 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
1365 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
1366 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
1367 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
1368 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
1369 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
1370 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
1371 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
1372 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
1373 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
1374 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
1375 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1376 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
1377 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
1378 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
1379 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
1380 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
1381 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
1382 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
1383 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
1384 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
1385 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
1386 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
1387 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
1388 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
1389 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
1390 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
1391 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
1392 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
1393 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
1394 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
1395 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
1396 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
1397 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
1398 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
1399 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
1400 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
1401 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
1402 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
1403 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
1404 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
1405 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
1406 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
1407 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
1408 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
1409 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
1410 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
1411 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
1412 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
1413 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
1414 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
1415 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
1416 .roam_scan_rssi_change_threshold =
1417 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1418 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
1419 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
1420 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
1421 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
1422 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
1423 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
1424 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
1425 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
1426 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
1427 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
1428 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
1429 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
1430 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
1431 .wlan_profile_set_hist_intvl_cmdid =
1432 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1433 .wlan_profile_get_profile_data_cmdid =
1434 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1435 .wlan_profile_enable_profile_id_cmdid =
1436 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1437 .wlan_profile_list_profile_id_cmdid =
1438 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1439 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
1440 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
1441 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
1442 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
1443 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
1444 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
1445 .wow_enable_disable_wake_event_cmdid =
1446 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1447 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
1448 .wow_hostwakeup_from_sleep_cmdid =
1449 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1450 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
1451 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
1452 .vdev_spectral_scan_configure_cmdid =
1453 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1454 .vdev_spectral_scan_enable_cmdid =
1455 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1456 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
1457 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
1458 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
1459 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
1460 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
1461 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
1462 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
1463 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
1464 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
1465 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
1466 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
1467 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
1468 .echo_cmdid = WMI_10_2_ECHO_CMDID,
1469 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
1470 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
1471 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
1472 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
1473 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1474 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1475 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
1476 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
1477 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
1478 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
1479 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
1480 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
1481 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
1482 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
1483 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
1484 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
1485 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
1486 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
1487 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
1488 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
1489 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1490 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
1491 .nan_cmdid = WMI_CMD_UNSUPPORTED,
1492 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
1493 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
1494 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
1495 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
1496 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
1497 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
1498 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
1499 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
1500 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
1501 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
1502 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
1503 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
1504 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
1505 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
1506 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
1507 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
1508 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
1509 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
1510 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
1511 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
1512 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
1513 .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
1514 };
1515
1516 static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = {
1517 .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK,
1518 .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
1519 .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
1520 .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
1521 .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
1522 .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
1523 .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
1524 .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1525 .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
1526 .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
1527 .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1528 .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
1529 .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
1530 .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1531 .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE,
1532 .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
1533 .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
1534 .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
1535 .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
1536 .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1537 .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1538 .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
1539 .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1540 .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
1541 .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
1542 .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
1543 .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
1544 .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1545 .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
1546 .pdev_stats_update_period =
1547 WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1548 .vdev_stats_update_period =
1549 WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1550 .peer_stats_update_period =
1551 WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1552 .bcnflt_stats_update_period =
1553 WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1554 .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS,
1555 .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
1556 .dcs = WMI_10_4_PDEV_PARAM_DCS,
1557 .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE,
1558 .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
1559 .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
1560 .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
1561 .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
1562 .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
1563 .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA,
1564 .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
1565 .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
1566 .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
1567 .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR,
1568 .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE,
1569 .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD,
1570 .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST,
1571 .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
1572 .smart_antenna_default_antenna =
1573 WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
1574 .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
1575 .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
1576 .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
1577 .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER,
1578 .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
1579 .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
1580 .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
1581 .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
1582 .remove_mcast2ucast_buffer =
1583 WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
1584 .peer_sta_ps_statechg_enable =
1585 WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
1586 .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
1587 .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
1588 .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
1589 .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
1590 .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
1591 .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
1592 .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
1593 .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
1594 .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS,
1595 .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
1596 .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
1597 .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
1598 .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE,
1599 .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
1600 .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
1601 .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
1602 .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN,
1603 .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
1604 .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
1605 .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
1606 .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
1607 .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
1608 .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
1609 .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
1610 .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
1611 .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET,
1612 .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
1613 .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
1614 .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
1615 .enable_btcoex = WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
1616 };
1617
1618 static const u8 wmi_key_cipher_suites[] = {
1619 [WMI_CIPHER_NONE] = WMI_CIPHER_NONE,
1620 [WMI_CIPHER_WEP] = WMI_CIPHER_WEP,
1621 [WMI_CIPHER_TKIP] = WMI_CIPHER_TKIP,
1622 [WMI_CIPHER_AES_OCB] = WMI_CIPHER_AES_OCB,
1623 [WMI_CIPHER_AES_CCM] = WMI_CIPHER_AES_CCM,
1624 [WMI_CIPHER_WAPI] = WMI_CIPHER_WAPI,
1625 [WMI_CIPHER_CKIP] = WMI_CIPHER_CKIP,
1626 [WMI_CIPHER_AES_CMAC] = WMI_CIPHER_AES_CMAC,
1627 [WMI_CIPHER_AES_GCM] = WMI_CIPHER_AES_GCM,
1628 };
1629
1630 static const u8 wmi_tlv_key_cipher_suites[] = {
1631 [WMI_CIPHER_NONE] = WMI_TLV_CIPHER_NONE,
1632 [WMI_CIPHER_WEP] = WMI_TLV_CIPHER_WEP,
1633 [WMI_CIPHER_TKIP] = WMI_TLV_CIPHER_TKIP,
1634 [WMI_CIPHER_AES_OCB] = WMI_TLV_CIPHER_AES_OCB,
1635 [WMI_CIPHER_AES_CCM] = WMI_TLV_CIPHER_AES_CCM,
1636 [WMI_CIPHER_WAPI] = WMI_TLV_CIPHER_WAPI,
1637 [WMI_CIPHER_CKIP] = WMI_TLV_CIPHER_CKIP,
1638 [WMI_CIPHER_AES_CMAC] = WMI_TLV_CIPHER_AES_CMAC,
1639 [WMI_CIPHER_AES_GCM] = WMI_TLV_CIPHER_AES_GCM,
1640 };
1641
1642 static const struct wmi_peer_flags_map wmi_peer_flags_map = {
1643 .auth = WMI_PEER_AUTH,
1644 .qos = WMI_PEER_QOS,
1645 .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY,
1646 .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY,
1647 .apsd = WMI_PEER_APSD,
1648 .ht = WMI_PEER_HT,
1649 .bw40 = WMI_PEER_40MHZ,
1650 .stbc = WMI_PEER_STBC,
1651 .ldbc = WMI_PEER_LDPC,
1652 .dyn_mimops = WMI_PEER_DYN_MIMOPS,
1653 .static_mimops = WMI_PEER_STATIC_MIMOPS,
1654 .spatial_mux = WMI_PEER_SPATIAL_MUX,
1655 .vht = WMI_PEER_VHT,
1656 .bw80 = WMI_PEER_80MHZ,
1657 .vht_2g = WMI_PEER_VHT_2G,
1658 .pmf = WMI_PEER_PMF,
1659 .bw160 = WMI_PEER_160MHZ,
1660 };
1661
1662 static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = {
1663 .auth = WMI_10X_PEER_AUTH,
1664 .qos = WMI_10X_PEER_QOS,
1665 .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY,
1666 .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY,
1667 .apsd = WMI_10X_PEER_APSD,
1668 .ht = WMI_10X_PEER_HT,
1669 .bw40 = WMI_10X_PEER_40MHZ,
1670 .stbc = WMI_10X_PEER_STBC,
1671 .ldbc = WMI_10X_PEER_LDPC,
1672 .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS,
1673 .static_mimops = WMI_10X_PEER_STATIC_MIMOPS,
1674 .spatial_mux = WMI_10X_PEER_SPATIAL_MUX,
1675 .vht = WMI_10X_PEER_VHT,
1676 .bw80 = WMI_10X_PEER_80MHZ,
1677 .bw160 = WMI_10X_PEER_160MHZ,
1678 };
1679
1680 static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = {
1681 .auth = WMI_10_2_PEER_AUTH,
1682 .qos = WMI_10_2_PEER_QOS,
1683 .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY,
1684 .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY,
1685 .apsd = WMI_10_2_PEER_APSD,
1686 .ht = WMI_10_2_PEER_HT,
1687 .bw40 = WMI_10_2_PEER_40MHZ,
1688 .stbc = WMI_10_2_PEER_STBC,
1689 .ldbc = WMI_10_2_PEER_LDPC,
1690 .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS,
1691 .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS,
1692 .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX,
1693 .vht = WMI_10_2_PEER_VHT,
1694 .bw80 = WMI_10_2_PEER_80MHZ,
1695 .vht_2g = WMI_10_2_PEER_VHT_2G,
1696 .pmf = WMI_10_2_PEER_PMF,
1697 .bw160 = WMI_10_2_PEER_160MHZ,
1698 };
1699
ath10k_wmi_put_wmi_channel(struct ath10k * ar,struct wmi_channel * ch,const struct wmi_channel_arg * arg)1700 void ath10k_wmi_put_wmi_channel(struct ath10k *ar, struct wmi_channel *ch,
1701 const struct wmi_channel_arg *arg)
1702 {
1703 u32 flags = 0;
1704 struct ieee80211_channel *chan = NULL;
1705
1706 memset(ch, 0, sizeof(*ch));
1707
1708 if (arg->passive)
1709 flags |= WMI_CHAN_FLAG_PASSIVE;
1710 if (arg->allow_ibss)
1711 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
1712 if (arg->allow_ht)
1713 flags |= WMI_CHAN_FLAG_ALLOW_HT;
1714 if (arg->allow_vht)
1715 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
1716 if (arg->ht40plus)
1717 flags |= WMI_CHAN_FLAG_HT40_PLUS;
1718 if (arg->chan_radar)
1719 flags |= WMI_CHAN_FLAG_DFS;
1720
1721 ch->band_center_freq2 = 0;
1722 ch->mhz = __cpu_to_le32(arg->freq);
1723 ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
1724 if (arg->mode == MODE_11AC_VHT80_80) {
1725 ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq2);
1726 chan = ieee80211_get_channel(ar->hw->wiphy,
1727 arg->band_center_freq2 - 10);
1728 }
1729
1730 if (arg->mode == MODE_11AC_VHT160) {
1731 u32 band_center_freq1;
1732 u32 band_center_freq2;
1733
1734 if (arg->freq > arg->band_center_freq1) {
1735 band_center_freq1 = arg->band_center_freq1 + 40;
1736 band_center_freq2 = arg->band_center_freq1 - 40;
1737 } else {
1738 band_center_freq1 = arg->band_center_freq1 - 40;
1739 band_center_freq2 = arg->band_center_freq1 + 40;
1740 }
1741
1742 ch->band_center_freq1 =
1743 __cpu_to_le32(band_center_freq1);
1744 /* Minus 10 to get a defined 5G channel frequency*/
1745 chan = ieee80211_get_channel(ar->hw->wiphy,
1746 band_center_freq2 - 10);
1747 /* The center frequency of the entire VHT160 */
1748 ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq1);
1749 }
1750
1751 if (chan && chan->flags & IEEE80211_CHAN_RADAR)
1752 flags |= WMI_CHAN_FLAG_DFS_CFREQ2;
1753
1754 ch->min_power = arg->min_power;
1755 ch->max_power = arg->max_power;
1756 ch->reg_power = arg->max_reg_power;
1757 ch->antenna_max = arg->max_antenna_gain;
1758 ch->max_tx_power = arg->max_power;
1759
1760 /* mode & flags share storage */
1761 ch->mode = arg->mode;
1762 ch->flags |= __cpu_to_le32(flags);
1763 }
1764
ath10k_wmi_wait_for_service_ready(struct ath10k * ar)1765 int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
1766 {
1767 unsigned long time_left, i;
1768
1769 time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
1770 WMI_SERVICE_READY_TIMEOUT_HZ);
1771 if (!time_left) {
1772 /* Sometimes the PCI HIF doesn't receive interrupt
1773 * for the service ready message even if the buffer
1774 * was completed. PCIe sniffer shows that it's
1775 * because the corresponding CE ring doesn't fires
1776 * it. Workaround here by polling CE rings once.
1777 */
1778 ath10k_warn(ar, "failed to receive service ready completion, polling..\n");
1779
1780 for (i = 0; i < CE_COUNT; i++)
1781 ath10k_hif_send_complete_check(ar, i, 1);
1782
1783 time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
1784 WMI_SERVICE_READY_TIMEOUT_HZ);
1785 if (!time_left) {
1786 ath10k_warn(ar, "polling timed out\n");
1787 return -ETIMEDOUT;
1788 }
1789
1790 ath10k_warn(ar, "service ready completion received, continuing normally\n");
1791 }
1792
1793 return 0;
1794 }
1795
ath10k_wmi_wait_for_unified_ready(struct ath10k * ar)1796 int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
1797 {
1798 unsigned long time_left;
1799
1800 time_left = wait_for_completion_timeout(&ar->wmi.unified_ready,
1801 WMI_UNIFIED_READY_TIMEOUT_HZ);
1802 if (!time_left)
1803 return -ETIMEDOUT;
1804 return 0;
1805 }
1806
ath10k_wmi_alloc_skb(struct ath10k * ar,u32 len)1807 struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
1808 {
1809 struct sk_buff *skb;
1810 u32 round_len = roundup(len, 4);
1811
1812 skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
1813 if (!skb)
1814 return NULL;
1815
1816 skb_reserve(skb, WMI_SKB_HEADROOM);
1817 if (!IS_ALIGNED((unsigned long)skb->data, 4))
1818 ath10k_warn(ar, "Unaligned WMI skb\n");
1819
1820 skb_put(skb, round_len);
1821 memset(skb->data, 0, round_len);
1822
1823 return skb;
1824 }
1825
ath10k_wmi_htc_tx_complete(struct ath10k * ar,struct sk_buff * skb)1826 static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
1827 {
1828 dev_kfree_skb(skb);
1829 }
1830
ath10k_wmi_cmd_send_nowait(struct ath10k * ar,struct sk_buff * skb,u32 cmd_id)1831 int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
1832 u32 cmd_id)
1833 {
1834 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
1835 struct wmi_cmd_hdr *cmd_hdr;
1836 int ret;
1837 u32 cmd = 0;
1838
1839 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
1840 return -ENOMEM;
1841
1842 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
1843
1844 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
1845 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
1846
1847 memset(skb_cb, 0, sizeof(*skb_cb));
1848 trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len);
1849 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
1850
1851 if (ret)
1852 goto err_pull;
1853
1854 return 0;
1855
1856 err_pull:
1857 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
1858 return ret;
1859 }
1860
ath10k_wmi_tx_beacon_nowait(struct ath10k_vif * arvif)1861 static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
1862 {
1863 struct ath10k *ar = arvif->ar;
1864 struct ath10k_skb_cb *cb;
1865 struct sk_buff *bcn;
1866 bool dtim_zero;
1867 bool deliver_cab;
1868 int ret;
1869
1870 spin_lock_bh(&ar->data_lock);
1871
1872 bcn = arvif->beacon;
1873
1874 if (!bcn)
1875 goto unlock;
1876
1877 cb = ATH10K_SKB_CB(bcn);
1878
1879 switch (arvif->beacon_state) {
1880 case ATH10K_BEACON_SENDING:
1881 case ATH10K_BEACON_SENT:
1882 break;
1883 case ATH10K_BEACON_SCHEDULED:
1884 arvif->beacon_state = ATH10K_BEACON_SENDING;
1885 spin_unlock_bh(&ar->data_lock);
1886
1887 dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO);
1888 deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB);
1889 ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
1890 arvif->vdev_id,
1891 bcn->data, bcn->len,
1892 cb->paddr,
1893 dtim_zero,
1894 deliver_cab);
1895
1896 spin_lock_bh(&ar->data_lock);
1897
1898 if (ret == 0)
1899 arvif->beacon_state = ATH10K_BEACON_SENT;
1900 else
1901 arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
1902 }
1903
1904 unlock:
1905 spin_unlock_bh(&ar->data_lock);
1906 }
1907
ath10k_wmi_tx_beacons_iter(void * data,u8 * mac,struct ieee80211_vif * vif)1908 static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
1909 struct ieee80211_vif *vif)
1910 {
1911 struct ath10k_vif *arvif = (void *)vif->drv_priv;
1912
1913 ath10k_wmi_tx_beacon_nowait(arvif);
1914 }
1915
ath10k_wmi_tx_beacons_nowait(struct ath10k * ar)1916 static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
1917 {
1918 ieee80211_iterate_active_interfaces_atomic(ar->hw,
1919 ATH10K_ITER_NORMAL_FLAGS,
1920 ath10k_wmi_tx_beacons_iter,
1921 NULL);
1922 }
1923
ath10k_wmi_op_ep_tx_credits(struct ath10k * ar)1924 static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
1925 {
1926 /* try to send pending beacons first. they take priority */
1927 ath10k_wmi_tx_beacons_nowait(ar);
1928
1929 wake_up(&ar->wmi.tx_credits_wq);
1930 }
1931
ath10k_wmi_cmd_send(struct ath10k * ar,struct sk_buff * skb,u32 cmd_id)1932 int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
1933 {
1934 int ret = -EOPNOTSUPP;
1935
1936 might_sleep();
1937
1938 if (cmd_id == WMI_CMD_UNSUPPORTED) {
1939 ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
1940 cmd_id);
1941 dev_kfree_skb_any(skb);
1942 return ret;
1943 }
1944
1945 wait_event_timeout(ar->wmi.tx_credits_wq, ({
1946 if (ar->state == ATH10K_STATE_WEDGED) {
1947 ret = -ESHUTDOWN;
1948 ath10k_dbg(ar, ATH10K_DBG_WMI,
1949 "drop wmi command %d, hardware is wedged\n", cmd_id);
1950 }
1951 /* try to send pending beacons first. they take priority */
1952 ath10k_wmi_tx_beacons_nowait(ar);
1953
1954 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
1955
1956 if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
1957 ret = -ESHUTDOWN;
1958
1959 (ret != -EAGAIN);
1960 }), 3 * HZ);
1961
1962 if (ret)
1963 dev_kfree_skb_any(skb);
1964
1965 if (ret == -EAGAIN) {
1966 ath10k_warn(ar, "wmi command %d timeout, restarting hardware\n",
1967 cmd_id);
1968 ath10k_core_start_recovery(ar);
1969 }
1970
1971 return ret;
1972 }
1973
1974 static struct sk_buff *
ath10k_wmi_op_gen_mgmt_tx(struct ath10k * ar,struct sk_buff * msdu)1975 ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
1976 {
1977 struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu);
1978 struct ath10k_vif *arvif;
1979 struct wmi_mgmt_tx_cmd *cmd;
1980 struct ieee80211_hdr *hdr;
1981 struct sk_buff *skb;
1982 int len;
1983 u32 vdev_id;
1984 u32 buf_len = msdu->len;
1985 u16 fc;
1986 const u8 *peer_addr;
1987
1988 hdr = (struct ieee80211_hdr *)msdu->data;
1989 fc = le16_to_cpu(hdr->frame_control);
1990
1991 if (cb->vif) {
1992 arvif = (void *)cb->vif->drv_priv;
1993 vdev_id = arvif->vdev_id;
1994 } else {
1995 vdev_id = 0;
1996 }
1997
1998 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
1999 return ERR_PTR(-EINVAL);
2000
2001 len = sizeof(cmd->hdr) + msdu->len;
2002
2003 if ((ieee80211_is_action(hdr->frame_control) ||
2004 ieee80211_is_deauth(hdr->frame_control) ||
2005 ieee80211_is_disassoc(hdr->frame_control)) &&
2006 ieee80211_has_protected(hdr->frame_control)) {
2007 peer_addr = hdr->addr1;
2008 if (is_multicast_ether_addr(peer_addr)) {
2009 len += sizeof(struct ieee80211_mmie_16);
2010 buf_len += sizeof(struct ieee80211_mmie_16);
2011 } else {
2012 if (cb->ucast_cipher == WLAN_CIPHER_SUITE_GCMP ||
2013 cb->ucast_cipher == WLAN_CIPHER_SUITE_GCMP_256) {
2014 len += IEEE80211_GCMP_MIC_LEN;
2015 buf_len += IEEE80211_GCMP_MIC_LEN;
2016 } else {
2017 len += IEEE80211_CCMP_MIC_LEN;
2018 buf_len += IEEE80211_CCMP_MIC_LEN;
2019 }
2020 }
2021 }
2022
2023 len = round_up(len, 4);
2024
2025 skb = ath10k_wmi_alloc_skb(ar, len);
2026 if (!skb)
2027 return ERR_PTR(-ENOMEM);
2028
2029 cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
2030
2031 cmd->hdr.vdev_id = __cpu_to_le32(vdev_id);
2032 cmd->hdr.tx_rate = 0;
2033 cmd->hdr.tx_power = 0;
2034 cmd->hdr.buf_len = __cpu_to_le32(buf_len);
2035
2036 ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
2037 memcpy(cmd->buf, msdu->data, msdu->len);
2038
2039 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
2040 msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
2041 fc & IEEE80211_FCTL_STYPE);
2042 trace_ath10k_tx_hdr(ar, skb->data, skb->len);
2043 trace_ath10k_tx_payload(ar, skb->data, skb->len);
2044
2045 return skb;
2046 }
2047
ath10k_wmi_event_scan_started(struct ath10k * ar)2048 static void ath10k_wmi_event_scan_started(struct ath10k *ar)
2049 {
2050 lockdep_assert_held(&ar->data_lock);
2051
2052 switch (ar->scan.state) {
2053 case ATH10K_SCAN_IDLE:
2054 case ATH10K_SCAN_RUNNING:
2055 case ATH10K_SCAN_ABORTING:
2056 ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
2057 ath10k_scan_state_str(ar->scan.state),
2058 ar->scan.state);
2059 break;
2060 case ATH10K_SCAN_STARTING:
2061 ar->scan.state = ATH10K_SCAN_RUNNING;
2062
2063 if (ar->scan.is_roc)
2064 ieee80211_ready_on_channel(ar->hw);
2065
2066 complete(&ar->scan.started);
2067 break;
2068 }
2069 }
2070
ath10k_wmi_event_scan_start_failed(struct ath10k * ar)2071 static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
2072 {
2073 lockdep_assert_held(&ar->data_lock);
2074
2075 switch (ar->scan.state) {
2076 case ATH10K_SCAN_IDLE:
2077 case ATH10K_SCAN_RUNNING:
2078 case ATH10K_SCAN_ABORTING:
2079 ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
2080 ath10k_scan_state_str(ar->scan.state),
2081 ar->scan.state);
2082 break;
2083 case ATH10K_SCAN_STARTING:
2084 complete(&ar->scan.started);
2085 __ath10k_scan_finish(ar);
2086 break;
2087 }
2088 }
2089
ath10k_wmi_event_scan_completed(struct ath10k * ar)2090 static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
2091 {
2092 lockdep_assert_held(&ar->data_lock);
2093
2094 switch (ar->scan.state) {
2095 case ATH10K_SCAN_IDLE:
2096 case ATH10K_SCAN_STARTING:
2097 /* One suspected reason scan can be completed while starting is
2098 * if firmware fails to deliver all scan events to the host,
2099 * e.g. when transport pipe is full. This has been observed
2100 * with spectral scan phyerr events starving wmi transport
2101 * pipe. In such case the "scan completed" event should be (and
2102 * is) ignored by the host as it may be just firmware's scan
2103 * state machine recovering.
2104 */
2105 ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
2106 ath10k_scan_state_str(ar->scan.state),
2107 ar->scan.state);
2108 break;
2109 case ATH10K_SCAN_RUNNING:
2110 case ATH10K_SCAN_ABORTING:
2111 __ath10k_scan_finish(ar);
2112 break;
2113 }
2114 }
2115
ath10k_wmi_event_scan_bss_chan(struct ath10k * ar)2116 static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
2117 {
2118 lockdep_assert_held(&ar->data_lock);
2119
2120 switch (ar->scan.state) {
2121 case ATH10K_SCAN_IDLE:
2122 case ATH10K_SCAN_STARTING:
2123 ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
2124 ath10k_scan_state_str(ar->scan.state),
2125 ar->scan.state);
2126 break;
2127 case ATH10K_SCAN_RUNNING:
2128 case ATH10K_SCAN_ABORTING:
2129 ar->scan_channel = NULL;
2130 break;
2131 }
2132 }
2133
ath10k_wmi_event_scan_foreign_chan(struct ath10k * ar,u32 freq)2134 static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
2135 {
2136 lockdep_assert_held(&ar->data_lock);
2137
2138 switch (ar->scan.state) {
2139 case ATH10K_SCAN_IDLE:
2140 case ATH10K_SCAN_STARTING:
2141 ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
2142 ath10k_scan_state_str(ar->scan.state),
2143 ar->scan.state);
2144 break;
2145 case ATH10K_SCAN_RUNNING:
2146 case ATH10K_SCAN_ABORTING:
2147 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
2148
2149 if (ar->scan.is_roc && ar->scan.roc_freq == freq)
2150 complete(&ar->scan.on_channel);
2151 break;
2152 }
2153 }
2154
2155 static const char *
ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,enum wmi_scan_completion_reason reason)2156 ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
2157 enum wmi_scan_completion_reason reason)
2158 {
2159 switch (type) {
2160 case WMI_SCAN_EVENT_STARTED:
2161 return "started";
2162 case WMI_SCAN_EVENT_COMPLETED:
2163 switch (reason) {
2164 case WMI_SCAN_REASON_COMPLETED:
2165 return "completed";
2166 case WMI_SCAN_REASON_CANCELLED:
2167 return "completed [cancelled]";
2168 case WMI_SCAN_REASON_PREEMPTED:
2169 return "completed [preempted]";
2170 case WMI_SCAN_REASON_TIMEDOUT:
2171 return "completed [timedout]";
2172 case WMI_SCAN_REASON_INTERNAL_FAILURE:
2173 return "completed [internal err]";
2174 case WMI_SCAN_REASON_MAX:
2175 break;
2176 }
2177 return "completed [unknown]";
2178 case WMI_SCAN_EVENT_BSS_CHANNEL:
2179 return "bss channel";
2180 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
2181 return "foreign channel";
2182 case WMI_SCAN_EVENT_DEQUEUED:
2183 return "dequeued";
2184 case WMI_SCAN_EVENT_PREEMPTED:
2185 return "preempted";
2186 case WMI_SCAN_EVENT_START_FAILED:
2187 return "start failed";
2188 case WMI_SCAN_EVENT_RESTARTED:
2189 return "restarted";
2190 case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
2191 return "foreign channel exit";
2192 default:
2193 return "unknown";
2194 }
2195 }
2196
ath10k_wmi_op_pull_scan_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_scan_ev_arg * arg)2197 static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
2198 struct wmi_scan_ev_arg *arg)
2199 {
2200 struct wmi_scan_event *ev = (void *)skb->data;
2201
2202 if (skb->len < sizeof(*ev))
2203 return -EPROTO;
2204
2205 skb_pull(skb, sizeof(*ev));
2206 arg->event_type = ev->event_type;
2207 arg->reason = ev->reason;
2208 arg->channel_freq = ev->channel_freq;
2209 arg->scan_req_id = ev->scan_req_id;
2210 arg->scan_id = ev->scan_id;
2211 arg->vdev_id = ev->vdev_id;
2212
2213 return 0;
2214 }
2215
ath10k_wmi_event_scan(struct ath10k * ar,struct sk_buff * skb)2216 int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
2217 {
2218 struct wmi_scan_ev_arg arg = {};
2219 enum wmi_scan_event_type event_type;
2220 enum wmi_scan_completion_reason reason;
2221 u32 freq;
2222 u32 req_id;
2223 u32 scan_id;
2224 u32 vdev_id;
2225 int ret;
2226
2227 ret = ath10k_wmi_pull_scan(ar, skb, &arg);
2228 if (ret) {
2229 ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
2230 return ret;
2231 }
2232
2233 event_type = __le32_to_cpu(arg.event_type);
2234 reason = __le32_to_cpu(arg.reason);
2235 freq = __le32_to_cpu(arg.channel_freq);
2236 req_id = __le32_to_cpu(arg.scan_req_id);
2237 scan_id = __le32_to_cpu(arg.scan_id);
2238 vdev_id = __le32_to_cpu(arg.vdev_id);
2239
2240 spin_lock_bh(&ar->data_lock);
2241
2242 ath10k_dbg(ar, ATH10K_DBG_WMI,
2243 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
2244 ath10k_wmi_event_scan_type_str(event_type, reason),
2245 event_type, reason, freq, req_id, scan_id, vdev_id,
2246 ath10k_scan_state_str(ar->scan.state), ar->scan.state);
2247
2248 switch (event_type) {
2249 case WMI_SCAN_EVENT_STARTED:
2250 ath10k_wmi_event_scan_started(ar);
2251 break;
2252 case WMI_SCAN_EVENT_COMPLETED:
2253 ath10k_wmi_event_scan_completed(ar);
2254 break;
2255 case WMI_SCAN_EVENT_BSS_CHANNEL:
2256 ath10k_wmi_event_scan_bss_chan(ar);
2257 break;
2258 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
2259 ath10k_wmi_event_scan_foreign_chan(ar, freq);
2260 break;
2261 case WMI_SCAN_EVENT_START_FAILED:
2262 ath10k_warn(ar, "received scan start failure event\n");
2263 ath10k_wmi_event_scan_start_failed(ar);
2264 break;
2265 case WMI_SCAN_EVENT_DEQUEUED:
2266 case WMI_SCAN_EVENT_PREEMPTED:
2267 case WMI_SCAN_EVENT_RESTARTED:
2268 case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
2269 default:
2270 break;
2271 }
2272
2273 spin_unlock_bh(&ar->data_lock);
2274 return 0;
2275 }
2276
2277 /* If keys are configured, HW decrypts all frames
2278 * with protected bit set. Mark such frames as decrypted.
2279 */
ath10k_wmi_handle_wep_reauth(struct ath10k * ar,struct sk_buff * skb,struct ieee80211_rx_status * status)2280 static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
2281 struct sk_buff *skb,
2282 struct ieee80211_rx_status *status)
2283 {
2284 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2285 unsigned int hdrlen;
2286 bool peer_key;
2287 u8 *addr, keyidx;
2288
2289 if (!ieee80211_is_auth(hdr->frame_control) ||
2290 !ieee80211_has_protected(hdr->frame_control))
2291 return;
2292
2293 hdrlen = ieee80211_hdrlen(hdr->frame_control);
2294 if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
2295 return;
2296
2297 keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
2298 addr = ieee80211_get_SA(hdr);
2299
2300 spin_lock_bh(&ar->data_lock);
2301 peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
2302 spin_unlock_bh(&ar->data_lock);
2303
2304 if (peer_key) {
2305 ath10k_dbg(ar, ATH10K_DBG_MAC,
2306 "mac wep key present for peer %pM\n", addr);
2307 status->flag |= RX_FLAG_DECRYPTED;
2308 }
2309 }
2310
ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_mgmt_rx_ev_arg * arg)2311 static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
2312 struct wmi_mgmt_rx_ev_arg *arg)
2313 {
2314 struct wmi_mgmt_rx_event_v1 *ev_v1;
2315 struct wmi_mgmt_rx_event_v2 *ev_v2;
2316 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
2317 struct wmi_mgmt_rx_ext_info *ext_info;
2318 size_t pull_len;
2319 u32 msdu_len;
2320 u32 len;
2321
2322 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX,
2323 ar->running_fw->fw_file.fw_features)) {
2324 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
2325 ev_hdr = &ev_v2->hdr.v1;
2326 pull_len = sizeof(*ev_v2);
2327 } else {
2328 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
2329 ev_hdr = &ev_v1->hdr;
2330 pull_len = sizeof(*ev_v1);
2331 }
2332
2333 if (skb->len < pull_len)
2334 return -EPROTO;
2335
2336 skb_pull(skb, pull_len);
2337 arg->channel = ev_hdr->channel;
2338 arg->buf_len = ev_hdr->buf_len;
2339 arg->status = ev_hdr->status;
2340 arg->snr = ev_hdr->snr;
2341 arg->phy_mode = ev_hdr->phy_mode;
2342 arg->rate = ev_hdr->rate;
2343
2344 msdu_len = __le32_to_cpu(arg->buf_len);
2345 if (skb->len < msdu_len)
2346 return -EPROTO;
2347
2348 if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
2349 len = ALIGN(le32_to_cpu(arg->buf_len), 4);
2350 ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
2351 memcpy(&arg->ext_info, ext_info,
2352 sizeof(struct wmi_mgmt_rx_ext_info));
2353 }
2354 /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
2355 * trailer with credit update. Trim the excess garbage.
2356 */
2357 skb_trim(skb, msdu_len);
2358
2359 return 0;
2360 }
2361
ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_mgmt_rx_ev_arg * arg)2362 static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar,
2363 struct sk_buff *skb,
2364 struct wmi_mgmt_rx_ev_arg *arg)
2365 {
2366 struct wmi_10_4_mgmt_rx_event *ev;
2367 struct wmi_10_4_mgmt_rx_hdr *ev_hdr;
2368 size_t pull_len;
2369 u32 msdu_len;
2370 struct wmi_mgmt_rx_ext_info *ext_info;
2371 u32 len;
2372
2373 ev = (struct wmi_10_4_mgmt_rx_event *)skb->data;
2374 ev_hdr = &ev->hdr;
2375 pull_len = sizeof(*ev);
2376
2377 if (skb->len < pull_len)
2378 return -EPROTO;
2379
2380 skb_pull(skb, pull_len);
2381 arg->channel = ev_hdr->channel;
2382 arg->buf_len = ev_hdr->buf_len;
2383 arg->status = ev_hdr->status;
2384 arg->snr = ev_hdr->snr;
2385 arg->phy_mode = ev_hdr->phy_mode;
2386 arg->rate = ev_hdr->rate;
2387
2388 msdu_len = __le32_to_cpu(arg->buf_len);
2389 if (skb->len < msdu_len)
2390 return -EPROTO;
2391
2392 if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
2393 len = ALIGN(le32_to_cpu(arg->buf_len), 4);
2394 ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
2395 memcpy(&arg->ext_info, ext_info,
2396 sizeof(struct wmi_mgmt_rx_ext_info));
2397 }
2398
2399 /* Make sure bytes added for padding are removed. */
2400 skb_trim(skb, msdu_len);
2401
2402 return 0;
2403 }
2404
ath10k_wmi_rx_is_decrypted(struct ath10k * ar,struct ieee80211_hdr * hdr)2405 static bool ath10k_wmi_rx_is_decrypted(struct ath10k *ar,
2406 struct ieee80211_hdr *hdr)
2407 {
2408 if (!ieee80211_has_protected(hdr->frame_control))
2409 return false;
2410
2411 /* FW delivers WEP Shared Auth frame with Protected Bit set and
2412 * encrypted payload. However in case of PMF it delivers decrypted
2413 * frames with Protected Bit set.
2414 */
2415 if (ieee80211_is_auth(hdr->frame_control))
2416 return false;
2417
2418 /* qca99x0 based FW delivers broadcast or multicast management frames
2419 * (ex: group privacy action frames in mesh) as encrypted payload.
2420 */
2421 if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) &&
2422 ar->hw_params.sw_decrypt_mcast_mgmt)
2423 return false;
2424
2425 return true;
2426 }
2427
2428 static int
wmi_process_mgmt_tx_comp(struct ath10k * ar,struct mgmt_tx_compl_params * param)2429 wmi_process_mgmt_tx_comp(struct ath10k *ar, struct mgmt_tx_compl_params *param)
2430 {
2431 struct ath10k_mgmt_tx_pkt_addr *pkt_addr;
2432 struct ath10k_wmi *wmi = &ar->wmi;
2433 struct ieee80211_tx_info *info;
2434 struct sk_buff *msdu;
2435 int ret;
2436
2437 spin_lock_bh(&ar->data_lock);
2438
2439 pkt_addr = idr_find(&wmi->mgmt_pending_tx, param->desc_id);
2440 if (!pkt_addr) {
2441 ath10k_warn(ar, "received mgmt tx completion for invalid msdu_id: %d\n",
2442 param->desc_id);
2443 ret = -ENOENT;
2444 goto out;
2445 }
2446
2447 msdu = pkt_addr->vaddr;
2448 dma_unmap_single(ar->dev, pkt_addr->paddr,
2449 msdu->len, DMA_TO_DEVICE);
2450 info = IEEE80211_SKB_CB(msdu);
2451 kfree(pkt_addr);
2452
2453 if (param->status) {
2454 info->flags &= ~IEEE80211_TX_STAT_ACK;
2455 } else {
2456 info->flags |= IEEE80211_TX_STAT_ACK;
2457 info->status.ack_signal = ATH10K_DEFAULT_NOISE_FLOOR +
2458 param->ack_rssi;
2459 info->status.flags |= IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;
2460 }
2461
2462 ieee80211_tx_status_irqsafe(ar->hw, msdu);
2463
2464 ret = 0;
2465
2466 out:
2467 idr_remove(&wmi->mgmt_pending_tx, param->desc_id);
2468 spin_unlock_bh(&ar->data_lock);
2469 return ret;
2470 }
2471
ath10k_wmi_event_mgmt_tx_compl(struct ath10k * ar,struct sk_buff * skb)2472 int ath10k_wmi_event_mgmt_tx_compl(struct ath10k *ar, struct sk_buff *skb)
2473 {
2474 struct wmi_tlv_mgmt_tx_compl_ev_arg arg;
2475 struct mgmt_tx_compl_params param;
2476 int ret;
2477
2478 ret = ath10k_wmi_pull_mgmt_tx_compl(ar, skb, &arg);
2479 if (ret) {
2480 ath10k_warn(ar, "failed to parse mgmt comp event: %d\n", ret);
2481 return ret;
2482 }
2483
2484 memset(¶m, 0, sizeof(struct mgmt_tx_compl_params));
2485 param.desc_id = __le32_to_cpu(arg.desc_id);
2486 param.status = __le32_to_cpu(arg.status);
2487
2488 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, ar->wmi.svc_map))
2489 param.ack_rssi = __le32_to_cpu(arg.ack_rssi);
2490
2491 wmi_process_mgmt_tx_comp(ar, ¶m);
2492
2493 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi tlv evnt mgmt tx completion\n");
2494
2495 return 0;
2496 }
2497
ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k * ar,struct sk_buff * skb)2498 int ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k *ar, struct sk_buff *skb)
2499 {
2500 struct wmi_tlv_mgmt_tx_bundle_compl_ev_arg arg;
2501 struct mgmt_tx_compl_params param;
2502 u32 num_reports;
2503 int i, ret;
2504
2505 ret = ath10k_wmi_pull_mgmt_tx_bundle_compl(ar, skb, &arg);
2506 if (ret) {
2507 ath10k_warn(ar, "failed to parse bundle mgmt compl event: %d\n", ret);
2508 return ret;
2509 }
2510
2511 num_reports = __le32_to_cpu(arg.num_reports);
2512
2513 for (i = 0; i < num_reports; i++) {
2514 memset(¶m, 0, sizeof(struct mgmt_tx_compl_params));
2515 param.desc_id = __le32_to_cpu(arg.desc_ids[i]);
2516 param.status = __le32_to_cpu(arg.desc_ids[i]);
2517
2518 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, ar->wmi.svc_map))
2519 param.ack_rssi = __le32_to_cpu(arg.ack_rssi[i]);
2520 wmi_process_mgmt_tx_comp(ar, ¶m);
2521 }
2522
2523 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi tlv event bundle mgmt tx completion\n");
2524
2525 return 0;
2526 }
2527
ath10k_wmi_event_mgmt_rx(struct ath10k * ar,struct sk_buff * skb)2528 int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
2529 {
2530 struct wmi_mgmt_rx_ev_arg arg = {};
2531 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
2532 struct ieee80211_hdr *hdr;
2533 struct ieee80211_supported_band *sband;
2534 u32 rx_status;
2535 u32 channel;
2536 u32 phy_mode;
2537 u32 snr, rssi;
2538 u32 rate;
2539 u16 fc;
2540 int ret, i;
2541
2542 ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
2543 if (ret) {
2544 ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
2545 dev_kfree_skb(skb);
2546 return ret;
2547 }
2548
2549 channel = __le32_to_cpu(arg.channel);
2550 rx_status = __le32_to_cpu(arg.status);
2551 snr = __le32_to_cpu(arg.snr);
2552 phy_mode = __le32_to_cpu(arg.phy_mode);
2553 rate = __le32_to_cpu(arg.rate);
2554
2555 memset(status, 0, sizeof(*status));
2556
2557 ath10k_dbg(ar, ATH10K_DBG_MGMT,
2558 "event mgmt rx status %08x\n", rx_status);
2559
2560 if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) ||
2561 (rx_status & (WMI_RX_STATUS_ERR_DECRYPT |
2562 WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) {
2563 dev_kfree_skb(skb);
2564 return 0;
2565 }
2566
2567 if (rx_status & WMI_RX_STATUS_ERR_MIC)
2568 status->flag |= RX_FLAG_MMIC_ERROR;
2569
2570 if (rx_status & WMI_RX_STATUS_EXT_INFO) {
2571 status->mactime =
2572 __le64_to_cpu(arg.ext_info.rx_mac_timestamp);
2573 status->flag |= RX_FLAG_MACTIME_END;
2574 }
2575 /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
2576 * MODE_11B. This means phy_mode is not a reliable source for the band
2577 * of mgmt rx.
2578 */
2579 if (channel >= 1 && channel <= 14) {
2580 status->band = NL80211_BAND_2GHZ;
2581 } else if (channel >= 36 && channel <= ATH10K_MAX_5G_CHAN) {
2582 status->band = NL80211_BAND_5GHZ;
2583 } else {
2584 /* Shouldn't happen unless list of advertised channels to
2585 * mac80211 has been changed.
2586 */
2587 WARN_ON_ONCE(1);
2588 dev_kfree_skb(skb);
2589 return 0;
2590 }
2591
2592 if (phy_mode == MODE_11B && status->band == NL80211_BAND_5GHZ)
2593 ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
2594
2595 sband = &ar->mac.sbands[status->band];
2596
2597 status->freq = ieee80211_channel_to_frequency(channel, status->band);
2598 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
2599
2600 BUILD_BUG_ON(ARRAY_SIZE(status->chain_signal) != ARRAY_SIZE(arg.rssi));
2601
2602 for (i = 0; i < ARRAY_SIZE(status->chain_signal); i++) {
2603 status->chains &= ~BIT(i);
2604 rssi = __le32_to_cpu(arg.rssi[i]);
2605 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt rssi[%d]:%d\n", i, arg.rssi[i]);
2606
2607 if (rssi != ATH10K_INVALID_RSSI && rssi != 0) {
2608 status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR + rssi;
2609 status->chains |= BIT(i);
2610 }
2611 }
2612
2613 status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100);
2614
2615 hdr = (struct ieee80211_hdr *)skb->data;
2616 fc = le16_to_cpu(hdr->frame_control);
2617
2618 /* Firmware is guaranteed to report all essential management frames via
2619 * WMI while it can deliver some extra via HTT. Since there can be
2620 * duplicates split the reporting wrt monitor/sniffing.
2621 */
2622 status->flag |= RX_FLAG_SKIP_MONITOR;
2623
2624 ath10k_wmi_handle_wep_reauth(ar, skb, status);
2625
2626 if (ath10k_wmi_rx_is_decrypted(ar, hdr)) {
2627 status->flag |= RX_FLAG_DECRYPTED;
2628
2629 if (!ieee80211_is_action(hdr->frame_control) &&
2630 !ieee80211_is_deauth(hdr->frame_control) &&
2631 !ieee80211_is_disassoc(hdr->frame_control)) {
2632 status->flag |= RX_FLAG_IV_STRIPPED |
2633 RX_FLAG_MMIC_STRIPPED;
2634 hdr->frame_control = __cpu_to_le16(fc &
2635 ~IEEE80211_FCTL_PROTECTED);
2636 }
2637 }
2638
2639 if (ieee80211_is_beacon(hdr->frame_control))
2640 ath10k_mac_handle_beacon(ar, skb);
2641
2642 if (ieee80211_is_beacon(hdr->frame_control) ||
2643 ieee80211_is_probe_resp(hdr->frame_control))
2644 status->boottime_ns = ktime_get_boottime_ns();
2645
2646 ath10k_dbg(ar, ATH10K_DBG_MGMT,
2647 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
2648 skb, skb->len,
2649 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
2650
2651 ath10k_dbg(ar, ATH10K_DBG_MGMT,
2652 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
2653 status->freq, status->band, status->signal,
2654 status->rate_idx);
2655
2656 ieee80211_rx_ni(ar->hw, skb);
2657
2658 return 0;
2659 }
2660
freq_to_idx(struct ath10k * ar,int freq)2661 static int freq_to_idx(struct ath10k *ar, int freq)
2662 {
2663 struct ieee80211_supported_band *sband;
2664 int band, ch, idx = 0;
2665
2666 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
2667 sband = ar->hw->wiphy->bands[band];
2668 if (!sband)
2669 continue;
2670
2671 for (ch = 0; ch < sband->n_channels; ch++, idx++)
2672 if (sband->channels[ch].center_freq == freq)
2673 goto exit;
2674 }
2675
2676 exit:
2677 return idx;
2678 }
2679
ath10k_wmi_op_pull_ch_info_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_ch_info_ev_arg * arg)2680 static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
2681 struct wmi_ch_info_ev_arg *arg)
2682 {
2683 struct wmi_chan_info_event *ev = (void *)skb->data;
2684
2685 if (skb->len < sizeof(*ev))
2686 return -EPROTO;
2687
2688 skb_pull(skb, sizeof(*ev));
2689 arg->err_code = ev->err_code;
2690 arg->freq = ev->freq;
2691 arg->cmd_flags = ev->cmd_flags;
2692 arg->noise_floor = ev->noise_floor;
2693 arg->rx_clear_count = ev->rx_clear_count;
2694 arg->cycle_count = ev->cycle_count;
2695
2696 return 0;
2697 }
2698
ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_ch_info_ev_arg * arg)2699 static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar,
2700 struct sk_buff *skb,
2701 struct wmi_ch_info_ev_arg *arg)
2702 {
2703 struct wmi_10_4_chan_info_event *ev = (void *)skb->data;
2704
2705 if (skb->len < sizeof(*ev))
2706 return -EPROTO;
2707
2708 skb_pull(skb, sizeof(*ev));
2709 arg->err_code = ev->err_code;
2710 arg->freq = ev->freq;
2711 arg->cmd_flags = ev->cmd_flags;
2712 arg->noise_floor = ev->noise_floor;
2713 arg->rx_clear_count = ev->rx_clear_count;
2714 arg->cycle_count = ev->cycle_count;
2715 arg->chan_tx_pwr_range = ev->chan_tx_pwr_range;
2716 arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
2717 arg->rx_frame_count = ev->rx_frame_count;
2718
2719 return 0;
2720 }
2721
2722 /*
2723 * Handle the channel info event for firmware which only sends one
2724 * chan_info event per scanned channel.
2725 */
ath10k_wmi_event_chan_info_unpaired(struct ath10k * ar,struct chan_info_params * params)2726 static void ath10k_wmi_event_chan_info_unpaired(struct ath10k *ar,
2727 struct chan_info_params *params)
2728 {
2729 struct survey_info *survey;
2730 int idx;
2731
2732 if (params->cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
2733 ath10k_dbg(ar, ATH10K_DBG_WMI, "chan info report completed\n");
2734 return;
2735 }
2736
2737 idx = freq_to_idx(ar, params->freq);
2738 if (idx >= ARRAY_SIZE(ar->survey)) {
2739 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
2740 params->freq, idx);
2741 return;
2742 }
2743
2744 survey = &ar->survey[idx];
2745
2746 if (!params->mac_clk_mhz)
2747 return;
2748
2749 memset(survey, 0, sizeof(*survey));
2750
2751 survey->noise = params->noise_floor;
2752 survey->time = (params->cycle_count / params->mac_clk_mhz) / 1000;
2753 survey->time_busy = (params->rx_clear_count / params->mac_clk_mhz) / 1000;
2754 survey->filled |= SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME |
2755 SURVEY_INFO_TIME_BUSY;
2756 }
2757
2758 /*
2759 * Handle the channel info event for firmware which sends chan_info
2760 * event in pairs(start and stop events) for every scanned channel.
2761 */
ath10k_wmi_event_chan_info_paired(struct ath10k * ar,struct chan_info_params * params)2762 static void ath10k_wmi_event_chan_info_paired(struct ath10k *ar,
2763 struct chan_info_params *params)
2764 {
2765 struct survey_info *survey;
2766 int idx;
2767
2768 idx = freq_to_idx(ar, params->freq);
2769 if (idx >= ARRAY_SIZE(ar->survey)) {
2770 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
2771 params->freq, idx);
2772 return;
2773 }
2774
2775 if (params->cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
2776 if (ar->ch_info_can_report_survey) {
2777 survey = &ar->survey[idx];
2778 survey->noise = params->noise_floor;
2779 survey->filled = SURVEY_INFO_NOISE_DBM;
2780
2781 ath10k_hw_fill_survey_time(ar,
2782 survey,
2783 params->cycle_count,
2784 params->rx_clear_count,
2785 ar->survey_last_cycle_count,
2786 ar->survey_last_rx_clear_count);
2787 }
2788
2789 ar->ch_info_can_report_survey = false;
2790 } else {
2791 ar->ch_info_can_report_survey = true;
2792 }
2793
2794 if (!(params->cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
2795 ar->survey_last_rx_clear_count = params->rx_clear_count;
2796 ar->survey_last_cycle_count = params->cycle_count;
2797 }
2798 }
2799
ath10k_wmi_event_chan_info(struct ath10k * ar,struct sk_buff * skb)2800 void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
2801 {
2802 struct chan_info_params ch_info_param;
2803 struct wmi_ch_info_ev_arg arg = {};
2804 int ret;
2805
2806 ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
2807 if (ret) {
2808 ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
2809 return;
2810 }
2811
2812 ch_info_param.err_code = __le32_to_cpu(arg.err_code);
2813 ch_info_param.freq = __le32_to_cpu(arg.freq);
2814 ch_info_param.cmd_flags = __le32_to_cpu(arg.cmd_flags);
2815 ch_info_param.noise_floor = __le32_to_cpu(arg.noise_floor);
2816 ch_info_param.rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
2817 ch_info_param.cycle_count = __le32_to_cpu(arg.cycle_count);
2818 ch_info_param.mac_clk_mhz = __le32_to_cpu(arg.mac_clk_mhz);
2819
2820 ath10k_dbg(ar, ATH10K_DBG_WMI,
2821 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
2822 ch_info_param.err_code, ch_info_param.freq, ch_info_param.cmd_flags,
2823 ch_info_param.noise_floor, ch_info_param.rx_clear_count,
2824 ch_info_param.cycle_count);
2825
2826 spin_lock_bh(&ar->data_lock);
2827
2828 switch (ar->scan.state) {
2829 case ATH10K_SCAN_IDLE:
2830 case ATH10K_SCAN_STARTING:
2831 ath10k_dbg(ar, ATH10K_DBG_WMI, "received chan info event without a scan request, ignoring\n");
2832 goto exit;
2833 case ATH10K_SCAN_RUNNING:
2834 case ATH10K_SCAN_ABORTING:
2835 break;
2836 }
2837
2838 if (test_bit(ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL,
2839 ar->running_fw->fw_file.fw_features))
2840 ath10k_wmi_event_chan_info_unpaired(ar, &ch_info_param);
2841 else
2842 ath10k_wmi_event_chan_info_paired(ar, &ch_info_param);
2843
2844 exit:
2845 spin_unlock_bh(&ar->data_lock);
2846 }
2847
ath10k_wmi_event_echo(struct ath10k * ar,struct sk_buff * skb)2848 void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
2849 {
2850 struct wmi_echo_ev_arg arg = {};
2851 int ret;
2852
2853 ret = ath10k_wmi_pull_echo_ev(ar, skb, &arg);
2854 if (ret) {
2855 ath10k_warn(ar, "failed to parse echo: %d\n", ret);
2856 return;
2857 }
2858
2859 ath10k_dbg(ar, ATH10K_DBG_WMI,
2860 "wmi event echo value 0x%08x\n",
2861 le32_to_cpu(arg.value));
2862
2863 if (le32_to_cpu(arg.value) == ATH10K_WMI_BARRIER_ECHO_ID)
2864 complete(&ar->wmi.barrier);
2865 }
2866
ath10k_wmi_event_debug_mesg(struct ath10k * ar,struct sk_buff * skb)2867 int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
2868 {
2869 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
2870 skb->len);
2871
2872 trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
2873
2874 return 0;
2875 }
2876
ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base * src,struct ath10k_fw_stats_pdev * dst)2877 void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
2878 struct ath10k_fw_stats_pdev *dst)
2879 {
2880 dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
2881 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
2882 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
2883 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
2884 dst->cycle_count = __le32_to_cpu(src->cycle_count);
2885 dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
2886 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
2887 }
2888
ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx * src,struct ath10k_fw_stats_pdev * dst)2889 void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
2890 struct ath10k_fw_stats_pdev *dst)
2891 {
2892 dst->comp_queued = __le32_to_cpu(src->comp_queued);
2893 dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
2894 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
2895 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
2896 dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
2897 dst->local_enqued = __le32_to_cpu(src->local_enqued);
2898 dst->local_freed = __le32_to_cpu(src->local_freed);
2899 dst->hw_queued = __le32_to_cpu(src->hw_queued);
2900 dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
2901 dst->underrun = __le32_to_cpu(src->underrun);
2902 dst->tx_abort = __le32_to_cpu(src->tx_abort);
2903 dst->mpdus_requeued = __le32_to_cpu(src->mpdus_requeued);
2904 dst->tx_ko = __le32_to_cpu(src->tx_ko);
2905 dst->data_rc = __le32_to_cpu(src->data_rc);
2906 dst->self_triggers = __le32_to_cpu(src->self_triggers);
2907 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
2908 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
2909 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
2910 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
2911 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
2912 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
2913 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
2914 }
2915
2916 static void
ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx * src,struct ath10k_fw_stats_pdev * dst)2917 ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src,
2918 struct ath10k_fw_stats_pdev *dst)
2919 {
2920 dst->comp_queued = __le32_to_cpu(src->comp_queued);
2921 dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
2922 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
2923 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
2924 dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
2925 dst->local_enqued = __le32_to_cpu(src->local_enqued);
2926 dst->local_freed = __le32_to_cpu(src->local_freed);
2927 dst->hw_queued = __le32_to_cpu(src->hw_queued);
2928 dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
2929 dst->underrun = __le32_to_cpu(src->underrun);
2930 dst->tx_abort = __le32_to_cpu(src->tx_abort);
2931 dst->mpdus_requeued = __le32_to_cpu(src->mpdus_requeued);
2932 dst->tx_ko = __le32_to_cpu(src->tx_ko);
2933 dst->data_rc = __le32_to_cpu(src->data_rc);
2934 dst->self_triggers = __le32_to_cpu(src->self_triggers);
2935 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
2936 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
2937 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
2938 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
2939 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
2940 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
2941 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
2942 dst->hw_paused = __le32_to_cpu(src->hw_paused);
2943 dst->seq_posted = __le32_to_cpu(src->seq_posted);
2944 dst->seq_failed_queueing =
2945 __le32_to_cpu(src->seq_failed_queueing);
2946 dst->seq_completed = __le32_to_cpu(src->seq_completed);
2947 dst->seq_restarted = __le32_to_cpu(src->seq_restarted);
2948 dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted);
2949 dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush);
2950 dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
2951 dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated);
2952 dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed);
2953 dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
2954 dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired);
2955 }
2956
ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx * src,struct ath10k_fw_stats_pdev * dst)2957 void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
2958 struct ath10k_fw_stats_pdev *dst)
2959 {
2960 dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
2961 dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
2962 dst->r0_frags = __le32_to_cpu(src->r0_frags);
2963 dst->r1_frags = __le32_to_cpu(src->r1_frags);
2964 dst->r2_frags = __le32_to_cpu(src->r2_frags);
2965 dst->r3_frags = __le32_to_cpu(src->r3_frags);
2966 dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
2967 dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
2968 dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
2969 dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
2970 dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
2971 dst->phy_errs = __le32_to_cpu(src->phy_errs);
2972 dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
2973 dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
2974 }
2975
ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra * src,struct ath10k_fw_stats_pdev * dst)2976 void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
2977 struct ath10k_fw_stats_pdev *dst)
2978 {
2979 dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
2980 dst->rts_bad = __le32_to_cpu(src->rts_bad);
2981 dst->rts_good = __le32_to_cpu(src->rts_good);
2982 dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
2983 dst->no_beacons = __le32_to_cpu(src->no_beacons);
2984 dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
2985 }
2986
ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats * src,struct ath10k_fw_stats_peer * dst)2987 void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
2988 struct ath10k_fw_stats_peer *dst)
2989 {
2990 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
2991 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
2992 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
2993 }
2994
2995 static void
ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats * src,struct ath10k_fw_stats_peer * dst)2996 ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src,
2997 struct ath10k_fw_stats_peer *dst)
2998 {
2999 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
3000 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
3001 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
3002 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
3003 }
3004
3005 static void
ath10k_wmi_10_4_pull_vdev_stats(const struct wmi_vdev_stats_extd * src,struct ath10k_fw_stats_vdev_extd * dst)3006 ath10k_wmi_10_4_pull_vdev_stats(const struct wmi_vdev_stats_extd *src,
3007 struct ath10k_fw_stats_vdev_extd *dst)
3008 {
3009 dst->vdev_id = __le32_to_cpu(src->vdev_id);
3010 dst->ppdu_aggr_cnt = __le32_to_cpu(src->ppdu_aggr_cnt);
3011 dst->ppdu_noack = __le32_to_cpu(src->ppdu_noack);
3012 dst->mpdu_queued = __le32_to_cpu(src->mpdu_queued);
3013 dst->ppdu_nonaggr_cnt = __le32_to_cpu(src->ppdu_nonaggr_cnt);
3014 dst->mpdu_sw_requeued = __le32_to_cpu(src->mpdu_sw_requeued);
3015 dst->mpdu_suc_retry = __le32_to_cpu(src->mpdu_suc_retry);
3016 dst->mpdu_suc_multitry = __le32_to_cpu(src->mpdu_suc_multitry);
3017 dst->mpdu_fail_retry = __le32_to_cpu(src->mpdu_fail_retry);
3018 dst->tx_ftm_suc = __le32_to_cpu(src->tx_ftm_suc);
3019 dst->tx_ftm_suc_retry = __le32_to_cpu(src->tx_ftm_suc_retry);
3020 dst->tx_ftm_fail = __le32_to_cpu(src->tx_ftm_fail);
3021 dst->rx_ftmr_cnt = __le32_to_cpu(src->rx_ftmr_cnt);
3022 dst->rx_ftmr_dup_cnt = __le32_to_cpu(src->rx_ftmr_dup_cnt);
3023 dst->rx_iftmr_cnt = __le32_to_cpu(src->rx_iftmr_cnt);
3024 dst->rx_iftmr_dup_cnt = __le32_to_cpu(src->rx_iftmr_dup_cnt);
3025 }
3026
ath10k_wmi_main_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3027 static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
3028 struct sk_buff *skb,
3029 struct ath10k_fw_stats *stats)
3030 {
3031 const struct wmi_stats_event *ev = (void *)skb->data;
3032 u32 num_pdev_stats, num_peer_stats;
3033 int i;
3034
3035 if (!skb_pull(skb, sizeof(*ev)))
3036 return -EPROTO;
3037
3038 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3039 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3040
3041 for (i = 0; i < num_pdev_stats; i++) {
3042 const struct wmi_pdev_stats *src;
3043 struct ath10k_fw_stats_pdev *dst;
3044
3045 src = (void *)skb->data;
3046 if (!skb_pull(skb, sizeof(*src)))
3047 return -EPROTO;
3048
3049 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3050 if (!dst)
3051 continue;
3052
3053 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3054 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3055 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3056
3057 list_add_tail(&dst->list, &stats->pdevs);
3058 }
3059
3060 /* fw doesn't implement vdev stats */
3061
3062 for (i = 0; i < num_peer_stats; i++) {
3063 const struct wmi_peer_stats *src;
3064 struct ath10k_fw_stats_peer *dst;
3065
3066 src = (void *)skb->data;
3067 if (!skb_pull(skb, sizeof(*src)))
3068 return -EPROTO;
3069
3070 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3071 if (!dst)
3072 continue;
3073
3074 ath10k_wmi_pull_peer_stats(src, dst);
3075 list_add_tail(&dst->list, &stats->peers);
3076 }
3077
3078 return 0;
3079 }
3080
ath10k_wmi_10x_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3081 static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
3082 struct sk_buff *skb,
3083 struct ath10k_fw_stats *stats)
3084 {
3085 const struct wmi_stats_event *ev = (void *)skb->data;
3086 u32 num_pdev_stats, num_peer_stats;
3087 int i;
3088
3089 if (!skb_pull(skb, sizeof(*ev)))
3090 return -EPROTO;
3091
3092 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3093 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3094
3095 for (i = 0; i < num_pdev_stats; i++) {
3096 const struct wmi_10x_pdev_stats *src;
3097 struct ath10k_fw_stats_pdev *dst;
3098
3099 src = (void *)skb->data;
3100 if (!skb_pull(skb, sizeof(*src)))
3101 return -EPROTO;
3102
3103 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3104 if (!dst)
3105 continue;
3106
3107 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3108 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3109 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3110 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3111
3112 list_add_tail(&dst->list, &stats->pdevs);
3113 }
3114
3115 /* fw doesn't implement vdev stats */
3116
3117 for (i = 0; i < num_peer_stats; i++) {
3118 const struct wmi_10x_peer_stats *src;
3119 struct ath10k_fw_stats_peer *dst;
3120
3121 src = (void *)skb->data;
3122 if (!skb_pull(skb, sizeof(*src)))
3123 return -EPROTO;
3124
3125 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3126 if (!dst)
3127 continue;
3128
3129 ath10k_wmi_pull_peer_stats(&src->old, dst);
3130
3131 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
3132
3133 list_add_tail(&dst->list, &stats->peers);
3134 }
3135
3136 return 0;
3137 }
3138
ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3139 static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
3140 struct sk_buff *skb,
3141 struct ath10k_fw_stats *stats)
3142 {
3143 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
3144 u32 num_pdev_stats;
3145 u32 num_pdev_ext_stats;
3146 u32 num_peer_stats;
3147 int i;
3148
3149 if (!skb_pull(skb, sizeof(*ev)))
3150 return -EPROTO;
3151
3152 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3153 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
3154 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3155
3156 for (i = 0; i < num_pdev_stats; i++) {
3157 const struct wmi_10_2_pdev_stats *src;
3158 struct ath10k_fw_stats_pdev *dst;
3159
3160 src = (void *)skb->data;
3161 if (!skb_pull(skb, sizeof(*src)))
3162 return -EPROTO;
3163
3164 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3165 if (!dst)
3166 continue;
3167
3168 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3169 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3170 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3171 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3172 /* FIXME: expose 10.2 specific values */
3173
3174 list_add_tail(&dst->list, &stats->pdevs);
3175 }
3176
3177 for (i = 0; i < num_pdev_ext_stats; i++) {
3178 const struct wmi_10_2_pdev_ext_stats *src;
3179
3180 src = (void *)skb->data;
3181 if (!skb_pull(skb, sizeof(*src)))
3182 return -EPROTO;
3183
3184 /* FIXME: expose values to userspace
3185 *
3186 * Note: Even though this loop seems to do nothing it is
3187 * required to parse following sub-structures properly.
3188 */
3189 }
3190
3191 /* fw doesn't implement vdev stats */
3192
3193 for (i = 0; i < num_peer_stats; i++) {
3194 const struct wmi_10_2_peer_stats *src;
3195 struct ath10k_fw_stats_peer *dst;
3196
3197 src = (void *)skb->data;
3198 if (!skb_pull(skb, sizeof(*src)))
3199 return -EPROTO;
3200
3201 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3202 if (!dst)
3203 continue;
3204
3205 ath10k_wmi_pull_peer_stats(&src->old, dst);
3206
3207 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
3208 /* FIXME: expose 10.2 specific values */
3209
3210 list_add_tail(&dst->list, &stats->peers);
3211 }
3212
3213 return 0;
3214 }
3215
ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3216 static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
3217 struct sk_buff *skb,
3218 struct ath10k_fw_stats *stats)
3219 {
3220 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
3221 u32 num_pdev_stats;
3222 u32 num_pdev_ext_stats;
3223 u32 num_peer_stats;
3224 int i;
3225
3226 if (!skb_pull(skb, sizeof(*ev)))
3227 return -EPROTO;
3228
3229 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3230 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
3231 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3232
3233 for (i = 0; i < num_pdev_stats; i++) {
3234 const struct wmi_10_2_pdev_stats *src;
3235 struct ath10k_fw_stats_pdev *dst;
3236
3237 src = (void *)skb->data;
3238 if (!skb_pull(skb, sizeof(*src)))
3239 return -EPROTO;
3240
3241 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3242 if (!dst)
3243 continue;
3244
3245 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3246 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3247 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3248 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3249 /* FIXME: expose 10.2 specific values */
3250
3251 list_add_tail(&dst->list, &stats->pdevs);
3252 }
3253
3254 for (i = 0; i < num_pdev_ext_stats; i++) {
3255 const struct wmi_10_2_pdev_ext_stats *src;
3256
3257 src = (void *)skb->data;
3258 if (!skb_pull(skb, sizeof(*src)))
3259 return -EPROTO;
3260
3261 /* FIXME: expose values to userspace
3262 *
3263 * Note: Even though this loop seems to do nothing it is
3264 * required to parse following sub-structures properly.
3265 */
3266 }
3267
3268 /* fw doesn't implement vdev stats */
3269
3270 for (i = 0; i < num_peer_stats; i++) {
3271 const struct wmi_10_2_4_ext_peer_stats *src;
3272 struct ath10k_fw_stats_peer *dst;
3273 int stats_len;
3274
3275 if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
3276 stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats);
3277 else
3278 stats_len = sizeof(struct wmi_10_2_4_peer_stats);
3279
3280 src = (void *)skb->data;
3281 if (!skb_pull(skb, stats_len))
3282 return -EPROTO;
3283
3284 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3285 if (!dst)
3286 continue;
3287
3288 ath10k_wmi_pull_peer_stats(&src->common.old, dst);
3289
3290 dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
3291
3292 if (ath10k_peer_stats_enabled(ar))
3293 dst->rx_duration = __le32_to_cpu(src->rx_duration);
3294 /* FIXME: expose 10.2 specific values */
3295
3296 list_add_tail(&dst->list, &stats->peers);
3297 }
3298
3299 return 0;
3300 }
3301
ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3302 static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar,
3303 struct sk_buff *skb,
3304 struct ath10k_fw_stats *stats)
3305 {
3306 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
3307 u32 num_pdev_stats;
3308 u32 num_pdev_ext_stats;
3309 u32 num_vdev_stats;
3310 u32 num_peer_stats;
3311 u32 num_bcnflt_stats;
3312 u32 stats_id;
3313 int i;
3314
3315 if (!skb_pull(skb, sizeof(*ev)))
3316 return -EPROTO;
3317
3318 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3319 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
3320 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
3321 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3322 num_bcnflt_stats = __le32_to_cpu(ev->num_bcnflt_stats);
3323 stats_id = __le32_to_cpu(ev->stats_id);
3324
3325 for (i = 0; i < num_pdev_stats; i++) {
3326 const struct wmi_10_4_pdev_stats *src;
3327 struct ath10k_fw_stats_pdev *dst;
3328
3329 src = (void *)skb->data;
3330 if (!skb_pull(skb, sizeof(*src)))
3331 return -EPROTO;
3332
3333 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3334 if (!dst)
3335 continue;
3336
3337 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3338 ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst);
3339 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3340 dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs);
3341 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3342
3343 list_add_tail(&dst->list, &stats->pdevs);
3344 }
3345
3346 for (i = 0; i < num_pdev_ext_stats; i++) {
3347 const struct wmi_10_2_pdev_ext_stats *src;
3348
3349 src = (void *)skb->data;
3350 if (!skb_pull(skb, sizeof(*src)))
3351 return -EPROTO;
3352
3353 /* FIXME: expose values to userspace
3354 *
3355 * Note: Even though this loop seems to do nothing it is
3356 * required to parse following sub-structures properly.
3357 */
3358 }
3359
3360 for (i = 0; i < num_vdev_stats; i++) {
3361 const struct wmi_vdev_stats *src;
3362
3363 /* Ignore vdev stats here as it has only vdev id. Actual vdev
3364 * stats will be retrieved from vdev extended stats.
3365 */
3366 src = (void *)skb->data;
3367 if (!skb_pull(skb, sizeof(*src)))
3368 return -EPROTO;
3369 }
3370
3371 for (i = 0; i < num_peer_stats; i++) {
3372 const struct wmi_10_4_peer_stats *src;
3373 struct ath10k_fw_stats_peer *dst;
3374
3375 src = (void *)skb->data;
3376 if (!skb_pull(skb, sizeof(*src)))
3377 return -EPROTO;
3378
3379 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3380 if (!dst)
3381 continue;
3382
3383 ath10k_wmi_10_4_pull_peer_stats(src, dst);
3384 list_add_tail(&dst->list, &stats->peers);
3385 }
3386
3387 for (i = 0; i < num_bcnflt_stats; i++) {
3388 const struct wmi_10_4_bss_bcn_filter_stats *src;
3389
3390 src = (void *)skb->data;
3391 if (!skb_pull(skb, sizeof(*src)))
3392 return -EPROTO;
3393
3394 /* FIXME: expose values to userspace
3395 *
3396 * Note: Even though this loop seems to do nothing it is
3397 * required to parse following sub-structures properly.
3398 */
3399 }
3400
3401 if (stats_id & WMI_10_4_STAT_PEER_EXTD) {
3402 stats->extended = true;
3403
3404 for (i = 0; i < num_peer_stats; i++) {
3405 const struct wmi_10_4_peer_extd_stats *src;
3406 struct ath10k_fw_extd_stats_peer *dst;
3407
3408 src = (void *)skb->data;
3409 if (!skb_pull(skb, sizeof(*src)))
3410 return -EPROTO;
3411
3412 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3413 if (!dst)
3414 continue;
3415
3416 ether_addr_copy(dst->peer_macaddr,
3417 src->peer_macaddr.addr);
3418 dst->rx_duration = __le32_to_cpu(src->rx_duration);
3419 list_add_tail(&dst->list, &stats->peers_extd);
3420 }
3421 }
3422
3423 if (stats_id & WMI_10_4_STAT_VDEV_EXTD) {
3424 for (i = 0; i < num_vdev_stats; i++) {
3425 const struct wmi_vdev_stats_extd *src;
3426 struct ath10k_fw_stats_vdev_extd *dst;
3427
3428 src = (void *)skb->data;
3429 if (!skb_pull(skb, sizeof(*src)))
3430 return -EPROTO;
3431
3432 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3433 if (!dst)
3434 continue;
3435 ath10k_wmi_10_4_pull_vdev_stats(src, dst);
3436 list_add_tail(&dst->list, &stats->vdevs);
3437 }
3438 }
3439
3440 return 0;
3441 }
3442
ath10k_wmi_event_update_stats(struct ath10k * ar,struct sk_buff * skb)3443 void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
3444 {
3445 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
3446 ath10k_debug_fw_stats_process(ar, skb);
3447 }
3448
3449 static int
ath10k_wmi_op_pull_vdev_start_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_vdev_start_ev_arg * arg)3450 ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
3451 struct wmi_vdev_start_ev_arg *arg)
3452 {
3453 struct wmi_vdev_start_response_event *ev = (void *)skb->data;
3454
3455 if (skb->len < sizeof(*ev))
3456 return -EPROTO;
3457
3458 skb_pull(skb, sizeof(*ev));
3459 arg->vdev_id = ev->vdev_id;
3460 arg->req_id = ev->req_id;
3461 arg->resp_type = ev->resp_type;
3462 arg->status = ev->status;
3463
3464 return 0;
3465 }
3466
ath10k_wmi_event_vdev_start_resp(struct ath10k * ar,struct sk_buff * skb)3467 void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
3468 {
3469 struct wmi_vdev_start_ev_arg arg = {};
3470 int ret;
3471 u32 status;
3472
3473 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
3474
3475 ar->last_wmi_vdev_start_status = 0;
3476
3477 ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
3478 if (ret) {
3479 ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
3480 ar->last_wmi_vdev_start_status = ret;
3481 goto out;
3482 }
3483
3484 status = __le32_to_cpu(arg.status);
3485 if (WARN_ON_ONCE(status)) {
3486 ath10k_warn(ar, "vdev-start-response reports status error: %d (%s)\n",
3487 status, (status == WMI_VDEV_START_CHAN_INVALID) ?
3488 "chan-invalid" : "unknown");
3489 /* Setup is done one way or another though, so we should still
3490 * do the completion, so don't return here.
3491 */
3492 ar->last_wmi_vdev_start_status = -EINVAL;
3493 }
3494
3495 out:
3496 complete(&ar->vdev_setup_done);
3497 }
3498
ath10k_wmi_event_vdev_stopped(struct ath10k * ar,struct sk_buff * skb)3499 void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
3500 {
3501 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
3502 complete(&ar->vdev_setup_done);
3503 }
3504
3505 static int
ath10k_wmi_op_pull_peer_kick_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_peer_kick_ev_arg * arg)3506 ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
3507 struct wmi_peer_kick_ev_arg *arg)
3508 {
3509 struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
3510
3511 if (skb->len < sizeof(*ev))
3512 return -EPROTO;
3513
3514 skb_pull(skb, sizeof(*ev));
3515 arg->mac_addr = ev->peer_macaddr.addr;
3516
3517 return 0;
3518 }
3519
ath10k_wmi_event_peer_sta_kickout(struct ath10k * ar,struct sk_buff * skb)3520 void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
3521 {
3522 struct wmi_peer_kick_ev_arg arg = {};
3523 struct ieee80211_sta *sta;
3524 int ret;
3525
3526 ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
3527 if (ret) {
3528 ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
3529 ret);
3530 return;
3531 }
3532
3533 ath10k_dbg(ar, ATH10K_DBG_STA, "wmi event peer sta kickout %pM\n",
3534 arg.mac_addr);
3535
3536 rcu_read_lock();
3537
3538 sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
3539 if (!sta) {
3540 ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
3541 arg.mac_addr);
3542 goto exit;
3543 }
3544
3545 ieee80211_report_low_ack(sta, 10);
3546
3547 exit:
3548 rcu_read_unlock();
3549 }
3550
3551 /*
3552 * FIXME
3553 *
3554 * We don't report to mac80211 sleep state of connected
3555 * stations. Due to this mac80211 can't fill in TIM IE
3556 * correctly.
3557 *
3558 * I know of no way of getting nullfunc frames that contain
3559 * sleep transition from connected stations - these do not
3560 * seem to be sent from the target to the host. There also
3561 * doesn't seem to be a dedicated event for that. So the
3562 * only way left to do this would be to read tim_bitmap
3563 * during SWBA.
3564 *
3565 * We could probably try using tim_bitmap from SWBA to tell
3566 * mac80211 which stations are asleep and which are not. The
3567 * problem here is calling mac80211 functions so many times
3568 * could take too long and make us miss the time to submit
3569 * the beacon to the target.
3570 *
3571 * So as a workaround we try to extend the TIM IE if there
3572 * is unicast buffered for stations with aid > 7 and fill it
3573 * in ourselves.
3574 */
ath10k_wmi_update_tim(struct ath10k * ar,struct ath10k_vif * arvif,struct sk_buff * bcn,const struct wmi_tim_info_arg * tim_info)3575 static void ath10k_wmi_update_tim(struct ath10k *ar,
3576 struct ath10k_vif *arvif,
3577 struct sk_buff *bcn,
3578 const struct wmi_tim_info_arg *tim_info)
3579 {
3580 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
3581 struct ieee80211_tim_ie *tim;
3582 u8 *ies, *ie;
3583 u8 ie_len, pvm_len;
3584 __le32 t;
3585 u32 v, tim_len;
3586
3587 /* When FW reports 0 in tim_len, ensure at least first byte
3588 * in tim_bitmap is considered for pvm calculation.
3589 */
3590 tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1;
3591
3592 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
3593 * we must copy the bitmap upon change and reuse it later
3594 */
3595 if (__le32_to_cpu(tim_info->tim_changed)) {
3596 int i;
3597
3598 if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) {
3599 ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu",
3600 tim_len, sizeof(arvif->u.ap.tim_bitmap));
3601 tim_len = sizeof(arvif->u.ap.tim_bitmap);
3602 }
3603
3604 for (i = 0; i < tim_len; i++) {
3605 t = tim_info->tim_bitmap[i / 4];
3606 v = __le32_to_cpu(t);
3607 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
3608 }
3609
3610 /* FW reports either length 0 or length based on max supported
3611 * station. so we calculate this on our own
3612 */
3613 arvif->u.ap.tim_len = 0;
3614 for (i = 0; i < tim_len; i++)
3615 if (arvif->u.ap.tim_bitmap[i])
3616 arvif->u.ap.tim_len = i;
3617
3618 arvif->u.ap.tim_len++;
3619 }
3620
3621 ies = bcn->data;
3622 ies += ieee80211_hdrlen(hdr->frame_control);
3623 ies += 12; /* fixed parameters */
3624
3625 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
3626 (u8 *)skb_tail_pointer(bcn) - ies);
3627 if (!ie) {
3628 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
3629 ath10k_warn(ar, "no tim ie found;\n");
3630 return;
3631 }
3632
3633 tim = (void *)ie + 2;
3634 ie_len = ie[1];
3635 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
3636
3637 if (pvm_len < arvif->u.ap.tim_len) {
3638 int expand_size = tim_len - pvm_len;
3639 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
3640 void *next_ie = ie + 2 + ie_len;
3641
3642 if (skb_put(bcn, expand_size)) {
3643 memmove(next_ie + expand_size, next_ie, move_size);
3644
3645 ie[1] += expand_size;
3646 ie_len += expand_size;
3647 pvm_len += expand_size;
3648 } else {
3649 ath10k_warn(ar, "tim expansion failed\n");
3650 }
3651 }
3652
3653 if (pvm_len > tim_len) {
3654 ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
3655 return;
3656 }
3657
3658 tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
3659 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
3660
3661 if (tim->dtim_count == 0) {
3662 ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO;
3663
3664 if (__le32_to_cpu(tim_info->tim_mcast) == 1)
3665 ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB;
3666 }
3667
3668 ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
3669 tim->dtim_count, tim->dtim_period,
3670 tim->bitmap_ctrl, pvm_len);
3671 }
3672
ath10k_wmi_update_noa(struct ath10k * ar,struct ath10k_vif * arvif,struct sk_buff * bcn,const struct wmi_p2p_noa_info * noa)3673 static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
3674 struct sk_buff *bcn,
3675 const struct wmi_p2p_noa_info *noa)
3676 {
3677 if (!arvif->vif->p2p)
3678 return;
3679
3680 ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
3681
3682 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
3683 ath10k_p2p_noa_update(arvif, noa);
3684
3685 if (arvif->u.ap.noa_data)
3686 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
3687 skb_put_data(bcn, arvif->u.ap.noa_data,
3688 arvif->u.ap.noa_len);
3689 }
3690
ath10k_wmi_op_pull_swba_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_swba_ev_arg * arg)3691 static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
3692 struct wmi_swba_ev_arg *arg)
3693 {
3694 struct wmi_host_swba_event *ev = (void *)skb->data;
3695 u32 map;
3696 size_t i;
3697
3698 if (skb->len < sizeof(*ev))
3699 return -EPROTO;
3700
3701 skb_pull(skb, sizeof(*ev));
3702 arg->vdev_map = ev->vdev_map;
3703
3704 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3705 if (!(map & BIT(0)))
3706 continue;
3707
3708 /* If this happens there were some changes in firmware and
3709 * ath10k should update the max size of tim_info array.
3710 */
3711 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3712 break;
3713
3714 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3715 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3716 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3717 return -EPROTO;
3718 }
3719
3720 arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
3721 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3722 arg->tim_info[i].tim_bitmap =
3723 ev->bcn_info[i].tim_info.tim_bitmap;
3724 arg->tim_info[i].tim_changed =
3725 ev->bcn_info[i].tim_info.tim_changed;
3726 arg->tim_info[i].tim_num_ps_pending =
3727 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3728
3729 arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
3730 i++;
3731 }
3732
3733 return 0;
3734 }
3735
ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_swba_ev_arg * arg)3736 static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar,
3737 struct sk_buff *skb,
3738 struct wmi_swba_ev_arg *arg)
3739 {
3740 struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data;
3741 u32 map;
3742 size_t i;
3743
3744 if (skb->len < sizeof(*ev))
3745 return -EPROTO;
3746
3747 skb_pull(skb, sizeof(*ev));
3748 arg->vdev_map = ev->vdev_map;
3749
3750 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3751 if (!(map & BIT(0)))
3752 continue;
3753
3754 /* If this happens there were some changes in firmware and
3755 * ath10k should update the max size of tim_info array.
3756 */
3757 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3758 break;
3759
3760 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3761 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3762 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3763 return -EPROTO;
3764 }
3765
3766 arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
3767 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3768 arg->tim_info[i].tim_bitmap =
3769 ev->bcn_info[i].tim_info.tim_bitmap;
3770 arg->tim_info[i].tim_changed =
3771 ev->bcn_info[i].tim_info.tim_changed;
3772 arg->tim_info[i].tim_num_ps_pending =
3773 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3774 i++;
3775 }
3776
3777 return 0;
3778 }
3779
ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_swba_ev_arg * arg)3780 static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar,
3781 struct sk_buff *skb,
3782 struct wmi_swba_ev_arg *arg)
3783 {
3784 struct wmi_10_4_host_swba_event *ev = (void *)skb->data;
3785 u32 map, tim_len;
3786 size_t i;
3787
3788 if (skb->len < sizeof(*ev))
3789 return -EPROTO;
3790
3791 skb_pull(skb, sizeof(*ev));
3792 arg->vdev_map = ev->vdev_map;
3793
3794 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3795 if (!(map & BIT(0)))
3796 continue;
3797
3798 /* If this happens there were some changes in firmware and
3799 * ath10k should update the max size of tim_info array.
3800 */
3801 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3802 break;
3803
3804 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3805 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3806 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3807 return -EPROTO;
3808 }
3809
3810 tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len);
3811 if (tim_len) {
3812 /* Exclude 4 byte guard length */
3813 tim_len -= 4;
3814 arg->tim_info[i].tim_len = __cpu_to_le32(tim_len);
3815 } else {
3816 arg->tim_info[i].tim_len = 0;
3817 }
3818
3819 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3820 arg->tim_info[i].tim_bitmap =
3821 ev->bcn_info[i].tim_info.tim_bitmap;
3822 arg->tim_info[i].tim_changed =
3823 ev->bcn_info[i].tim_info.tim_changed;
3824 arg->tim_info[i].tim_num_ps_pending =
3825 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3826
3827 /* 10.4 firmware doesn't have p2p support. notice of absence
3828 * info can be ignored for now.
3829 */
3830
3831 i++;
3832 }
3833
3834 return 0;
3835 }
3836
ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k * ar)3837 static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar)
3838 {
3839 return WMI_TXBF_CONF_BEFORE_ASSOC;
3840 }
3841
ath10k_wmi_event_host_swba(struct ath10k * ar,struct sk_buff * skb)3842 void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
3843 {
3844 struct wmi_swba_ev_arg arg = {};
3845 u32 map;
3846 int i = -1;
3847 const struct wmi_tim_info_arg *tim_info;
3848 const struct wmi_p2p_noa_info *noa_info;
3849 struct ath10k_vif *arvif;
3850 struct sk_buff *bcn;
3851 dma_addr_t paddr;
3852 int ret, vdev_id = 0;
3853
3854 ret = ath10k_wmi_pull_swba(ar, skb, &arg);
3855 if (ret) {
3856 ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
3857 return;
3858 }
3859
3860 map = __le32_to_cpu(arg.vdev_map);
3861
3862 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
3863 map);
3864
3865 for (; map; map >>= 1, vdev_id++) {
3866 if (!(map & 0x1))
3867 continue;
3868
3869 i++;
3870
3871 if (i >= WMI_MAX_AP_VDEV) {
3872 ath10k_warn(ar, "swba has corrupted vdev map\n");
3873 break;
3874 }
3875
3876 tim_info = &arg.tim_info[i];
3877 noa_info = arg.noa_info[i];
3878
3879 ath10k_dbg(ar, ATH10K_DBG_MGMT,
3880 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
3881 i,
3882 __le32_to_cpu(tim_info->tim_len),
3883 __le32_to_cpu(tim_info->tim_mcast),
3884 __le32_to_cpu(tim_info->tim_changed),
3885 __le32_to_cpu(tim_info->tim_num_ps_pending),
3886 __le32_to_cpu(tim_info->tim_bitmap[3]),
3887 __le32_to_cpu(tim_info->tim_bitmap[2]),
3888 __le32_to_cpu(tim_info->tim_bitmap[1]),
3889 __le32_to_cpu(tim_info->tim_bitmap[0]));
3890
3891 /* TODO: Only first 4 word from tim_bitmap is dumped.
3892 * Extend debug code to dump full tim_bitmap.
3893 */
3894
3895 arvif = ath10k_get_arvif(ar, vdev_id);
3896 if (arvif == NULL) {
3897 ath10k_warn(ar, "no vif for vdev_id %d found\n",
3898 vdev_id);
3899 continue;
3900 }
3901
3902 /* mac80211 would have already asked us to stop beaconing and
3903 * bring the vdev down, so continue in that case
3904 */
3905 if (!arvif->is_up)
3906 continue;
3907
3908 /* There are no completions for beacons so wait for next SWBA
3909 * before telling mac80211 to decrement CSA counter
3910 *
3911 * Once CSA counter is completed stop sending beacons until
3912 * actual channel switch is done
3913 */
3914 if (arvif->vif->bss_conf.csa_active &&
3915 ieee80211_beacon_cntdwn_is_complete(arvif->vif, 0)) {
3916 ieee80211_csa_finish(arvif->vif, 0);
3917 continue;
3918 }
3919
3920 bcn = ieee80211_beacon_get(ar->hw, arvif->vif, 0);
3921 if (!bcn) {
3922 ath10k_warn(ar, "could not get mac80211 beacon\n");
3923 continue;
3924 }
3925
3926 ath10k_tx_h_seq_no(arvif->vif, bcn);
3927 ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
3928 ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
3929
3930 spin_lock_bh(&ar->data_lock);
3931
3932 if (arvif->beacon) {
3933 switch (arvif->beacon_state) {
3934 case ATH10K_BEACON_SENT:
3935 break;
3936 case ATH10K_BEACON_SCHEDULED:
3937 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
3938 arvif->vdev_id);
3939 break;
3940 case ATH10K_BEACON_SENDING:
3941 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
3942 arvif->vdev_id);
3943 dev_kfree_skb(bcn);
3944 goto skip;
3945 }
3946
3947 ath10k_mac_vif_beacon_free(arvif);
3948 }
3949
3950 if (!arvif->beacon_buf) {
3951 paddr = dma_map_single(arvif->ar->dev, bcn->data,
3952 bcn->len, DMA_TO_DEVICE);
3953 ret = dma_mapping_error(arvif->ar->dev, paddr);
3954 if (ret) {
3955 ath10k_warn(ar, "failed to map beacon: %d\n",
3956 ret);
3957 dev_kfree_skb_any(bcn);
3958 goto skip;
3959 }
3960
3961 ATH10K_SKB_CB(bcn)->paddr = paddr;
3962 } else {
3963 if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
3964 ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
3965 bcn->len, IEEE80211_MAX_FRAME_LEN);
3966 skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
3967 }
3968 memcpy(arvif->beacon_buf, bcn->data, bcn->len);
3969 ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
3970 }
3971
3972 arvif->beacon = bcn;
3973 arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
3974
3975 trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
3976 trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
3977
3978 skip:
3979 spin_unlock_bh(&ar->data_lock);
3980 }
3981
3982 ath10k_wmi_tx_beacons_nowait(ar);
3983 }
3984
ath10k_wmi_event_tbttoffset_update(struct ath10k * ar,struct sk_buff * skb)3985 void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
3986 {
3987 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
3988 }
3989
ath10k_radar_detected(struct ath10k * ar)3990 static void ath10k_radar_detected(struct ath10k *ar)
3991 {
3992 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
3993 ATH10K_DFS_STAT_INC(ar, radar_detected);
3994
3995 /* Control radar events reporting in debugfs file
3996 * dfs_block_radar_events
3997 */
3998 if (ar->dfs_block_radar_events)
3999 ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
4000 else
4001 ieee80211_radar_detected(ar->hw, NULL);
4002 }
4003
ath10k_radar_confirmation_work(struct work_struct * work)4004 static void ath10k_radar_confirmation_work(struct work_struct *work)
4005 {
4006 struct ath10k *ar = container_of(work, struct ath10k,
4007 radar_confirmation_work);
4008 struct ath10k_radar_found_info radar_info;
4009 int ret, time_left;
4010
4011 reinit_completion(&ar->wmi.radar_confirm);
4012
4013 spin_lock_bh(&ar->data_lock);
4014 memcpy(&radar_info, &ar->last_radar_info, sizeof(radar_info));
4015 spin_unlock_bh(&ar->data_lock);
4016
4017 ret = ath10k_wmi_report_radar_found(ar, &radar_info);
4018 if (ret) {
4019 ath10k_warn(ar, "failed to send radar found %d\n", ret);
4020 goto wait_complete;
4021 }
4022
4023 time_left = wait_for_completion_timeout(&ar->wmi.radar_confirm,
4024 ATH10K_WMI_DFS_CONF_TIMEOUT_HZ);
4025 if (time_left) {
4026 /* DFS Confirmation status event received and
4027 * necessary action completed.
4028 */
4029 goto wait_complete;
4030 } else {
4031 /* DFS Confirmation event not received from FW.Considering this
4032 * as real radar.
4033 */
4034 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4035 "dfs confirmation not received from fw, considering as radar\n");
4036 goto radar_detected;
4037 }
4038
4039 radar_detected:
4040 ath10k_radar_detected(ar);
4041
4042 /* Reset state to allow sending confirmation on consecutive radar
4043 * detections, unless radar confirmation is disabled/stopped.
4044 */
4045 wait_complete:
4046 spin_lock_bh(&ar->data_lock);
4047 if (ar->radar_conf_state != ATH10K_RADAR_CONFIRMATION_STOPPED)
4048 ar->radar_conf_state = ATH10K_RADAR_CONFIRMATION_IDLE;
4049 spin_unlock_bh(&ar->data_lock);
4050 }
4051
ath10k_dfs_radar_report(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,const struct phyerr_radar_report * rr,u64 tsf)4052 static void ath10k_dfs_radar_report(struct ath10k *ar,
4053 struct wmi_phyerr_ev_arg *phyerr,
4054 const struct phyerr_radar_report *rr,
4055 u64 tsf)
4056 {
4057 u32 reg0, reg1, tsf32l;
4058 struct ieee80211_channel *ch;
4059 struct pulse_event pe;
4060 struct radar_detector_specs rs;
4061 u64 tsf64;
4062 u8 rssi, width;
4063 struct ath10k_radar_found_info *radar_info;
4064
4065 reg0 = __le32_to_cpu(rr->reg0);
4066 reg1 = __le32_to_cpu(rr->reg1);
4067
4068 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4069 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
4070 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
4071 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
4072 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
4073 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
4074 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4075 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
4076 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
4077 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
4078 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
4079 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
4080 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
4081 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4082 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
4083 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
4084 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
4085
4086 if (!ar->dfs_detector)
4087 return;
4088
4089 spin_lock_bh(&ar->data_lock);
4090 ch = ar->rx_channel;
4091
4092 /* fetch target operating channel during channel change */
4093 if (!ch)
4094 ch = ar->tgt_oper_chan;
4095
4096 spin_unlock_bh(&ar->data_lock);
4097
4098 if (!ch) {
4099 ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n");
4100 goto radar_detected;
4101 }
4102
4103 /* report event to DFS pattern detector */
4104 tsf32l = phyerr->tsf_timestamp;
4105 tsf64 = tsf & (~0xFFFFFFFFULL);
4106 tsf64 |= tsf32l;
4107
4108 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
4109 rssi = phyerr->rssi_combined;
4110
4111 /* hardware store this as 8 bit signed value,
4112 * set to zero if negative number
4113 */
4114 if (rssi & 0x80)
4115 rssi = 0;
4116
4117 pe.ts = tsf64;
4118 pe.freq = ch->center_freq;
4119 pe.width = width;
4120 pe.rssi = rssi;
4121 pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
4122 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4123 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
4124 pe.freq, pe.width, pe.rssi, pe.ts);
4125
4126 ATH10K_DFS_STAT_INC(ar, pulses_detected);
4127
4128 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe, &rs)) {
4129 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4130 "dfs no pulse pattern detected, yet\n");
4131 return;
4132 }
4133
4134 if ((test_bit(WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, ar->wmi.svc_map)) &&
4135 ar->dfs_detector->region == NL80211_DFS_FCC) {
4136 /* Consecutive radar indications need not be
4137 * sent to the firmware until we get confirmation
4138 * for the previous detected radar.
4139 */
4140 spin_lock_bh(&ar->data_lock);
4141 if (ar->radar_conf_state != ATH10K_RADAR_CONFIRMATION_IDLE) {
4142 spin_unlock_bh(&ar->data_lock);
4143 return;
4144 }
4145 ar->radar_conf_state = ATH10K_RADAR_CONFIRMATION_INPROGRESS;
4146 radar_info = &ar->last_radar_info;
4147
4148 radar_info->pri_min = rs.pri_min;
4149 radar_info->pri_max = rs.pri_max;
4150 radar_info->width_min = rs.width_min;
4151 radar_info->width_max = rs.width_max;
4152 /*TODO Find sidx_min and sidx_max */
4153 radar_info->sidx_min = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX);
4154 radar_info->sidx_max = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX);
4155
4156 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4157 "sending wmi radar found cmd pri_min %d pri_max %d width_min %d width_max %d sidx_min %d sidx_max %d\n",
4158 radar_info->pri_min, radar_info->pri_max,
4159 radar_info->width_min, radar_info->width_max,
4160 radar_info->sidx_min, radar_info->sidx_max);
4161 ieee80211_queue_work(ar->hw, &ar->radar_confirmation_work);
4162 spin_unlock_bh(&ar->data_lock);
4163 return;
4164 }
4165
4166 radar_detected:
4167 ath10k_radar_detected(ar);
4168 }
4169
ath10k_dfs_fft_report(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,const struct phyerr_fft_report * fftr,u64 tsf)4170 static int ath10k_dfs_fft_report(struct ath10k *ar,
4171 struct wmi_phyerr_ev_arg *phyerr,
4172 const struct phyerr_fft_report *fftr,
4173 u64 tsf)
4174 {
4175 u32 reg0, reg1;
4176 u8 rssi, peak_mag;
4177
4178 reg0 = __le32_to_cpu(fftr->reg0);
4179 reg1 = __le32_to_cpu(fftr->reg1);
4180 rssi = phyerr->rssi_combined;
4181
4182 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4183 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
4184 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
4185 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
4186 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
4187 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
4188 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4189 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
4190 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
4191 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
4192 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
4193 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
4194
4195 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
4196
4197 /* false event detection */
4198 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
4199 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
4200 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
4201 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
4202 return -EINVAL;
4203 }
4204
4205 return 0;
4206 }
4207
ath10k_wmi_event_dfs(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,u64 tsf)4208 void ath10k_wmi_event_dfs(struct ath10k *ar,
4209 struct wmi_phyerr_ev_arg *phyerr,
4210 u64 tsf)
4211 {
4212 int buf_len, tlv_len, res, i = 0;
4213 const struct phyerr_tlv *tlv;
4214 const struct phyerr_radar_report *rr;
4215 const struct phyerr_fft_report *fftr;
4216 const u8 *tlv_buf;
4217
4218 buf_len = phyerr->buf_len;
4219 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4220 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
4221 phyerr->phy_err_code, phyerr->rssi_combined,
4222 phyerr->tsf_timestamp, tsf, buf_len);
4223
4224 /* Skip event if DFS disabled */
4225 if (!IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED))
4226 return;
4227
4228 ATH10K_DFS_STAT_INC(ar, pulses_total);
4229
4230 while (i < buf_len) {
4231 if (i + sizeof(*tlv) > buf_len) {
4232 ath10k_warn(ar, "too short buf for tlv header (%d)\n",
4233 i);
4234 return;
4235 }
4236
4237 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
4238 tlv_len = __le16_to_cpu(tlv->len);
4239 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
4240 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4241 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
4242 tlv_len, tlv->tag, tlv->sig);
4243
4244 switch (tlv->tag) {
4245 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
4246 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
4247 ath10k_warn(ar, "too short radar pulse summary (%d)\n",
4248 i);
4249 return;
4250 }
4251
4252 rr = (struct phyerr_radar_report *)tlv_buf;
4253 ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
4254 break;
4255 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
4256 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
4257 ath10k_warn(ar, "too short fft report (%d)\n",
4258 i);
4259 return;
4260 }
4261
4262 fftr = (struct phyerr_fft_report *)tlv_buf;
4263 res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
4264 if (res)
4265 return;
4266 break;
4267 }
4268
4269 i += sizeof(*tlv) + tlv_len;
4270 }
4271 }
4272
ath10k_wmi_event_spectral_scan(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,u64 tsf)4273 void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
4274 struct wmi_phyerr_ev_arg *phyerr,
4275 u64 tsf)
4276 {
4277 int buf_len, tlv_len, res, i = 0;
4278 struct phyerr_tlv *tlv;
4279 const void *tlv_buf;
4280 const struct phyerr_fft_report *fftr;
4281 size_t fftr_len;
4282
4283 buf_len = phyerr->buf_len;
4284
4285 while (i < buf_len) {
4286 if (i + sizeof(*tlv) > buf_len) {
4287 ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
4288 i);
4289 return;
4290 }
4291
4292 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
4293 tlv_len = __le16_to_cpu(tlv->len);
4294 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
4295
4296 if (i + sizeof(*tlv) + tlv_len > buf_len) {
4297 ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
4298 i);
4299 return;
4300 }
4301
4302 switch (tlv->tag) {
4303 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
4304 if (sizeof(*fftr) > tlv_len) {
4305 ath10k_warn(ar, "failed to parse fft report at byte %d\n",
4306 i);
4307 return;
4308 }
4309
4310 fftr_len = tlv_len - sizeof(*fftr);
4311 fftr = tlv_buf;
4312 res = ath10k_spectral_process_fft(ar, phyerr,
4313 fftr, fftr_len,
4314 tsf);
4315 if (res < 0) {
4316 ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n",
4317 res);
4318 return;
4319 }
4320 break;
4321 }
4322
4323 i += sizeof(*tlv) + tlv_len;
4324 }
4325 }
4326
ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k * ar,struct sk_buff * skb,struct wmi_phyerr_hdr_arg * arg)4327 static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
4328 struct sk_buff *skb,
4329 struct wmi_phyerr_hdr_arg *arg)
4330 {
4331 struct wmi_phyerr_event *ev = (void *)skb->data;
4332
4333 if (skb->len < sizeof(*ev))
4334 return -EPROTO;
4335
4336 arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
4337 arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
4338 arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
4339 arg->buf_len = skb->len - sizeof(*ev);
4340 arg->phyerrs = ev->phyerrs;
4341
4342 return 0;
4343 }
4344
ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k * ar,struct sk_buff * skb,struct wmi_phyerr_hdr_arg * arg)4345 static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
4346 struct sk_buff *skb,
4347 struct wmi_phyerr_hdr_arg *arg)
4348 {
4349 struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
4350
4351 if (skb->len < sizeof(*ev))
4352 return -EPROTO;
4353
4354 /* 10.4 firmware always reports only one phyerr */
4355 arg->num_phyerrs = 1;
4356
4357 arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
4358 arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
4359 arg->buf_len = skb->len;
4360 arg->phyerrs = skb->data;
4361
4362 return 0;
4363 }
4364
ath10k_wmi_op_pull_phyerr_ev(struct ath10k * ar,const void * phyerr_buf,int left_len,struct wmi_phyerr_ev_arg * arg)4365 int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
4366 const void *phyerr_buf,
4367 int left_len,
4368 struct wmi_phyerr_ev_arg *arg)
4369 {
4370 const struct wmi_phyerr *phyerr = phyerr_buf;
4371 int i;
4372
4373 if (left_len < sizeof(*phyerr)) {
4374 ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
4375 left_len, sizeof(*phyerr));
4376 return -EINVAL;
4377 }
4378
4379 arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
4380 arg->freq1 = __le16_to_cpu(phyerr->freq1);
4381 arg->freq2 = __le16_to_cpu(phyerr->freq2);
4382 arg->rssi_combined = phyerr->rssi_combined;
4383 arg->chan_width_mhz = phyerr->chan_width_mhz;
4384 arg->buf_len = __le32_to_cpu(phyerr->buf_len);
4385 arg->buf = phyerr->buf;
4386 arg->hdr_len = sizeof(*phyerr);
4387
4388 for (i = 0; i < 4; i++)
4389 arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
4390
4391 switch (phyerr->phy_err_code) {
4392 case PHY_ERROR_GEN_SPECTRAL_SCAN:
4393 arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
4394 break;
4395 case PHY_ERROR_GEN_FALSE_RADAR_EXT:
4396 arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
4397 break;
4398 case PHY_ERROR_GEN_RADAR:
4399 arg->phy_err_code = PHY_ERROR_RADAR;
4400 break;
4401 default:
4402 arg->phy_err_code = PHY_ERROR_UNKNOWN;
4403 break;
4404 }
4405
4406 return 0;
4407 }
4408
ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k * ar,const void * phyerr_buf,int left_len,struct wmi_phyerr_ev_arg * arg)4409 static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
4410 const void *phyerr_buf,
4411 int left_len,
4412 struct wmi_phyerr_ev_arg *arg)
4413 {
4414 const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
4415 u32 phy_err_mask;
4416 int i;
4417
4418 if (left_len < sizeof(*phyerr)) {
4419 ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
4420 left_len, sizeof(*phyerr));
4421 return -EINVAL;
4422 }
4423
4424 arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
4425 arg->freq1 = __le16_to_cpu(phyerr->freq1);
4426 arg->freq2 = __le16_to_cpu(phyerr->freq2);
4427 arg->rssi_combined = phyerr->rssi_combined;
4428 arg->chan_width_mhz = phyerr->chan_width_mhz;
4429 arg->buf_len = __le32_to_cpu(phyerr->buf_len);
4430 arg->buf = phyerr->buf;
4431 arg->hdr_len = sizeof(*phyerr);
4432
4433 for (i = 0; i < 4; i++)
4434 arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
4435
4436 phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
4437
4438 if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
4439 arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
4440 else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
4441 arg->phy_err_code = PHY_ERROR_RADAR;
4442 else
4443 arg->phy_err_code = PHY_ERROR_UNKNOWN;
4444
4445 return 0;
4446 }
4447
ath10k_wmi_event_phyerr(struct ath10k * ar,struct sk_buff * skb)4448 void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
4449 {
4450 struct wmi_phyerr_hdr_arg hdr_arg = {};
4451 struct wmi_phyerr_ev_arg phyerr_arg = {};
4452 const void *phyerr;
4453 u32 count, i, buf_len, phy_err_code;
4454 u64 tsf;
4455 int left_len, ret;
4456
4457 ATH10K_DFS_STAT_INC(ar, phy_errors);
4458
4459 ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
4460 if (ret) {
4461 ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
4462 return;
4463 }
4464
4465 /* Check number of included events */
4466 count = hdr_arg.num_phyerrs;
4467
4468 left_len = hdr_arg.buf_len;
4469
4470 tsf = hdr_arg.tsf_u32;
4471 tsf <<= 32;
4472 tsf |= hdr_arg.tsf_l32;
4473
4474 ath10k_dbg(ar, ATH10K_DBG_WMI,
4475 "wmi event phyerr count %d tsf64 0x%llX\n",
4476 count, tsf);
4477
4478 phyerr = hdr_arg.phyerrs;
4479 for (i = 0; i < count; i++) {
4480 ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
4481 if (ret) {
4482 ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
4483 i);
4484 return;
4485 }
4486
4487 left_len -= phyerr_arg.hdr_len;
4488 buf_len = phyerr_arg.buf_len;
4489 phy_err_code = phyerr_arg.phy_err_code;
4490
4491 if (left_len < buf_len) {
4492 ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
4493 return;
4494 }
4495
4496 left_len -= buf_len;
4497
4498 switch (phy_err_code) {
4499 case PHY_ERROR_RADAR:
4500 ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
4501 break;
4502 case PHY_ERROR_SPECTRAL_SCAN:
4503 ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
4504 break;
4505 case PHY_ERROR_FALSE_RADAR_EXT:
4506 ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
4507 ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
4508 break;
4509 default:
4510 break;
4511 }
4512
4513 phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
4514 }
4515 }
4516
4517 static int
ath10k_wmi_10_4_op_pull_dfs_status_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_dfs_status_ev_arg * arg)4518 ath10k_wmi_10_4_op_pull_dfs_status_ev(struct ath10k *ar, struct sk_buff *skb,
4519 struct wmi_dfs_status_ev_arg *arg)
4520 {
4521 struct wmi_dfs_status_ev_arg *ev = (void *)skb->data;
4522
4523 if (skb->len < sizeof(*ev))
4524 return -EPROTO;
4525
4526 arg->status = ev->status;
4527
4528 return 0;
4529 }
4530
4531 static void
ath10k_wmi_event_dfs_status_check(struct ath10k * ar,struct sk_buff * skb)4532 ath10k_wmi_event_dfs_status_check(struct ath10k *ar, struct sk_buff *skb)
4533 {
4534 struct wmi_dfs_status_ev_arg status_arg = {};
4535 int ret;
4536
4537 ret = ath10k_wmi_pull_dfs_status(ar, skb, &status_arg);
4538
4539 if (ret) {
4540 ath10k_warn(ar, "failed to parse dfs status event: %d\n", ret);
4541 return;
4542 }
4543
4544 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4545 "dfs status event received from fw: %d\n",
4546 status_arg.status);
4547
4548 /* Even in case of radar detection failure we follow the same
4549 * behaviour as if radar is detected i.e to switch to a different
4550 * channel.
4551 */
4552 if (status_arg.status == WMI_HW_RADAR_DETECTED ||
4553 status_arg.status == WMI_RADAR_DETECTION_FAIL)
4554 ath10k_radar_detected(ar);
4555 complete(&ar->wmi.radar_confirm);
4556 }
4557
ath10k_wmi_event_roam(struct ath10k * ar,struct sk_buff * skb)4558 void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
4559 {
4560 struct wmi_roam_ev_arg arg = {};
4561 int ret;
4562 u32 vdev_id;
4563 u32 reason;
4564 s32 rssi;
4565
4566 ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg);
4567 if (ret) {
4568 ath10k_warn(ar, "failed to parse roam event: %d\n", ret);
4569 return;
4570 }
4571
4572 vdev_id = __le32_to_cpu(arg.vdev_id);
4573 reason = __le32_to_cpu(arg.reason);
4574 rssi = __le32_to_cpu(arg.rssi);
4575 rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT;
4576
4577 ath10k_dbg(ar, ATH10K_DBG_WMI,
4578 "wmi roam event vdev %u reason 0x%08x rssi %d\n",
4579 vdev_id, reason, rssi);
4580
4581 if (reason >= WMI_ROAM_REASON_MAX)
4582 ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n",
4583 reason, vdev_id);
4584
4585 switch (reason) {
4586 case WMI_ROAM_REASON_BEACON_MISS:
4587 ath10k_mac_handle_beacon_miss(ar, vdev_id);
4588 break;
4589 case WMI_ROAM_REASON_BETTER_AP:
4590 case WMI_ROAM_REASON_LOW_RSSI:
4591 case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
4592 case WMI_ROAM_REASON_HO_FAILED:
4593 ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n",
4594 reason, vdev_id);
4595 break;
4596 }
4597 }
4598
ath10k_wmi_event_profile_match(struct ath10k * ar,struct sk_buff * skb)4599 void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
4600 {
4601 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
4602 }
4603
ath10k_wmi_event_debug_print(struct ath10k * ar,struct sk_buff * skb)4604 void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
4605 {
4606 char buf[101], c;
4607 int i;
4608
4609 for (i = 0; i < sizeof(buf) - 1; i++) {
4610 if (i >= skb->len)
4611 break;
4612
4613 c = skb->data[i];
4614
4615 if (c == '\0')
4616 break;
4617
4618 if (isascii(c) && isprint(c))
4619 buf[i] = c;
4620 else
4621 buf[i] = '.';
4622 }
4623
4624 if (i == sizeof(buf) - 1)
4625 ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
4626
4627 /* for some reason the debug prints end with \n, remove that */
4628 if (skb->data[i - 1] == '\n')
4629 i--;
4630
4631 /* the last byte is always reserved for the null character */
4632 buf[i] = '\0';
4633
4634 ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
4635 }
4636
ath10k_wmi_event_pdev_qvit(struct ath10k * ar,struct sk_buff * skb)4637 void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
4638 {
4639 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
4640 }
4641
ath10k_wmi_event_wlan_profile_data(struct ath10k * ar,struct sk_buff * skb)4642 void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
4643 {
4644 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
4645 }
4646
ath10k_wmi_event_rtt_measurement_report(struct ath10k * ar,struct sk_buff * skb)4647 void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
4648 struct sk_buff *skb)
4649 {
4650 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
4651 }
4652
ath10k_wmi_event_tsf_measurement_report(struct ath10k * ar,struct sk_buff * skb)4653 void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
4654 struct sk_buff *skb)
4655 {
4656 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
4657 }
4658
ath10k_wmi_event_rtt_error_report(struct ath10k * ar,struct sk_buff * skb)4659 void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
4660 {
4661 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
4662 }
4663
ath10k_wmi_event_wow_wakeup_host(struct ath10k * ar,struct sk_buff * skb)4664 void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
4665 {
4666 struct wmi_wow_ev_arg ev = {};
4667 int ret;
4668
4669 complete(&ar->wow.wakeup_completed);
4670
4671 ret = ath10k_wmi_pull_wow_event(ar, skb, &ev);
4672 if (ret) {
4673 ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret);
4674 return;
4675 }
4676
4677 ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n",
4678 wow_reason(ev.wake_reason));
4679 }
4680
ath10k_wmi_event_dcs_interference(struct ath10k * ar,struct sk_buff * skb)4681 void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
4682 {
4683 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
4684 }
4685
ath10k_tpc_config_get_rate(struct ath10k * ar,struct wmi_pdev_tpc_config_event * ev,u32 rate_idx,u32 num_chains,u32 rate_code,u8 type)4686 static u8 ath10k_tpc_config_get_rate(struct ath10k *ar,
4687 struct wmi_pdev_tpc_config_event *ev,
4688 u32 rate_idx, u32 num_chains,
4689 u32 rate_code, u8 type)
4690 {
4691 u8 tpc, num_streams, preamble, ch, stm_idx;
4692
4693 num_streams = ATH10K_HW_NSS(rate_code);
4694 preamble = ATH10K_HW_PREAMBLE(rate_code);
4695 ch = num_chains - 1;
4696
4697 tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]);
4698
4699 if (__le32_to_cpu(ev->num_tx_chain) <= 1)
4700 goto out;
4701
4702 if (preamble == WMI_RATE_PREAMBLE_CCK)
4703 goto out;
4704
4705 stm_idx = num_streams - 1;
4706 if (num_chains <= num_streams)
4707 goto out;
4708
4709 switch (type) {
4710 case WMI_TPC_TABLE_TYPE_STBC:
4711 tpc = min_t(u8, tpc,
4712 ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]);
4713 break;
4714 case WMI_TPC_TABLE_TYPE_TXBF:
4715 tpc = min_t(u8, tpc,
4716 ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]);
4717 break;
4718 case WMI_TPC_TABLE_TYPE_CDD:
4719 tpc = min_t(u8, tpc,
4720 ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]);
4721 break;
4722 default:
4723 ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type);
4724 tpc = 0;
4725 break;
4726 }
4727
4728 out:
4729 return tpc;
4730 }
4731
ath10k_tpc_config_disp_tables(struct ath10k * ar,struct wmi_pdev_tpc_config_event * ev,struct ath10k_tpc_stats * tpc_stats,u8 * rate_code,u16 * pream_table,u8 type)4732 static void ath10k_tpc_config_disp_tables(struct ath10k *ar,
4733 struct wmi_pdev_tpc_config_event *ev,
4734 struct ath10k_tpc_stats *tpc_stats,
4735 u8 *rate_code, u16 *pream_table, u8 type)
4736 {
4737 u32 i, j, pream_idx, flags;
4738 u8 tpc[WMI_TPC_TX_N_CHAIN];
4739 char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
4740 char buff[WMI_TPC_BUF_SIZE];
4741
4742 flags = __le32_to_cpu(ev->flags);
4743
4744 switch (type) {
4745 case WMI_TPC_TABLE_TYPE_CDD:
4746 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
4747 ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
4748 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4749 return;
4750 }
4751 break;
4752 case WMI_TPC_TABLE_TYPE_STBC:
4753 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
4754 ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
4755 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4756 return;
4757 }
4758 break;
4759 case WMI_TPC_TABLE_TYPE_TXBF:
4760 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
4761 ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
4762 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4763 return;
4764 }
4765 break;
4766 default:
4767 ath10k_dbg(ar, ATH10K_DBG_WMI,
4768 "invalid table type in wmi tpc event: %d\n", type);
4769 return;
4770 }
4771
4772 pream_idx = 0;
4773 for (i = 0; i < tpc_stats->rate_max; i++) {
4774 memset(tpc_value, 0, sizeof(tpc_value));
4775 memset(buff, 0, sizeof(buff));
4776 if (i == pream_table[pream_idx])
4777 pream_idx++;
4778
4779 for (j = 0; j < tpc_stats->num_tx_chain; j++) {
4780 tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1,
4781 rate_code[i],
4782 type);
4783 snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
4784 strlcat(tpc_value, buff, sizeof(tpc_value));
4785 }
4786 tpc_stats->tpc_table[type].pream_idx[i] = pream_idx;
4787 tpc_stats->tpc_table[type].rate_code[i] = rate_code[i];
4788 memcpy(tpc_stats->tpc_table[type].tpc_value[i],
4789 tpc_value, sizeof(tpc_value));
4790 }
4791 }
4792
ath10k_wmi_tpc_config_get_rate_code(u8 * rate_code,u16 * pream_table,u32 num_tx_chain)4793 void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table,
4794 u32 num_tx_chain)
4795 {
4796 u32 i, j, pream_idx;
4797 u8 rate_idx;
4798
4799 /* Create the rate code table based on the chains supported */
4800 rate_idx = 0;
4801 pream_idx = 0;
4802
4803 /* Fill CCK rate code */
4804 for (i = 0; i < 4; i++) {
4805 rate_code[rate_idx] =
4806 ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK);
4807 rate_idx++;
4808 }
4809 pream_table[pream_idx] = rate_idx;
4810 pream_idx++;
4811
4812 /* Fill OFDM rate code */
4813 for (i = 0; i < 8; i++) {
4814 rate_code[rate_idx] =
4815 ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM);
4816 rate_idx++;
4817 }
4818 pream_table[pream_idx] = rate_idx;
4819 pream_idx++;
4820
4821 /* Fill HT20 rate code */
4822 for (i = 0; i < num_tx_chain; i++) {
4823 for (j = 0; j < 8; j++) {
4824 rate_code[rate_idx] =
4825 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
4826 rate_idx++;
4827 }
4828 }
4829 pream_table[pream_idx] = rate_idx;
4830 pream_idx++;
4831
4832 /* Fill HT40 rate code */
4833 for (i = 0; i < num_tx_chain; i++) {
4834 for (j = 0; j < 8; j++) {
4835 rate_code[rate_idx] =
4836 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
4837 rate_idx++;
4838 }
4839 }
4840 pream_table[pream_idx] = rate_idx;
4841 pream_idx++;
4842
4843 /* Fill VHT20 rate code */
4844 for (i = 0; i < num_tx_chain; i++) {
4845 for (j = 0; j < 10; j++) {
4846 rate_code[rate_idx] =
4847 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4848 rate_idx++;
4849 }
4850 }
4851 pream_table[pream_idx] = rate_idx;
4852 pream_idx++;
4853
4854 /* Fill VHT40 rate code */
4855 for (i = 0; i < num_tx_chain; i++) {
4856 for (j = 0; j < 10; j++) {
4857 rate_code[rate_idx] =
4858 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4859 rate_idx++;
4860 }
4861 }
4862 pream_table[pream_idx] = rate_idx;
4863 pream_idx++;
4864
4865 /* Fill VHT80 rate code */
4866 for (i = 0; i < num_tx_chain; i++) {
4867 for (j = 0; j < 10; j++) {
4868 rate_code[rate_idx] =
4869 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4870 rate_idx++;
4871 }
4872 }
4873 pream_table[pream_idx] = rate_idx;
4874 pream_idx++;
4875
4876 rate_code[rate_idx++] =
4877 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
4878 rate_code[rate_idx++] =
4879 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4880 rate_code[rate_idx++] =
4881 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
4882 rate_code[rate_idx++] =
4883 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4884 rate_code[rate_idx++] =
4885 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4886
4887 pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END;
4888 }
4889
ath10k_wmi_event_pdev_tpc_config(struct ath10k * ar,struct sk_buff * skb)4890 void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
4891 {
4892 u32 num_tx_chain, rate_max;
4893 u8 rate_code[WMI_TPC_RATE_MAX];
4894 u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
4895 struct wmi_pdev_tpc_config_event *ev;
4896 struct ath10k_tpc_stats *tpc_stats;
4897
4898 ev = (struct wmi_pdev_tpc_config_event *)skb->data;
4899
4900 num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
4901
4902 if (num_tx_chain > WMI_TPC_TX_N_CHAIN) {
4903 ath10k_warn(ar, "number of tx chain is %d greater than TPC configured tx chain %d\n",
4904 num_tx_chain, WMI_TPC_TX_N_CHAIN);
4905 return;
4906 }
4907
4908 rate_max = __le32_to_cpu(ev->rate_max);
4909 if (rate_max > WMI_TPC_RATE_MAX) {
4910 ath10k_warn(ar, "number of rate is %d greater than TPC configured rate %d\n",
4911 rate_max, WMI_TPC_RATE_MAX);
4912 rate_max = WMI_TPC_RATE_MAX;
4913 }
4914
4915 tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
4916 if (!tpc_stats)
4917 return;
4918
4919 ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table,
4920 num_tx_chain);
4921
4922 tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
4923 tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
4924 tpc_stats->ctl = __le32_to_cpu(ev->ctl);
4925 tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
4926 tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
4927 tpc_stats->twice_antenna_reduction =
4928 __le32_to_cpu(ev->twice_antenna_reduction);
4929 tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
4930 tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
4931 tpc_stats->num_tx_chain = num_tx_chain;
4932 tpc_stats->rate_max = rate_max;
4933
4934 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4935 rate_code, pream_table,
4936 WMI_TPC_TABLE_TYPE_CDD);
4937 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4938 rate_code, pream_table,
4939 WMI_TPC_TABLE_TYPE_STBC);
4940 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4941 rate_code, pream_table,
4942 WMI_TPC_TABLE_TYPE_TXBF);
4943
4944 ath10k_debug_tpc_stats_process(ar, tpc_stats);
4945
4946 ath10k_dbg(ar, ATH10K_DBG_WMI,
4947 "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
4948 __le32_to_cpu(ev->chan_freq),
4949 __le32_to_cpu(ev->phy_mode),
4950 __le32_to_cpu(ev->ctl),
4951 __le32_to_cpu(ev->reg_domain),
4952 a_sle32_to_cpu(ev->twice_antenna_gain),
4953 __le32_to_cpu(ev->twice_antenna_reduction),
4954 __le32_to_cpu(ev->power_limit),
4955 __le32_to_cpu(ev->twice_max_rd_power) / 2,
4956 __le32_to_cpu(ev->num_tx_chain),
4957 __le32_to_cpu(ev->rate_max));
4958 }
4959
4960 static u8
ath10k_wmi_tpc_final_get_rate(struct ath10k * ar,struct wmi_pdev_tpc_final_table_event * ev,u32 rate_idx,u32 num_chains,u32 rate_code,u8 type,u32 pream_idx)4961 ath10k_wmi_tpc_final_get_rate(struct ath10k *ar,
4962 struct wmi_pdev_tpc_final_table_event *ev,
4963 u32 rate_idx, u32 num_chains,
4964 u32 rate_code, u8 type, u32 pream_idx)
4965 {
4966 u8 tpc, num_streams, preamble, ch, stm_idx;
4967 s8 pow_agcdd, pow_agstbc, pow_agtxbf;
4968 int pream;
4969
4970 num_streams = ATH10K_HW_NSS(rate_code);
4971 preamble = ATH10K_HW_PREAMBLE(rate_code);
4972 ch = num_chains - 1;
4973 stm_idx = num_streams - 1;
4974 pream = -1;
4975
4976 if (__le32_to_cpu(ev->chan_freq) <= 2483) {
4977 switch (pream_idx) {
4978 case WMI_TPC_PREAM_2GHZ_CCK:
4979 pream = 0;
4980 break;
4981 case WMI_TPC_PREAM_2GHZ_OFDM:
4982 pream = 1;
4983 break;
4984 case WMI_TPC_PREAM_2GHZ_HT20:
4985 case WMI_TPC_PREAM_2GHZ_VHT20:
4986 pream = 2;
4987 break;
4988 case WMI_TPC_PREAM_2GHZ_HT40:
4989 case WMI_TPC_PREAM_2GHZ_VHT40:
4990 pream = 3;
4991 break;
4992 case WMI_TPC_PREAM_2GHZ_VHT80:
4993 pream = 4;
4994 break;
4995 default:
4996 pream = -1;
4997 break;
4998 }
4999 }
5000
5001 if (__le32_to_cpu(ev->chan_freq) >= 5180) {
5002 switch (pream_idx) {
5003 case WMI_TPC_PREAM_5GHZ_OFDM:
5004 pream = 0;
5005 break;
5006 case WMI_TPC_PREAM_5GHZ_HT20:
5007 case WMI_TPC_PREAM_5GHZ_VHT20:
5008 pream = 1;
5009 break;
5010 case WMI_TPC_PREAM_5GHZ_HT40:
5011 case WMI_TPC_PREAM_5GHZ_VHT40:
5012 pream = 2;
5013 break;
5014 case WMI_TPC_PREAM_5GHZ_VHT80:
5015 pream = 3;
5016 break;
5017 case WMI_TPC_PREAM_5GHZ_HTCUP:
5018 pream = 4;
5019 break;
5020 default:
5021 pream = -1;
5022 break;
5023 }
5024 }
5025
5026 if (pream == -1) {
5027 ath10k_warn(ar, "unknown wmi tpc final index and frequency: %u, %u\n",
5028 pream_idx, __le32_to_cpu(ev->chan_freq));
5029 tpc = 0;
5030 goto out;
5031 }
5032
5033 if (pream == 4)
5034 tpc = min_t(u8, ev->rates_array[rate_idx],
5035 ev->max_reg_allow_pow[ch]);
5036 else
5037 tpc = min_t(u8, min_t(u8, ev->rates_array[rate_idx],
5038 ev->max_reg_allow_pow[ch]),
5039 ev->ctl_power_table[0][pream][stm_idx]);
5040
5041 if (__le32_to_cpu(ev->num_tx_chain) <= 1)
5042 goto out;
5043
5044 if (preamble == WMI_RATE_PREAMBLE_CCK)
5045 goto out;
5046
5047 if (num_chains <= num_streams)
5048 goto out;
5049
5050 switch (type) {
5051 case WMI_TPC_TABLE_TYPE_STBC:
5052 pow_agstbc = ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx];
5053 if (pream == 4)
5054 tpc = min_t(u8, tpc, pow_agstbc);
5055 else
5056 tpc = min_t(u8, min_t(u8, tpc, pow_agstbc),
5057 ev->ctl_power_table[0][pream][stm_idx]);
5058 break;
5059 case WMI_TPC_TABLE_TYPE_TXBF:
5060 pow_agtxbf = ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx];
5061 if (pream == 4)
5062 tpc = min_t(u8, tpc, pow_agtxbf);
5063 else
5064 tpc = min_t(u8, min_t(u8, tpc, pow_agtxbf),
5065 ev->ctl_power_table[1][pream][stm_idx]);
5066 break;
5067 case WMI_TPC_TABLE_TYPE_CDD:
5068 pow_agcdd = ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx];
5069 if (pream == 4)
5070 tpc = min_t(u8, tpc, pow_agcdd);
5071 else
5072 tpc = min_t(u8, min_t(u8, tpc, pow_agcdd),
5073 ev->ctl_power_table[0][pream][stm_idx]);
5074 break;
5075 default:
5076 ath10k_warn(ar, "unknown wmi tpc final table type: %d\n", type);
5077 tpc = 0;
5078 break;
5079 }
5080
5081 out:
5082 return tpc;
5083 }
5084
5085 static void
ath10k_wmi_tpc_stats_final_disp_tables(struct ath10k * ar,struct wmi_pdev_tpc_final_table_event * ev,struct ath10k_tpc_stats_final * tpc_stats,u8 * rate_code,u16 * pream_table,u8 type)5086 ath10k_wmi_tpc_stats_final_disp_tables(struct ath10k *ar,
5087 struct wmi_pdev_tpc_final_table_event *ev,
5088 struct ath10k_tpc_stats_final *tpc_stats,
5089 u8 *rate_code, u16 *pream_table, u8 type)
5090 {
5091 u32 i, j, pream_idx, flags;
5092 u8 tpc[WMI_TPC_TX_N_CHAIN];
5093 char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
5094 char buff[WMI_TPC_BUF_SIZE];
5095
5096 flags = __le32_to_cpu(ev->flags);
5097
5098 switch (type) {
5099 case WMI_TPC_TABLE_TYPE_CDD:
5100 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
5101 ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
5102 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
5103 return;
5104 }
5105 break;
5106 case WMI_TPC_TABLE_TYPE_STBC:
5107 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
5108 ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
5109 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
5110 return;
5111 }
5112 break;
5113 case WMI_TPC_TABLE_TYPE_TXBF:
5114 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
5115 ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
5116 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
5117 return;
5118 }
5119 break;
5120 default:
5121 ath10k_dbg(ar, ATH10K_DBG_WMI,
5122 "invalid table type in wmi tpc event: %d\n", type);
5123 return;
5124 }
5125
5126 pream_idx = 0;
5127 for (i = 0; i < tpc_stats->rate_max; i++) {
5128 memset(tpc_value, 0, sizeof(tpc_value));
5129 memset(buff, 0, sizeof(buff));
5130 if (i == pream_table[pream_idx])
5131 pream_idx++;
5132
5133 for (j = 0; j < tpc_stats->num_tx_chain; j++) {
5134 tpc[j] = ath10k_wmi_tpc_final_get_rate(ar, ev, i, j + 1,
5135 rate_code[i],
5136 type, pream_idx);
5137 snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
5138 strlcat(tpc_value, buff, sizeof(tpc_value));
5139 }
5140 tpc_stats->tpc_table_final[type].pream_idx[i] = pream_idx;
5141 tpc_stats->tpc_table_final[type].rate_code[i] = rate_code[i];
5142 memcpy(tpc_stats->tpc_table_final[type].tpc_value[i],
5143 tpc_value, sizeof(tpc_value));
5144 }
5145 }
5146
ath10k_wmi_event_tpc_final_table(struct ath10k * ar,struct sk_buff * skb)5147 void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb)
5148 {
5149 u32 num_tx_chain, rate_max;
5150 u8 rate_code[WMI_TPC_FINAL_RATE_MAX];
5151 u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
5152 struct wmi_pdev_tpc_final_table_event *ev;
5153 struct ath10k_tpc_stats_final *tpc_stats;
5154
5155 ev = (struct wmi_pdev_tpc_final_table_event *)skb->data;
5156
5157 num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
5158 if (num_tx_chain > WMI_TPC_TX_N_CHAIN) {
5159 ath10k_warn(ar, "number of tx chain is %d greater than TPC final configured tx chain %d\n",
5160 num_tx_chain, WMI_TPC_TX_N_CHAIN);
5161 return;
5162 }
5163
5164 rate_max = __le32_to_cpu(ev->rate_max);
5165 if (rate_max > WMI_TPC_FINAL_RATE_MAX) {
5166 ath10k_warn(ar, "number of rate is %d greater than TPC final configured rate %d\n",
5167 rate_max, WMI_TPC_FINAL_RATE_MAX);
5168 rate_max = WMI_TPC_FINAL_RATE_MAX;
5169 }
5170
5171 tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
5172 if (!tpc_stats)
5173 return;
5174
5175 ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table,
5176 num_tx_chain);
5177
5178 tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
5179 tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
5180 tpc_stats->ctl = __le32_to_cpu(ev->ctl);
5181 tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
5182 tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
5183 tpc_stats->twice_antenna_reduction =
5184 __le32_to_cpu(ev->twice_antenna_reduction);
5185 tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
5186 tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
5187 tpc_stats->num_tx_chain = num_tx_chain;
5188 tpc_stats->rate_max = rate_max;
5189
5190 ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
5191 rate_code, pream_table,
5192 WMI_TPC_TABLE_TYPE_CDD);
5193 ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
5194 rate_code, pream_table,
5195 WMI_TPC_TABLE_TYPE_STBC);
5196 ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
5197 rate_code, pream_table,
5198 WMI_TPC_TABLE_TYPE_TXBF);
5199
5200 ath10k_debug_tpc_stats_final_process(ar, tpc_stats);
5201
5202 ath10k_dbg(ar, ATH10K_DBG_WMI,
5203 "wmi event tpc final table channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
5204 __le32_to_cpu(ev->chan_freq),
5205 __le32_to_cpu(ev->phy_mode),
5206 __le32_to_cpu(ev->ctl),
5207 __le32_to_cpu(ev->reg_domain),
5208 a_sle32_to_cpu(ev->twice_antenna_gain),
5209 __le32_to_cpu(ev->twice_antenna_reduction),
5210 __le32_to_cpu(ev->power_limit),
5211 __le32_to_cpu(ev->twice_max_rd_power) / 2,
5212 __le32_to_cpu(ev->num_tx_chain),
5213 __le32_to_cpu(ev->rate_max));
5214 }
5215
5216 static void
ath10k_wmi_handle_tdls_peer_event(struct ath10k * ar,struct sk_buff * skb)5217 ath10k_wmi_handle_tdls_peer_event(struct ath10k *ar, struct sk_buff *skb)
5218 {
5219 struct wmi_tdls_peer_event *ev;
5220 struct ath10k_peer *peer;
5221 struct ath10k_vif *arvif;
5222 int vdev_id;
5223 int peer_status;
5224 int peer_reason;
5225 u8 reason;
5226
5227 if (skb->len < sizeof(*ev)) {
5228 ath10k_err(ar, "received tdls peer event with invalid size (%d bytes)\n",
5229 skb->len);
5230 return;
5231 }
5232
5233 ev = (struct wmi_tdls_peer_event *)skb->data;
5234 vdev_id = __le32_to_cpu(ev->vdev_id);
5235 peer_status = __le32_to_cpu(ev->peer_status);
5236 peer_reason = __le32_to_cpu(ev->peer_reason);
5237
5238 spin_lock_bh(&ar->data_lock);
5239 peer = ath10k_peer_find(ar, vdev_id, ev->peer_macaddr.addr);
5240 spin_unlock_bh(&ar->data_lock);
5241
5242 if (!peer) {
5243 ath10k_warn(ar, "failed to find peer entry for %pM\n",
5244 ev->peer_macaddr.addr);
5245 return;
5246 }
5247
5248 switch (peer_status) {
5249 case WMI_TDLS_SHOULD_TEARDOWN:
5250 switch (peer_reason) {
5251 case WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT:
5252 case WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE:
5253 case WMI_TDLS_TEARDOWN_REASON_RSSI:
5254 reason = WLAN_REASON_TDLS_TEARDOWN_UNREACHABLE;
5255 break;
5256 default:
5257 reason = WLAN_REASON_TDLS_TEARDOWN_UNSPECIFIED;
5258 break;
5259 }
5260
5261 arvif = ath10k_get_arvif(ar, vdev_id);
5262 if (!arvif) {
5263 ath10k_warn(ar, "received tdls peer event for invalid vdev id %u\n",
5264 vdev_id);
5265 return;
5266 }
5267
5268 ieee80211_tdls_oper_request(arvif->vif, ev->peer_macaddr.addr,
5269 NL80211_TDLS_TEARDOWN, reason,
5270 GFP_ATOMIC);
5271
5272 ath10k_dbg(ar, ATH10K_DBG_WMI,
5273 "received tdls teardown event for peer %pM reason %u\n",
5274 ev->peer_macaddr.addr, peer_reason);
5275 break;
5276 default:
5277 ath10k_dbg(ar, ATH10K_DBG_WMI,
5278 "received unknown tdls peer event %u\n",
5279 peer_status);
5280 break;
5281 }
5282 }
5283
5284 static void
ath10k_wmi_event_peer_sta_ps_state_chg(struct ath10k * ar,struct sk_buff * skb)5285 ath10k_wmi_event_peer_sta_ps_state_chg(struct ath10k *ar, struct sk_buff *skb)
5286 {
5287 struct wmi_peer_sta_ps_state_chg_event *ev;
5288 struct ieee80211_sta *sta;
5289 struct ath10k_sta *arsta;
5290 u8 peer_addr[ETH_ALEN];
5291
5292 lockdep_assert_held(&ar->data_lock);
5293
5294 ev = (struct wmi_peer_sta_ps_state_chg_event *)skb->data;
5295 ether_addr_copy(peer_addr, ev->peer_macaddr.addr);
5296
5297 rcu_read_lock();
5298
5299 sta = ieee80211_find_sta_by_ifaddr(ar->hw, peer_addr, NULL);
5300
5301 if (!sta) {
5302 ath10k_warn(ar, "failed to find station entry %pM\n",
5303 peer_addr);
5304 goto exit;
5305 }
5306
5307 arsta = (struct ath10k_sta *)sta->drv_priv;
5308 arsta->peer_ps_state = __le32_to_cpu(ev->peer_ps_state);
5309
5310 exit:
5311 rcu_read_unlock();
5312 }
5313
ath10k_wmi_event_pdev_ftm_intg(struct ath10k * ar,struct sk_buff * skb)5314 void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
5315 {
5316 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
5317 }
5318
ath10k_wmi_event_gtk_offload_status(struct ath10k * ar,struct sk_buff * skb)5319 void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
5320 {
5321 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
5322 }
5323
ath10k_wmi_event_gtk_rekey_fail(struct ath10k * ar,struct sk_buff * skb)5324 void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
5325 {
5326 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
5327 }
5328
ath10k_wmi_event_delba_complete(struct ath10k * ar,struct sk_buff * skb)5329 void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
5330 {
5331 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
5332 }
5333
ath10k_wmi_event_addba_complete(struct ath10k * ar,struct sk_buff * skb)5334 void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
5335 {
5336 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
5337 }
5338
ath10k_wmi_event_vdev_install_key_complete(struct ath10k * ar,struct sk_buff * skb)5339 void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
5340 struct sk_buff *skb)
5341 {
5342 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
5343 }
5344
ath10k_wmi_event_inst_rssi_stats(struct ath10k * ar,struct sk_buff * skb)5345 void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
5346 {
5347 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
5348 }
5349
ath10k_wmi_event_vdev_standby_req(struct ath10k * ar,struct sk_buff * skb)5350 void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
5351 {
5352 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
5353 }
5354
ath10k_wmi_event_vdev_resume_req(struct ath10k * ar,struct sk_buff * skb)5355 void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
5356 {
5357 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
5358 }
5359
ath10k_wmi_alloc_chunk(struct ath10k * ar,u32 req_id,u32 num_units,u32 unit_len)5360 static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id,
5361 u32 num_units, u32 unit_len)
5362 {
5363 dma_addr_t paddr;
5364 u32 pool_size;
5365 int idx = ar->wmi.num_mem_chunks;
5366 void *vaddr;
5367
5368 pool_size = num_units * round_up(unit_len, 4);
5369 vaddr = dma_alloc_coherent(ar->dev, pool_size, &paddr, GFP_KERNEL);
5370
5371 if (!vaddr)
5372 return -ENOMEM;
5373
5374 ar->wmi.mem_chunks[idx].vaddr = vaddr;
5375 ar->wmi.mem_chunks[idx].paddr = paddr;
5376 ar->wmi.mem_chunks[idx].len = pool_size;
5377 ar->wmi.mem_chunks[idx].req_id = req_id;
5378 ar->wmi.num_mem_chunks++;
5379
5380 return num_units;
5381 }
5382
ath10k_wmi_alloc_host_mem(struct ath10k * ar,u32 req_id,u32 num_units,u32 unit_len)5383 static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
5384 u32 num_units, u32 unit_len)
5385 {
5386 int ret;
5387
5388 while (num_units) {
5389 ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len);
5390 if (ret < 0)
5391 return ret;
5392
5393 num_units -= ret;
5394 }
5395
5396 return 0;
5397 }
5398
5399 static bool
ath10k_wmi_is_host_mem_allocated(struct ath10k * ar,const struct wlan_host_mem_req ** mem_reqs,u32 num_mem_reqs)5400 ath10k_wmi_is_host_mem_allocated(struct ath10k *ar,
5401 const struct wlan_host_mem_req **mem_reqs,
5402 u32 num_mem_reqs)
5403 {
5404 u32 req_id, num_units, unit_size, num_unit_info;
5405 u32 pool_size;
5406 int i, j;
5407 bool found;
5408
5409 if (ar->wmi.num_mem_chunks != num_mem_reqs)
5410 return false;
5411
5412 for (i = 0; i < num_mem_reqs; ++i) {
5413 req_id = __le32_to_cpu(mem_reqs[i]->req_id);
5414 num_units = __le32_to_cpu(mem_reqs[i]->num_units);
5415 unit_size = __le32_to_cpu(mem_reqs[i]->unit_size);
5416 num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info);
5417
5418 if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
5419 if (ar->num_active_peers)
5420 num_units = ar->num_active_peers + 1;
5421 else
5422 num_units = ar->max_num_peers + 1;
5423 } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
5424 num_units = ar->max_num_peers + 1;
5425 } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
5426 num_units = ar->max_num_vdevs + 1;
5427 }
5428
5429 found = false;
5430 for (j = 0; j < ar->wmi.num_mem_chunks; j++) {
5431 if (ar->wmi.mem_chunks[j].req_id == req_id) {
5432 pool_size = num_units * round_up(unit_size, 4);
5433 if (ar->wmi.mem_chunks[j].len == pool_size) {
5434 found = true;
5435 break;
5436 }
5437 }
5438 }
5439 if (!found)
5440 return false;
5441 }
5442
5443 return true;
5444 }
5445
5446 static int
ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_svc_rdy_ev_arg * arg)5447 ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
5448 struct wmi_svc_rdy_ev_arg *arg)
5449 {
5450 struct wmi_service_ready_event *ev;
5451 size_t i, n;
5452
5453 if (skb->len < sizeof(*ev))
5454 return -EPROTO;
5455
5456 ev = (void *)skb->data;
5457 skb_pull(skb, sizeof(*ev));
5458 arg->min_tx_power = ev->hw_min_tx_power;
5459 arg->max_tx_power = ev->hw_max_tx_power;
5460 arg->ht_cap = ev->ht_cap_info;
5461 arg->vht_cap = ev->vht_cap_info;
5462 arg->vht_supp_mcs = ev->vht_supp_mcs;
5463 arg->sw_ver0 = ev->sw_version;
5464 arg->sw_ver1 = ev->sw_version_1;
5465 arg->phy_capab = ev->phy_capability;
5466 arg->num_rf_chains = ev->num_rf_chains;
5467 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
5468 arg->low_2ghz_chan = ev->hal_reg_capabilities.low_2ghz_chan;
5469 arg->high_2ghz_chan = ev->hal_reg_capabilities.high_2ghz_chan;
5470 arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
5471 arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
5472 arg->num_mem_reqs = ev->num_mem_reqs;
5473 arg->service_map = ev->wmi_service_bitmap;
5474 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5475
5476 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
5477 ARRAY_SIZE(arg->mem_reqs));
5478 for (i = 0; i < n; i++)
5479 arg->mem_reqs[i] = &ev->mem_reqs[i];
5480
5481 if (skb->len <
5482 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
5483 return -EPROTO;
5484
5485 return 0;
5486 }
5487
5488 static int
ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_svc_rdy_ev_arg * arg)5489 ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
5490 struct wmi_svc_rdy_ev_arg *arg)
5491 {
5492 struct wmi_10x_service_ready_event *ev;
5493 int i, n;
5494
5495 if (skb->len < sizeof(*ev))
5496 return -EPROTO;
5497
5498 ev = (void *)skb->data;
5499 skb_pull(skb, sizeof(*ev));
5500 arg->min_tx_power = ev->hw_min_tx_power;
5501 arg->max_tx_power = ev->hw_max_tx_power;
5502 arg->ht_cap = ev->ht_cap_info;
5503 arg->vht_cap = ev->vht_cap_info;
5504 arg->vht_supp_mcs = ev->vht_supp_mcs;
5505 arg->sw_ver0 = ev->sw_version;
5506 arg->phy_capab = ev->phy_capability;
5507 arg->num_rf_chains = ev->num_rf_chains;
5508 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
5509 arg->low_2ghz_chan = ev->hal_reg_capabilities.low_2ghz_chan;
5510 arg->high_2ghz_chan = ev->hal_reg_capabilities.high_2ghz_chan;
5511 arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
5512 arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
5513 arg->num_mem_reqs = ev->num_mem_reqs;
5514 arg->service_map = ev->wmi_service_bitmap;
5515 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5516
5517 /* Deliberately skipping ev->sys_cap_info as WMI and WMI-TLV have
5518 * different values. We would need a translation to handle that,
5519 * but as we don't currently need anything from sys_cap_info from
5520 * WMI interface (only from WMI-TLV) safest it to skip it.
5521 */
5522
5523 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
5524 ARRAY_SIZE(arg->mem_reqs));
5525 for (i = 0; i < n; i++)
5526 arg->mem_reqs[i] = &ev->mem_reqs[i];
5527
5528 if (skb->len <
5529 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
5530 return -EPROTO;
5531
5532 return 0;
5533 }
5534
ath10k_wmi_event_service_ready_work(struct work_struct * work)5535 static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
5536 {
5537 struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work);
5538 struct sk_buff *skb = ar->svc_rdy_skb;
5539 struct wmi_svc_rdy_ev_arg arg = {};
5540 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
5541 int ret;
5542 bool allocated;
5543
5544 if (!skb) {
5545 ath10k_warn(ar, "invalid service ready event skb\n");
5546 return;
5547 }
5548
5549 ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
5550 if (ret) {
5551 ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
5552 return;
5553 }
5554
5555 ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
5556 arg.service_map_len);
5557
5558 ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
5559 ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
5560 ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
5561 ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
5562 ar->vht_supp_mcs = __le32_to_cpu(arg.vht_supp_mcs);
5563 ar->fw_version_major =
5564 (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
5565 ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
5566 ar->fw_version_release =
5567 (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
5568 ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
5569 ar->phy_capability = __le32_to_cpu(arg.phy_capab);
5570 ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
5571 ar->hw_eeprom_rd = __le32_to_cpu(arg.eeprom_rd);
5572 ar->low_2ghz_chan = __le32_to_cpu(arg.low_2ghz_chan);
5573 ar->high_2ghz_chan = __le32_to_cpu(arg.high_2ghz_chan);
5574 ar->low_5ghz_chan = __le32_to_cpu(arg.low_5ghz_chan);
5575 ar->high_5ghz_chan = __le32_to_cpu(arg.high_5ghz_chan);
5576 ar->sys_cap_info = __le32_to_cpu(arg.sys_cap_info);
5577
5578 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
5579 arg.service_map, arg.service_map_len);
5580 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi sys_cap_info 0x%x\n",
5581 ar->sys_cap_info);
5582
5583 if (ar->num_rf_chains > ar->max_spatial_stream) {
5584 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
5585 ar->num_rf_chains, ar->max_spatial_stream);
5586 ar->num_rf_chains = ar->max_spatial_stream;
5587 }
5588
5589 if (!ar->cfg_tx_chainmask) {
5590 ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1;
5591 ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1;
5592 }
5593
5594 if (strlen(ar->hw->wiphy->fw_version) == 0) {
5595 snprintf(ar->hw->wiphy->fw_version,
5596 sizeof(ar->hw->wiphy->fw_version),
5597 "%u.%u.%u.%u",
5598 ar->fw_version_major,
5599 ar->fw_version_minor,
5600 ar->fw_version_release,
5601 ar->fw_version_build);
5602 }
5603
5604 num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
5605 if (num_mem_reqs > WMI_MAX_MEM_REQS) {
5606 ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
5607 num_mem_reqs);
5608 return;
5609 }
5610
5611 if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) {
5612 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
5613 ar->running_fw->fw_file.fw_features))
5614 ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC +
5615 ar->max_num_vdevs;
5616 else
5617 ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS +
5618 ar->max_num_vdevs;
5619
5620 ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX +
5621 ar->max_num_vdevs;
5622 ar->num_tids = ar->num_active_peers * 2;
5623 ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX;
5624 }
5625
5626 /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE
5627 * and WMI_SERVICE_IRAM_TIDS, etc.
5628 */
5629
5630 allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs,
5631 num_mem_reqs);
5632 if (allocated)
5633 goto skip_mem_alloc;
5634
5635 /* Either this event is received during boot time or there is a change
5636 * in memory requirement from firmware when compared to last request.
5637 * Free any old memory and do a fresh allocation based on the current
5638 * memory requirement.
5639 */
5640 ath10k_wmi_free_host_mem(ar);
5641
5642 for (i = 0; i < num_mem_reqs; ++i) {
5643 req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
5644 num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
5645 unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
5646 num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
5647
5648 if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
5649 if (ar->num_active_peers)
5650 num_units = ar->num_active_peers + 1;
5651 else
5652 num_units = ar->max_num_peers + 1;
5653 } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
5654 /* number of units to allocate is number of
5655 * peers, 1 extra for self peer on target
5656 * this needs to be tied, host and target
5657 * can get out of sync
5658 */
5659 num_units = ar->max_num_peers + 1;
5660 } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
5661 num_units = ar->max_num_vdevs + 1;
5662 }
5663
5664 ath10k_dbg(ar, ATH10K_DBG_WMI,
5665 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
5666 req_id,
5667 __le32_to_cpu(arg.mem_reqs[i]->num_units),
5668 num_unit_info,
5669 unit_size,
5670 num_units);
5671
5672 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
5673 unit_size);
5674 if (ret)
5675 return;
5676 }
5677
5678 skip_mem_alloc:
5679 ath10k_dbg(ar, ATH10K_DBG_WMI,
5680 "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_mcs 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x low_2ghz_chan %d high_2ghz_chan %d low_5ghz_chan %d high_5ghz_chan %d num_mem_reqs 0x%08x\n",
5681 __le32_to_cpu(arg.min_tx_power),
5682 __le32_to_cpu(arg.max_tx_power),
5683 __le32_to_cpu(arg.ht_cap),
5684 __le32_to_cpu(arg.vht_cap),
5685 __le32_to_cpu(arg.vht_supp_mcs),
5686 __le32_to_cpu(arg.sw_ver0),
5687 __le32_to_cpu(arg.sw_ver1),
5688 __le32_to_cpu(arg.fw_build),
5689 __le32_to_cpu(arg.phy_capab),
5690 __le32_to_cpu(arg.num_rf_chains),
5691 __le32_to_cpu(arg.eeprom_rd),
5692 __le32_to_cpu(arg.low_2ghz_chan),
5693 __le32_to_cpu(arg.high_2ghz_chan),
5694 __le32_to_cpu(arg.low_5ghz_chan),
5695 __le32_to_cpu(arg.high_5ghz_chan),
5696 __le32_to_cpu(arg.num_mem_reqs));
5697
5698 dev_kfree_skb(skb);
5699 ar->svc_rdy_skb = NULL;
5700 complete(&ar->wmi.service_ready);
5701 }
5702
ath10k_wmi_event_service_ready(struct ath10k * ar,struct sk_buff * skb)5703 void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
5704 {
5705 ar->svc_rdy_skb = skb;
5706 queue_work(ar->workqueue_aux, &ar->svc_rdy_work);
5707 }
5708
ath10k_wmi_op_pull_rdy_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_rdy_ev_arg * arg)5709 static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
5710 struct wmi_rdy_ev_arg *arg)
5711 {
5712 struct wmi_ready_event *ev = (void *)skb->data;
5713
5714 if (skb->len < sizeof(*ev))
5715 return -EPROTO;
5716
5717 skb_pull(skb, sizeof(*ev));
5718 arg->sw_version = ev->sw_version;
5719 arg->abi_version = ev->abi_version;
5720 arg->status = ev->status;
5721 arg->mac_addr = ev->mac_addr.addr;
5722
5723 return 0;
5724 }
5725
ath10k_wmi_op_pull_roam_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_roam_ev_arg * arg)5726 static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb,
5727 struct wmi_roam_ev_arg *arg)
5728 {
5729 struct wmi_roam_ev *ev = (void *)skb->data;
5730
5731 if (skb->len < sizeof(*ev))
5732 return -EPROTO;
5733
5734 skb_pull(skb, sizeof(*ev));
5735 arg->vdev_id = ev->vdev_id;
5736 arg->reason = ev->reason;
5737
5738 return 0;
5739 }
5740
ath10k_wmi_op_pull_echo_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_echo_ev_arg * arg)5741 static int ath10k_wmi_op_pull_echo_ev(struct ath10k *ar,
5742 struct sk_buff *skb,
5743 struct wmi_echo_ev_arg *arg)
5744 {
5745 struct wmi_echo_event *ev = (void *)skb->data;
5746
5747 arg->value = ev->value;
5748
5749 return 0;
5750 }
5751
ath10k_wmi_event_ready(struct ath10k * ar,struct sk_buff * skb)5752 int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
5753 {
5754 struct wmi_rdy_ev_arg arg = {};
5755 int ret;
5756
5757 ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
5758 if (ret) {
5759 ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
5760 return ret;
5761 }
5762
5763 ath10k_dbg(ar, ATH10K_DBG_WMI,
5764 "wmi event ready sw_version 0x%08x abi_version %u mac_addr %pM status %d\n",
5765 __le32_to_cpu(arg.sw_version),
5766 __le32_to_cpu(arg.abi_version),
5767 arg.mac_addr,
5768 __le32_to_cpu(arg.status));
5769
5770 if (is_zero_ether_addr(ar->mac_addr))
5771 ether_addr_copy(ar->mac_addr, arg.mac_addr);
5772 complete(&ar->wmi.unified_ready);
5773 return 0;
5774 }
5775
ath10k_wmi_event_service_available(struct ath10k * ar,struct sk_buff * skb)5776 void ath10k_wmi_event_service_available(struct ath10k *ar, struct sk_buff *skb)
5777 {
5778 int ret;
5779 struct wmi_svc_avail_ev_arg arg = {};
5780
5781 ret = ath10k_wmi_pull_svc_avail(ar, skb, &arg);
5782 if (ret) {
5783 ath10k_warn(ar, "failed to parse service available event: %d\n",
5784 ret);
5785 }
5786
5787 /*
5788 * Initialization of "arg.service_map_ext_valid" to ZERO is necessary
5789 * for the below logic to work.
5790 */
5791 if (arg.service_map_ext_valid)
5792 ath10k_wmi_map_svc_ext(ar, arg.service_map_ext, ar->wmi.svc_map,
5793 __le32_to_cpu(arg.service_map_ext_len));
5794 }
5795
ath10k_wmi_event_temperature(struct ath10k * ar,struct sk_buff * skb)5796 static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
5797 {
5798 const struct wmi_pdev_temperature_event *ev;
5799
5800 ev = (struct wmi_pdev_temperature_event *)skb->data;
5801 if (WARN_ON(skb->len < sizeof(*ev)))
5802 return -EPROTO;
5803
5804 ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
5805 return 0;
5806 }
5807
ath10k_wmi_event_pdev_bss_chan_info(struct ath10k * ar,struct sk_buff * skb)5808 static int ath10k_wmi_event_pdev_bss_chan_info(struct ath10k *ar,
5809 struct sk_buff *skb)
5810 {
5811 struct wmi_pdev_bss_chan_info_event *ev;
5812 struct survey_info *survey;
5813 u64 busy, total, tx, rx, rx_bss;
5814 u32 freq, noise_floor;
5815 u32 cc_freq_hz = ar->hw_params.channel_counters_freq_hz;
5816 int idx;
5817
5818 ev = (struct wmi_pdev_bss_chan_info_event *)skb->data;
5819 if (WARN_ON(skb->len < sizeof(*ev)))
5820 return -EPROTO;
5821
5822 freq = __le32_to_cpu(ev->freq);
5823 noise_floor = __le32_to_cpu(ev->noise_floor);
5824 busy = __le64_to_cpu(ev->cycle_busy);
5825 total = __le64_to_cpu(ev->cycle_total);
5826 tx = __le64_to_cpu(ev->cycle_tx);
5827 rx = __le64_to_cpu(ev->cycle_rx);
5828 rx_bss = __le64_to_cpu(ev->cycle_rx_bss);
5829
5830 ath10k_dbg(ar, ATH10K_DBG_WMI,
5831 "wmi event pdev bss chan info:\n freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
5832 freq, noise_floor, busy, total, tx, rx, rx_bss);
5833
5834 spin_lock_bh(&ar->data_lock);
5835 idx = freq_to_idx(ar, freq);
5836 if (idx >= ARRAY_SIZE(ar->survey)) {
5837 ath10k_warn(ar, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
5838 freq, idx);
5839 goto exit;
5840 }
5841
5842 survey = &ar->survey[idx];
5843
5844 survey->noise = noise_floor;
5845 survey->time = div_u64(total, cc_freq_hz);
5846 survey->time_busy = div_u64(busy, cc_freq_hz);
5847 survey->time_rx = div_u64(rx_bss, cc_freq_hz);
5848 survey->time_tx = div_u64(tx, cc_freq_hz);
5849 survey->filled |= (SURVEY_INFO_NOISE_DBM |
5850 SURVEY_INFO_TIME |
5851 SURVEY_INFO_TIME_BUSY |
5852 SURVEY_INFO_TIME_RX |
5853 SURVEY_INFO_TIME_TX);
5854 exit:
5855 spin_unlock_bh(&ar->data_lock);
5856 complete(&ar->bss_survey_done);
5857 return 0;
5858 }
5859
ath10k_wmi_queue_set_coverage_class_work(struct ath10k * ar)5860 static inline void ath10k_wmi_queue_set_coverage_class_work(struct ath10k *ar)
5861 {
5862 if (ar->hw_params.hw_ops->set_coverage_class) {
5863 spin_lock_bh(&ar->data_lock);
5864
5865 /* This call only ensures that the modified coverage class
5866 * persists in case the firmware sets the registers back to
5867 * their default value. So calling it is only necessary if the
5868 * coverage class has a non-zero value.
5869 */
5870 if (ar->fw_coverage.coverage_class)
5871 queue_work(ar->workqueue, &ar->set_coverage_class_work);
5872
5873 spin_unlock_bh(&ar->data_lock);
5874 }
5875 }
5876
ath10k_wmi_op_rx(struct ath10k * ar,struct sk_buff * skb)5877 static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
5878 {
5879 struct wmi_cmd_hdr *cmd_hdr;
5880 enum wmi_event_id id;
5881
5882 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
5883 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
5884
5885 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
5886 goto out;
5887
5888 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5889
5890 switch (id) {
5891 case WMI_MGMT_RX_EVENTID:
5892 ath10k_wmi_event_mgmt_rx(ar, skb);
5893 /* mgmt_rx() owns the skb now! */
5894 return;
5895 case WMI_SCAN_EVENTID:
5896 ath10k_wmi_event_scan(ar, skb);
5897 ath10k_wmi_queue_set_coverage_class_work(ar);
5898 break;
5899 case WMI_CHAN_INFO_EVENTID:
5900 ath10k_wmi_event_chan_info(ar, skb);
5901 break;
5902 case WMI_ECHO_EVENTID:
5903 ath10k_wmi_event_echo(ar, skb);
5904 break;
5905 case WMI_DEBUG_MESG_EVENTID:
5906 ath10k_wmi_event_debug_mesg(ar, skb);
5907 ath10k_wmi_queue_set_coverage_class_work(ar);
5908 break;
5909 case WMI_UPDATE_STATS_EVENTID:
5910 ath10k_wmi_event_update_stats(ar, skb);
5911 break;
5912 case WMI_VDEV_START_RESP_EVENTID:
5913 ath10k_wmi_event_vdev_start_resp(ar, skb);
5914 ath10k_wmi_queue_set_coverage_class_work(ar);
5915 break;
5916 case WMI_VDEV_STOPPED_EVENTID:
5917 ath10k_wmi_event_vdev_stopped(ar, skb);
5918 ath10k_wmi_queue_set_coverage_class_work(ar);
5919 break;
5920 case WMI_PEER_STA_KICKOUT_EVENTID:
5921 ath10k_wmi_event_peer_sta_kickout(ar, skb);
5922 break;
5923 case WMI_HOST_SWBA_EVENTID:
5924 ath10k_wmi_event_host_swba(ar, skb);
5925 break;
5926 case WMI_TBTTOFFSET_UPDATE_EVENTID:
5927 ath10k_wmi_event_tbttoffset_update(ar, skb);
5928 break;
5929 case WMI_PHYERR_EVENTID:
5930 ath10k_wmi_event_phyerr(ar, skb);
5931 break;
5932 case WMI_ROAM_EVENTID:
5933 ath10k_wmi_event_roam(ar, skb);
5934 ath10k_wmi_queue_set_coverage_class_work(ar);
5935 break;
5936 case WMI_PROFILE_MATCH:
5937 ath10k_wmi_event_profile_match(ar, skb);
5938 break;
5939 case WMI_DEBUG_PRINT_EVENTID:
5940 ath10k_wmi_event_debug_print(ar, skb);
5941 ath10k_wmi_queue_set_coverage_class_work(ar);
5942 break;
5943 case WMI_PDEV_QVIT_EVENTID:
5944 ath10k_wmi_event_pdev_qvit(ar, skb);
5945 break;
5946 case WMI_WLAN_PROFILE_DATA_EVENTID:
5947 ath10k_wmi_event_wlan_profile_data(ar, skb);
5948 break;
5949 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
5950 ath10k_wmi_event_rtt_measurement_report(ar, skb);
5951 break;
5952 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
5953 ath10k_wmi_event_tsf_measurement_report(ar, skb);
5954 break;
5955 case WMI_RTT_ERROR_REPORT_EVENTID:
5956 ath10k_wmi_event_rtt_error_report(ar, skb);
5957 break;
5958 case WMI_WOW_WAKEUP_HOST_EVENTID:
5959 ath10k_wmi_event_wow_wakeup_host(ar, skb);
5960 break;
5961 case WMI_DCS_INTERFERENCE_EVENTID:
5962 ath10k_wmi_event_dcs_interference(ar, skb);
5963 break;
5964 case WMI_PDEV_TPC_CONFIG_EVENTID:
5965 ath10k_wmi_event_pdev_tpc_config(ar, skb);
5966 break;
5967 case WMI_PDEV_FTM_INTG_EVENTID:
5968 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
5969 break;
5970 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
5971 ath10k_wmi_event_gtk_offload_status(ar, skb);
5972 break;
5973 case WMI_GTK_REKEY_FAIL_EVENTID:
5974 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
5975 break;
5976 case WMI_TX_DELBA_COMPLETE_EVENTID:
5977 ath10k_wmi_event_delba_complete(ar, skb);
5978 break;
5979 case WMI_TX_ADDBA_COMPLETE_EVENTID:
5980 ath10k_wmi_event_addba_complete(ar, skb);
5981 break;
5982 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
5983 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
5984 break;
5985 case WMI_SERVICE_READY_EVENTID:
5986 ath10k_wmi_event_service_ready(ar, skb);
5987 return;
5988 case WMI_READY_EVENTID:
5989 ath10k_wmi_event_ready(ar, skb);
5990 ath10k_wmi_queue_set_coverage_class_work(ar);
5991 break;
5992 case WMI_SERVICE_AVAILABLE_EVENTID:
5993 ath10k_wmi_event_service_available(ar, skb);
5994 break;
5995 default:
5996 ath10k_warn(ar, "Unknown eventid: %d\n", id);
5997 break;
5998 }
5999
6000 out:
6001 dev_kfree_skb(skb);
6002 }
6003
ath10k_wmi_10_1_op_rx(struct ath10k * ar,struct sk_buff * skb)6004 static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
6005 {
6006 struct wmi_cmd_hdr *cmd_hdr;
6007 enum wmi_10x_event_id id;
6008 bool consumed;
6009
6010 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
6011 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
6012
6013 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
6014 goto out;
6015
6016 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
6017
6018 consumed = ath10k_tm_event_wmi(ar, id, skb);
6019
6020 /* Ready event must be handled normally also in UTF mode so that we
6021 * know the UTF firmware has booted, others we are just bypass WMI
6022 * events to testmode.
6023 */
6024 if (consumed && id != WMI_10X_READY_EVENTID) {
6025 ath10k_dbg(ar, ATH10K_DBG_WMI,
6026 "wmi testmode consumed 0x%x\n", id);
6027 goto out;
6028 }
6029
6030 switch (id) {
6031 case WMI_10X_MGMT_RX_EVENTID:
6032 ath10k_wmi_event_mgmt_rx(ar, skb);
6033 /* mgmt_rx() owns the skb now! */
6034 return;
6035 case WMI_10X_SCAN_EVENTID:
6036 ath10k_wmi_event_scan(ar, skb);
6037 ath10k_wmi_queue_set_coverage_class_work(ar);
6038 break;
6039 case WMI_10X_CHAN_INFO_EVENTID:
6040 ath10k_wmi_event_chan_info(ar, skb);
6041 break;
6042 case WMI_10X_ECHO_EVENTID:
6043 ath10k_wmi_event_echo(ar, skb);
6044 break;
6045 case WMI_10X_DEBUG_MESG_EVENTID:
6046 ath10k_wmi_event_debug_mesg(ar, skb);
6047 ath10k_wmi_queue_set_coverage_class_work(ar);
6048 break;
6049 case WMI_10X_UPDATE_STATS_EVENTID:
6050 ath10k_wmi_event_update_stats(ar, skb);
6051 break;
6052 case WMI_10X_VDEV_START_RESP_EVENTID:
6053 ath10k_wmi_event_vdev_start_resp(ar, skb);
6054 ath10k_wmi_queue_set_coverage_class_work(ar);
6055 break;
6056 case WMI_10X_VDEV_STOPPED_EVENTID:
6057 ath10k_wmi_event_vdev_stopped(ar, skb);
6058 ath10k_wmi_queue_set_coverage_class_work(ar);
6059 break;
6060 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
6061 ath10k_wmi_event_peer_sta_kickout(ar, skb);
6062 break;
6063 case WMI_10X_HOST_SWBA_EVENTID:
6064 ath10k_wmi_event_host_swba(ar, skb);
6065 break;
6066 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
6067 ath10k_wmi_event_tbttoffset_update(ar, skb);
6068 break;
6069 case WMI_10X_PHYERR_EVENTID:
6070 ath10k_wmi_event_phyerr(ar, skb);
6071 break;
6072 case WMI_10X_ROAM_EVENTID:
6073 ath10k_wmi_event_roam(ar, skb);
6074 ath10k_wmi_queue_set_coverage_class_work(ar);
6075 break;
6076 case WMI_10X_PROFILE_MATCH:
6077 ath10k_wmi_event_profile_match(ar, skb);
6078 break;
6079 case WMI_10X_DEBUG_PRINT_EVENTID:
6080 ath10k_wmi_event_debug_print(ar, skb);
6081 ath10k_wmi_queue_set_coverage_class_work(ar);
6082 break;
6083 case WMI_10X_PDEV_QVIT_EVENTID:
6084 ath10k_wmi_event_pdev_qvit(ar, skb);
6085 break;
6086 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
6087 ath10k_wmi_event_wlan_profile_data(ar, skb);
6088 break;
6089 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
6090 ath10k_wmi_event_rtt_measurement_report(ar, skb);
6091 break;
6092 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
6093 ath10k_wmi_event_tsf_measurement_report(ar, skb);
6094 break;
6095 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
6096 ath10k_wmi_event_rtt_error_report(ar, skb);
6097 break;
6098 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
6099 ath10k_wmi_event_wow_wakeup_host(ar, skb);
6100 break;
6101 case WMI_10X_DCS_INTERFERENCE_EVENTID:
6102 ath10k_wmi_event_dcs_interference(ar, skb);
6103 break;
6104 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
6105 ath10k_wmi_event_pdev_tpc_config(ar, skb);
6106 break;
6107 case WMI_10X_INST_RSSI_STATS_EVENTID:
6108 ath10k_wmi_event_inst_rssi_stats(ar, skb);
6109 break;
6110 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
6111 ath10k_wmi_event_vdev_standby_req(ar, skb);
6112 break;
6113 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
6114 ath10k_wmi_event_vdev_resume_req(ar, skb);
6115 break;
6116 case WMI_10X_SERVICE_READY_EVENTID:
6117 ath10k_wmi_event_service_ready(ar, skb);
6118 return;
6119 case WMI_10X_READY_EVENTID:
6120 ath10k_wmi_event_ready(ar, skb);
6121 ath10k_wmi_queue_set_coverage_class_work(ar);
6122 break;
6123 case WMI_10X_PDEV_UTF_EVENTID:
6124 /* ignore utf events */
6125 break;
6126 default:
6127 ath10k_warn(ar, "Unknown eventid: %d\n", id);
6128 break;
6129 }
6130
6131 out:
6132 dev_kfree_skb(skb);
6133 }
6134
ath10k_wmi_10_2_op_rx(struct ath10k * ar,struct sk_buff * skb)6135 static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
6136 {
6137 struct wmi_cmd_hdr *cmd_hdr;
6138 enum wmi_10_2_event_id id;
6139 bool consumed;
6140
6141 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
6142 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
6143
6144 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
6145 goto out;
6146
6147 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
6148
6149 consumed = ath10k_tm_event_wmi(ar, id, skb);
6150
6151 /* Ready event must be handled normally also in UTF mode so that we
6152 * know the UTF firmware has booted, others we are just bypass WMI
6153 * events to testmode.
6154 */
6155 if (consumed && id != WMI_10_2_READY_EVENTID) {
6156 ath10k_dbg(ar, ATH10K_DBG_WMI,
6157 "wmi testmode consumed 0x%x\n", id);
6158 goto out;
6159 }
6160
6161 switch (id) {
6162 case WMI_10_2_MGMT_RX_EVENTID:
6163 ath10k_wmi_event_mgmt_rx(ar, skb);
6164 /* mgmt_rx() owns the skb now! */
6165 return;
6166 case WMI_10_2_SCAN_EVENTID:
6167 ath10k_wmi_event_scan(ar, skb);
6168 ath10k_wmi_queue_set_coverage_class_work(ar);
6169 break;
6170 case WMI_10_2_CHAN_INFO_EVENTID:
6171 ath10k_wmi_event_chan_info(ar, skb);
6172 break;
6173 case WMI_10_2_ECHO_EVENTID:
6174 ath10k_wmi_event_echo(ar, skb);
6175 break;
6176 case WMI_10_2_DEBUG_MESG_EVENTID:
6177 ath10k_wmi_event_debug_mesg(ar, skb);
6178 ath10k_wmi_queue_set_coverage_class_work(ar);
6179 break;
6180 case WMI_10_2_UPDATE_STATS_EVENTID:
6181 ath10k_wmi_event_update_stats(ar, skb);
6182 break;
6183 case WMI_10_2_VDEV_START_RESP_EVENTID:
6184 ath10k_wmi_event_vdev_start_resp(ar, skb);
6185 ath10k_wmi_queue_set_coverage_class_work(ar);
6186 break;
6187 case WMI_10_2_VDEV_STOPPED_EVENTID:
6188 ath10k_wmi_event_vdev_stopped(ar, skb);
6189 ath10k_wmi_queue_set_coverage_class_work(ar);
6190 break;
6191 case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
6192 ath10k_wmi_event_peer_sta_kickout(ar, skb);
6193 break;
6194 case WMI_10_2_HOST_SWBA_EVENTID:
6195 ath10k_wmi_event_host_swba(ar, skb);
6196 break;
6197 case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
6198 ath10k_wmi_event_tbttoffset_update(ar, skb);
6199 break;
6200 case WMI_10_2_PHYERR_EVENTID:
6201 ath10k_wmi_event_phyerr(ar, skb);
6202 break;
6203 case WMI_10_2_ROAM_EVENTID:
6204 ath10k_wmi_event_roam(ar, skb);
6205 ath10k_wmi_queue_set_coverage_class_work(ar);
6206 break;
6207 case WMI_10_2_PROFILE_MATCH:
6208 ath10k_wmi_event_profile_match(ar, skb);
6209 break;
6210 case WMI_10_2_DEBUG_PRINT_EVENTID:
6211 ath10k_wmi_event_debug_print(ar, skb);
6212 ath10k_wmi_queue_set_coverage_class_work(ar);
6213 break;
6214 case WMI_10_2_PDEV_QVIT_EVENTID:
6215 ath10k_wmi_event_pdev_qvit(ar, skb);
6216 break;
6217 case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
6218 ath10k_wmi_event_wlan_profile_data(ar, skb);
6219 break;
6220 case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
6221 ath10k_wmi_event_rtt_measurement_report(ar, skb);
6222 break;
6223 case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
6224 ath10k_wmi_event_tsf_measurement_report(ar, skb);
6225 break;
6226 case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
6227 ath10k_wmi_event_rtt_error_report(ar, skb);
6228 break;
6229 case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
6230 ath10k_wmi_event_wow_wakeup_host(ar, skb);
6231 break;
6232 case WMI_10_2_DCS_INTERFERENCE_EVENTID:
6233 ath10k_wmi_event_dcs_interference(ar, skb);
6234 break;
6235 case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
6236 ath10k_wmi_event_pdev_tpc_config(ar, skb);
6237 break;
6238 case WMI_10_2_INST_RSSI_STATS_EVENTID:
6239 ath10k_wmi_event_inst_rssi_stats(ar, skb);
6240 break;
6241 case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
6242 ath10k_wmi_event_vdev_standby_req(ar, skb);
6243 ath10k_wmi_queue_set_coverage_class_work(ar);
6244 break;
6245 case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
6246 ath10k_wmi_event_vdev_resume_req(ar, skb);
6247 ath10k_wmi_queue_set_coverage_class_work(ar);
6248 break;
6249 case WMI_10_2_SERVICE_READY_EVENTID:
6250 ath10k_wmi_event_service_ready(ar, skb);
6251 return;
6252 case WMI_10_2_READY_EVENTID:
6253 ath10k_wmi_event_ready(ar, skb);
6254 ath10k_wmi_queue_set_coverage_class_work(ar);
6255 break;
6256 case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
6257 ath10k_wmi_event_temperature(ar, skb);
6258 break;
6259 case WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID:
6260 ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
6261 break;
6262 case WMI_10_2_RTT_KEEPALIVE_EVENTID:
6263 case WMI_10_2_GPIO_INPUT_EVENTID:
6264 case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
6265 case WMI_10_2_GENERIC_BUFFER_EVENTID:
6266 case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
6267 case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
6268 case WMI_10_2_WDS_PEER_EVENTID:
6269 ath10k_dbg(ar, ATH10K_DBG_WMI,
6270 "received event id %d not implemented\n", id);
6271 break;
6272 case WMI_10_2_PEER_STA_PS_STATECHG_EVENTID:
6273 ath10k_wmi_event_peer_sta_ps_state_chg(ar, skb);
6274 break;
6275 default:
6276 ath10k_warn(ar, "Unknown eventid: %d\n", id);
6277 break;
6278 }
6279
6280 out:
6281 dev_kfree_skb(skb);
6282 }
6283
ath10k_wmi_10_4_op_rx(struct ath10k * ar,struct sk_buff * skb)6284 static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
6285 {
6286 struct wmi_cmd_hdr *cmd_hdr;
6287 enum wmi_10_4_event_id id;
6288 bool consumed;
6289
6290 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
6291 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
6292
6293 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
6294 goto out;
6295
6296 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
6297
6298 consumed = ath10k_tm_event_wmi(ar, id, skb);
6299
6300 /* Ready event must be handled normally also in UTF mode so that we
6301 * know the UTF firmware has booted, others we are just bypass WMI
6302 * events to testmode.
6303 */
6304 if (consumed && id != WMI_10_4_READY_EVENTID) {
6305 ath10k_dbg(ar, ATH10K_DBG_WMI,
6306 "wmi testmode consumed 0x%x\n", id);
6307 goto out;
6308 }
6309
6310 switch (id) {
6311 case WMI_10_4_MGMT_RX_EVENTID:
6312 ath10k_wmi_event_mgmt_rx(ar, skb);
6313 /* mgmt_rx() owns the skb now! */
6314 return;
6315 case WMI_10_4_ECHO_EVENTID:
6316 ath10k_wmi_event_echo(ar, skb);
6317 break;
6318 case WMI_10_4_DEBUG_MESG_EVENTID:
6319 ath10k_wmi_event_debug_mesg(ar, skb);
6320 ath10k_wmi_queue_set_coverage_class_work(ar);
6321 break;
6322 case WMI_10_4_SERVICE_READY_EVENTID:
6323 ath10k_wmi_event_service_ready(ar, skb);
6324 return;
6325 case WMI_10_4_SCAN_EVENTID:
6326 ath10k_wmi_event_scan(ar, skb);
6327 ath10k_wmi_queue_set_coverage_class_work(ar);
6328 break;
6329 case WMI_10_4_CHAN_INFO_EVENTID:
6330 ath10k_wmi_event_chan_info(ar, skb);
6331 break;
6332 case WMI_10_4_PHYERR_EVENTID:
6333 ath10k_wmi_event_phyerr(ar, skb);
6334 break;
6335 case WMI_10_4_READY_EVENTID:
6336 ath10k_wmi_event_ready(ar, skb);
6337 ath10k_wmi_queue_set_coverage_class_work(ar);
6338 break;
6339 case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
6340 ath10k_wmi_event_peer_sta_kickout(ar, skb);
6341 break;
6342 case WMI_10_4_ROAM_EVENTID:
6343 ath10k_wmi_event_roam(ar, skb);
6344 ath10k_wmi_queue_set_coverage_class_work(ar);
6345 break;
6346 case WMI_10_4_HOST_SWBA_EVENTID:
6347 ath10k_wmi_event_host_swba(ar, skb);
6348 break;
6349 case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID:
6350 ath10k_wmi_event_tbttoffset_update(ar, skb);
6351 break;
6352 case WMI_10_4_DEBUG_PRINT_EVENTID:
6353 ath10k_wmi_event_debug_print(ar, skb);
6354 ath10k_wmi_queue_set_coverage_class_work(ar);
6355 break;
6356 case WMI_10_4_VDEV_START_RESP_EVENTID:
6357 ath10k_wmi_event_vdev_start_resp(ar, skb);
6358 ath10k_wmi_queue_set_coverage_class_work(ar);
6359 break;
6360 case WMI_10_4_VDEV_STOPPED_EVENTID:
6361 ath10k_wmi_event_vdev_stopped(ar, skb);
6362 ath10k_wmi_queue_set_coverage_class_work(ar);
6363 break;
6364 case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
6365 case WMI_10_4_PEER_RATECODE_LIST_EVENTID:
6366 case WMI_10_4_WDS_PEER_EVENTID:
6367 case WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID:
6368 ath10k_dbg(ar, ATH10K_DBG_WMI,
6369 "received event id %d not implemented\n", id);
6370 break;
6371 case WMI_10_4_UPDATE_STATS_EVENTID:
6372 ath10k_wmi_event_update_stats(ar, skb);
6373 break;
6374 case WMI_10_4_PDEV_TEMPERATURE_EVENTID:
6375 ath10k_wmi_event_temperature(ar, skb);
6376 break;
6377 case WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID:
6378 ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
6379 break;
6380 case WMI_10_4_PDEV_TPC_CONFIG_EVENTID:
6381 ath10k_wmi_event_pdev_tpc_config(ar, skb);
6382 break;
6383 case WMI_10_4_TDLS_PEER_EVENTID:
6384 ath10k_wmi_handle_tdls_peer_event(ar, skb);
6385 break;
6386 case WMI_10_4_PDEV_TPC_TABLE_EVENTID:
6387 ath10k_wmi_event_tpc_final_table(ar, skb);
6388 break;
6389 case WMI_10_4_DFS_STATUS_CHECK_EVENTID:
6390 ath10k_wmi_event_dfs_status_check(ar, skb);
6391 break;
6392 case WMI_10_4_PEER_STA_PS_STATECHG_EVENTID:
6393 ath10k_wmi_event_peer_sta_ps_state_chg(ar, skb);
6394 break;
6395 default:
6396 ath10k_warn(ar, "Unknown eventid: %d\n", id);
6397 break;
6398 }
6399
6400 out:
6401 dev_kfree_skb(skb);
6402 }
6403
ath10k_wmi_process_rx(struct ath10k * ar,struct sk_buff * skb)6404 static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
6405 {
6406 int ret;
6407
6408 ret = ath10k_wmi_rx(ar, skb);
6409 if (ret)
6410 ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
6411 }
6412
ath10k_wmi_connect(struct ath10k * ar)6413 int ath10k_wmi_connect(struct ath10k *ar)
6414 {
6415 int status;
6416 struct ath10k_htc_svc_conn_req conn_req;
6417 struct ath10k_htc_svc_conn_resp conn_resp;
6418
6419 memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
6420
6421 memset(&conn_req, 0, sizeof(conn_req));
6422 memset(&conn_resp, 0, sizeof(conn_resp));
6423
6424 /* these fields are the same for all service endpoints */
6425 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
6426 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
6427 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
6428
6429 /* connect to control service */
6430 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
6431
6432 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
6433 if (status) {
6434 ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
6435 status);
6436 return status;
6437 }
6438
6439 ar->wmi.eid = conn_resp.eid;
6440 return 0;
6441 }
6442
6443 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_base_macaddr(struct ath10k * ar,const u8 macaddr[ETH_ALEN])6444 ath10k_wmi_op_gen_pdev_set_base_macaddr(struct ath10k *ar,
6445 const u8 macaddr[ETH_ALEN])
6446 {
6447 struct wmi_pdev_set_base_macaddr_cmd *cmd;
6448 struct sk_buff *skb;
6449
6450 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6451 if (!skb)
6452 return ERR_PTR(-ENOMEM);
6453
6454 cmd = (struct wmi_pdev_set_base_macaddr_cmd *)skb->data;
6455 ether_addr_copy(cmd->mac_addr.addr, macaddr);
6456
6457 ath10k_dbg(ar, ATH10K_DBG_WMI,
6458 "wmi pdev basemac %pM\n", macaddr);
6459 return skb;
6460 }
6461
6462 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_rd(struct ath10k * ar,u16 rd,u16 rd2g,u16 rd5g,u16 ctl2g,u16 ctl5g,enum wmi_dfs_region dfs_reg)6463 ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
6464 u16 ctl2g, u16 ctl5g,
6465 enum wmi_dfs_region dfs_reg)
6466 {
6467 struct wmi_pdev_set_regdomain_cmd *cmd;
6468 struct sk_buff *skb;
6469
6470 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6471 if (!skb)
6472 return ERR_PTR(-ENOMEM);
6473
6474 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
6475 cmd->reg_domain = __cpu_to_le32(rd);
6476 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
6477 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
6478 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
6479 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
6480
6481 ath10k_dbg(ar, ATH10K_DBG_WMI,
6482 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
6483 rd, rd2g, rd5g, ctl2g, ctl5g);
6484 return skb;
6485 }
6486
6487 static struct sk_buff *
ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k * ar,u16 rd,u16 rd2g,u16 rd5g,u16 ctl2g,u16 ctl5g,enum wmi_dfs_region dfs_reg)6488 ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
6489 rd5g, u16 ctl2g, u16 ctl5g,
6490 enum wmi_dfs_region dfs_reg)
6491 {
6492 struct wmi_pdev_set_regdomain_cmd_10x *cmd;
6493 struct sk_buff *skb;
6494
6495 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6496 if (!skb)
6497 return ERR_PTR(-ENOMEM);
6498
6499 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
6500 cmd->reg_domain = __cpu_to_le32(rd);
6501 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
6502 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
6503 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
6504 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
6505 cmd->dfs_domain = __cpu_to_le32(dfs_reg);
6506
6507 ath10k_dbg(ar, ATH10K_DBG_WMI,
6508 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
6509 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
6510 return skb;
6511 }
6512
6513 static struct sk_buff *
ath10k_wmi_op_gen_pdev_suspend(struct ath10k * ar,u32 suspend_opt)6514 ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
6515 {
6516 struct wmi_pdev_suspend_cmd *cmd;
6517 struct sk_buff *skb;
6518
6519 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6520 if (!skb)
6521 return ERR_PTR(-ENOMEM);
6522
6523 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
6524 cmd->suspend_opt = __cpu_to_le32(suspend_opt);
6525
6526 return skb;
6527 }
6528
6529 static struct sk_buff *
ath10k_wmi_op_gen_pdev_resume(struct ath10k * ar)6530 ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
6531 {
6532 struct sk_buff *skb;
6533
6534 skb = ath10k_wmi_alloc_skb(ar, 0);
6535 if (!skb)
6536 return ERR_PTR(-ENOMEM);
6537
6538 return skb;
6539 }
6540
6541 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_param(struct ath10k * ar,u32 id,u32 value)6542 ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
6543 {
6544 struct wmi_pdev_set_param_cmd *cmd;
6545 struct sk_buff *skb;
6546
6547 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
6548 ath10k_warn(ar, "pdev param %d not supported by firmware\n",
6549 id);
6550 return ERR_PTR(-EOPNOTSUPP);
6551 }
6552
6553 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6554 if (!skb)
6555 return ERR_PTR(-ENOMEM);
6556
6557 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
6558 cmd->param_id = __cpu_to_le32(id);
6559 cmd->param_value = __cpu_to_le32(value);
6560
6561 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
6562 id, value);
6563 return skb;
6564 }
6565
ath10k_wmi_put_host_mem_chunks(struct ath10k * ar,struct wmi_host_mem_chunks * chunks)6566 void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
6567 struct wmi_host_mem_chunks *chunks)
6568 {
6569 struct host_memory_chunk *chunk;
6570 int i;
6571
6572 chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
6573
6574 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
6575 chunk = &chunks->items[i];
6576 chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
6577 chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
6578 chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
6579
6580 ath10k_dbg(ar, ATH10K_DBG_WMI,
6581 "wmi chunk %d len %d requested, addr 0x%llx\n",
6582 i,
6583 ar->wmi.mem_chunks[i].len,
6584 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
6585 }
6586 }
6587
ath10k_wmi_op_gen_init(struct ath10k * ar)6588 static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
6589 {
6590 struct wmi_init_cmd *cmd;
6591 struct sk_buff *buf;
6592 struct wmi_resource_config config = {};
6593 u32 val;
6594
6595 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
6596 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
6597 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
6598
6599 config.num_offload_reorder_bufs =
6600 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
6601
6602 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
6603 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
6604 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
6605 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
6606 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
6607 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
6608 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
6609 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
6610 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
6611 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6612 config.scan_max_pending_reqs =
6613 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
6614
6615 config.bmiss_offload_max_vdev =
6616 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
6617
6618 config.roam_offload_max_vdev =
6619 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
6620
6621 config.roam_offload_max_ap_profiles =
6622 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
6623
6624 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
6625 config.num_mcast_table_elems =
6626 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
6627
6628 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
6629 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
6630 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
6631 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
6632 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
6633
6634 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
6635 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
6636
6637 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
6638
6639 config.gtk_offload_max_vdev =
6640 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
6641
6642 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
6643 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
6644
6645 buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6646 ar->wmi.num_mem_chunks));
6647 if (!buf)
6648 return ERR_PTR(-ENOMEM);
6649
6650 cmd = (struct wmi_init_cmd *)buf->data;
6651
6652 memcpy(&cmd->resource_config, &config, sizeof(config));
6653 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6654
6655 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
6656 return buf;
6657 }
6658
ath10k_wmi_10_1_op_gen_init(struct ath10k * ar)6659 static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
6660 {
6661 struct wmi_init_cmd_10x *cmd;
6662 struct sk_buff *buf;
6663 struct wmi_resource_config_10x config = {};
6664 u32 val;
6665
6666 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
6667 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
6668 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
6669 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
6670 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
6671 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
6672 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
6673 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6674 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6675 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6676 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
6677 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6678 config.scan_max_pending_reqs =
6679 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
6680
6681 config.bmiss_offload_max_vdev =
6682 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
6683
6684 config.roam_offload_max_vdev =
6685 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
6686
6687 config.roam_offload_max_ap_profiles =
6688 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
6689
6690 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
6691 config.num_mcast_table_elems =
6692 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
6693
6694 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
6695 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
6696 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
6697 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
6698 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
6699
6700 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
6701 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
6702
6703 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
6704
6705 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
6706 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
6707
6708 buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6709 ar->wmi.num_mem_chunks));
6710 if (!buf)
6711 return ERR_PTR(-ENOMEM);
6712
6713 cmd = (struct wmi_init_cmd_10x *)buf->data;
6714
6715 memcpy(&cmd->resource_config, &config, sizeof(config));
6716 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6717
6718 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
6719 return buf;
6720 }
6721
ath10k_wmi_10_2_op_gen_init(struct ath10k * ar)6722 static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
6723 {
6724 struct wmi_init_cmd_10_2 *cmd;
6725 struct sk_buff *buf;
6726 struct wmi_resource_config_10x config = {};
6727 u32 val, features;
6728
6729 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
6730 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
6731
6732 if (ath10k_peer_stats_enabled(ar)) {
6733 config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS);
6734 config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS);
6735 } else {
6736 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
6737 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
6738 }
6739
6740 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
6741 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
6742 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
6743 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6744 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6745 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6746 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
6747 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6748
6749 config.scan_max_pending_reqs =
6750 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
6751
6752 config.bmiss_offload_max_vdev =
6753 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
6754
6755 config.roam_offload_max_vdev =
6756 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
6757
6758 config.roam_offload_max_ap_profiles =
6759 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
6760
6761 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
6762 config.num_mcast_table_elems =
6763 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
6764
6765 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
6766 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
6767 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
6768 config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
6769 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
6770
6771 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
6772 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
6773
6774 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
6775
6776 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
6777 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
6778
6779 buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6780 ar->wmi.num_mem_chunks));
6781 if (!buf)
6782 return ERR_PTR(-ENOMEM);
6783
6784 cmd = (struct wmi_init_cmd_10_2 *)buf->data;
6785
6786 features = WMI_10_2_RX_BATCH_MODE;
6787
6788 if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) &&
6789 test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map))
6790 features |= WMI_10_2_COEX_GPIO;
6791
6792 if (ath10k_peer_stats_enabled(ar))
6793 features |= WMI_10_2_PEER_STATS;
6794
6795 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
6796 features |= WMI_10_2_BSS_CHAN_INFO;
6797
6798 cmd->resource_config.feature_mask = __cpu_to_le32(features);
6799
6800 memcpy(&cmd->resource_config.common, &config, sizeof(config));
6801 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6802
6803 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
6804 return buf;
6805 }
6806
ath10k_wmi_10_4_op_gen_init(struct ath10k * ar)6807 static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar)
6808 {
6809 struct wmi_init_cmd_10_4 *cmd;
6810 struct sk_buff *buf;
6811 struct wmi_resource_config_10_4 config = {};
6812
6813 config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs);
6814 config.num_peers = __cpu_to_le32(ar->max_num_peers);
6815 config.num_active_peers = __cpu_to_le32(ar->num_active_peers);
6816 config.num_tids = __cpu_to_le32(ar->num_tids);
6817
6818 config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS);
6819 config.num_offload_reorder_buffs =
6820 __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS);
6821 config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS);
6822 config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT);
6823 config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask);
6824 config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask);
6825
6826 config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
6827 config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
6828 config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
6829 config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI);
6830
6831 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6832 config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS);
6833 config.bmiss_offload_max_vdev =
6834 __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV);
6835 config.roam_offload_max_vdev =
6836 __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV);
6837 config.roam_offload_max_ap_profiles =
6838 __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES);
6839 config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS);
6840 config.num_mcast_table_elems =
6841 __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS);
6842
6843 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE);
6844 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE);
6845 config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES);
6846 config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE);
6847 config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM);
6848
6849 config.rx_skip_defrag_timeout_dup_detection_check =
6850 __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK);
6851
6852 config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG);
6853 config.gtk_offload_max_vdev =
6854 __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV);
6855 config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx);
6856 config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS);
6857 config.max_peer_ext_stats =
6858 __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS);
6859 config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP);
6860
6861 config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE);
6862 config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE);
6863 config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE);
6864 config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE);
6865
6866 config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE);
6867 config.tt_support =
6868 __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG);
6869 config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG);
6870 config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG);
6871 config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG);
6872
6873 buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6874 ar->wmi.num_mem_chunks));
6875 if (!buf)
6876 return ERR_PTR(-ENOMEM);
6877
6878 cmd = (struct wmi_init_cmd_10_4 *)buf->data;
6879 memcpy(&cmd->resource_config, &config, sizeof(config));
6880 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6881
6882 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n");
6883 return buf;
6884 }
6885
ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg * arg)6886 int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
6887 {
6888 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
6889 return -EINVAL;
6890 if (arg->n_channels > ARRAY_SIZE(arg->channels))
6891 return -EINVAL;
6892 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
6893 return -EINVAL;
6894 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
6895 return -EINVAL;
6896
6897 return 0;
6898 }
6899
6900 static size_t
ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg * arg)6901 ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
6902 {
6903 int len = 0;
6904
6905 if (arg->ie_len) {
6906 len += sizeof(struct wmi_ie_data);
6907 len += roundup(arg->ie_len, 4);
6908 }
6909
6910 if (arg->n_channels) {
6911 len += sizeof(struct wmi_chan_list);
6912 len += sizeof(__le32) * arg->n_channels;
6913 }
6914
6915 if (arg->n_ssids) {
6916 len += sizeof(struct wmi_ssid_list);
6917 len += sizeof(struct wmi_ssid) * arg->n_ssids;
6918 }
6919
6920 if (arg->n_bssids) {
6921 len += sizeof(struct wmi_bssid_list);
6922 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
6923 }
6924
6925 return len;
6926 }
6927
ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common * cmn,const struct wmi_start_scan_arg * arg)6928 void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
6929 const struct wmi_start_scan_arg *arg)
6930 {
6931 u32 scan_id;
6932 u32 scan_req_id;
6933
6934 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
6935 scan_id |= arg->scan_id;
6936
6937 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
6938 scan_req_id |= arg->scan_req_id;
6939
6940 cmn->scan_id = __cpu_to_le32(scan_id);
6941 cmn->scan_req_id = __cpu_to_le32(scan_req_id);
6942 cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
6943 cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
6944 cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
6945 cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
6946 cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
6947 cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
6948 cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
6949 cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
6950 cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
6951 cmn->idle_time = __cpu_to_le32(arg->idle_time);
6952 cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
6953 cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
6954 cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
6955 }
6956
6957 static void
ath10k_wmi_put_start_scan_tlvs(u8 * tlvs,const struct wmi_start_scan_arg * arg)6958 ath10k_wmi_put_start_scan_tlvs(u8 *tlvs,
6959 const struct wmi_start_scan_arg *arg)
6960 {
6961 struct wmi_ie_data *ie;
6962 struct wmi_chan_list *channels;
6963 struct wmi_ssid_list *ssids;
6964 struct wmi_bssid_list *bssids;
6965 void *ptr = tlvs;
6966 int i;
6967
6968 if (arg->n_channels) {
6969 channels = ptr;
6970 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
6971 channels->num_chan = __cpu_to_le32(arg->n_channels);
6972
6973 for (i = 0; i < arg->n_channels; i++)
6974 channels->channel_list[i].freq =
6975 __cpu_to_le16(arg->channels[i]);
6976
6977 ptr += sizeof(*channels);
6978 ptr += sizeof(__le32) * arg->n_channels;
6979 }
6980
6981 if (arg->n_ssids) {
6982 ssids = ptr;
6983 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
6984 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
6985
6986 for (i = 0; i < arg->n_ssids; i++) {
6987 ssids->ssids[i].ssid_len =
6988 __cpu_to_le32(arg->ssids[i].len);
6989 memcpy(&ssids->ssids[i].ssid,
6990 arg->ssids[i].ssid,
6991 arg->ssids[i].len);
6992 }
6993
6994 ptr += sizeof(*ssids);
6995 ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
6996 }
6997
6998 if (arg->n_bssids) {
6999 bssids = ptr;
7000 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
7001 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
7002
7003 for (i = 0; i < arg->n_bssids; i++)
7004 ether_addr_copy(bssids->bssid_list[i].addr,
7005 arg->bssids[i].bssid);
7006
7007 ptr += sizeof(*bssids);
7008 ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
7009 }
7010
7011 if (arg->ie_len) {
7012 ie = ptr;
7013 ie->tag = __cpu_to_le32(WMI_IE_TAG);
7014 ie->ie_len = __cpu_to_le32(arg->ie_len);
7015 memcpy(ie->ie_data, arg->ie, arg->ie_len);
7016
7017 ptr += sizeof(*ie);
7018 ptr += roundup(arg->ie_len, 4);
7019 }
7020 }
7021
7022 static struct sk_buff *
ath10k_wmi_op_gen_start_scan(struct ath10k * ar,const struct wmi_start_scan_arg * arg)7023 ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
7024 const struct wmi_start_scan_arg *arg)
7025 {
7026 struct wmi_start_scan_cmd *cmd;
7027 struct sk_buff *skb;
7028 size_t len;
7029 int ret;
7030
7031 ret = ath10k_wmi_start_scan_verify(arg);
7032 if (ret)
7033 return ERR_PTR(ret);
7034
7035 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
7036 skb = ath10k_wmi_alloc_skb(ar, len);
7037 if (!skb)
7038 return ERR_PTR(-ENOMEM);
7039
7040 cmd = (struct wmi_start_scan_cmd *)skb->data;
7041
7042 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
7043 ath10k_wmi_put_start_scan_tlvs(cmd->tlvs, arg);
7044
7045 cmd->burst_duration_ms = __cpu_to_le32(0);
7046
7047 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
7048 return skb;
7049 }
7050
7051 static struct sk_buff *
ath10k_wmi_10x_op_gen_start_scan(struct ath10k * ar,const struct wmi_start_scan_arg * arg)7052 ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
7053 const struct wmi_start_scan_arg *arg)
7054 {
7055 struct wmi_10x_start_scan_cmd *cmd;
7056 struct sk_buff *skb;
7057 size_t len;
7058 int ret;
7059
7060 ret = ath10k_wmi_start_scan_verify(arg);
7061 if (ret)
7062 return ERR_PTR(ret);
7063
7064 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
7065 skb = ath10k_wmi_alloc_skb(ar, len);
7066 if (!skb)
7067 return ERR_PTR(-ENOMEM);
7068
7069 cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
7070
7071 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
7072 ath10k_wmi_put_start_scan_tlvs(cmd->tlvs, arg);
7073
7074 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
7075 return skb;
7076 }
7077
ath10k_wmi_start_scan_init(struct ath10k * ar,struct wmi_start_scan_arg * arg)7078 void ath10k_wmi_start_scan_init(struct ath10k *ar,
7079 struct wmi_start_scan_arg *arg)
7080 {
7081 /* setup commonly used values */
7082 arg->scan_req_id = 1;
7083 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
7084 arg->dwell_time_active = 50;
7085 arg->dwell_time_passive = 150;
7086 arg->min_rest_time = 50;
7087 arg->max_rest_time = 500;
7088 arg->repeat_probe_time = 0;
7089 arg->probe_spacing_time = 0;
7090 arg->idle_time = 0;
7091 arg->max_scan_time = 20000;
7092 arg->probe_delay = 5;
7093 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
7094 | WMI_SCAN_EVENT_COMPLETED
7095 | WMI_SCAN_EVENT_BSS_CHANNEL
7096 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
7097 | WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT
7098 | WMI_SCAN_EVENT_DEQUEUED;
7099 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
7100 arg->n_bssids = 1;
7101 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
7102 }
7103
7104 static struct sk_buff *
ath10k_wmi_op_gen_stop_scan(struct ath10k * ar,const struct wmi_stop_scan_arg * arg)7105 ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
7106 const struct wmi_stop_scan_arg *arg)
7107 {
7108 struct wmi_stop_scan_cmd *cmd;
7109 struct sk_buff *skb;
7110 u32 scan_id;
7111 u32 req_id;
7112
7113 if (arg->req_id > 0xFFF)
7114 return ERR_PTR(-EINVAL);
7115 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
7116 return ERR_PTR(-EINVAL);
7117
7118 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7119 if (!skb)
7120 return ERR_PTR(-ENOMEM);
7121
7122 scan_id = arg->u.scan_id;
7123 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
7124
7125 req_id = arg->req_id;
7126 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
7127
7128 cmd = (struct wmi_stop_scan_cmd *)skb->data;
7129 cmd->req_type = __cpu_to_le32(arg->req_type);
7130 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
7131 cmd->scan_id = __cpu_to_le32(scan_id);
7132 cmd->scan_req_id = __cpu_to_le32(req_id);
7133
7134 ath10k_dbg(ar, ATH10K_DBG_WMI,
7135 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
7136 arg->req_id, arg->req_type, arg->u.scan_id);
7137 return skb;
7138 }
7139
7140 static struct sk_buff *
ath10k_wmi_op_gen_vdev_create(struct ath10k * ar,u32 vdev_id,enum wmi_vdev_type type,enum wmi_vdev_subtype subtype,const u8 macaddr[ETH_ALEN])7141 ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
7142 enum wmi_vdev_type type,
7143 enum wmi_vdev_subtype subtype,
7144 const u8 macaddr[ETH_ALEN])
7145 {
7146 struct wmi_vdev_create_cmd *cmd;
7147 struct sk_buff *skb;
7148
7149 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7150 if (!skb)
7151 return ERR_PTR(-ENOMEM);
7152
7153 cmd = (struct wmi_vdev_create_cmd *)skb->data;
7154 cmd->vdev_id = __cpu_to_le32(vdev_id);
7155 cmd->vdev_type = __cpu_to_le32(type);
7156 cmd->vdev_subtype = __cpu_to_le32(subtype);
7157 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
7158
7159 ath10k_dbg(ar, ATH10K_DBG_WMI,
7160 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
7161 vdev_id, type, subtype, macaddr);
7162 return skb;
7163 }
7164
7165 static struct sk_buff *
ath10k_wmi_op_gen_vdev_delete(struct ath10k * ar,u32 vdev_id)7166 ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
7167 {
7168 struct wmi_vdev_delete_cmd *cmd;
7169 struct sk_buff *skb;
7170
7171 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7172 if (!skb)
7173 return ERR_PTR(-ENOMEM);
7174
7175 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
7176 cmd->vdev_id = __cpu_to_le32(vdev_id);
7177
7178 ath10k_dbg(ar, ATH10K_DBG_WMI,
7179 "WMI vdev delete id %d\n", vdev_id);
7180 return skb;
7181 }
7182
7183 static struct sk_buff *
ath10k_wmi_op_gen_vdev_start(struct ath10k * ar,const struct wmi_vdev_start_request_arg * arg,bool restart)7184 ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
7185 const struct wmi_vdev_start_request_arg *arg,
7186 bool restart)
7187 {
7188 struct wmi_vdev_start_request_cmd *cmd;
7189 struct sk_buff *skb;
7190 const char *cmdname;
7191 u32 flags = 0;
7192
7193 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
7194 return ERR_PTR(-EINVAL);
7195 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
7196 return ERR_PTR(-EINVAL);
7197
7198 if (restart)
7199 cmdname = "restart";
7200 else
7201 cmdname = "start";
7202
7203 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7204 if (!skb)
7205 return ERR_PTR(-ENOMEM);
7206
7207 if (arg->hidden_ssid)
7208 flags |= WMI_VDEV_START_HIDDEN_SSID;
7209 if (arg->pmf_enabled)
7210 flags |= WMI_VDEV_START_PMF_ENABLED;
7211
7212 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
7213 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7214 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
7215 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
7216 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
7217 cmd->flags = __cpu_to_le32(flags);
7218 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
7219 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
7220
7221 if (arg->ssid) {
7222 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
7223 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
7224 }
7225
7226 ath10k_wmi_put_wmi_channel(ar, &cmd->chan, &arg->channel);
7227
7228 ath10k_dbg(ar, ATH10K_DBG_WMI,
7229 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
7230 cmdname, arg->vdev_id,
7231 flags, arg->channel.freq, arg->channel.mode,
7232 cmd->chan.flags, arg->channel.max_power);
7233
7234 return skb;
7235 }
7236
7237 static struct sk_buff *
ath10k_wmi_op_gen_vdev_stop(struct ath10k * ar,u32 vdev_id)7238 ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
7239 {
7240 struct wmi_vdev_stop_cmd *cmd;
7241 struct sk_buff *skb;
7242
7243 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7244 if (!skb)
7245 return ERR_PTR(-ENOMEM);
7246
7247 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
7248 cmd->vdev_id = __cpu_to_le32(vdev_id);
7249
7250 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
7251 return skb;
7252 }
7253
7254 static struct sk_buff *
ath10k_wmi_op_gen_vdev_up(struct ath10k * ar,u32 vdev_id,u32 aid,const u8 * bssid)7255 ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
7256 const u8 *bssid)
7257 {
7258 struct wmi_vdev_up_cmd *cmd;
7259 struct sk_buff *skb;
7260
7261 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7262 if (!skb)
7263 return ERR_PTR(-ENOMEM);
7264
7265 cmd = (struct wmi_vdev_up_cmd *)skb->data;
7266 cmd->vdev_id = __cpu_to_le32(vdev_id);
7267 cmd->vdev_assoc_id = __cpu_to_le32(aid);
7268 ether_addr_copy(cmd->vdev_bssid.addr, bssid);
7269
7270 ath10k_dbg(ar, ATH10K_DBG_WMI,
7271 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
7272 vdev_id, aid, bssid);
7273 return skb;
7274 }
7275
7276 static struct sk_buff *
ath10k_wmi_op_gen_vdev_down(struct ath10k * ar,u32 vdev_id)7277 ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
7278 {
7279 struct wmi_vdev_down_cmd *cmd;
7280 struct sk_buff *skb;
7281
7282 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7283 if (!skb)
7284 return ERR_PTR(-ENOMEM);
7285
7286 cmd = (struct wmi_vdev_down_cmd *)skb->data;
7287 cmd->vdev_id = __cpu_to_le32(vdev_id);
7288
7289 ath10k_dbg(ar, ATH10K_DBG_WMI,
7290 "wmi mgmt vdev down id 0x%x\n", vdev_id);
7291 return skb;
7292 }
7293
7294 static struct sk_buff *
ath10k_wmi_op_gen_vdev_set_param(struct ath10k * ar,u32 vdev_id,u32 param_id,u32 param_value)7295 ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
7296 u32 param_id, u32 param_value)
7297 {
7298 struct wmi_vdev_set_param_cmd *cmd;
7299 struct sk_buff *skb;
7300
7301 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
7302 ath10k_dbg(ar, ATH10K_DBG_WMI,
7303 "vdev param %d not supported by firmware\n",
7304 param_id);
7305 return ERR_PTR(-EOPNOTSUPP);
7306 }
7307
7308 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7309 if (!skb)
7310 return ERR_PTR(-ENOMEM);
7311
7312 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
7313 cmd->vdev_id = __cpu_to_le32(vdev_id);
7314 cmd->param_id = __cpu_to_le32(param_id);
7315 cmd->param_value = __cpu_to_le32(param_value);
7316
7317 ath10k_dbg(ar, ATH10K_DBG_WMI,
7318 "wmi vdev id 0x%x set param %d value %d\n",
7319 vdev_id, param_id, param_value);
7320 return skb;
7321 }
7322
7323 static struct sk_buff *
ath10k_wmi_op_gen_vdev_install_key(struct ath10k * ar,const struct wmi_vdev_install_key_arg * arg)7324 ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
7325 const struct wmi_vdev_install_key_arg *arg)
7326 {
7327 struct wmi_vdev_install_key_cmd *cmd;
7328 struct sk_buff *skb;
7329
7330 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
7331 return ERR_PTR(-EINVAL);
7332 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
7333 return ERR_PTR(-EINVAL);
7334
7335 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
7336 if (!skb)
7337 return ERR_PTR(-ENOMEM);
7338
7339 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
7340 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7341 cmd->key_idx = __cpu_to_le32(arg->key_idx);
7342 cmd->key_flags = __cpu_to_le32(arg->key_flags);
7343 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
7344 cmd->key_len = __cpu_to_le32(arg->key_len);
7345 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
7346 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
7347
7348 if (arg->macaddr)
7349 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
7350 if (arg->key_data)
7351 memcpy(cmd->key_data, arg->key_data, arg->key_len);
7352
7353 ath10k_dbg(ar, ATH10K_DBG_WMI,
7354 "wmi vdev install key idx %d cipher %d len %d\n",
7355 arg->key_idx, arg->key_cipher, arg->key_len);
7356 return skb;
7357 }
7358
7359 static struct sk_buff *
ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k * ar,const struct wmi_vdev_spectral_conf_arg * arg)7360 ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
7361 const struct wmi_vdev_spectral_conf_arg *arg)
7362 {
7363 struct wmi_vdev_spectral_conf_cmd *cmd;
7364 struct sk_buff *skb;
7365
7366 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7367 if (!skb)
7368 return ERR_PTR(-ENOMEM);
7369
7370 cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
7371 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7372 cmd->scan_count = __cpu_to_le32(arg->scan_count);
7373 cmd->scan_period = __cpu_to_le32(arg->scan_period);
7374 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
7375 cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
7376 cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
7377 cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
7378 cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
7379 cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
7380 cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
7381 cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
7382 cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
7383 cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
7384 cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
7385 cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
7386 cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
7387 cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
7388 cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
7389 cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
7390
7391 return skb;
7392 }
7393
7394 static struct sk_buff *
ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k * ar,u32 vdev_id,u32 trigger,u32 enable)7395 ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
7396 u32 trigger, u32 enable)
7397 {
7398 struct wmi_vdev_spectral_enable_cmd *cmd;
7399 struct sk_buff *skb;
7400
7401 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7402 if (!skb)
7403 return ERR_PTR(-ENOMEM);
7404
7405 cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
7406 cmd->vdev_id = __cpu_to_le32(vdev_id);
7407 cmd->trigger_cmd = __cpu_to_le32(trigger);
7408 cmd->enable_cmd = __cpu_to_le32(enable);
7409
7410 return skb;
7411 }
7412
7413 static struct sk_buff *
ath10k_wmi_op_gen_peer_create(struct ath10k * ar,u32 vdev_id,const u8 peer_addr[ETH_ALEN],enum wmi_peer_type peer_type)7414 ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
7415 const u8 peer_addr[ETH_ALEN],
7416 enum wmi_peer_type peer_type)
7417 {
7418 struct wmi_peer_create_cmd *cmd;
7419 struct sk_buff *skb;
7420
7421 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7422 if (!skb)
7423 return ERR_PTR(-ENOMEM);
7424
7425 cmd = (struct wmi_peer_create_cmd *)skb->data;
7426 cmd->vdev_id = __cpu_to_le32(vdev_id);
7427 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7428 cmd->peer_type = __cpu_to_le32(peer_type);
7429
7430 ath10k_dbg(ar, ATH10K_DBG_WMI,
7431 "wmi peer create vdev_id %d peer_addr %pM\n",
7432 vdev_id, peer_addr);
7433 return skb;
7434 }
7435
7436 static struct sk_buff *
ath10k_wmi_op_gen_peer_delete(struct ath10k * ar,u32 vdev_id,const u8 peer_addr[ETH_ALEN])7437 ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
7438 const u8 peer_addr[ETH_ALEN])
7439 {
7440 struct wmi_peer_delete_cmd *cmd;
7441 struct sk_buff *skb;
7442
7443 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7444 if (!skb)
7445 return ERR_PTR(-ENOMEM);
7446
7447 cmd = (struct wmi_peer_delete_cmd *)skb->data;
7448 cmd->vdev_id = __cpu_to_le32(vdev_id);
7449 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7450
7451 ath10k_dbg(ar, ATH10K_DBG_WMI,
7452 "wmi peer delete vdev_id %d peer_addr %pM\n",
7453 vdev_id, peer_addr);
7454 return skb;
7455 }
7456
7457 static struct sk_buff *
ath10k_wmi_op_gen_peer_flush(struct ath10k * ar,u32 vdev_id,const u8 peer_addr[ETH_ALEN],u32 tid_bitmap)7458 ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
7459 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
7460 {
7461 struct wmi_peer_flush_tids_cmd *cmd;
7462 struct sk_buff *skb;
7463
7464 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7465 if (!skb)
7466 return ERR_PTR(-ENOMEM);
7467
7468 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
7469 cmd->vdev_id = __cpu_to_le32(vdev_id);
7470 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
7471 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7472
7473 ath10k_dbg(ar, ATH10K_DBG_WMI,
7474 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
7475 vdev_id, peer_addr, tid_bitmap);
7476 return skb;
7477 }
7478
7479 static struct sk_buff *
ath10k_wmi_op_gen_peer_set_param(struct ath10k * ar,u32 vdev_id,const u8 * peer_addr,enum wmi_peer_param param_id,u32 param_value)7480 ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
7481 const u8 *peer_addr,
7482 enum wmi_peer_param param_id,
7483 u32 param_value)
7484 {
7485 struct wmi_peer_set_param_cmd *cmd;
7486 struct sk_buff *skb;
7487
7488 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7489 if (!skb)
7490 return ERR_PTR(-ENOMEM);
7491
7492 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
7493 cmd->vdev_id = __cpu_to_le32(vdev_id);
7494 cmd->param_id = __cpu_to_le32(param_id);
7495 cmd->param_value = __cpu_to_le32(param_value);
7496 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7497
7498 ath10k_dbg(ar, ATH10K_DBG_WMI,
7499 "wmi vdev %d peer 0x%pM set param %d value %d\n",
7500 vdev_id, peer_addr, param_id, param_value);
7501 return skb;
7502 }
7503
ath10k_wmi_op_gen_gpio_config(struct ath10k * ar,u32 gpio_num,u32 input,u32 pull_type,u32 intr_mode)7504 static struct sk_buff *ath10k_wmi_op_gen_gpio_config(struct ath10k *ar,
7505 u32 gpio_num, u32 input,
7506 u32 pull_type, u32 intr_mode)
7507 {
7508 struct wmi_gpio_config_cmd *cmd;
7509 struct sk_buff *skb;
7510
7511 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7512 if (!skb)
7513 return ERR_PTR(-ENOMEM);
7514
7515 cmd = (struct wmi_gpio_config_cmd *)skb->data;
7516 cmd->pull_type = __cpu_to_le32(pull_type);
7517 cmd->gpio_num = __cpu_to_le32(gpio_num);
7518 cmd->input = __cpu_to_le32(input);
7519 cmd->intr_mode = __cpu_to_le32(intr_mode);
7520
7521 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi gpio_config gpio_num 0x%08x input 0x%08x pull_type 0x%08x intr_mode 0x%08x\n",
7522 gpio_num, input, pull_type, intr_mode);
7523
7524 return skb;
7525 }
7526
ath10k_wmi_op_gen_gpio_output(struct ath10k * ar,u32 gpio_num,u32 set)7527 static struct sk_buff *ath10k_wmi_op_gen_gpio_output(struct ath10k *ar,
7528 u32 gpio_num, u32 set)
7529 {
7530 struct wmi_gpio_output_cmd *cmd;
7531 struct sk_buff *skb;
7532
7533 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7534 if (!skb)
7535 return ERR_PTR(-ENOMEM);
7536
7537 cmd = (struct wmi_gpio_output_cmd *)skb->data;
7538 cmd->gpio_num = __cpu_to_le32(gpio_num);
7539 cmd->set = __cpu_to_le32(set);
7540
7541 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi gpio_output gpio_num 0x%08x set 0x%08x\n",
7542 gpio_num, set);
7543
7544 return skb;
7545 }
7546
7547 static struct sk_buff *
ath10k_wmi_op_gen_set_psmode(struct ath10k * ar,u32 vdev_id,enum wmi_sta_ps_mode psmode)7548 ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
7549 enum wmi_sta_ps_mode psmode)
7550 {
7551 struct wmi_sta_powersave_mode_cmd *cmd;
7552 struct sk_buff *skb;
7553
7554 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7555 if (!skb)
7556 return ERR_PTR(-ENOMEM);
7557
7558 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
7559 cmd->vdev_id = __cpu_to_le32(vdev_id);
7560 cmd->sta_ps_mode = __cpu_to_le32(psmode);
7561
7562 ath10k_dbg(ar, ATH10K_DBG_WMI,
7563 "wmi set powersave id 0x%x mode %d\n",
7564 vdev_id, psmode);
7565 return skb;
7566 }
7567
7568 static struct sk_buff *
ath10k_wmi_op_gen_set_sta_ps(struct ath10k * ar,u32 vdev_id,enum wmi_sta_powersave_param param_id,u32 value)7569 ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
7570 enum wmi_sta_powersave_param param_id,
7571 u32 value)
7572 {
7573 struct wmi_sta_powersave_param_cmd *cmd;
7574 struct sk_buff *skb;
7575
7576 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7577 if (!skb)
7578 return ERR_PTR(-ENOMEM);
7579
7580 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
7581 cmd->vdev_id = __cpu_to_le32(vdev_id);
7582 cmd->param_id = __cpu_to_le32(param_id);
7583 cmd->param_value = __cpu_to_le32(value);
7584
7585 ath10k_dbg(ar, ATH10K_DBG_STA,
7586 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
7587 vdev_id, param_id, value);
7588 return skb;
7589 }
7590
7591 static struct sk_buff *
ath10k_wmi_op_gen_set_ap_ps(struct ath10k * ar,u32 vdev_id,const u8 * mac,enum wmi_ap_ps_peer_param param_id,u32 value)7592 ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
7593 enum wmi_ap_ps_peer_param param_id, u32 value)
7594 {
7595 struct wmi_ap_ps_peer_cmd *cmd;
7596 struct sk_buff *skb;
7597
7598 if (!mac)
7599 return ERR_PTR(-EINVAL);
7600
7601 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7602 if (!skb)
7603 return ERR_PTR(-ENOMEM);
7604
7605 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
7606 cmd->vdev_id = __cpu_to_le32(vdev_id);
7607 cmd->param_id = __cpu_to_le32(param_id);
7608 cmd->param_value = __cpu_to_le32(value);
7609 ether_addr_copy(cmd->peer_macaddr.addr, mac);
7610
7611 ath10k_dbg(ar, ATH10K_DBG_WMI,
7612 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
7613 vdev_id, param_id, value, mac);
7614 return skb;
7615 }
7616
7617 static struct sk_buff *
ath10k_wmi_op_gen_scan_chan_list(struct ath10k * ar,const struct wmi_scan_chan_list_arg * arg)7618 ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
7619 const struct wmi_scan_chan_list_arg *arg)
7620 {
7621 struct wmi_scan_chan_list_cmd *cmd;
7622 struct sk_buff *skb;
7623 struct wmi_channel_arg *ch;
7624 struct wmi_channel *ci;
7625 int i;
7626
7627 skb = ath10k_wmi_alloc_skb(ar, struct_size(cmd, chan_info, arg->n_channels));
7628 if (!skb)
7629 return ERR_PTR(-EINVAL);
7630
7631 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
7632 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
7633
7634 for (i = 0; i < arg->n_channels; i++) {
7635 ch = &arg->channels[i];
7636 ci = &cmd->chan_info[i];
7637
7638 ath10k_wmi_put_wmi_channel(ar, ci, ch);
7639 }
7640
7641 return skb;
7642 }
7643
7644 static void
ath10k_wmi_peer_assoc_fill(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7645 ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
7646 const struct wmi_peer_assoc_complete_arg *arg)
7647 {
7648 struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
7649
7650 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7651 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
7652 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
7653 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
7654 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
7655 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
7656 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
7657 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
7658 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
7659 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
7660 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
7661 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
7662 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
7663
7664 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
7665
7666 cmd->peer_legacy_rates.num_rates =
7667 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
7668 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
7669 arg->peer_legacy_rates.num_rates);
7670
7671 cmd->peer_ht_rates.num_rates =
7672 __cpu_to_le32(arg->peer_ht_rates.num_rates);
7673 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
7674 arg->peer_ht_rates.num_rates);
7675
7676 cmd->peer_vht_rates.rx_max_rate =
7677 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
7678 cmd->peer_vht_rates.rx_mcs_set =
7679 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
7680 cmd->peer_vht_rates.tx_max_rate =
7681 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
7682 cmd->peer_vht_rates.tx_mcs_set =
7683 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
7684 }
7685
7686 static void
ath10k_wmi_peer_assoc_fill_main(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7687 ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
7688 const struct wmi_peer_assoc_complete_arg *arg)
7689 {
7690 struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
7691
7692 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
7693 memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
7694 }
7695
7696 static void
ath10k_wmi_peer_assoc_fill_10_1(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7697 ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
7698 const struct wmi_peer_assoc_complete_arg *arg)
7699 {
7700 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
7701 }
7702
7703 static void
ath10k_wmi_peer_assoc_fill_10_2(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7704 ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
7705 const struct wmi_peer_assoc_complete_arg *arg)
7706 {
7707 struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
7708 int max_mcs, max_nss;
7709 u32 info0;
7710
7711 /* TODO: Is using max values okay with firmware? */
7712 max_mcs = 0xf;
7713 max_nss = 0xf;
7714
7715 info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
7716 SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
7717
7718 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
7719 cmd->info0 = __cpu_to_le32(info0);
7720 }
7721
7722 static void
ath10k_wmi_peer_assoc_fill_10_4(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7723 ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf,
7724 const struct wmi_peer_assoc_complete_arg *arg)
7725 {
7726 struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf;
7727
7728 ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg);
7729 cmd->peer_bw_rxnss_override =
7730 __cpu_to_le32(arg->peer_bw_rxnss_override);
7731 }
7732
7733 static int
ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg * arg)7734 ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
7735 {
7736 if (arg->peer_mpdu_density > 16)
7737 return -EINVAL;
7738 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
7739 return -EINVAL;
7740 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
7741 return -EINVAL;
7742
7743 return 0;
7744 }
7745
7746 static struct sk_buff *
ath10k_wmi_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7747 ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
7748 const struct wmi_peer_assoc_complete_arg *arg)
7749 {
7750 size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
7751 struct sk_buff *skb;
7752 int ret;
7753
7754 ret = ath10k_wmi_peer_assoc_check_arg(arg);
7755 if (ret)
7756 return ERR_PTR(ret);
7757
7758 skb = ath10k_wmi_alloc_skb(ar, len);
7759 if (!skb)
7760 return ERR_PTR(-ENOMEM);
7761
7762 ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
7763
7764 ath10k_dbg(ar, ATH10K_DBG_WMI,
7765 "wmi peer assoc vdev %d addr %pM (%s)\n",
7766 arg->vdev_id, arg->addr,
7767 arg->peer_reassoc ? "reassociate" : "new");
7768 return skb;
7769 }
7770
7771 static struct sk_buff *
ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7772 ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
7773 const struct wmi_peer_assoc_complete_arg *arg)
7774 {
7775 size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
7776 struct sk_buff *skb;
7777 int ret;
7778
7779 ret = ath10k_wmi_peer_assoc_check_arg(arg);
7780 if (ret)
7781 return ERR_PTR(ret);
7782
7783 skb = ath10k_wmi_alloc_skb(ar, len);
7784 if (!skb)
7785 return ERR_PTR(-ENOMEM);
7786
7787 ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
7788
7789 ath10k_dbg(ar, ATH10K_DBG_WMI,
7790 "wmi peer assoc vdev %d addr %pM (%s)\n",
7791 arg->vdev_id, arg->addr,
7792 arg->peer_reassoc ? "reassociate" : "new");
7793 return skb;
7794 }
7795
7796 static struct sk_buff *
ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7797 ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
7798 const struct wmi_peer_assoc_complete_arg *arg)
7799 {
7800 size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
7801 struct sk_buff *skb;
7802 int ret;
7803
7804 ret = ath10k_wmi_peer_assoc_check_arg(arg);
7805 if (ret)
7806 return ERR_PTR(ret);
7807
7808 skb = ath10k_wmi_alloc_skb(ar, len);
7809 if (!skb)
7810 return ERR_PTR(-ENOMEM);
7811
7812 ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
7813
7814 ath10k_dbg(ar, ATH10K_DBG_WMI,
7815 "wmi peer assoc vdev %d addr %pM (%s)\n",
7816 arg->vdev_id, arg->addr,
7817 arg->peer_reassoc ? "reassociate" : "new");
7818 return skb;
7819 }
7820
7821 static struct sk_buff *
ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7822 ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar,
7823 const struct wmi_peer_assoc_complete_arg *arg)
7824 {
7825 size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd);
7826 struct sk_buff *skb;
7827 int ret;
7828
7829 ret = ath10k_wmi_peer_assoc_check_arg(arg);
7830 if (ret)
7831 return ERR_PTR(ret);
7832
7833 skb = ath10k_wmi_alloc_skb(ar, len);
7834 if (!skb)
7835 return ERR_PTR(-ENOMEM);
7836
7837 ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg);
7838
7839 ath10k_dbg(ar, ATH10K_DBG_WMI,
7840 "wmi peer assoc vdev %d addr %pM (%s)\n",
7841 arg->vdev_id, arg->addr,
7842 arg->peer_reassoc ? "reassociate" : "new");
7843 return skb;
7844 }
7845
7846 static struct sk_buff *
ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k * ar)7847 ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
7848 {
7849 struct sk_buff *skb;
7850
7851 skb = ath10k_wmi_alloc_skb(ar, 0);
7852 if (!skb)
7853 return ERR_PTR(-ENOMEM);
7854
7855 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
7856 return skb;
7857 }
7858
7859 static struct sk_buff *
ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k * ar,enum wmi_bss_survey_req_type type)7860 ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k *ar,
7861 enum wmi_bss_survey_req_type type)
7862 {
7863 struct wmi_pdev_chan_info_req_cmd *cmd;
7864 struct sk_buff *skb;
7865
7866 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7867 if (!skb)
7868 return ERR_PTR(-ENOMEM);
7869
7870 cmd = (struct wmi_pdev_chan_info_req_cmd *)skb->data;
7871 cmd->type = __cpu_to_le32(type);
7872
7873 ath10k_dbg(ar, ATH10K_DBG_WMI,
7874 "wmi pdev bss info request type %d\n", type);
7875
7876 return skb;
7877 }
7878
7879 /* This function assumes the beacon is already DMA mapped */
7880 static struct sk_buff *
ath10k_wmi_op_gen_beacon_dma(struct ath10k * ar,u32 vdev_id,const void * bcn,size_t bcn_len,u32 bcn_paddr,bool dtim_zero,bool deliver_cab)7881 ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
7882 size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
7883 bool deliver_cab)
7884 {
7885 struct wmi_bcn_tx_ref_cmd *cmd;
7886 struct sk_buff *skb;
7887 struct ieee80211_hdr *hdr;
7888 u16 fc;
7889
7890 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7891 if (!skb)
7892 return ERR_PTR(-ENOMEM);
7893
7894 hdr = (struct ieee80211_hdr *)bcn;
7895 fc = le16_to_cpu(hdr->frame_control);
7896
7897 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
7898 cmd->vdev_id = __cpu_to_le32(vdev_id);
7899 cmd->data_len = __cpu_to_le32(bcn_len);
7900 cmd->data_ptr = __cpu_to_le32(bcn_paddr);
7901 cmd->msdu_id = 0;
7902 cmd->frame_control = __cpu_to_le32(fc);
7903 cmd->flags = 0;
7904 cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
7905
7906 if (dtim_zero)
7907 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
7908
7909 if (deliver_cab)
7910 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
7911
7912 return skb;
7913 }
7914
ath10k_wmi_set_wmm_param(struct wmi_wmm_params * params,const struct wmi_wmm_params_arg * arg)7915 void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
7916 const struct wmi_wmm_params_arg *arg)
7917 {
7918 params->cwmin = __cpu_to_le32(arg->cwmin);
7919 params->cwmax = __cpu_to_le32(arg->cwmax);
7920 params->aifs = __cpu_to_le32(arg->aifs);
7921 params->txop = __cpu_to_le32(arg->txop);
7922 params->acm = __cpu_to_le32(arg->acm);
7923 params->no_ack = __cpu_to_le32(arg->no_ack);
7924 }
7925
7926 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k * ar,const struct wmi_wmm_params_all_arg * arg)7927 ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
7928 const struct wmi_wmm_params_all_arg *arg)
7929 {
7930 struct wmi_pdev_set_wmm_params *cmd;
7931 struct sk_buff *skb;
7932
7933 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7934 if (!skb)
7935 return ERR_PTR(-ENOMEM);
7936
7937 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
7938 ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
7939 ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
7940 ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
7941 ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
7942
7943 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
7944 return skb;
7945 }
7946
7947 static struct sk_buff *
ath10k_wmi_op_gen_request_stats(struct ath10k * ar,u32 stats_mask)7948 ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
7949 {
7950 struct wmi_request_stats_cmd *cmd;
7951 struct sk_buff *skb;
7952
7953 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7954 if (!skb)
7955 return ERR_PTR(-ENOMEM);
7956
7957 cmd = (struct wmi_request_stats_cmd *)skb->data;
7958 cmd->stats_id = __cpu_to_le32(stats_mask);
7959
7960 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
7961 stats_mask);
7962 return skb;
7963 }
7964
7965 static struct sk_buff *
ath10k_wmi_op_gen_force_fw_hang(struct ath10k * ar,enum wmi_force_fw_hang_type type,u32 delay_ms)7966 ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
7967 enum wmi_force_fw_hang_type type, u32 delay_ms)
7968 {
7969 struct wmi_force_fw_hang_cmd *cmd;
7970 struct sk_buff *skb;
7971
7972 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7973 if (!skb)
7974 return ERR_PTR(-ENOMEM);
7975
7976 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
7977 cmd->type = __cpu_to_le32(type);
7978 cmd->delay_ms = __cpu_to_le32(delay_ms);
7979
7980 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
7981 type, delay_ms);
7982 return skb;
7983 }
7984
7985 static struct sk_buff *
ath10k_wmi_op_gen_dbglog_cfg(struct ath10k * ar,u64 module_enable,u32 log_level)7986 ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
7987 u32 log_level)
7988 {
7989 struct wmi_dbglog_cfg_cmd *cmd;
7990 struct sk_buff *skb;
7991 u32 cfg;
7992
7993 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7994 if (!skb)
7995 return ERR_PTR(-ENOMEM);
7996
7997 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
7998
7999 if (module_enable) {
8000 cfg = SM(log_level,
8001 ATH10K_DBGLOG_CFG_LOG_LVL);
8002 } else {
8003 /* set back defaults, all modules with WARN level */
8004 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
8005 ATH10K_DBGLOG_CFG_LOG_LVL);
8006 module_enable = ~0;
8007 }
8008
8009 cmd->module_enable = __cpu_to_le32(module_enable);
8010 cmd->module_valid = __cpu_to_le32(~0);
8011 cmd->config_enable = __cpu_to_le32(cfg);
8012 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
8013
8014 ath10k_dbg(ar, ATH10K_DBG_WMI,
8015 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
8016 __le32_to_cpu(cmd->module_enable),
8017 __le32_to_cpu(cmd->module_valid),
8018 __le32_to_cpu(cmd->config_enable),
8019 __le32_to_cpu(cmd->config_valid));
8020 return skb;
8021 }
8022
8023 static struct sk_buff *
ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k * ar,u64 module_enable,u32 log_level)8024 ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
8025 u32 log_level)
8026 {
8027 struct wmi_10_4_dbglog_cfg_cmd *cmd;
8028 struct sk_buff *skb;
8029 u32 cfg;
8030
8031 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8032 if (!skb)
8033 return ERR_PTR(-ENOMEM);
8034
8035 cmd = (struct wmi_10_4_dbglog_cfg_cmd *)skb->data;
8036
8037 if (module_enable) {
8038 cfg = SM(log_level,
8039 ATH10K_DBGLOG_CFG_LOG_LVL);
8040 } else {
8041 /* set back defaults, all modules with WARN level */
8042 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
8043 ATH10K_DBGLOG_CFG_LOG_LVL);
8044 module_enable = ~0;
8045 }
8046
8047 cmd->module_enable = __cpu_to_le64(module_enable);
8048 cmd->module_valid = __cpu_to_le64(~0);
8049 cmd->config_enable = __cpu_to_le32(cfg);
8050 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
8051
8052 ath10k_dbg(ar, ATH10K_DBG_WMI,
8053 "wmi dbglog cfg modules 0x%016llx 0x%016llx config %08x %08x\n",
8054 __le64_to_cpu(cmd->module_enable),
8055 __le64_to_cpu(cmd->module_valid),
8056 __le32_to_cpu(cmd->config_enable),
8057 __le32_to_cpu(cmd->config_valid));
8058 return skb;
8059 }
8060
8061 static struct sk_buff *
ath10k_wmi_op_gen_pktlog_enable(struct ath10k * ar,u32 ev_bitmap)8062 ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
8063 {
8064 struct wmi_pdev_pktlog_enable_cmd *cmd;
8065 struct sk_buff *skb;
8066
8067 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8068 if (!skb)
8069 return ERR_PTR(-ENOMEM);
8070
8071 ev_bitmap &= ATH10K_PKTLOG_ANY;
8072
8073 cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
8074 cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
8075
8076 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
8077 ev_bitmap);
8078 return skb;
8079 }
8080
8081 static struct sk_buff *
ath10k_wmi_op_gen_pktlog_disable(struct ath10k * ar)8082 ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
8083 {
8084 struct sk_buff *skb;
8085
8086 skb = ath10k_wmi_alloc_skb(ar, 0);
8087 if (!skb)
8088 return ERR_PTR(-ENOMEM);
8089
8090 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
8091 return skb;
8092 }
8093
8094 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k * ar,u32 period,u32 duration,u32 next_offset,u32 enabled)8095 ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
8096 u32 duration, u32 next_offset,
8097 u32 enabled)
8098 {
8099 struct wmi_pdev_set_quiet_cmd *cmd;
8100 struct sk_buff *skb;
8101
8102 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8103 if (!skb)
8104 return ERR_PTR(-ENOMEM);
8105
8106 cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
8107 cmd->period = __cpu_to_le32(period);
8108 cmd->duration = __cpu_to_le32(duration);
8109 cmd->next_start = __cpu_to_le32(next_offset);
8110 cmd->enabled = __cpu_to_le32(enabled);
8111
8112 ath10k_dbg(ar, ATH10K_DBG_WMI,
8113 "wmi quiet param: period %u duration %u enabled %d\n",
8114 period, duration, enabled);
8115 return skb;
8116 }
8117
8118 static struct sk_buff *
ath10k_wmi_op_gen_addba_clear_resp(struct ath10k * ar,u32 vdev_id,const u8 * mac)8119 ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
8120 const u8 *mac)
8121 {
8122 struct wmi_addba_clear_resp_cmd *cmd;
8123 struct sk_buff *skb;
8124
8125 if (!mac)
8126 return ERR_PTR(-EINVAL);
8127
8128 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8129 if (!skb)
8130 return ERR_PTR(-ENOMEM);
8131
8132 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
8133 cmd->vdev_id = __cpu_to_le32(vdev_id);
8134 ether_addr_copy(cmd->peer_macaddr.addr, mac);
8135
8136 ath10k_dbg(ar, ATH10K_DBG_WMI,
8137 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
8138 vdev_id, mac);
8139 return skb;
8140 }
8141
8142 static struct sk_buff *
ath10k_wmi_op_gen_addba_send(struct ath10k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 buf_size)8143 ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
8144 u32 tid, u32 buf_size)
8145 {
8146 struct wmi_addba_send_cmd *cmd;
8147 struct sk_buff *skb;
8148
8149 if (!mac)
8150 return ERR_PTR(-EINVAL);
8151
8152 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8153 if (!skb)
8154 return ERR_PTR(-ENOMEM);
8155
8156 cmd = (struct wmi_addba_send_cmd *)skb->data;
8157 cmd->vdev_id = __cpu_to_le32(vdev_id);
8158 ether_addr_copy(cmd->peer_macaddr.addr, mac);
8159 cmd->tid = __cpu_to_le32(tid);
8160 cmd->buffersize = __cpu_to_le32(buf_size);
8161
8162 ath10k_dbg(ar, ATH10K_DBG_WMI,
8163 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
8164 vdev_id, mac, tid, buf_size);
8165 return skb;
8166 }
8167
8168 static struct sk_buff *
ath10k_wmi_op_gen_addba_set_resp(struct ath10k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 status)8169 ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
8170 u32 tid, u32 status)
8171 {
8172 struct wmi_addba_setresponse_cmd *cmd;
8173 struct sk_buff *skb;
8174
8175 if (!mac)
8176 return ERR_PTR(-EINVAL);
8177
8178 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8179 if (!skb)
8180 return ERR_PTR(-ENOMEM);
8181
8182 cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
8183 cmd->vdev_id = __cpu_to_le32(vdev_id);
8184 ether_addr_copy(cmd->peer_macaddr.addr, mac);
8185 cmd->tid = __cpu_to_le32(tid);
8186 cmd->statuscode = __cpu_to_le32(status);
8187
8188 ath10k_dbg(ar, ATH10K_DBG_WMI,
8189 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
8190 vdev_id, mac, tid, status);
8191 return skb;
8192 }
8193
8194 static struct sk_buff *
ath10k_wmi_op_gen_delba_send(struct ath10k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 initiator,u32 reason)8195 ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
8196 u32 tid, u32 initiator, u32 reason)
8197 {
8198 struct wmi_delba_send_cmd *cmd;
8199 struct sk_buff *skb;
8200
8201 if (!mac)
8202 return ERR_PTR(-EINVAL);
8203
8204 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8205 if (!skb)
8206 return ERR_PTR(-ENOMEM);
8207
8208 cmd = (struct wmi_delba_send_cmd *)skb->data;
8209 cmd->vdev_id = __cpu_to_le32(vdev_id);
8210 ether_addr_copy(cmd->peer_macaddr.addr, mac);
8211 cmd->tid = __cpu_to_le32(tid);
8212 cmd->initiator = __cpu_to_le32(initiator);
8213 cmd->reasoncode = __cpu_to_le32(reason);
8214
8215 ath10k_dbg(ar, ATH10K_DBG_WMI,
8216 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
8217 vdev_id, mac, tid, initiator, reason);
8218 return skb;
8219 }
8220
8221 static struct sk_buff *
ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k * ar,u32 param)8222 ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param)
8223 {
8224 struct wmi_pdev_get_tpc_config_cmd *cmd;
8225 struct sk_buff *skb;
8226
8227 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8228 if (!skb)
8229 return ERR_PTR(-ENOMEM);
8230
8231 cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data;
8232 cmd->param = __cpu_to_le32(param);
8233
8234 ath10k_dbg(ar, ATH10K_DBG_WMI,
8235 "wmi pdev get tpc config param %d\n", param);
8236 return skb;
8237 }
8238
8239 static void
ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8240 ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8241 char *buf, u32 *length)
8242 {
8243 u32 len = *length;
8244 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8245
8246 len += scnprintf(buf + len, buf_len - len, "\n");
8247 len += scnprintf(buf + len, buf_len - len, "%30s\n",
8248 "ath10k PDEV stats");
8249 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8250 "=================");
8251
8252 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8253 "Channel noise floor", pdev->ch_noise_floor);
8254 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8255 "Channel TX power", pdev->chan_tx_power);
8256 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8257 "TX frame count", pdev->tx_frame_count);
8258 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8259 "RX frame count", pdev->rx_frame_count);
8260 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8261 "RX clear count", pdev->rx_clear_count);
8262 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8263 "Cycle count", pdev->cycle_count);
8264 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8265 "PHY error count", pdev->phy_err_count);
8266
8267 *length = len;
8268 }
8269
8270 static void
ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8271 ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8272 char *buf, u32 *length)
8273 {
8274 u32 len = *length;
8275 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8276
8277 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8278 "RTS bad count", pdev->rts_bad);
8279 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8280 "RTS good count", pdev->rts_good);
8281 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8282 "FCS bad count", pdev->fcs_bad);
8283 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8284 "No beacon count", pdev->no_beacons);
8285 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8286 "MIB int count", pdev->mib_int_count);
8287
8288 len += scnprintf(buf + len, buf_len - len, "\n");
8289 *length = len;
8290 }
8291
8292 static void
ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8293 ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8294 char *buf, u32 *length)
8295 {
8296 u32 len = *length;
8297 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8298
8299 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
8300 "ath10k PDEV TX stats");
8301 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8302 "=================");
8303
8304 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8305 "HTT cookies queued", pdev->comp_queued);
8306 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8307 "HTT cookies disp.", pdev->comp_delivered);
8308 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8309 "MSDU queued", pdev->msdu_enqued);
8310 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8311 "MPDU queued", pdev->mpdu_enqued);
8312 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8313 "MSDUs dropped", pdev->wmm_drop);
8314 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8315 "Local enqued", pdev->local_enqued);
8316 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8317 "Local freed", pdev->local_freed);
8318 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8319 "HW queued", pdev->hw_queued);
8320 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8321 "PPDUs reaped", pdev->hw_reaped);
8322 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8323 "Num underruns", pdev->underrun);
8324 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8325 "PPDUs cleaned", pdev->tx_abort);
8326 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8327 "MPDUs requeued", pdev->mpdus_requeued);
8328 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8329 "Excessive retries", pdev->tx_ko);
8330 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8331 "HW rate", pdev->data_rc);
8332 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8333 "Sched self triggers", pdev->self_triggers);
8334 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8335 "Dropped due to SW retries",
8336 pdev->sw_retry_failure);
8337 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8338 "Illegal rate phy errors",
8339 pdev->illgl_rate_phy_err);
8340 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8341 "Pdev continuous xretry", pdev->pdev_cont_xretry);
8342 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8343 "TX timeout", pdev->pdev_tx_timeout);
8344 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8345 "PDEV resets", pdev->pdev_resets);
8346 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8347 "PHY underrun", pdev->phy_underrun);
8348 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8349 "MPDU is more than txop limit", pdev->txop_ovf);
8350 *length = len;
8351 }
8352
8353 static void
ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8354 ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8355 char *buf, u32 *length)
8356 {
8357 u32 len = *length;
8358 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8359
8360 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
8361 "ath10k PDEV RX stats");
8362 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8363 "=================");
8364
8365 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8366 "Mid PPDU route change",
8367 pdev->mid_ppdu_route_change);
8368 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8369 "Tot. number of statuses", pdev->status_rcvd);
8370 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8371 "Extra frags on rings 0", pdev->r0_frags);
8372 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8373 "Extra frags on rings 1", pdev->r1_frags);
8374 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8375 "Extra frags on rings 2", pdev->r2_frags);
8376 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8377 "Extra frags on rings 3", pdev->r3_frags);
8378 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8379 "MSDUs delivered to HTT", pdev->htt_msdus);
8380 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8381 "MPDUs delivered to HTT", pdev->htt_mpdus);
8382 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8383 "MSDUs delivered to stack", pdev->loc_msdus);
8384 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8385 "MPDUs delivered to stack", pdev->loc_mpdus);
8386 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8387 "Oversized AMSDUs", pdev->oversize_amsdu);
8388 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8389 "PHY errors", pdev->phy_errs);
8390 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8391 "PHY errors drops", pdev->phy_err_drop);
8392 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8393 "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
8394 *length = len;
8395 }
8396
8397 static void
ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev * vdev,char * buf,u32 * length)8398 ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev,
8399 char *buf, u32 *length)
8400 {
8401 u32 len = *length;
8402 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8403 int i;
8404
8405 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8406 "vdev id", vdev->vdev_id);
8407 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8408 "beacon snr", vdev->beacon_snr);
8409 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8410 "data snr", vdev->data_snr);
8411 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8412 "num rx frames", vdev->num_rx_frames);
8413 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8414 "num rts fail", vdev->num_rts_fail);
8415 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8416 "num rts success", vdev->num_rts_success);
8417 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8418 "num rx err", vdev->num_rx_err);
8419 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8420 "num rx discard", vdev->num_rx_discard);
8421 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8422 "num tx not acked", vdev->num_tx_not_acked);
8423
8424 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++)
8425 len += scnprintf(buf + len, buf_len - len,
8426 "%25s [%02d] %u\n",
8427 "num tx frames", i,
8428 vdev->num_tx_frames[i]);
8429
8430 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++)
8431 len += scnprintf(buf + len, buf_len - len,
8432 "%25s [%02d] %u\n",
8433 "num tx frames retries", i,
8434 vdev->num_tx_frames_retries[i]);
8435
8436 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++)
8437 len += scnprintf(buf + len, buf_len - len,
8438 "%25s [%02d] %u\n",
8439 "num tx frames failures", i,
8440 vdev->num_tx_frames_failures[i]);
8441
8442 for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++)
8443 len += scnprintf(buf + len, buf_len - len,
8444 "%25s [%02d] 0x%08x\n",
8445 "tx rate history", i,
8446 vdev->tx_rate_history[i]);
8447
8448 for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++)
8449 len += scnprintf(buf + len, buf_len - len,
8450 "%25s [%02d] %u\n",
8451 "beacon rssi history", i,
8452 vdev->beacon_rssi_history[i]);
8453
8454 len += scnprintf(buf + len, buf_len - len, "\n");
8455 *length = len;
8456 }
8457
8458 static void
ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer * peer,char * buf,u32 * length,bool extended_peer)8459 ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer,
8460 char *buf, u32 *length, bool extended_peer)
8461 {
8462 u32 len = *length;
8463 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8464
8465 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
8466 "Peer MAC address", peer->peer_macaddr);
8467 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8468 "Peer RSSI", peer->peer_rssi);
8469 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8470 "Peer TX rate", peer->peer_tx_rate);
8471 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8472 "Peer RX rate", peer->peer_rx_rate);
8473 if (!extended_peer)
8474 len += scnprintf(buf + len, buf_len - len, "%30s %llu\n",
8475 "Peer RX duration", peer->rx_duration);
8476
8477 len += scnprintf(buf + len, buf_len - len, "\n");
8478 *length = len;
8479 }
8480
8481 static void
ath10k_wmi_fw_extd_peer_stats_fill(const struct ath10k_fw_extd_stats_peer * peer,char * buf,u32 * length)8482 ath10k_wmi_fw_extd_peer_stats_fill(const struct ath10k_fw_extd_stats_peer *peer,
8483 char *buf, u32 *length)
8484 {
8485 u32 len = *length;
8486 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8487
8488 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
8489 "Peer MAC address", peer->peer_macaddr);
8490 len += scnprintf(buf + len, buf_len - len, "%30s %llu\n",
8491 "Peer RX duration", peer->rx_duration);
8492 }
8493
ath10k_wmi_main_op_fw_stats_fill(struct ath10k * ar,struct ath10k_fw_stats * fw_stats,char * buf)8494 void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
8495 struct ath10k_fw_stats *fw_stats,
8496 char *buf)
8497 {
8498 u32 len = 0;
8499 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8500 const struct ath10k_fw_stats_pdev *pdev;
8501 const struct ath10k_fw_stats_vdev *vdev;
8502 const struct ath10k_fw_stats_peer *peer;
8503 size_t num_peers;
8504 size_t num_vdevs;
8505
8506 spin_lock_bh(&ar->data_lock);
8507
8508 pdev = list_first_entry_or_null(&fw_stats->pdevs,
8509 struct ath10k_fw_stats_pdev, list);
8510 if (!pdev) {
8511 ath10k_warn(ar, "failed to get pdev stats\n");
8512 goto unlock;
8513 }
8514
8515 num_peers = list_count_nodes(&fw_stats->peers);
8516 num_vdevs = list_count_nodes(&fw_stats->vdevs);
8517
8518 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
8519 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
8520 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
8521
8522 len += scnprintf(buf + len, buf_len - len, "\n");
8523 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8524 "ath10k VDEV stats", num_vdevs);
8525 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8526 "=================");
8527
8528 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
8529 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
8530 }
8531
8532 len += scnprintf(buf + len, buf_len - len, "\n");
8533 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8534 "ath10k PEER stats", num_peers);
8535 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8536 "=================");
8537
8538 list_for_each_entry(peer, &fw_stats->peers, list) {
8539 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len,
8540 fw_stats->extended);
8541 }
8542
8543 unlock:
8544 spin_unlock_bh(&ar->data_lock);
8545
8546 if (len >= buf_len)
8547 buf[len - 1] = 0;
8548 else
8549 buf[len] = 0;
8550 }
8551
ath10k_wmi_10x_op_fw_stats_fill(struct ath10k * ar,struct ath10k_fw_stats * fw_stats,char * buf)8552 void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
8553 struct ath10k_fw_stats *fw_stats,
8554 char *buf)
8555 {
8556 unsigned int len = 0;
8557 unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE;
8558 const struct ath10k_fw_stats_pdev *pdev;
8559 const struct ath10k_fw_stats_vdev *vdev;
8560 const struct ath10k_fw_stats_peer *peer;
8561 size_t num_peers;
8562 size_t num_vdevs;
8563
8564 spin_lock_bh(&ar->data_lock);
8565
8566 pdev = list_first_entry_or_null(&fw_stats->pdevs,
8567 struct ath10k_fw_stats_pdev, list);
8568 if (!pdev) {
8569 ath10k_warn(ar, "failed to get pdev stats\n");
8570 goto unlock;
8571 }
8572
8573 num_peers = list_count_nodes(&fw_stats->peers);
8574 num_vdevs = list_count_nodes(&fw_stats->vdevs);
8575
8576 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
8577 ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
8578 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
8579 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
8580
8581 len += scnprintf(buf + len, buf_len - len, "\n");
8582 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8583 "ath10k VDEV stats", num_vdevs);
8584 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8585 "=================");
8586
8587 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
8588 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
8589 }
8590
8591 len += scnprintf(buf + len, buf_len - len, "\n");
8592 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8593 "ath10k PEER stats", num_peers);
8594 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8595 "=================");
8596
8597 list_for_each_entry(peer, &fw_stats->peers, list) {
8598 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len,
8599 fw_stats->extended);
8600 }
8601
8602 unlock:
8603 spin_unlock_bh(&ar->data_lock);
8604
8605 if (len >= buf_len)
8606 buf[len - 1] = 0;
8607 else
8608 buf[len] = 0;
8609 }
8610
8611 static struct sk_buff *
ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k * ar,u8 enable,u32 detect_level,u32 detect_margin)8612 ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable,
8613 u32 detect_level, u32 detect_margin)
8614 {
8615 struct wmi_pdev_set_adaptive_cca_params *cmd;
8616 struct sk_buff *skb;
8617
8618 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8619 if (!skb)
8620 return ERR_PTR(-ENOMEM);
8621
8622 cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data;
8623 cmd->enable = __cpu_to_le32(enable);
8624 cmd->cca_detect_level = __cpu_to_le32(detect_level);
8625 cmd->cca_detect_margin = __cpu_to_le32(detect_margin);
8626
8627 ath10k_dbg(ar, ATH10K_DBG_WMI,
8628 "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n",
8629 enable, detect_level, detect_margin);
8630 return skb;
8631 }
8632
8633 static void
ath10k_wmi_fw_vdev_stats_extd_fill(const struct ath10k_fw_stats_vdev_extd * vdev,char * buf,u32 * length)8634 ath10k_wmi_fw_vdev_stats_extd_fill(const struct ath10k_fw_stats_vdev_extd *vdev,
8635 char *buf, u32 *length)
8636 {
8637 u32 len = *length;
8638 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8639 u32 val;
8640
8641 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8642 "vdev id", vdev->vdev_id);
8643 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8644 "ppdu aggr count", vdev->ppdu_aggr_cnt);
8645 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8646 "ppdu noack", vdev->ppdu_noack);
8647 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8648 "mpdu queued", vdev->mpdu_queued);
8649 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8650 "ppdu nonaggr count", vdev->ppdu_nonaggr_cnt);
8651 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8652 "mpdu sw requeued", vdev->mpdu_sw_requeued);
8653 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8654 "mpdu success retry", vdev->mpdu_suc_retry);
8655 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8656 "mpdu success multitry", vdev->mpdu_suc_multitry);
8657 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8658 "mpdu fail retry", vdev->mpdu_fail_retry);
8659 val = vdev->tx_ftm_suc;
8660 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8661 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8662 "tx ftm success",
8663 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8664 val = vdev->tx_ftm_suc_retry;
8665 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8666 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8667 "tx ftm success retry",
8668 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8669 val = vdev->tx_ftm_fail;
8670 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8671 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8672 "tx ftm fail",
8673 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8674 val = vdev->rx_ftmr_cnt;
8675 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8676 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8677 "rx ftm request count",
8678 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8679 val = vdev->rx_ftmr_dup_cnt;
8680 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8681 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8682 "rx ftm request dup count",
8683 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8684 val = vdev->rx_iftmr_cnt;
8685 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8686 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8687 "rx initial ftm req count",
8688 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8689 val = vdev->rx_iftmr_dup_cnt;
8690 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8691 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8692 "rx initial ftm req dup cnt",
8693 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8694 len += scnprintf(buf + len, buf_len - len, "\n");
8695
8696 *length = len;
8697 }
8698
ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k * ar,struct ath10k_fw_stats * fw_stats,char * buf)8699 void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
8700 struct ath10k_fw_stats *fw_stats,
8701 char *buf)
8702 {
8703 u32 len = 0;
8704 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8705 const struct ath10k_fw_stats_pdev *pdev;
8706 const struct ath10k_fw_stats_vdev_extd *vdev;
8707 const struct ath10k_fw_stats_peer *peer;
8708 const struct ath10k_fw_extd_stats_peer *extd_peer;
8709 size_t num_peers;
8710 size_t num_vdevs;
8711
8712 spin_lock_bh(&ar->data_lock);
8713
8714 pdev = list_first_entry_or_null(&fw_stats->pdevs,
8715 struct ath10k_fw_stats_pdev, list);
8716 if (!pdev) {
8717 ath10k_warn(ar, "failed to get pdev stats\n");
8718 goto unlock;
8719 }
8720
8721 num_peers = list_count_nodes(&fw_stats->peers);
8722 num_vdevs = list_count_nodes(&fw_stats->vdevs);
8723
8724 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
8725 ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
8726 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
8727
8728 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8729 "HW paused", pdev->hw_paused);
8730 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8731 "Seqs posted", pdev->seq_posted);
8732 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8733 "Seqs failed queueing", pdev->seq_failed_queueing);
8734 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8735 "Seqs completed", pdev->seq_completed);
8736 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8737 "Seqs restarted", pdev->seq_restarted);
8738 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8739 "MU Seqs posted", pdev->mu_seq_posted);
8740 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8741 "MPDUs SW flushed", pdev->mpdus_sw_flush);
8742 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8743 "MPDUs HW filtered", pdev->mpdus_hw_filter);
8744 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8745 "MPDUs truncated", pdev->mpdus_truncated);
8746 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8747 "MPDUs receive no ACK", pdev->mpdus_ack_failed);
8748 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8749 "MPDUs expired", pdev->mpdus_expired);
8750
8751 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
8752 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8753 "Num Rx Overflow errors", pdev->rx_ovfl_errs);
8754
8755 len += scnprintf(buf + len, buf_len - len, "\n");
8756 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8757 "ath10k VDEV stats", num_vdevs);
8758 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8759 "=================");
8760 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
8761 ath10k_wmi_fw_vdev_stats_extd_fill(vdev, buf, &len);
8762 }
8763
8764 len += scnprintf(buf + len, buf_len - len, "\n");
8765 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8766 "ath10k PEER stats", num_peers);
8767 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8768 "=================");
8769
8770 list_for_each_entry(peer, &fw_stats->peers, list) {
8771 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len,
8772 fw_stats->extended);
8773 }
8774
8775 if (fw_stats->extended) {
8776 list_for_each_entry(extd_peer, &fw_stats->peers_extd, list) {
8777 ath10k_wmi_fw_extd_peer_stats_fill(extd_peer, buf,
8778 &len);
8779 }
8780 }
8781
8782 unlock:
8783 spin_unlock_bh(&ar->data_lock);
8784
8785 if (len >= buf_len)
8786 buf[len - 1] = 0;
8787 else
8788 buf[len] = 0;
8789 }
8790
ath10k_wmi_op_get_vdev_subtype(struct ath10k * ar,enum wmi_vdev_subtype subtype)8791 int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
8792 enum wmi_vdev_subtype subtype)
8793 {
8794 switch (subtype) {
8795 case WMI_VDEV_SUBTYPE_NONE:
8796 return WMI_VDEV_SUBTYPE_LEGACY_NONE;
8797 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
8798 return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV;
8799 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
8800 return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI;
8801 case WMI_VDEV_SUBTYPE_P2P_GO:
8802 return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO;
8803 case WMI_VDEV_SUBTYPE_PROXY_STA:
8804 return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA;
8805 case WMI_VDEV_SUBTYPE_MESH_11S:
8806 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
8807 return -EOPNOTSUPP;
8808 }
8809 return -EOPNOTSUPP;
8810 }
8811
ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k * ar,enum wmi_vdev_subtype subtype)8812 static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar,
8813 enum wmi_vdev_subtype subtype)
8814 {
8815 switch (subtype) {
8816 case WMI_VDEV_SUBTYPE_NONE:
8817 return WMI_VDEV_SUBTYPE_10_2_4_NONE;
8818 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
8819 return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV;
8820 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
8821 return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI;
8822 case WMI_VDEV_SUBTYPE_P2P_GO:
8823 return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO;
8824 case WMI_VDEV_SUBTYPE_PROXY_STA:
8825 return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA;
8826 case WMI_VDEV_SUBTYPE_MESH_11S:
8827 return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S;
8828 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
8829 return -EOPNOTSUPP;
8830 }
8831 return -EOPNOTSUPP;
8832 }
8833
ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k * ar,enum wmi_vdev_subtype subtype)8834 static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar,
8835 enum wmi_vdev_subtype subtype)
8836 {
8837 switch (subtype) {
8838 case WMI_VDEV_SUBTYPE_NONE:
8839 return WMI_VDEV_SUBTYPE_10_4_NONE;
8840 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
8841 return WMI_VDEV_SUBTYPE_10_4_P2P_DEV;
8842 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
8843 return WMI_VDEV_SUBTYPE_10_4_P2P_CLI;
8844 case WMI_VDEV_SUBTYPE_P2P_GO:
8845 return WMI_VDEV_SUBTYPE_10_4_P2P_GO;
8846 case WMI_VDEV_SUBTYPE_PROXY_STA:
8847 return WMI_VDEV_SUBTYPE_10_4_PROXY_STA;
8848 case WMI_VDEV_SUBTYPE_MESH_11S:
8849 return WMI_VDEV_SUBTYPE_10_4_MESH_11S;
8850 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
8851 return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S;
8852 }
8853 return -EOPNOTSUPP;
8854 }
8855
8856 static struct sk_buff *
ath10k_wmi_10_4_ext_resource_config(struct ath10k * ar,enum wmi_host_platform_type type,u32 fw_feature_bitmap)8857 ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar,
8858 enum wmi_host_platform_type type,
8859 u32 fw_feature_bitmap)
8860 {
8861 struct wmi_ext_resource_config_10_4_cmd *cmd;
8862 struct sk_buff *skb;
8863 u32 num_tdls_sleep_sta = 0;
8864
8865 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8866 if (!skb)
8867 return ERR_PTR(-ENOMEM);
8868
8869 if (test_bit(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, ar->wmi.svc_map))
8870 num_tdls_sleep_sta = TARGET_10_4_NUM_TDLS_SLEEP_STA;
8871
8872 cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data;
8873 cmd->host_platform_config = __cpu_to_le32(type);
8874 cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap);
8875 cmd->wlan_gpio_priority = __cpu_to_le32(ar->coex_gpio_pin);
8876 cmd->coex_version = __cpu_to_le32(WMI_NO_COEX_VERSION_SUPPORT);
8877 cmd->coex_gpio_pin1 = __cpu_to_le32(-1);
8878 cmd->coex_gpio_pin2 = __cpu_to_le32(-1);
8879 cmd->coex_gpio_pin3 = __cpu_to_le32(-1);
8880 cmd->num_tdls_vdevs = __cpu_to_le32(TARGET_10_4_NUM_TDLS_VDEVS);
8881 cmd->num_tdls_conn_table_entries = __cpu_to_le32(20);
8882 cmd->max_tdls_concurrent_sleep_sta = __cpu_to_le32(num_tdls_sleep_sta);
8883 cmd->max_tdls_concurrent_buffer_sta =
8884 __cpu_to_le32(TARGET_10_4_NUM_TDLS_BUFFER_STA);
8885
8886 ath10k_dbg(ar, ATH10K_DBG_WMI,
8887 "wmi ext resource config host type %d firmware feature bitmap %08x\n",
8888 type, fw_feature_bitmap);
8889 return skb;
8890 }
8891
8892 static struct sk_buff *
ath10k_wmi_10_4_gen_update_fw_tdls_state(struct ath10k * ar,u32 vdev_id,enum wmi_tdls_state state)8893 ath10k_wmi_10_4_gen_update_fw_tdls_state(struct ath10k *ar, u32 vdev_id,
8894 enum wmi_tdls_state state)
8895 {
8896 struct wmi_10_4_tdls_set_state_cmd *cmd;
8897 struct sk_buff *skb;
8898 u32 options = 0;
8899
8900 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8901 if (!skb)
8902 return ERR_PTR(-ENOMEM);
8903
8904 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, ar->wmi.svc_map) &&
8905 state == WMI_TDLS_ENABLE_ACTIVE)
8906 state = WMI_TDLS_ENABLE_PASSIVE;
8907
8908 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, ar->wmi.svc_map))
8909 options |= WMI_TDLS_BUFFER_STA_EN;
8910
8911 cmd = (struct wmi_10_4_tdls_set_state_cmd *)skb->data;
8912 cmd->vdev_id = __cpu_to_le32(vdev_id);
8913 cmd->state = __cpu_to_le32(state);
8914 cmd->notification_interval_ms = __cpu_to_le32(5000);
8915 cmd->tx_discovery_threshold = __cpu_to_le32(100);
8916 cmd->tx_teardown_threshold = __cpu_to_le32(5);
8917 cmd->rssi_teardown_threshold = __cpu_to_le32(-75);
8918 cmd->rssi_delta = __cpu_to_le32(-20);
8919 cmd->tdls_options = __cpu_to_le32(options);
8920 cmd->tdls_peer_traffic_ind_window = __cpu_to_le32(2);
8921 cmd->tdls_peer_traffic_response_timeout_ms = __cpu_to_le32(5000);
8922 cmd->tdls_puapsd_mask = __cpu_to_le32(0xf);
8923 cmd->tdls_puapsd_inactivity_time_ms = __cpu_to_le32(0);
8924 cmd->tdls_puapsd_rx_frame_threshold = __cpu_to_le32(10);
8925 cmd->teardown_notification_ms = __cpu_to_le32(10);
8926 cmd->tdls_peer_kickout_threshold = __cpu_to_le32(96);
8927
8928 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi update fw tdls state %d for vdev %i\n",
8929 state, vdev_id);
8930 return skb;
8931 }
8932
ath10k_wmi_prepare_peer_qos(u8 uapsd_queues,u8 sp)8933 static u32 ath10k_wmi_prepare_peer_qos(u8 uapsd_queues, u8 sp)
8934 {
8935 u32 peer_qos = 0;
8936
8937 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO)
8938 peer_qos |= WMI_TDLS_PEER_QOS_AC_VO;
8939 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI)
8940 peer_qos |= WMI_TDLS_PEER_QOS_AC_VI;
8941 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK)
8942 peer_qos |= WMI_TDLS_PEER_QOS_AC_BK;
8943 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE)
8944 peer_qos |= WMI_TDLS_PEER_QOS_AC_BE;
8945
8946 peer_qos |= SM(sp, WMI_TDLS_PEER_SP);
8947
8948 return peer_qos;
8949 }
8950
8951 static struct sk_buff *
ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid(struct ath10k * ar,u32 param)8952 ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid(struct ath10k *ar, u32 param)
8953 {
8954 struct wmi_pdev_get_tpc_table_cmd *cmd;
8955 struct sk_buff *skb;
8956
8957 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8958 if (!skb)
8959 return ERR_PTR(-ENOMEM);
8960
8961 cmd = (struct wmi_pdev_get_tpc_table_cmd *)skb->data;
8962 cmd->param = __cpu_to_le32(param);
8963
8964 ath10k_dbg(ar, ATH10K_DBG_WMI,
8965 "wmi pdev get tpc table param:%d\n", param);
8966 return skb;
8967 }
8968
8969 static struct sk_buff *
ath10k_wmi_10_4_gen_tdls_peer_update(struct ath10k * ar,const struct wmi_tdls_peer_update_cmd_arg * arg,const struct wmi_tdls_peer_capab_arg * cap,const struct wmi_channel_arg * chan_arg)8970 ath10k_wmi_10_4_gen_tdls_peer_update(struct ath10k *ar,
8971 const struct wmi_tdls_peer_update_cmd_arg *arg,
8972 const struct wmi_tdls_peer_capab_arg *cap,
8973 const struct wmi_channel_arg *chan_arg)
8974 {
8975 struct wmi_10_4_tdls_peer_update_cmd *cmd;
8976 struct wmi_tdls_peer_capabilities *peer_cap;
8977 struct wmi_channel *chan;
8978 struct sk_buff *skb;
8979 u32 peer_qos;
8980 int len, chan_len;
8981 int i;
8982
8983 /* tdls peer update cmd has place holder for one channel*/
8984 chan_len = cap->peer_chan_len ? (cap->peer_chan_len - 1) : 0;
8985
8986 len = sizeof(*cmd) + chan_len * sizeof(*chan);
8987
8988 skb = ath10k_wmi_alloc_skb(ar, len);
8989 if (!skb)
8990 return ERR_PTR(-ENOMEM);
8991
8992 cmd = (struct wmi_10_4_tdls_peer_update_cmd *)skb->data;
8993 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
8994 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
8995 cmd->peer_state = __cpu_to_le32(arg->peer_state);
8996
8997 peer_qos = ath10k_wmi_prepare_peer_qos(cap->peer_uapsd_queues,
8998 cap->peer_max_sp);
8999
9000 peer_cap = &cmd->peer_capab;
9001 peer_cap->peer_qos = __cpu_to_le32(peer_qos);
9002 peer_cap->buff_sta_support = __cpu_to_le32(cap->buff_sta_support);
9003 peer_cap->off_chan_support = __cpu_to_le32(cap->off_chan_support);
9004 peer_cap->peer_curr_operclass = __cpu_to_le32(cap->peer_curr_operclass);
9005 peer_cap->self_curr_operclass = __cpu_to_le32(cap->self_curr_operclass);
9006 peer_cap->peer_chan_len = __cpu_to_le32(cap->peer_chan_len);
9007 peer_cap->peer_operclass_len = __cpu_to_le32(cap->peer_operclass_len);
9008
9009 for (i = 0; i < WMI_TDLS_MAX_SUPP_OPER_CLASSES; i++)
9010 peer_cap->peer_operclass[i] = cap->peer_operclass[i];
9011
9012 peer_cap->is_peer_responder = __cpu_to_le32(cap->is_peer_responder);
9013 peer_cap->pref_offchan_num = __cpu_to_le32(cap->pref_offchan_num);
9014 peer_cap->pref_offchan_bw = __cpu_to_le32(cap->pref_offchan_bw);
9015
9016 for (i = 0; i < cap->peer_chan_len; i++) {
9017 chan = (struct wmi_channel *)&peer_cap->peer_chan_list[i];
9018 ath10k_wmi_put_wmi_channel(ar, chan, &chan_arg[i]);
9019 }
9020
9021 ath10k_dbg(ar, ATH10K_DBG_WMI,
9022 "wmi tdls peer update vdev %i state %d n_chans %u\n",
9023 arg->vdev_id, arg->peer_state, cap->peer_chan_len);
9024 return skb;
9025 }
9026
9027 static struct sk_buff *
ath10k_wmi_10_4_gen_radar_found(struct ath10k * ar,const struct ath10k_radar_found_info * arg)9028 ath10k_wmi_10_4_gen_radar_found(struct ath10k *ar,
9029 const struct ath10k_radar_found_info *arg)
9030 {
9031 struct wmi_radar_found_info *cmd;
9032 struct sk_buff *skb;
9033
9034 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9035 if (!skb)
9036 return ERR_PTR(-ENOMEM);
9037
9038 cmd = (struct wmi_radar_found_info *)skb->data;
9039 cmd->pri_min = __cpu_to_le32(arg->pri_min);
9040 cmd->pri_max = __cpu_to_le32(arg->pri_max);
9041 cmd->width_min = __cpu_to_le32(arg->width_min);
9042 cmd->width_max = __cpu_to_le32(arg->width_max);
9043 cmd->sidx_min = __cpu_to_le32(arg->sidx_min);
9044 cmd->sidx_max = __cpu_to_le32(arg->sidx_max);
9045
9046 ath10k_dbg(ar, ATH10K_DBG_WMI,
9047 "wmi radar found pri_min %d pri_max %d width_min %d width_max %d sidx_min %d sidx_max %d\n",
9048 arg->pri_min, arg->pri_max, arg->width_min,
9049 arg->width_max, arg->sidx_min, arg->sidx_max);
9050 return skb;
9051 }
9052
9053 static struct sk_buff *
ath10k_wmi_10_4_gen_per_peer_per_tid_cfg(struct ath10k * ar,const struct wmi_per_peer_per_tid_cfg_arg * arg)9054 ath10k_wmi_10_4_gen_per_peer_per_tid_cfg(struct ath10k *ar,
9055 const struct wmi_per_peer_per_tid_cfg_arg *arg)
9056 {
9057 struct wmi_peer_per_tid_cfg_cmd *cmd;
9058 struct sk_buff *skb;
9059
9060 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9061 if (!skb)
9062 return ERR_PTR(-ENOMEM);
9063
9064 memset(skb->data, 0, sizeof(*cmd));
9065
9066 cmd = (struct wmi_peer_per_tid_cfg_cmd *)skb->data;
9067 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
9068 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr.addr);
9069 cmd->tid = cpu_to_le32(arg->tid);
9070 cmd->ack_policy = cpu_to_le32(arg->ack_policy);
9071 cmd->aggr_control = cpu_to_le32(arg->aggr_control);
9072 cmd->rate_control = cpu_to_le32(arg->rate_ctrl);
9073 cmd->retry_count = cpu_to_le32(arg->retry_count);
9074 cmd->rcode_flags = cpu_to_le32(arg->rcode_flags);
9075 cmd->ext_tid_cfg_bitmap = cpu_to_le32(arg->ext_tid_cfg_bitmap);
9076 cmd->rtscts_ctrl = cpu_to_le32(arg->rtscts_ctrl);
9077
9078 ath10k_dbg(ar, ATH10K_DBG_WMI,
9079 "wmi noack tid %d vdev id %d ack_policy %d aggr %u rate_ctrl %u rcflag %u retry_count %d rtscts %d ext_tid_cfg_bitmap %d mac_addr %pM\n",
9080 arg->tid, arg->vdev_id, arg->ack_policy, arg->aggr_control,
9081 arg->rate_ctrl, arg->rcode_flags, arg->retry_count,
9082 arg->rtscts_ctrl, arg->ext_tid_cfg_bitmap, arg->peer_macaddr.addr);
9083 return skb;
9084 }
9085
9086 static struct sk_buff *
ath10k_wmi_op_gen_echo(struct ath10k * ar,u32 value)9087 ath10k_wmi_op_gen_echo(struct ath10k *ar, u32 value)
9088 {
9089 struct wmi_echo_cmd *cmd;
9090 struct sk_buff *skb;
9091
9092 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9093 if (!skb)
9094 return ERR_PTR(-ENOMEM);
9095
9096 cmd = (struct wmi_echo_cmd *)skb->data;
9097 cmd->value = cpu_to_le32(value);
9098
9099 ath10k_dbg(ar, ATH10K_DBG_WMI,
9100 "wmi echo value 0x%08x\n", value);
9101 return skb;
9102 }
9103
9104 int
ath10k_wmi_barrier(struct ath10k * ar)9105 ath10k_wmi_barrier(struct ath10k *ar)
9106 {
9107 int ret;
9108 int time_left;
9109
9110 spin_lock_bh(&ar->data_lock);
9111 reinit_completion(&ar->wmi.barrier);
9112 spin_unlock_bh(&ar->data_lock);
9113
9114 ret = ath10k_wmi_echo(ar, ATH10K_WMI_BARRIER_ECHO_ID);
9115 if (ret) {
9116 ath10k_warn(ar, "failed to submit wmi echo: %d\n", ret);
9117 return ret;
9118 }
9119
9120 time_left = wait_for_completion_timeout(&ar->wmi.barrier,
9121 ATH10K_WMI_BARRIER_TIMEOUT_HZ);
9122 if (!time_left)
9123 return -ETIMEDOUT;
9124
9125 return 0;
9126 }
9127
9128 static struct sk_buff *
ath10k_wmi_10_2_4_op_gen_bb_timing(struct ath10k * ar,const struct wmi_bb_timing_cfg_arg * arg)9129 ath10k_wmi_10_2_4_op_gen_bb_timing(struct ath10k *ar,
9130 const struct wmi_bb_timing_cfg_arg *arg)
9131 {
9132 struct wmi_pdev_bb_timing_cfg_cmd *cmd;
9133 struct sk_buff *skb;
9134
9135 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9136 if (!skb)
9137 return ERR_PTR(-ENOMEM);
9138
9139 cmd = (struct wmi_pdev_bb_timing_cfg_cmd *)skb->data;
9140 cmd->bb_tx_timing = __cpu_to_le32(arg->bb_tx_timing);
9141 cmd->bb_xpa_timing = __cpu_to_le32(arg->bb_xpa_timing);
9142
9143 ath10k_dbg(ar, ATH10K_DBG_WMI,
9144 "wmi pdev bb_tx_timing 0x%x bb_xpa_timing 0x%x\n",
9145 arg->bb_tx_timing, arg->bb_xpa_timing);
9146 return skb;
9147 }
9148
9149 static const struct wmi_ops wmi_ops = {
9150 .rx = ath10k_wmi_op_rx,
9151 .map_svc = wmi_main_svc_map,
9152
9153 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9154 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9155 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9156 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9157 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9158 .pull_swba = ath10k_wmi_op_pull_swba_ev,
9159 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9160 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9161 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
9162 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9163 .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
9164 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9165 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9166
9167 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9168 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9169 .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
9170 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9171 .gen_init = ath10k_wmi_op_gen_init,
9172 .gen_start_scan = ath10k_wmi_op_gen_start_scan,
9173 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9174 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9175 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9176 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9177 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9178 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9179 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9180 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9181 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9182 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9183 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9184 /* .gen_vdev_wmm_conf not implemented */
9185 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9186 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9187 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9188 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9189 .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
9190 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9191 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9192 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9193 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9194 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9195 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9196 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9197 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9198 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9199 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9200 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9201 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9202 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9203 /* .gen_pdev_get_temperature not implemented */
9204 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9205 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9206 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9207 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9208 .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
9209 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
9210 .gen_echo = ath10k_wmi_op_gen_echo,
9211 .gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
9212 .gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
9213
9214 /* .gen_bcn_tmpl not implemented */
9215 /* .gen_prb_tmpl not implemented */
9216 /* .gen_p2p_go_bcn_ie not implemented */
9217 /* .gen_adaptive_qcs not implemented */
9218 /* .gen_pdev_enable_adaptive_cca not implemented */
9219 };
9220
9221 static const struct wmi_ops wmi_10_1_ops = {
9222 .rx = ath10k_wmi_10_1_op_rx,
9223 .map_svc = wmi_10x_svc_map,
9224 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
9225 .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
9226 .gen_init = ath10k_wmi_10_1_op_gen_init,
9227 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9228 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
9229 .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
9230 /* .gen_pdev_get_temperature not implemented */
9231
9232 /* shared with main branch */
9233 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9234 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9235 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9236 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9237 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9238 .pull_swba = ath10k_wmi_op_pull_swba_ev,
9239 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9240 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9241 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9242 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9243 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9244
9245 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9246 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9247 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9248 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9249 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9250 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9251 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9252 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9253 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9254 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9255 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9256 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9257 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9258 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9259 /* .gen_vdev_wmm_conf not implemented */
9260 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9261 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9262 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9263 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9264 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9265 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9266 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9267 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9268 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9269 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9270 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9271 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9272 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9273 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9274 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9275 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9276 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9277 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9278 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9279 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9280 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9281 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
9282 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
9283 .gen_echo = ath10k_wmi_op_gen_echo,
9284 .gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
9285 .gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
9286 /* .gen_bcn_tmpl not implemented */
9287 /* .gen_prb_tmpl not implemented */
9288 /* .gen_p2p_go_bcn_ie not implemented */
9289 /* .gen_adaptive_qcs not implemented */
9290 /* .gen_pdev_enable_adaptive_cca not implemented */
9291 };
9292
9293 static const struct wmi_ops wmi_10_2_ops = {
9294 .rx = ath10k_wmi_10_2_op_rx,
9295 .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
9296 .gen_init = ath10k_wmi_10_2_op_gen_init,
9297 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
9298 /* .gen_pdev_get_temperature not implemented */
9299
9300 /* shared with 10.1 */
9301 .map_svc = wmi_10x_svc_map,
9302 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
9303 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9304 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
9305 .gen_echo = ath10k_wmi_op_gen_echo,
9306
9307 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9308 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9309 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9310 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9311 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9312 .pull_swba = ath10k_wmi_op_pull_swba_ev,
9313 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9314 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9315 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9316 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9317 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9318
9319 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9320 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9321 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9322 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9323 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9324 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9325 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9326 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9327 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9328 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9329 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9330 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9331 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9332 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9333 /* .gen_vdev_wmm_conf not implemented */
9334 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9335 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9336 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9337 .gen_pdev_set_base_macaddr = ath10k_wmi_op_gen_pdev_set_base_macaddr,
9338 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9339 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9340 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9341 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9342 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9343 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9344 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9345 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9346 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9347 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9348 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9349 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9350 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9351 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9352 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9353 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9354 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9355 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9356 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
9357 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
9358 .gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
9359 .gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
9360 /* .gen_pdev_enable_adaptive_cca not implemented */
9361 };
9362
9363 static const struct wmi_ops wmi_10_2_4_ops = {
9364 .rx = ath10k_wmi_10_2_op_rx,
9365 .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
9366 .gen_init = ath10k_wmi_10_2_op_gen_init,
9367 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
9368 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
9369 .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
9370
9371 /* shared with 10.1 */
9372 .map_svc = wmi_10x_svc_map,
9373 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
9374 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9375 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
9376 .gen_echo = ath10k_wmi_op_gen_echo,
9377
9378 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9379 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9380 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9381 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9382 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9383 .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev,
9384 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9385 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9386 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9387 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9388 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9389
9390 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9391 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9392 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9393 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9394 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9395 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9396 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9397 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9398 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9399 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9400 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9401 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9402 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9403 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9404 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9405 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9406 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9407 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9408 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9409 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9410 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9411 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9412 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9413 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9414 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9415 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9416 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9417 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9418 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9419 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9420 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9421 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9422 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9423 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9424 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9425 .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
9426 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
9427 .gen_pdev_enable_adaptive_cca =
9428 ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
9429 .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
9430 .gen_bb_timing = ath10k_wmi_10_2_4_op_gen_bb_timing,
9431 .gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
9432 .gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
9433 /* .gen_bcn_tmpl not implemented */
9434 /* .gen_prb_tmpl not implemented */
9435 /* .gen_p2p_go_bcn_ie not implemented */
9436 /* .gen_adaptive_qcs not implemented */
9437 };
9438
9439 static const struct wmi_ops wmi_10_4_ops = {
9440 .rx = ath10k_wmi_10_4_op_rx,
9441 .map_svc = wmi_10_4_svc_map,
9442
9443 .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats,
9444 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9445 .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev,
9446 .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev,
9447 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9448 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9449 .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
9450 .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
9451 .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
9452 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
9453 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9454 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9455 .pull_dfs_status_ev = ath10k_wmi_10_4_op_pull_dfs_status_ev,
9456 .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
9457
9458 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9459 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9460 .gen_pdev_set_base_macaddr = ath10k_wmi_op_gen_pdev_set_base_macaddr,
9461 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9462 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9463 .gen_init = ath10k_wmi_10_4_op_gen_init,
9464 .gen_start_scan = ath10k_wmi_op_gen_start_scan,
9465 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9466 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9467 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9468 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9469 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9470 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9471 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9472 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9473 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9474 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9475 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9476 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9477 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9478 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9479 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9480 .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc,
9481 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9482 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9483 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9484 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9485 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9486 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9487 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9488 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9489 .gen_dbglog_cfg = ath10k_wmi_10_4_op_gen_dbglog_cfg,
9490 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9491 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9492 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9493 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9494 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9495 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9496 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9497 .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill,
9498 .ext_resource_config = ath10k_wmi_10_4_ext_resource_config,
9499 .gen_update_fw_tdls_state = ath10k_wmi_10_4_gen_update_fw_tdls_state,
9500 .gen_tdls_peer_update = ath10k_wmi_10_4_gen_tdls_peer_update,
9501 .gen_pdev_get_tpc_table_cmdid =
9502 ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid,
9503 .gen_radar_found = ath10k_wmi_10_4_gen_radar_found,
9504 .gen_per_peer_per_tid_cfg = ath10k_wmi_10_4_gen_per_peer_per_tid_cfg,
9505
9506 /* shared with 10.2 */
9507 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9508 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9509 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
9510 .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype,
9511 .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
9512 .gen_echo = ath10k_wmi_op_gen_echo,
9513 .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
9514 .gen_gpio_config = ath10k_wmi_op_gen_gpio_config,
9515 .gen_gpio_output = ath10k_wmi_op_gen_gpio_output,
9516 };
9517
ath10k_wmi_attach(struct ath10k * ar)9518 int ath10k_wmi_attach(struct ath10k *ar)
9519 {
9520 switch (ar->running_fw->fw_file.wmi_op_version) {
9521 case ATH10K_FW_WMI_OP_VERSION_10_4:
9522 ar->wmi.ops = &wmi_10_4_ops;
9523 ar->wmi.cmd = &wmi_10_4_cmd_map;
9524 ar->wmi.vdev_param = &wmi_10_4_vdev_param_map;
9525 ar->wmi.pdev_param = &wmi_10_4_pdev_param_map;
9526 ar->wmi.peer_param = &wmi_peer_param_map;
9527 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9528 ar->wmi_key_cipher = wmi_key_cipher_suites;
9529 break;
9530 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
9531 ar->wmi.cmd = &wmi_10_2_4_cmd_map;
9532 ar->wmi.ops = &wmi_10_2_4_ops;
9533 ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
9534 ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
9535 ar->wmi.peer_param = &wmi_peer_param_map;
9536 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9537 ar->wmi_key_cipher = wmi_key_cipher_suites;
9538 break;
9539 case ATH10K_FW_WMI_OP_VERSION_10_2:
9540 ar->wmi.cmd = &wmi_10_2_cmd_map;
9541 ar->wmi.ops = &wmi_10_2_ops;
9542 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
9543 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
9544 ar->wmi.peer_param = &wmi_peer_param_map;
9545 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9546 ar->wmi_key_cipher = wmi_key_cipher_suites;
9547 break;
9548 case ATH10K_FW_WMI_OP_VERSION_10_1:
9549 ar->wmi.cmd = &wmi_10x_cmd_map;
9550 ar->wmi.ops = &wmi_10_1_ops;
9551 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
9552 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
9553 ar->wmi.peer_param = &wmi_peer_param_map;
9554 ar->wmi.peer_flags = &wmi_10x_peer_flags_map;
9555 ar->wmi_key_cipher = wmi_key_cipher_suites;
9556 break;
9557 case ATH10K_FW_WMI_OP_VERSION_MAIN:
9558 ar->wmi.cmd = &wmi_cmd_map;
9559 ar->wmi.ops = &wmi_ops;
9560 ar->wmi.vdev_param = &wmi_vdev_param_map;
9561 ar->wmi.pdev_param = &wmi_pdev_param_map;
9562 ar->wmi.peer_param = &wmi_peer_param_map;
9563 ar->wmi.peer_flags = &wmi_peer_flags_map;
9564 ar->wmi_key_cipher = wmi_key_cipher_suites;
9565 break;
9566 case ATH10K_FW_WMI_OP_VERSION_TLV:
9567 ath10k_wmi_tlv_attach(ar);
9568 ar->wmi_key_cipher = wmi_tlv_key_cipher_suites;
9569 break;
9570 case ATH10K_FW_WMI_OP_VERSION_UNSET:
9571 case ATH10K_FW_WMI_OP_VERSION_MAX:
9572 ath10k_err(ar, "unsupported WMI op version: %d\n",
9573 ar->running_fw->fw_file.wmi_op_version);
9574 return -EINVAL;
9575 }
9576
9577 init_completion(&ar->wmi.service_ready);
9578 init_completion(&ar->wmi.unified_ready);
9579 init_completion(&ar->wmi.barrier);
9580 init_completion(&ar->wmi.radar_confirm);
9581
9582 INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work);
9583 INIT_WORK(&ar->radar_confirmation_work,
9584 ath10k_radar_confirmation_work);
9585
9586 if (test_bit(ATH10K_FW_FEATURE_MGMT_TX_BY_REF,
9587 ar->running_fw->fw_file.fw_features)) {
9588 idr_init(&ar->wmi.mgmt_pending_tx);
9589 }
9590
9591 return 0;
9592 }
9593
ath10k_wmi_free_host_mem(struct ath10k * ar)9594 void ath10k_wmi_free_host_mem(struct ath10k *ar)
9595 {
9596 int i;
9597
9598 /* free the host memory chunks requested by firmware */
9599 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
9600 dma_free_coherent(ar->dev,
9601 ar->wmi.mem_chunks[i].len,
9602 ar->wmi.mem_chunks[i].vaddr,
9603 ar->wmi.mem_chunks[i].paddr);
9604 }
9605
9606 ar->wmi.num_mem_chunks = 0;
9607 }
9608
ath10k_wmi_mgmt_tx_clean_up_pending(int msdu_id,void * ptr,void * ctx)9609 static int ath10k_wmi_mgmt_tx_clean_up_pending(int msdu_id, void *ptr,
9610 void *ctx)
9611 {
9612 struct ath10k_mgmt_tx_pkt_addr *pkt_addr = ptr;
9613 struct ath10k *ar = ctx;
9614 struct sk_buff *msdu;
9615
9616 ath10k_dbg(ar, ATH10K_DBG_WMI,
9617 "force cleanup mgmt msdu_id %u\n", msdu_id);
9618
9619 msdu = pkt_addr->vaddr;
9620 dma_unmap_single(ar->dev, pkt_addr->paddr,
9621 msdu->len, DMA_TO_DEVICE);
9622 ieee80211_free_txskb(ar->hw, msdu);
9623 kfree(pkt_addr);
9624
9625 return 0;
9626 }
9627
ath10k_wmi_detach(struct ath10k * ar)9628 void ath10k_wmi_detach(struct ath10k *ar)
9629 {
9630 if (test_bit(ATH10K_FW_FEATURE_MGMT_TX_BY_REF,
9631 ar->running_fw->fw_file.fw_features)) {
9632 spin_lock_bh(&ar->data_lock);
9633 idr_for_each(&ar->wmi.mgmt_pending_tx,
9634 ath10k_wmi_mgmt_tx_clean_up_pending, ar);
9635 idr_destroy(&ar->wmi.mgmt_pending_tx);
9636 spin_unlock_bh(&ar->data_lock);
9637 }
9638
9639 cancel_work_sync(&ar->svc_rdy_work);
9640 dev_kfree_skb(ar->svc_rdy_skb);
9641 }
9642