1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2019 Western Digital Corporation or its affiliates.
4 *
5 * Authors:
6 * Anup Patel <anup.patel@wdc.com>
7 */
8
9 #ifndef __RISCV_KVM_HOST_H__
10 #define __RISCV_KVM_HOST_H__
11
12 #include <linux/types.h>
13 #include <linux/kvm.h>
14 #include <linux/kvm_types.h>
15 #include <linux/spinlock.h>
16 #include <asm/hwcap.h>
17 #include <asm/kvm_aia.h>
18 #include <asm/ptrace.h>
19 #include <asm/kvm_tlb.h>
20 #include <asm/kvm_vmid.h>
21 #include <asm/kvm_vcpu_fp.h>
22 #include <asm/kvm_vcpu_insn.h>
23 #include <asm/kvm_vcpu_sbi.h>
24 #include <asm/kvm_vcpu_timer.h>
25 #include <asm/kvm_vcpu_pmu.h>
26
27 #define KVM_MAX_VCPUS 1024
28
29 #define KVM_HALT_POLL_NS_DEFAULT 500000
30
31 #define KVM_VCPU_MAX_FEATURES 0
32
33 #define KVM_IRQCHIP_NUM_PINS 1024
34
35 #define KVM_REQ_SLEEP \
36 KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
37 #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(1)
38 #define KVM_REQ_UPDATE_HGATP KVM_ARCH_REQ(2)
39 #define KVM_REQ_FENCE_I \
40 KVM_ARCH_REQ_FLAGS(3, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
41 #define KVM_REQ_HFENCE_VVMA_ALL \
42 KVM_ARCH_REQ_FLAGS(4, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
43 #define KVM_REQ_HFENCE \
44 KVM_ARCH_REQ_FLAGS(5, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
45 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(6)
46
47 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLBS_RANGE
48
49 #define KVM_HEDELEG_DEFAULT (BIT(EXC_INST_MISALIGNED) | \
50 BIT(EXC_INST_ILLEGAL) | \
51 BIT(EXC_BREAKPOINT) | \
52 BIT(EXC_SYSCALL) | \
53 BIT(EXC_INST_PAGE_FAULT) | \
54 BIT(EXC_LOAD_PAGE_FAULT) | \
55 BIT(EXC_STORE_PAGE_FAULT))
56
57 #define KVM_HIDELEG_DEFAULT (BIT(IRQ_VS_SOFT) | \
58 BIT(IRQ_VS_TIMER) | \
59 BIT(IRQ_VS_EXT))
60
61 struct kvm_vm_stat {
62 struct kvm_vm_stat_generic generic;
63 };
64
65 struct kvm_vcpu_stat {
66 struct kvm_vcpu_stat_generic generic;
67 u64 ecall_exit_stat;
68 u64 wfi_exit_stat;
69 u64 wrs_exit_stat;
70 u64 mmio_exit_user;
71 u64 mmio_exit_kernel;
72 u64 csr_exit_user;
73 u64 csr_exit_kernel;
74 u64 signal_exits;
75 u64 exits;
76 u64 instr_illegal_exits;
77 u64 load_misaligned_exits;
78 u64 store_misaligned_exits;
79 u64 load_access_exits;
80 u64 store_access_exits;
81 };
82
83 struct kvm_arch_memory_slot {
84 };
85
86 struct kvm_arch {
87 /* G-stage vmid */
88 struct kvm_vmid vmid;
89
90 /* G-stage page table */
91 pgd_t *pgd;
92 phys_addr_t pgd_phys;
93
94 /* Guest Timer */
95 struct kvm_guest_timer timer;
96
97 /* AIA Guest/VM context */
98 struct kvm_aia aia;
99
100 /* KVM_CAP_RISCV_MP_STATE_RESET */
101 bool mp_state_reset;
102 };
103
104 struct kvm_cpu_trap {
105 unsigned long sepc;
106 unsigned long scause;
107 unsigned long stval;
108 unsigned long htval;
109 unsigned long htinst;
110 };
111
112 struct kvm_cpu_context {
113 unsigned long zero;
114 unsigned long ra;
115 unsigned long sp;
116 unsigned long gp;
117 unsigned long tp;
118 unsigned long t0;
119 unsigned long t1;
120 unsigned long t2;
121 unsigned long s0;
122 unsigned long s1;
123 unsigned long a0;
124 unsigned long a1;
125 unsigned long a2;
126 unsigned long a3;
127 unsigned long a4;
128 unsigned long a5;
129 unsigned long a6;
130 unsigned long a7;
131 unsigned long s2;
132 unsigned long s3;
133 unsigned long s4;
134 unsigned long s5;
135 unsigned long s6;
136 unsigned long s7;
137 unsigned long s8;
138 unsigned long s9;
139 unsigned long s10;
140 unsigned long s11;
141 unsigned long t3;
142 unsigned long t4;
143 unsigned long t5;
144 unsigned long t6;
145 unsigned long sepc;
146 unsigned long sstatus;
147 unsigned long hstatus;
148 union __riscv_fp_state fp;
149 struct __riscv_v_ext_state vector;
150 };
151
152 struct kvm_vcpu_csr {
153 unsigned long vsstatus;
154 unsigned long vsie;
155 unsigned long vstvec;
156 unsigned long vsscratch;
157 unsigned long vsepc;
158 unsigned long vscause;
159 unsigned long vstval;
160 unsigned long hvip;
161 unsigned long vsatp;
162 unsigned long scounteren;
163 unsigned long senvcfg;
164 };
165
166 struct kvm_vcpu_config {
167 u64 henvcfg;
168 u64 hstateen0;
169 unsigned long hedeleg;
170 };
171
172 struct kvm_vcpu_smstateen_csr {
173 unsigned long sstateen0;
174 };
175
176 struct kvm_vcpu_reset_state {
177 spinlock_t lock;
178 unsigned long pc;
179 unsigned long a1;
180 };
181
182 struct kvm_vcpu_arch {
183 /* VCPU ran at least once */
184 bool ran_atleast_once;
185
186 /* Last Host CPU on which Guest VCPU exited */
187 int last_exit_cpu;
188
189 /* ISA feature bits (similar to MISA) */
190 DECLARE_BITMAP(isa, RISCV_ISA_EXT_MAX);
191
192 /* Vendor, Arch, and Implementation details */
193 unsigned long mvendorid;
194 unsigned long marchid;
195 unsigned long mimpid;
196
197 /* SSCRATCH, STVEC, and SCOUNTEREN of Host */
198 unsigned long host_sscratch;
199 unsigned long host_stvec;
200 unsigned long host_scounteren;
201 unsigned long host_senvcfg;
202 unsigned long host_sstateen0;
203
204 /* CPU context of Host */
205 struct kvm_cpu_context host_context;
206
207 /* CPU context of Guest VCPU */
208 struct kvm_cpu_context guest_context;
209
210 /* CPU CSR context of Guest VCPU */
211 struct kvm_vcpu_csr guest_csr;
212
213 /* CPU Smstateen CSR context of Guest VCPU */
214 struct kvm_vcpu_smstateen_csr smstateen_csr;
215
216 /* CPU reset state of Guest VCPU */
217 struct kvm_vcpu_reset_state reset_state;
218
219 /*
220 * VCPU interrupts
221 *
222 * We have a lockless approach for tracking pending VCPU interrupts
223 * implemented using atomic bitops. The irqs_pending bitmap represent
224 * pending interrupts whereas irqs_pending_mask represent bits changed
225 * in irqs_pending. Our approach is modeled around multiple producer
226 * and single consumer problem where the consumer is the VCPU itself.
227 */
228 #define KVM_RISCV_VCPU_NR_IRQS 64
229 DECLARE_BITMAP(irqs_pending, KVM_RISCV_VCPU_NR_IRQS);
230 DECLARE_BITMAP(irqs_pending_mask, KVM_RISCV_VCPU_NR_IRQS);
231
232 /* VCPU Timer */
233 struct kvm_vcpu_timer timer;
234
235 /* HFENCE request queue */
236 spinlock_t hfence_lock;
237 unsigned long hfence_head;
238 unsigned long hfence_tail;
239 struct kvm_riscv_hfence hfence_queue[KVM_RISCV_VCPU_MAX_HFENCE];
240
241 /* MMIO instruction details */
242 struct kvm_mmio_decode mmio_decode;
243
244 /* CSR instruction details */
245 struct kvm_csr_decode csr_decode;
246
247 /* SBI context */
248 struct kvm_vcpu_sbi_context sbi_context;
249
250 /* AIA VCPU context */
251 struct kvm_vcpu_aia aia_context;
252
253 /* Cache pages needed to program page tables with spinlock held */
254 struct kvm_mmu_memory_cache mmu_page_cache;
255
256 /* VCPU power state */
257 struct kvm_mp_state mp_state;
258 spinlock_t mp_state_lock;
259
260 /* Don't run the VCPU (blocked) */
261 bool pause;
262
263 /* Performance monitoring context */
264 struct kvm_pmu pmu_context;
265
266 /* 'static' configurations which are set only once */
267 struct kvm_vcpu_config cfg;
268
269 /* SBI steal-time accounting */
270 struct {
271 gpa_t shmem;
272 u64 last_steal;
273 } sta;
274 };
275
276 /*
277 * Returns true if a Performance Monitoring Interrupt (PMI), a.k.a. perf event,
278 * arrived in guest context. For riscv, any event that arrives while a vCPU is
279 * loaded is considered to be "in guest".
280 */
kvm_arch_pmi_in_guest(struct kvm_vcpu * vcpu)281 static inline bool kvm_arch_pmi_in_guest(struct kvm_vcpu *vcpu)
282 {
283 return IS_ENABLED(CONFIG_GUEST_PERF_EVENTS) && !!vcpu;
284 }
285
kvm_arch_vcpu_blocking(struct kvm_vcpu * vcpu)286 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {}
kvm_arch_vcpu_unblocking(struct kvm_vcpu * vcpu)287 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {}
288
289 int kvm_riscv_setup_default_irq_routing(struct kvm *kvm, u32 lines);
290
291 void __kvm_riscv_unpriv_trap(void);
292
293 unsigned long kvm_riscv_vcpu_unpriv_read(struct kvm_vcpu *vcpu,
294 bool read_insn,
295 unsigned long guest_addr,
296 struct kvm_cpu_trap *trap);
297 void kvm_riscv_vcpu_trap_redirect(struct kvm_vcpu *vcpu,
298 struct kvm_cpu_trap *trap);
299 int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
300 struct kvm_cpu_trap *trap);
301
302 void __kvm_riscv_switch_to(struct kvm_vcpu_arch *vcpu_arch);
303
304 void kvm_riscv_vcpu_setup_isa(struct kvm_vcpu *vcpu);
305 unsigned long kvm_riscv_vcpu_num_regs(struct kvm_vcpu *vcpu);
306 int kvm_riscv_vcpu_copy_reg_indices(struct kvm_vcpu *vcpu,
307 u64 __user *uindices);
308 int kvm_riscv_vcpu_get_reg(struct kvm_vcpu *vcpu,
309 const struct kvm_one_reg *reg);
310 int kvm_riscv_vcpu_set_reg(struct kvm_vcpu *vcpu,
311 const struct kvm_one_reg *reg);
312
313 int kvm_riscv_vcpu_set_interrupt(struct kvm_vcpu *vcpu, unsigned int irq);
314 int kvm_riscv_vcpu_unset_interrupt(struct kvm_vcpu *vcpu, unsigned int irq);
315 void kvm_riscv_vcpu_flush_interrupts(struct kvm_vcpu *vcpu);
316 void kvm_riscv_vcpu_sync_interrupts(struct kvm_vcpu *vcpu);
317 bool kvm_riscv_vcpu_has_interrupts(struct kvm_vcpu *vcpu, u64 mask);
318 void __kvm_riscv_vcpu_power_off(struct kvm_vcpu *vcpu);
319 void kvm_riscv_vcpu_power_off(struct kvm_vcpu *vcpu);
320 void __kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu);
321 void kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu);
322 bool kvm_riscv_vcpu_stopped(struct kvm_vcpu *vcpu);
323
324 void kvm_riscv_vcpu_record_steal_time(struct kvm_vcpu *vcpu);
325
326 #endif /* __RISCV_KVM_HOST_H__ */
327