xref: /linux/drivers/crypto/ti/dthev2-common.h (revision a09c5e06498f6a62c89ca56ccdfbfead96e63732)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * K3 DTHE V2 crypto accelerator driver
4  *
5  * Copyright (C) Texas Instruments 2025 - https://www.ti.com
6  * Author: T Pratham <t-pratham@ti.com>
7  */
8 
9 #ifndef __TI_DTHEV2_H__
10 #define __TI_DTHEV2_H__
11 
12 #include <crypto/aead.h>
13 #include <crypto/aes.h>
14 #include <crypto/algapi.h>
15 #include <crypto/engine.h>
16 #include <crypto/hash.h>
17 #include <crypto/internal/aead.h>
18 #include <crypto/internal/hash.h>
19 #include <crypto/internal/skcipher.h>
20 
21 #include <linux/delay.h>
22 #include <linux/dmaengine.h>
23 #include <linux/dmapool.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/io.h>
26 #include <linux/scatterlist.h>
27 
28 #define DTHE_REG_SIZE		4
29 #define DTHE_DMA_TIMEOUT_MS	2000
30 /*
31  * Size of largest possible key (of all algorithms) to be stored in dthe_tfm_ctx
32  * This is currently the keysize of XTS-AES-256 which is 512 bits (64 bytes)
33  */
34 #define DTHE_MAX_KEYSIZE	(AES_MAX_KEY_SIZE * 2)
35 
36 enum dthe_aes_mode {
37 	DTHE_AES_ECB = 0,
38 	DTHE_AES_CBC,
39 	DTHE_AES_CTR,
40 	DTHE_AES_XTS,
41 	DTHE_AES_GCM,
42 	DTHE_AES_CCM,
43 };
44 
45 /* Driver specific struct definitions */
46 
47 /**
48  * struct dthe_data - DTHE_V2 driver instance data
49  * @dev: Device pointer
50  * @regs: Base address of the register space
51  * @list: list node for dev
52  * @engine: Crypto engine instance
53  * @dma_aes_rx: AES Rx DMA Channel
54  * @dma_aes_tx: AES Tx DMA Channel
55  * @dma_sha_tx: SHA Tx DMA Channel
56  */
57 struct dthe_data {
58 	struct device *dev;
59 	void __iomem *regs;
60 	struct list_head list;
61 	struct crypto_engine *engine;
62 
63 	struct dma_chan *dma_aes_rx;
64 	struct dma_chan *dma_aes_tx;
65 
66 	struct dma_chan *dma_sha_tx;
67 };
68 
69 /**
70  * struct dthe_list - device data list head
71  * @dev_list: linked list head
72  * @lock: Spinlock protecting accesses to the list
73  */
74 struct dthe_list {
75 	struct list_head dev_list;
76 	spinlock_t lock;
77 };
78 
79 /**
80  * struct dthe_tfm_ctx - Transform ctx struct containing ctx for all sub-components of DTHE V2
81  * @dev_data: Device data struct pointer
82  * @keylen: AES key length
83  * @authsize: Authentication size for modes with authentication
84  * @key: AES key
85  * @aes_mode: AES mode
86  * @aead_fb: Fallback crypto aead handle
87  * @skcipher_fb: Fallback crypto skcipher handle for AES-XTS mode
88  */
89 struct dthe_tfm_ctx {
90 	struct dthe_data *dev_data;
91 	unsigned int keylen;
92 	unsigned int authsize;
93 	u32 key[DTHE_MAX_KEYSIZE / sizeof(u32)];
94 	enum dthe_aes_mode aes_mode;
95 	union {
96 		struct crypto_sync_aead *aead_fb;
97 		struct crypto_sync_skcipher *skcipher_fb;
98 	};
99 };
100 
101 /**
102  * struct dthe_aes_req_ctx - AES engine req ctx struct
103  * @enc: flag indicating encryption or decryption operation
104  * @padding: padding buffer for handling unaligned data
105  * @aes_compl: Completion variable for use in manual completion in case of DMA callback failure
106  */
107 struct dthe_aes_req_ctx {
108 	int enc;
109 	u8 padding[2 * AES_BLOCK_SIZE];
110 	struct completion aes_compl;
111 };
112 
113 /* Struct definitions end */
114 
115 struct dthe_data *dthe_get_dev(struct dthe_tfm_ctx *ctx);
116 
117 /**
118  * dthe_copy_sg - Copy sg entries from src to dst
119  * @dst: Destination sg to be filled
120  * @src: Source sg to be copied from
121  * @buflen: Number of bytes to be copied
122  *
123  * Description:
124  *   Copy buflen bytes of data from src to dst.
125  *
126  **/
127 struct scatterlist *dthe_copy_sg(struct scatterlist *dst,
128 				 struct scatterlist *src,
129 				 int buflen);
130 
131 int dthe_register_aes_algs(void);
132 void dthe_unregister_aes_algs(void);
133 
134 #endif
135