1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright (C) 2016 Maxime Ripard
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
5 */
6
7 #include <linux/clk.h>
8 #include <linux/clk-provider.h>
9 #include <linux/delay.h>
10 #include <linux/io.h>
11
12 #include "ccu_gate.h"
13 #include "ccu_mux.h"
14
15 #define CCU_MUX_KEY_VALUE 0x16aa0000
16
ccu_mux_get_prediv(struct ccu_common * common,struct ccu_mux_internal * cm,int parent_index)17 static u16 ccu_mux_get_prediv(struct ccu_common *common,
18 struct ccu_mux_internal *cm,
19 int parent_index)
20 {
21 u16 prediv = 1;
22 u32 reg;
23
24 if (!((common->features & CCU_FEATURE_FIXED_PREDIV) ||
25 (common->features & CCU_FEATURE_VARIABLE_PREDIV) ||
26 (common->features & CCU_FEATURE_ALL_PREDIV)))
27 return 1;
28
29 if (common->features & CCU_FEATURE_ALL_PREDIV)
30 return common->prediv;
31
32 reg = readl(common->base + common->reg);
33 if (parent_index < 0) {
34 parent_index = reg >> cm->shift;
35 parent_index &= (1 << cm->width) - 1;
36 }
37
38 if (common->features & CCU_FEATURE_FIXED_PREDIV) {
39 int i;
40
41 for (i = 0; i < cm->n_predivs; i++)
42 if (parent_index == cm->fixed_predivs[i].index)
43 prediv = cm->fixed_predivs[i].div;
44 }
45
46 if (common->features & CCU_FEATURE_VARIABLE_PREDIV) {
47 int i;
48
49 for (i = 0; i < cm->n_var_predivs; i++)
50 if (parent_index == cm->var_predivs[i].index) {
51 u8 div;
52
53 div = reg >> cm->var_predivs[i].shift;
54 div &= (1 << cm->var_predivs[i].width) - 1;
55 prediv = div + 1;
56 }
57 }
58
59 return prediv;
60 }
61
ccu_mux_helper_apply_prediv(struct ccu_common * common,struct ccu_mux_internal * cm,int parent_index,unsigned long parent_rate)62 unsigned long ccu_mux_helper_apply_prediv(struct ccu_common *common,
63 struct ccu_mux_internal *cm,
64 int parent_index,
65 unsigned long parent_rate)
66 {
67 return parent_rate / ccu_mux_get_prediv(common, cm, parent_index);
68 }
69
ccu_mux_helper_unapply_prediv(struct ccu_common * common,struct ccu_mux_internal * cm,int parent_index,unsigned long parent_rate)70 static unsigned long ccu_mux_helper_unapply_prediv(struct ccu_common *common,
71 struct ccu_mux_internal *cm,
72 int parent_index,
73 unsigned long parent_rate)
74 {
75 return parent_rate * ccu_mux_get_prediv(common, cm, parent_index);
76 }
77
ccu_mux_helper_determine_rate(struct ccu_common * common,struct ccu_mux_internal * cm,struct clk_rate_request * req,int (* round)(struct ccu_mux_internal *,struct clk_rate_request *,void *),void * data)78 int ccu_mux_helper_determine_rate(struct ccu_common *common,
79 struct ccu_mux_internal *cm,
80 struct clk_rate_request *req,
81 int (*round)(struct ccu_mux_internal *,
82 struct clk_rate_request *,
83 void *),
84 void *data)
85 {
86 unsigned long best_parent_rate = 0, best_rate = 0;
87 struct clk_hw *best_parent, *hw = &common->hw;
88 unsigned int i;
89 int ret;
90
91 if (clk_hw_get_flags(hw) & CLK_SET_RATE_NO_REPARENT) {
92 struct clk_rate_request adj_req = *req;
93
94 best_parent = clk_hw_get_parent(hw);
95 adj_req.best_parent_rate = clk_hw_get_rate(best_parent);
96 adj_req.best_parent_hw = best_parent;
97
98 /*
99 * This effectively treats the predivider as a postdivider.
100 * It stays mathematically correct and ensures whatever
101 * round() will do stays correct while walking the tree.
102 * It may query the parent rate too while handling rate
103 * propagation.
104 */
105 adj_req.rate = ccu_mux_helper_unapply_prediv(common, cm, -1,
106 req->rate);
107
108 ret = round(cm, &adj_req, data);
109 if (ret)
110 return ret;
111
112 /*
113 * parent_rate might have been modified by our clock as part
114 * of the rate propagation mechanism. Same goes below.
115 */
116 best_parent_rate = adj_req.best_parent_rate;
117 best_rate = ccu_mux_helper_apply_prediv(common, cm, -1,
118 adj_req.rate);
119
120 goto out;
121 }
122
123 for (i = 0; i < clk_hw_get_num_parents(hw); i++) {
124 struct clk_rate_request tmp_req = *req;
125 unsigned long rate;
126 struct clk_hw *parent;
127
128 parent = clk_hw_get_parent_by_index(hw, i);
129 if (!parent)
130 continue;
131
132 tmp_req.best_parent_hw = parent;
133 tmp_req.best_parent_rate = clk_hw_get_rate(parent);
134 tmp_req.rate = ccu_mux_helper_unapply_prediv(common, cm, i,
135 req->rate);
136
137 ret = round(cm, &tmp_req, data);
138 if (ret)
139 continue;
140
141 rate = ccu_mux_helper_apply_prediv(common, cm, i,
142 tmp_req.rate);
143
144 if (rate == req->rate) {
145 best_parent = parent;
146 best_parent_rate = tmp_req.best_parent_rate;
147 best_rate = rate;
148 goto out;
149 }
150
151 if (ccu_is_better_rate(common, req->rate, rate, best_rate)) {
152 best_rate = rate;
153 best_parent_rate = tmp_req.best_parent_rate;
154 best_parent = parent;
155 }
156 }
157
158 if (best_rate == 0)
159 return -EINVAL;
160
161 out:
162 req->best_parent_hw = best_parent;
163 req->best_parent_rate = best_parent_rate;
164 req->rate = best_rate;
165 return 0;
166 }
167 EXPORT_SYMBOL_NS_GPL(ccu_mux_helper_determine_rate, "SUNXI_CCU");
168
ccu_mux_helper_get_parent(struct ccu_common * common,struct ccu_mux_internal * cm)169 u8 ccu_mux_helper_get_parent(struct ccu_common *common,
170 struct ccu_mux_internal *cm)
171 {
172 u32 reg;
173 u8 parent;
174
175 reg = readl(common->base + common->reg);
176 parent = reg >> cm->shift;
177 parent &= (1 << cm->width) - 1;
178
179 if (cm->table) {
180 int num_parents = clk_hw_get_num_parents(&common->hw);
181 int i;
182
183 for (i = 0; i < num_parents; i++)
184 if (cm->table[i] == parent)
185 return i;
186 }
187
188 return parent;
189 }
190 EXPORT_SYMBOL_NS_GPL(ccu_mux_helper_get_parent, "SUNXI_CCU");
191
ccu_mux_helper_set_parent(struct ccu_common * common,struct ccu_mux_internal * cm,u8 index)192 int ccu_mux_helper_set_parent(struct ccu_common *common,
193 struct ccu_mux_internal *cm,
194 u8 index)
195 {
196 unsigned long flags;
197 u32 reg;
198
199 if (cm->table)
200 index = cm->table[index];
201
202 spin_lock_irqsave(common->lock, flags);
203
204 reg = readl(common->base + common->reg);
205
206 /* The key field always reads as zero. */
207 if (common->features & CCU_FEATURE_KEY_FIELD)
208 reg |= CCU_MUX_KEY_VALUE;
209 if (common->features & CCU_FEATURE_UPDATE_BIT)
210 reg |= CCU_SUNXI_UPDATE_BIT;
211
212 reg &= ~GENMASK(cm->width + cm->shift - 1, cm->shift);
213 writel(reg | (index << cm->shift), common->base + common->reg);
214
215 spin_unlock_irqrestore(common->lock, flags);
216
217 return 0;
218 }
219 EXPORT_SYMBOL_NS_GPL(ccu_mux_helper_set_parent, "SUNXI_CCU");
220
ccu_mux_disable(struct clk_hw * hw)221 static void ccu_mux_disable(struct clk_hw *hw)
222 {
223 struct ccu_mux *cm = hw_to_ccu_mux(hw);
224
225 return ccu_gate_helper_disable(&cm->common, cm->enable);
226 }
227
ccu_mux_enable(struct clk_hw * hw)228 static int ccu_mux_enable(struct clk_hw *hw)
229 {
230 struct ccu_mux *cm = hw_to_ccu_mux(hw);
231
232 return ccu_gate_helper_enable(&cm->common, cm->enable);
233 }
234
ccu_mux_is_enabled(struct clk_hw * hw)235 static int ccu_mux_is_enabled(struct clk_hw *hw)
236 {
237 struct ccu_mux *cm = hw_to_ccu_mux(hw);
238
239 return ccu_gate_helper_is_enabled(&cm->common, cm->enable);
240 }
241
ccu_mux_get_parent(struct clk_hw * hw)242 static u8 ccu_mux_get_parent(struct clk_hw *hw)
243 {
244 struct ccu_mux *cm = hw_to_ccu_mux(hw);
245
246 return ccu_mux_helper_get_parent(&cm->common, &cm->mux);
247 }
248
ccu_mux_set_parent(struct clk_hw * hw,u8 index)249 static int ccu_mux_set_parent(struct clk_hw *hw, u8 index)
250 {
251 struct ccu_mux *cm = hw_to_ccu_mux(hw);
252
253 return ccu_mux_helper_set_parent(&cm->common, &cm->mux, index);
254 }
255
ccu_mux_determine_rate(struct clk_hw * hw,struct clk_rate_request * req)256 static int ccu_mux_determine_rate(struct clk_hw *hw,
257 struct clk_rate_request *req)
258 {
259 struct ccu_mux *cm = hw_to_ccu_mux(hw);
260
261 if (cm->common.features & CCU_FEATURE_CLOSEST_RATE)
262 return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
263
264 return clk_mux_determine_rate_flags(hw, req, 0);
265 }
266
ccu_mux_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)267 static unsigned long ccu_mux_recalc_rate(struct clk_hw *hw,
268 unsigned long parent_rate)
269 {
270 struct ccu_mux *cm = hw_to_ccu_mux(hw);
271
272 return ccu_mux_helper_apply_prediv(&cm->common, &cm->mux, -1,
273 parent_rate);
274 }
275
276 const struct clk_ops ccu_mux_ops = {
277 .disable = ccu_mux_disable,
278 .enable = ccu_mux_enable,
279 .is_enabled = ccu_mux_is_enabled,
280
281 .get_parent = ccu_mux_get_parent,
282 .set_parent = ccu_mux_set_parent,
283
284 .determine_rate = ccu_mux_determine_rate,
285 .recalc_rate = ccu_mux_recalc_rate,
286 };
287 EXPORT_SYMBOL_NS_GPL(ccu_mux_ops, "SUNXI_CCU");
288
289 /*
290 * This clock notifier is called when the frequency of the of the parent
291 * PLL clock is to be changed. The idea is to switch the parent to a
292 * stable clock, such as the main oscillator, while the PLL frequency
293 * stabilizes.
294 */
ccu_mux_notifier_cb(struct notifier_block * nb,unsigned long event,void * data)295 static int ccu_mux_notifier_cb(struct notifier_block *nb,
296 unsigned long event, void *data)
297 {
298 struct ccu_mux_nb *mux = to_ccu_mux_nb(nb);
299 int ret = 0;
300
301 if (event == PRE_RATE_CHANGE) {
302 mux->original_index = ccu_mux_helper_get_parent(mux->common,
303 mux->cm);
304 ret = ccu_mux_helper_set_parent(mux->common, mux->cm,
305 mux->bypass_index);
306 } else if (event == POST_RATE_CHANGE) {
307 ret = ccu_mux_helper_set_parent(mux->common, mux->cm,
308 mux->original_index);
309 }
310
311 udelay(mux->delay_us);
312
313 return notifier_from_errno(ret);
314 }
315
ccu_mux_notifier_register(struct clk * clk,struct ccu_mux_nb * mux_nb)316 int ccu_mux_notifier_register(struct clk *clk, struct ccu_mux_nb *mux_nb)
317 {
318 mux_nb->clk_nb.notifier_call = ccu_mux_notifier_cb;
319
320 return clk_notifier_register(clk, &mux_nb->clk_nb);
321 }
322 EXPORT_SYMBOL_NS_GPL(ccu_mux_notifier_register, "SUNXI_CCU");
323