1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * AD5933 AD5934 Impedance Converter, Network Analyzer
4 *
5 * Copyright 2011 Analog Devices Inc.
6 */
7
8 #include <linux/clk.h>
9 #include <linux/delay.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/i2c.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/regulator/consumer.h>
17 #include <linux/sysfs.h>
18 #include <linux/types.h>
19
20 #include <linux/iio/buffer.h>
21 #include <linux/iio/iio.h>
22 #include <linux/iio/kfifo_buf.h>
23 #include <linux/iio/sysfs.h>
24
25 /* AD5933/AD5934 Registers */
26 #define AD5933_REG_CONTROL_HB 0x80 /* R/W, 1 byte */
27 #define AD5933_REG_CONTROL_LB 0x81 /* R/W, 1 byte */
28 #define AD5933_REG_FREQ_START 0x82 /* R/W, 3 bytes */
29 #define AD5933_REG_FREQ_INC 0x85 /* R/W, 3 bytes */
30 #define AD5933_REG_INC_NUM 0x88 /* R/W, 2 bytes, 9 bit */
31 #define AD5933_REG_SETTLING_CYCLES 0x8A /* R/W, 2 bytes */
32 #define AD5933_REG_STATUS 0x8F /* R, 1 byte */
33 #define AD5933_REG_TEMP_DATA 0x92 /* R, 2 bytes*/
34 #define AD5933_REG_REAL_DATA 0x94 /* R, 2 bytes*/
35 #define AD5933_REG_IMAG_DATA 0x96 /* R, 2 bytes*/
36
37 /* AD5933_REG_CONTROL_HB Bits */
38 #define AD5933_CTRL_INIT_START_FREQ (0x1 << 4)
39 #define AD5933_CTRL_START_SWEEP (0x2 << 4)
40 #define AD5933_CTRL_INC_FREQ (0x3 << 4)
41 #define AD5933_CTRL_REPEAT_FREQ (0x4 << 4)
42 #define AD5933_CTRL_MEASURE_TEMP (0x9 << 4)
43 #define AD5933_CTRL_POWER_DOWN (0xA << 4)
44 #define AD5933_CTRL_STANDBY (0xB << 4)
45
46 #define AD5933_CTRL_RANGE_2000mVpp (0x0 << 1)
47 #define AD5933_CTRL_RANGE_200mVpp (0x1 << 1)
48 #define AD5933_CTRL_RANGE_400mVpp (0x2 << 1)
49 #define AD5933_CTRL_RANGE_1000mVpp (0x3 << 1)
50 #define AD5933_CTRL_RANGE(x) ((x) << 1)
51
52 #define AD5933_CTRL_PGA_GAIN_1 (0x1 << 0)
53 #define AD5933_CTRL_PGA_GAIN_5 (0x0 << 0)
54
55 /* AD5933_REG_CONTROL_LB Bits */
56 #define AD5933_CTRL_RESET (0x1 << 4)
57 #define AD5933_CTRL_INT_SYSCLK (0x0 << 3)
58 #define AD5933_CTRL_EXT_SYSCLK (0x1 << 3)
59
60 /* AD5933_REG_STATUS Bits */
61 #define AD5933_STAT_TEMP_VALID (0x1 << 0)
62 #define AD5933_STAT_DATA_VALID (0x1 << 1)
63 #define AD5933_STAT_SWEEP_DONE (0x1 << 2)
64
65 /* I2C Block Commands */
66 #define AD5933_I2C_BLOCK_WRITE 0xA0
67 #define AD5933_I2C_BLOCK_READ 0xA1
68 #define AD5933_I2C_ADDR_POINTER 0xB0
69
70 /* Device Specs */
71 #define AD5933_INT_OSC_FREQ_Hz 16776000
72 #define AD5933_MAX_OUTPUT_FREQ_Hz 100000
73 #define AD5933_MAX_RETRIES 100
74
75 #define AD5933_OUT_RANGE 1
76 #define AD5933_OUT_RANGE_AVAIL 2
77 #define AD5933_OUT_SETTLING_CYCLES 3
78 #define AD5933_IN_PGA_GAIN 4
79 #define AD5933_IN_PGA_GAIN_AVAIL 5
80 #define AD5933_FREQ_POINTS 6
81
82 #define AD5933_POLL_TIME_ms 10
83 #define AD5933_INIT_EXCITATION_TIME_ms 100
84
85 struct ad5933_state {
86 struct i2c_client *client;
87 struct clk *mclk;
88 struct delayed_work work;
89 struct mutex lock; /* Protect sensor state */
90 unsigned long mclk_hz;
91 unsigned char ctrl_hb;
92 unsigned char ctrl_lb;
93 unsigned int range_avail[4];
94 unsigned short vref_mv;
95 unsigned short settling_cycles;
96 unsigned short freq_points;
97 unsigned int freq_start;
98 unsigned int freq_inc;
99 unsigned int state;
100 unsigned int poll_time_jiffies;
101 };
102
103 #define AD5933_CHANNEL(_type, _extend_name, _info_mask_separate, _address, \
104 _scan_index, _realbits) { \
105 .type = (_type), \
106 .extend_name = (_extend_name), \
107 .info_mask_separate = (_info_mask_separate), \
108 .address = (_address), \
109 .scan_index = (_scan_index), \
110 .scan_type = { \
111 .sign = 's', \
112 .realbits = (_realbits), \
113 .storagebits = 16, \
114 }, \
115 }
116
117 static const struct iio_chan_spec ad5933_channels[] = {
118 AD5933_CHANNEL(IIO_TEMP, NULL, BIT(IIO_CHAN_INFO_RAW) |
119 BIT(IIO_CHAN_INFO_SCALE), AD5933_REG_TEMP_DATA, -1, 14),
120 /* Ring Channels */
121 AD5933_CHANNEL(IIO_VOLTAGE, "real", 0, AD5933_REG_REAL_DATA, 0, 16),
122 AD5933_CHANNEL(IIO_VOLTAGE, "imag", 0, AD5933_REG_IMAG_DATA, 1, 16),
123 };
124
ad5933_i2c_write(struct i2c_client * client,u8 reg,u8 len,u8 * data)125 static int ad5933_i2c_write(struct i2c_client *client, u8 reg, u8 len, u8 *data)
126 {
127 int ret;
128
129 while (len--) {
130 ret = i2c_smbus_write_byte_data(client, reg++, *data++);
131 if (ret < 0) {
132 dev_err(&client->dev, "I2C write error\n");
133 return ret;
134 }
135 }
136 return 0;
137 }
138
ad5933_i2c_read(struct i2c_client * client,u8 reg,u8 len,u8 * data)139 static int ad5933_i2c_read(struct i2c_client *client, u8 reg, u8 len, u8 *data)
140 {
141 int ret;
142
143 while (len--) {
144 ret = i2c_smbus_read_byte_data(client, reg++);
145 if (ret < 0) {
146 dev_err(&client->dev, "I2C read error\n");
147 return ret;
148 }
149 *data++ = ret;
150 }
151 return 0;
152 }
153
ad5933_cmd(struct ad5933_state * st,unsigned char cmd)154 static int ad5933_cmd(struct ad5933_state *st, unsigned char cmd)
155 {
156 unsigned char dat = st->ctrl_hb | cmd;
157
158 return ad5933_i2c_write(st->client,
159 AD5933_REG_CONTROL_HB, 1, &dat);
160 }
161
ad5933_reset(struct ad5933_state * st)162 static int ad5933_reset(struct ad5933_state *st)
163 {
164 unsigned char dat = st->ctrl_lb | AD5933_CTRL_RESET;
165
166 return ad5933_i2c_write(st->client,
167 AD5933_REG_CONTROL_LB, 1, &dat);
168 }
169
ad5933_wait_busy(struct ad5933_state * st,unsigned char event)170 static int ad5933_wait_busy(struct ad5933_state *st, unsigned char event)
171 {
172 unsigned char val, timeout = AD5933_MAX_RETRIES;
173 int ret;
174
175 while (timeout--) {
176 ret = ad5933_i2c_read(st->client, AD5933_REG_STATUS, 1, &val);
177 if (ret < 0)
178 return ret;
179 if (val & event)
180 return val;
181 cpu_relax();
182 mdelay(1);
183 }
184
185 return -EAGAIN;
186 }
187
ad5933_set_freq(struct ad5933_state * st,unsigned int reg,unsigned long freq)188 static int ad5933_set_freq(struct ad5933_state *st,
189 unsigned int reg, unsigned long freq)
190 {
191 unsigned long long freqreg;
192 union {
193 __be32 d32;
194 u8 d8[4];
195 } dat;
196
197 freqreg = (u64)freq * (u64)(1 << 27);
198 do_div(freqreg, st->mclk_hz / 4);
199
200 switch (reg) {
201 case AD5933_REG_FREQ_START:
202 st->freq_start = freq;
203 break;
204 case AD5933_REG_FREQ_INC:
205 st->freq_inc = freq;
206 break;
207 default:
208 return -EINVAL;
209 }
210
211 dat.d32 = cpu_to_be32(freqreg);
212 return ad5933_i2c_write(st->client, reg, 3, &dat.d8[1]);
213 }
214
ad5933_setup(struct ad5933_state * st)215 static int ad5933_setup(struct ad5933_state *st)
216 {
217 __be16 dat;
218 int ret;
219
220 ret = ad5933_reset(st);
221 if (ret < 0)
222 return ret;
223
224 ret = ad5933_set_freq(st, AD5933_REG_FREQ_START, 10000);
225 if (ret < 0)
226 return ret;
227
228 ret = ad5933_set_freq(st, AD5933_REG_FREQ_INC, 200);
229 if (ret < 0)
230 return ret;
231
232 st->settling_cycles = 10;
233 dat = cpu_to_be16(st->settling_cycles);
234
235 ret = ad5933_i2c_write(st->client,
236 AD5933_REG_SETTLING_CYCLES,
237 2, (u8 *)&dat);
238 if (ret < 0)
239 return ret;
240
241 st->freq_points = 100;
242 dat = cpu_to_be16(st->freq_points);
243
244 return ad5933_i2c_write(st->client, AD5933_REG_INC_NUM, 2, (u8 *)&dat);
245 }
246
ad5933_calc_out_ranges(struct ad5933_state * st)247 static void ad5933_calc_out_ranges(struct ad5933_state *st)
248 {
249 int i;
250 unsigned int normalized_3v3[4] = {1980, 198, 383, 970};
251
252 for (i = 0; i < 4; i++)
253 st->range_avail[i] = normalized_3v3[i] * st->vref_mv / 3300;
254 }
255
256 /*
257 * handles: AD5933_REG_FREQ_START and AD5933_REG_FREQ_INC
258 */
259
ad5933_show_frequency(struct device * dev,struct device_attribute * attr,char * buf)260 static ssize_t ad5933_show_frequency(struct device *dev,
261 struct device_attribute *attr,
262 char *buf)
263 {
264 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
265 struct ad5933_state *st = iio_priv(indio_dev);
266 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
267 int ret;
268 unsigned long long freqreg;
269 union {
270 __be32 d32;
271 u8 d8[4];
272 } dat;
273
274 if (!iio_device_claim_direct(indio_dev))
275 return -EBUSY;
276
277 ret = ad5933_i2c_read(st->client, this_attr->address, 3, &dat.d8[1]);
278
279 iio_device_release_direct(indio_dev);
280 if (ret < 0)
281 return ret;
282
283 freqreg = be32_to_cpu(dat.d32) & 0xFFFFFF;
284
285 freqreg = (u64)freqreg * (u64)(st->mclk_hz / 4);
286 do_div(freqreg, BIT(27));
287
288 return sprintf(buf, "%d\n", (int)freqreg);
289 }
290
ad5933_store_frequency(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)291 static ssize_t ad5933_store_frequency(struct device *dev,
292 struct device_attribute *attr,
293 const char *buf,
294 size_t len)
295 {
296 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
297 struct ad5933_state *st = iio_priv(indio_dev);
298 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
299 unsigned long val;
300 int ret;
301
302 ret = kstrtoul(buf, 10, &val);
303 if (ret)
304 return ret;
305
306 if (val > AD5933_MAX_OUTPUT_FREQ_Hz)
307 return -EINVAL;
308
309 if (!iio_device_claim_direct(indio_dev))
310 return -EBUSY;
311
312 ret = ad5933_set_freq(st, this_attr->address, val);
313
314 iio_device_release_direct(indio_dev);
315
316 return ret ? ret : len;
317 }
318
319 static IIO_DEVICE_ATTR(out_altvoltage0_frequency_start, 0644,
320 ad5933_show_frequency,
321 ad5933_store_frequency,
322 AD5933_REG_FREQ_START);
323
324 static IIO_DEVICE_ATTR(out_altvoltage0_frequency_increment, 0644,
325 ad5933_show_frequency,
326 ad5933_store_frequency,
327 AD5933_REG_FREQ_INC);
328
ad5933_show(struct device * dev,struct device_attribute * attr,char * buf)329 static ssize_t ad5933_show(struct device *dev,
330 struct device_attribute *attr,
331 char *buf)
332 {
333 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
334 struct ad5933_state *st = iio_priv(indio_dev);
335 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
336 int ret = 0, len = 0;
337
338 mutex_lock(&st->lock);
339 switch ((u32)this_attr->address) {
340 case AD5933_OUT_RANGE:
341 len = sprintf(buf, "%u\n",
342 st->range_avail[(st->ctrl_hb >> 1) & 0x3]);
343 break;
344 case AD5933_OUT_RANGE_AVAIL:
345 len = sprintf(buf, "%u %u %u %u\n", st->range_avail[0],
346 st->range_avail[3], st->range_avail[2],
347 st->range_avail[1]);
348 break;
349 case AD5933_OUT_SETTLING_CYCLES:
350 len = sprintf(buf, "%d\n", st->settling_cycles);
351 break;
352 case AD5933_IN_PGA_GAIN:
353 len = sprintf(buf, "%s\n",
354 (st->ctrl_hb & AD5933_CTRL_PGA_GAIN_1) ?
355 "1" : "0.2");
356 break;
357 case AD5933_IN_PGA_GAIN_AVAIL:
358 len = sprintf(buf, "1 0.2\n");
359 break;
360 case AD5933_FREQ_POINTS:
361 len = sprintf(buf, "%d\n", st->freq_points);
362 break;
363 default:
364 ret = -EINVAL;
365 }
366
367 mutex_unlock(&st->lock);
368 return ret ? ret : len;
369 }
370
ad5933_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)371 static ssize_t ad5933_store(struct device *dev,
372 struct device_attribute *attr,
373 const char *buf,
374 size_t len)
375 {
376 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
377 struct ad5933_state *st = iio_priv(indio_dev);
378 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
379 u16 val;
380 int i, ret = 0;
381 __be16 dat;
382
383 if (this_attr->address != AD5933_IN_PGA_GAIN) {
384 ret = kstrtou16(buf, 10, &val);
385 if (ret)
386 return ret;
387 }
388
389 if (!iio_device_claim_direct(indio_dev))
390 return -EBUSY;
391
392 mutex_lock(&st->lock);
393 switch ((u32)this_attr->address) {
394 case AD5933_OUT_RANGE:
395 ret = -EINVAL;
396 for (i = 0; i < 4; i++)
397 if (val == st->range_avail[i]) {
398 st->ctrl_hb &= ~AD5933_CTRL_RANGE(0x3);
399 st->ctrl_hb |= AD5933_CTRL_RANGE(i);
400 ret = ad5933_cmd(st, 0);
401 break;
402 }
403 break;
404 case AD5933_IN_PGA_GAIN:
405 if (sysfs_streq(buf, "1")) {
406 st->ctrl_hb |= AD5933_CTRL_PGA_GAIN_1;
407 } else if (sysfs_streq(buf, "0.2")) {
408 st->ctrl_hb &= ~AD5933_CTRL_PGA_GAIN_1;
409 } else {
410 ret = -EINVAL;
411 break;
412 }
413 ret = ad5933_cmd(st, 0);
414 break;
415 case AD5933_OUT_SETTLING_CYCLES:
416 val = clamp(val, (u16)0, (u16)0x7FC);
417 st->settling_cycles = val;
418
419 /* 2x, 4x handling, see datasheet */
420 if (val > 1022)
421 val = (val >> 2) | (3 << 9);
422 else if (val > 511)
423 val = (val >> 1) | BIT(9);
424
425 dat = cpu_to_be16(val);
426 ret = ad5933_i2c_write(st->client,
427 AD5933_REG_SETTLING_CYCLES,
428 2, (u8 *)&dat);
429 break;
430 case AD5933_FREQ_POINTS:
431 val = clamp(val, (u16)0, (u16)511);
432 st->freq_points = val;
433
434 dat = cpu_to_be16(val);
435 ret = ad5933_i2c_write(st->client, AD5933_REG_INC_NUM, 2,
436 (u8 *)&dat);
437 break;
438 default:
439 ret = -EINVAL;
440 }
441
442 mutex_unlock(&st->lock);
443
444 iio_device_release_direct(indio_dev);
445 return ret ? ret : len;
446 }
447
448 static IIO_DEVICE_ATTR(out_altvoltage0_raw, 0644,
449 ad5933_show,
450 ad5933_store,
451 AD5933_OUT_RANGE);
452
453 static IIO_DEVICE_ATTR(out_altvoltage0_scale_available, 0444,
454 ad5933_show,
455 NULL,
456 AD5933_OUT_RANGE_AVAIL);
457
458 static IIO_DEVICE_ATTR(in_voltage0_scale, 0644,
459 ad5933_show,
460 ad5933_store,
461 AD5933_IN_PGA_GAIN);
462
463 static IIO_DEVICE_ATTR(in_voltage0_scale_available, 0444,
464 ad5933_show,
465 NULL,
466 AD5933_IN_PGA_GAIN_AVAIL);
467
468 static IIO_DEVICE_ATTR(out_altvoltage0_frequency_points, 0644,
469 ad5933_show,
470 ad5933_store,
471 AD5933_FREQ_POINTS);
472
473 static IIO_DEVICE_ATTR(out_altvoltage0_settling_cycles, 0644,
474 ad5933_show,
475 ad5933_store,
476 AD5933_OUT_SETTLING_CYCLES);
477
478 /*
479 * note:
480 * ideally we would handle the scale attributes via the iio_info
481 * (read|write)_raw methods, however this part is a untypical since we
482 * don't create dedicated sysfs channel attributes for out0 and in0.
483 */
484 static struct attribute *ad5933_attributes[] = {
485 &iio_dev_attr_out_altvoltage0_raw.dev_attr.attr,
486 &iio_dev_attr_out_altvoltage0_scale_available.dev_attr.attr,
487 &iio_dev_attr_out_altvoltage0_frequency_start.dev_attr.attr,
488 &iio_dev_attr_out_altvoltage0_frequency_increment.dev_attr.attr,
489 &iio_dev_attr_out_altvoltage0_frequency_points.dev_attr.attr,
490 &iio_dev_attr_out_altvoltage0_settling_cycles.dev_attr.attr,
491 &iio_dev_attr_in_voltage0_scale.dev_attr.attr,
492 &iio_dev_attr_in_voltage0_scale_available.dev_attr.attr,
493 NULL
494 };
495
496 static const struct attribute_group ad5933_attribute_group = {
497 .attrs = ad5933_attributes,
498 };
499
ad5933_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)500 static int ad5933_read_raw(struct iio_dev *indio_dev,
501 struct iio_chan_spec const *chan,
502 int *val,
503 int *val2,
504 long m)
505 {
506 struct ad5933_state *st = iio_priv(indio_dev);
507 __be16 dat;
508 int ret;
509
510 switch (m) {
511 case IIO_CHAN_INFO_RAW:
512 if (!iio_device_claim_direct(indio_dev))
513 return -EBUSY;
514
515 ret = ad5933_cmd(st, AD5933_CTRL_MEASURE_TEMP);
516 if (ret < 0)
517 goto out;
518 ret = ad5933_wait_busy(st, AD5933_STAT_TEMP_VALID);
519 if (ret < 0)
520 goto out;
521
522 ret = ad5933_i2c_read(st->client,
523 AD5933_REG_TEMP_DATA,
524 2, (u8 *)&dat);
525 if (ret < 0)
526 goto out;
527
528 iio_device_release_direct(indio_dev);
529 *val = sign_extend32(be16_to_cpu(dat), 13);
530
531 return IIO_VAL_INT;
532 case IIO_CHAN_INFO_SCALE:
533 *val = 1000;
534 *val2 = 5;
535 return IIO_VAL_FRACTIONAL_LOG2;
536 }
537
538 return -EINVAL;
539 out:
540 iio_device_release_direct(indio_dev);
541 return ret;
542 }
543
544 static const struct iio_info ad5933_info = {
545 .read_raw = ad5933_read_raw,
546 .attrs = &ad5933_attribute_group,
547 };
548
ad5933_ring_preenable(struct iio_dev * indio_dev)549 static int ad5933_ring_preenable(struct iio_dev *indio_dev)
550 {
551 struct ad5933_state *st = iio_priv(indio_dev);
552 int ret;
553
554 if (bitmap_empty(indio_dev->active_scan_mask,
555 iio_get_masklength(indio_dev)))
556 return -EINVAL;
557
558 ret = ad5933_reset(st);
559 if (ret < 0)
560 return ret;
561
562 ret = ad5933_cmd(st, AD5933_CTRL_STANDBY);
563 if (ret < 0)
564 return ret;
565
566 ret = ad5933_cmd(st, AD5933_CTRL_INIT_START_FREQ);
567 if (ret < 0)
568 return ret;
569
570 st->state = AD5933_CTRL_INIT_START_FREQ;
571
572 return 0;
573 }
574
ad5933_ring_postenable(struct iio_dev * indio_dev)575 static int ad5933_ring_postenable(struct iio_dev *indio_dev)
576 {
577 struct ad5933_state *st = iio_priv(indio_dev);
578
579 /*
580 * AD5933_CTRL_INIT_START_FREQ:
581 * High Q complex circuits require a long time to reach steady state.
582 * To facilitate the measurement of such impedances, this mode allows
583 * the user full control of the settling time requirement before
584 * entering start frequency sweep mode where the impedance measurement
585 * takes place. In this mode the impedance is excited with the
586 * programmed start frequency (ad5933_ring_preenable),
587 * but no measurement takes place.
588 */
589
590 schedule_delayed_work(&st->work,
591 msecs_to_jiffies(AD5933_INIT_EXCITATION_TIME_ms));
592 return 0;
593 }
594
ad5933_ring_postdisable(struct iio_dev * indio_dev)595 static int ad5933_ring_postdisable(struct iio_dev *indio_dev)
596 {
597 struct ad5933_state *st = iio_priv(indio_dev);
598
599 cancel_delayed_work_sync(&st->work);
600 return ad5933_cmd(st, AD5933_CTRL_POWER_DOWN);
601 }
602
603 static const struct iio_buffer_setup_ops ad5933_ring_setup_ops = {
604 .preenable = ad5933_ring_preenable,
605 .postenable = ad5933_ring_postenable,
606 .postdisable = ad5933_ring_postdisable,
607 };
608
ad5933_work(struct work_struct * work)609 static void ad5933_work(struct work_struct *work)
610 {
611 struct ad5933_state *st = container_of(work,
612 struct ad5933_state, work.work);
613 struct iio_dev *indio_dev = i2c_get_clientdata(st->client);
614 __be16 buf[2];
615 u16 val[2];
616 unsigned char status;
617 int ret;
618
619 if (st->state == AD5933_CTRL_INIT_START_FREQ) {
620 /* start sweep */
621 ad5933_cmd(st, AD5933_CTRL_START_SWEEP);
622 st->state = AD5933_CTRL_START_SWEEP;
623 schedule_delayed_work(&st->work, st->poll_time_jiffies);
624 return;
625 }
626
627 ret = ad5933_i2c_read(st->client, AD5933_REG_STATUS, 1, &status);
628 if (ret)
629 return;
630
631 if (status & AD5933_STAT_DATA_VALID) {
632 int scan_count = bitmap_weight(indio_dev->active_scan_mask,
633 iio_get_masklength(indio_dev));
634 ret = ad5933_i2c_read(st->client,
635 test_bit(1, indio_dev->active_scan_mask) ?
636 AD5933_REG_REAL_DATA : AD5933_REG_IMAG_DATA,
637 scan_count * 2, (u8 *)buf);
638 if (ret)
639 return;
640
641 if (scan_count == 2) {
642 val[0] = be16_to_cpu(buf[0]);
643 val[1] = be16_to_cpu(buf[1]);
644 } else {
645 val[0] = be16_to_cpu(buf[0]);
646 }
647 iio_push_to_buffers(indio_dev, val);
648 } else {
649 /* no data available - try again later */
650 schedule_delayed_work(&st->work, st->poll_time_jiffies);
651 return;
652 }
653
654 if (status & AD5933_STAT_SWEEP_DONE) {
655 /*
656 * last sample received - power down do
657 * nothing until the ring enable is toggled
658 */
659 ad5933_cmd(st, AD5933_CTRL_POWER_DOWN);
660 } else {
661 /* we just received a valid datum, move on to the next */
662 ad5933_cmd(st, AD5933_CTRL_INC_FREQ);
663 schedule_delayed_work(&st->work, st->poll_time_jiffies);
664 }
665 }
666
ad5933_probe(struct i2c_client * client)667 static int ad5933_probe(struct i2c_client *client)
668 {
669 const struct i2c_device_id *id = i2c_client_get_device_id(client);
670 int ret;
671 struct ad5933_state *st;
672 struct iio_dev *indio_dev;
673 unsigned long ext_clk_hz = 0;
674
675 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
676 if (!indio_dev)
677 return -ENOMEM;
678
679 st = iio_priv(indio_dev);
680 i2c_set_clientdata(client, indio_dev);
681 st->client = client;
682
683 mutex_init(&st->lock);
684
685 ret = devm_regulator_get_enable_read_voltage(&client->dev, "vdd");
686 if (ret < 0)
687 return dev_err_probe(&client->dev, ret, "failed to get vdd voltage\n");
688
689 st->vref_mv = ret / 1000;
690
691 st->mclk = devm_clk_get_enabled(&client->dev, "mclk");
692 if (IS_ERR(st->mclk) && PTR_ERR(st->mclk) != -ENOENT)
693 return PTR_ERR(st->mclk);
694
695 if (!IS_ERR(st->mclk))
696 ext_clk_hz = clk_get_rate(st->mclk);
697
698 if (ext_clk_hz) {
699 st->mclk_hz = ext_clk_hz;
700 st->ctrl_lb = AD5933_CTRL_EXT_SYSCLK;
701 } else {
702 st->mclk_hz = AD5933_INT_OSC_FREQ_Hz;
703 st->ctrl_lb = AD5933_CTRL_INT_SYSCLK;
704 }
705
706 ad5933_calc_out_ranges(st);
707 INIT_DELAYED_WORK(&st->work, ad5933_work);
708 st->poll_time_jiffies = msecs_to_jiffies(AD5933_POLL_TIME_ms);
709
710 indio_dev->info = &ad5933_info;
711 indio_dev->name = id->name;
712 indio_dev->modes = INDIO_DIRECT_MODE;
713 indio_dev->channels = ad5933_channels;
714 indio_dev->num_channels = ARRAY_SIZE(ad5933_channels);
715
716 ret = devm_iio_kfifo_buffer_setup(&client->dev, indio_dev,
717 &ad5933_ring_setup_ops);
718 if (ret)
719 return ret;
720
721 ret = ad5933_setup(st);
722 if (ret)
723 return ret;
724
725 return devm_iio_device_register(&client->dev, indio_dev);
726 }
727
728 static const struct i2c_device_id ad5933_id[] = {
729 { "ad5933" },
730 { "ad5934" },
731 { }
732 };
733
734 MODULE_DEVICE_TABLE(i2c, ad5933_id);
735
736 static const struct of_device_id ad5933_of_match[] = {
737 { .compatible = "adi,ad5933" },
738 { .compatible = "adi,ad5934" },
739 { }
740 };
741
742 MODULE_DEVICE_TABLE(of, ad5933_of_match);
743
744 static struct i2c_driver ad5933_driver = {
745 .driver = {
746 .name = "ad5933",
747 .of_match_table = ad5933_of_match,
748 },
749 .probe = ad5933_probe,
750 .id_table = ad5933_id,
751 };
752 module_i2c_driver(ad5933_driver);
753
754 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
755 MODULE_DESCRIPTION("Analog Devices AD5933 Impedance Conv. Network Analyzer");
756 MODULE_LICENSE("GPL v2");
757