1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2008 Christian Lamparter <chunkeey@web.de>
4 * Copyright 2008 Johannes Berg <johannes@sipsolutions.net>
5 *
6 * This driver is a port from stlc45xx:
7 * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
8 */
9
10 #include <linux/module.h>
11 #include <linux/platform_device.h>
12 #include <linux/interrupt.h>
13 #include <linux/firmware.h>
14 #include <linux/delay.h>
15 #include <linux/irq.h>
16 #include <linux/spi/spi.h>
17 #include <linux/etherdevice.h>
18 #include <linux/gpio/consumer.h>
19 #include <linux/slab.h>
20
21 #include "p54spi.h"
22 #include "p54.h"
23
24 #include "lmac.h"
25
26 #ifdef CONFIG_P54_SPI_DEFAULT_EEPROM
27 #include "p54spi_eeprom.h"
28 #endif /* CONFIG_P54_SPI_DEFAULT_EEPROM */
29
30 MODULE_FIRMWARE("3826.arm");
31 MODULE_FIRMWARE("3826.eeprom");
32
p54spi_spi_read(struct p54s_priv * priv,u8 address,void * buf,size_t len)33 static void p54spi_spi_read(struct p54s_priv *priv, u8 address,
34 void *buf, size_t len)
35 {
36 struct spi_transfer t[2];
37 struct spi_message m;
38 __le16 addr;
39
40 /* We first push the address */
41 addr = cpu_to_le16(address << 8 | SPI_ADRS_READ_BIT_15);
42
43 spi_message_init(&m);
44 memset(t, 0, sizeof(t));
45
46 t[0].tx_buf = &addr;
47 t[0].len = sizeof(addr);
48 spi_message_add_tail(&t[0], &m);
49
50 t[1].rx_buf = buf;
51 t[1].len = len;
52 spi_message_add_tail(&t[1], &m);
53
54 spi_sync(priv->spi, &m);
55 }
56
57
p54spi_spi_write(struct p54s_priv * priv,u8 address,const void * buf,size_t len)58 static void p54spi_spi_write(struct p54s_priv *priv, u8 address,
59 const void *buf, size_t len)
60 {
61 struct spi_transfer t[3];
62 struct spi_message m;
63 __le16 addr;
64
65 /* We first push the address */
66 addr = cpu_to_le16(address << 8);
67
68 spi_message_init(&m);
69 memset(t, 0, sizeof(t));
70
71 t[0].tx_buf = &addr;
72 t[0].len = sizeof(addr);
73 spi_message_add_tail(&t[0], &m);
74
75 t[1].tx_buf = buf;
76 t[1].len = len & ~1;
77 spi_message_add_tail(&t[1], &m);
78
79 if (len % 2) {
80 __le16 last_word;
81 last_word = cpu_to_le16(((u8 *)buf)[len - 1]);
82
83 t[2].tx_buf = &last_word;
84 t[2].len = sizeof(last_word);
85 spi_message_add_tail(&t[2], &m);
86 }
87
88 spi_sync(priv->spi, &m);
89 }
90
p54spi_read32(struct p54s_priv * priv,u8 addr)91 static u32 p54spi_read32(struct p54s_priv *priv, u8 addr)
92 {
93 __le32 val;
94
95 p54spi_spi_read(priv, addr, &val, sizeof(val));
96
97 return le32_to_cpu(val);
98 }
99
p54spi_write16(struct p54s_priv * priv,u8 addr,__le16 val)100 static inline void p54spi_write16(struct p54s_priv *priv, u8 addr, __le16 val)
101 {
102 p54spi_spi_write(priv, addr, &val, sizeof(val));
103 }
104
p54spi_write32(struct p54s_priv * priv,u8 addr,__le32 val)105 static inline void p54spi_write32(struct p54s_priv *priv, u8 addr, __le32 val)
106 {
107 p54spi_spi_write(priv, addr, &val, sizeof(val));
108 }
109
p54spi_wait_bit(struct p54s_priv * priv,u16 reg,u32 bits)110 static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, u32 bits)
111 {
112 int i;
113
114 for (i = 0; i < 2000; i++) {
115 u32 buffer = p54spi_read32(priv, reg);
116 if ((buffer & bits) == bits)
117 return 1;
118 }
119 return 0;
120 }
121
p54spi_spi_write_dma(struct p54s_priv * priv,__le32 base,const void * buf,size_t len)122 static int p54spi_spi_write_dma(struct p54s_priv *priv, __le32 base,
123 const void *buf, size_t len)
124 {
125 if (!p54spi_wait_bit(priv, SPI_ADRS_DMA_WRITE_CTRL, HOST_ALLOWED)) {
126 dev_err(&priv->spi->dev, "spi_write_dma not allowed "
127 "to DMA write.\n");
128 return -EAGAIN;
129 }
130
131 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_CTRL,
132 cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE));
133
134 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_LEN, cpu_to_le16(len));
135 p54spi_write32(priv, SPI_ADRS_DMA_WRITE_BASE, base);
136 p54spi_spi_write(priv, SPI_ADRS_DMA_DATA, buf, len);
137 return 0;
138 }
139
p54spi_request_firmware(struct ieee80211_hw * dev)140 static int p54spi_request_firmware(struct ieee80211_hw *dev)
141 {
142 struct p54s_priv *priv = dev->priv;
143 int ret;
144
145 /* FIXME: should driver use its own struct device? */
146 ret = request_firmware(&priv->firmware, "3826.arm", &priv->spi->dev);
147
148 if (ret < 0) {
149 dev_err(&priv->spi->dev, "request_firmware() failed: %d", ret);
150 return ret;
151 }
152
153 ret = p54_parse_firmware(dev, priv->firmware);
154 if (ret) {
155 /* the firmware is released by the caller */
156 return ret;
157 }
158
159 return 0;
160 }
161
p54spi_request_eeprom(struct ieee80211_hw * dev)162 static int p54spi_request_eeprom(struct ieee80211_hw *dev)
163 {
164 struct p54s_priv *priv = dev->priv;
165 const struct firmware *eeprom;
166 int ret;
167
168 /* allow users to customize their eeprom.
169 */
170
171 ret = request_firmware_direct(&eeprom, "3826.eeprom", &priv->spi->dev);
172 if (ret < 0) {
173 #ifdef CONFIG_P54_SPI_DEFAULT_EEPROM
174 dev_info(&priv->spi->dev, "loading default eeprom...\n");
175 ret = p54_parse_eeprom(dev, (void *) p54spi_eeprom,
176 sizeof(p54spi_eeprom));
177 #else
178 dev_err(&priv->spi->dev, "Failed to request user eeprom\n");
179 #endif /* CONFIG_P54_SPI_DEFAULT_EEPROM */
180 } else {
181 dev_info(&priv->spi->dev, "loading user eeprom...\n");
182 ret = p54_parse_eeprom(dev, (void *) eeprom->data,
183 (int)eeprom->size);
184 release_firmware(eeprom);
185 }
186 return ret;
187 }
188
p54spi_upload_firmware(struct ieee80211_hw * dev)189 static int p54spi_upload_firmware(struct ieee80211_hw *dev)
190 {
191 struct p54s_priv *priv = dev->priv;
192 unsigned long fw_len, _fw_len;
193 unsigned int offset = 0;
194 int err = 0;
195 u8 *fw;
196
197 fw_len = priv->firmware->size;
198 fw = kmemdup(priv->firmware->data, fw_len, GFP_KERNEL);
199 if (!fw)
200 return -ENOMEM;
201
202 /* stop the device */
203 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
204 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
205 SPI_CTRL_STAT_START_HALTED));
206
207 msleep(TARGET_BOOT_SLEEP);
208
209 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
210 SPI_CTRL_STAT_HOST_OVERRIDE |
211 SPI_CTRL_STAT_START_HALTED));
212
213 msleep(TARGET_BOOT_SLEEP);
214
215 while (fw_len > 0) {
216 _fw_len = min_t(long, fw_len, SPI_MAX_PACKET_SIZE);
217
218 err = p54spi_spi_write_dma(priv, cpu_to_le32(
219 ISL38XX_DEV_FIRMWARE_ADDR + offset),
220 (fw + offset), _fw_len);
221 if (err < 0)
222 goto out;
223
224 fw_len -= _fw_len;
225 offset += _fw_len;
226 }
227
228 BUG_ON(fw_len != 0);
229
230 /* enable host interrupts */
231 p54spi_write32(priv, SPI_ADRS_HOST_INT_EN,
232 cpu_to_le32(SPI_HOST_INTS_DEFAULT));
233
234 /* boot the device */
235 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
236 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
237 SPI_CTRL_STAT_RAM_BOOT));
238
239 msleep(TARGET_BOOT_SLEEP);
240
241 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
242 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT));
243 msleep(TARGET_BOOT_SLEEP);
244
245 out:
246 kfree(fw);
247 return err;
248 }
249
p54spi_power_off(struct p54s_priv * priv)250 static void p54spi_power_off(struct p54s_priv *priv)
251 {
252 disable_irq(priv->irq);
253 gpiod_set_value(priv->gpio_powerdown, 1);
254 }
255
p54spi_power_on(struct p54s_priv * priv)256 static void p54spi_power_on(struct p54s_priv *priv)
257 {
258 gpiod_set_value(priv->gpio_powerdown, 0);
259 enable_irq(priv->irq);
260
261 /* need to wait a while before device can be accessed, the length
262 * is just a guess
263 */
264 msleep(10);
265 }
266
p54spi_int_ack(struct p54s_priv * priv,u32 val)267 static inline void p54spi_int_ack(struct p54s_priv *priv, u32 val)
268 {
269 p54spi_write32(priv, SPI_ADRS_HOST_INT_ACK, cpu_to_le32(val));
270 }
271
p54spi_wakeup(struct p54s_priv * priv)272 static int p54spi_wakeup(struct p54s_priv *priv)
273 {
274 /* wake the chip */
275 p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
276 cpu_to_le32(SPI_TARGET_INT_WAKEUP));
277
278 /* And wait for the READY interrupt */
279 if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
280 SPI_HOST_INT_READY)) {
281 dev_err(&priv->spi->dev, "INT_READY timeout\n");
282 return -EBUSY;
283 }
284
285 p54spi_int_ack(priv, SPI_HOST_INT_READY);
286 return 0;
287 }
288
p54spi_sleep(struct p54s_priv * priv)289 static inline void p54spi_sleep(struct p54s_priv *priv)
290 {
291 p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
292 cpu_to_le32(SPI_TARGET_INT_SLEEP));
293 }
294
p54spi_int_ready(struct p54s_priv * priv)295 static void p54spi_int_ready(struct p54s_priv *priv)
296 {
297 p54spi_write32(priv, SPI_ADRS_HOST_INT_EN, cpu_to_le32(
298 SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE));
299
300 switch (priv->fw_state) {
301 case FW_STATE_BOOTING:
302 priv->fw_state = FW_STATE_READY;
303 complete(&priv->fw_comp);
304 break;
305 case FW_STATE_RESETTING:
306 priv->fw_state = FW_STATE_READY;
307 /* TODO: reinitialize state */
308 break;
309 default:
310 break;
311 }
312 }
313
p54spi_rx(struct p54s_priv * priv)314 static int p54spi_rx(struct p54s_priv *priv)
315 {
316 struct sk_buff *skb;
317 u16 len;
318 u16 rx_head[2];
319 #define READAHEAD_SZ (sizeof(rx_head)-sizeof(u16))
320
321 if (p54spi_wakeup(priv) < 0)
322 return -EBUSY;
323
324 /* Read data size and first data word in one SPI transaction
325 * This is workaround for firmware/DMA bug,
326 * when first data word gets lost under high load.
327 */
328 p54spi_spi_read(priv, SPI_ADRS_DMA_DATA, rx_head, sizeof(rx_head));
329 len = rx_head[0];
330
331 if (len == 0) {
332 p54spi_sleep(priv);
333 dev_err(&priv->spi->dev, "rx request of zero bytes\n");
334 return 0;
335 }
336
337 /* Firmware may insert up to 4 padding bytes after the lmac header,
338 * but it does not amend the size of SPI data transfer.
339 * Such packets has correct data size in header, thus referencing
340 * past the end of allocated skb. Reserve extra 4 bytes for this case
341 */
342 skb = dev_alloc_skb(len + 4);
343 if (!skb) {
344 p54spi_sleep(priv);
345 dev_err(&priv->spi->dev, "could not alloc skb");
346 return -ENOMEM;
347 }
348
349 if (len <= READAHEAD_SZ) {
350 skb_put_data(skb, rx_head + 1, len);
351 } else {
352 skb_put_data(skb, rx_head + 1, READAHEAD_SZ);
353 p54spi_spi_read(priv, SPI_ADRS_DMA_DATA,
354 skb_put(skb, len - READAHEAD_SZ),
355 len - READAHEAD_SZ);
356 }
357 p54spi_sleep(priv);
358 /* Put additional bytes to compensate for the possible
359 * alignment-caused truncation
360 */
361 skb_put(skb, 4);
362
363 if (p54_rx(priv->hw, skb) == 0)
364 dev_kfree_skb(skb);
365
366 return 0;
367 }
368
369
p54spi_interrupt(int irq,void * config)370 static irqreturn_t p54spi_interrupt(int irq, void *config)
371 {
372 struct spi_device *spi = config;
373 struct p54s_priv *priv = spi_get_drvdata(spi);
374
375 ieee80211_queue_work(priv->hw, &priv->work);
376
377 return IRQ_HANDLED;
378 }
379
p54spi_tx_frame(struct p54s_priv * priv,struct sk_buff * skb)380 static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb)
381 {
382 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
383 int ret = 0;
384
385 if (p54spi_wakeup(priv) < 0)
386 return -EBUSY;
387
388 ret = p54spi_spi_write_dma(priv, hdr->req_id, skb->data, skb->len);
389 if (ret < 0)
390 goto out;
391
392 if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
393 SPI_HOST_INT_WR_READY)) {
394 dev_err(&priv->spi->dev, "WR_READY timeout\n");
395 ret = -EAGAIN;
396 goto out;
397 }
398
399 p54spi_int_ack(priv, SPI_HOST_INT_WR_READY);
400
401 if (FREE_AFTER_TX(skb))
402 p54_free_skb(priv->hw, skb);
403 out:
404 p54spi_sleep(priv);
405 return ret;
406 }
407
p54spi_wq_tx(struct p54s_priv * priv)408 static int p54spi_wq_tx(struct p54s_priv *priv)
409 {
410 struct p54s_tx_info *entry;
411 struct sk_buff *skb;
412 struct ieee80211_tx_info *info;
413 struct p54_tx_info *minfo;
414 struct p54s_tx_info *dinfo;
415 unsigned long flags;
416 int ret = 0;
417
418 spin_lock_irqsave(&priv->tx_lock, flags);
419
420 while (!list_empty(&priv->tx_pending)) {
421 entry = list_entry(priv->tx_pending.next,
422 struct p54s_tx_info, tx_list);
423
424 list_del_init(&entry->tx_list);
425
426 spin_unlock_irqrestore(&priv->tx_lock, flags);
427
428 dinfo = container_of((void *) entry, struct p54s_tx_info,
429 tx_list);
430 minfo = container_of((void *) dinfo, struct p54_tx_info,
431 data);
432 info = container_of((void *) minfo, struct ieee80211_tx_info,
433 rate_driver_data);
434 skb = container_of((void *) info, struct sk_buff, cb);
435
436 ret = p54spi_tx_frame(priv, skb);
437
438 if (ret < 0) {
439 p54_free_skb(priv->hw, skb);
440 return ret;
441 }
442
443 spin_lock_irqsave(&priv->tx_lock, flags);
444 }
445 spin_unlock_irqrestore(&priv->tx_lock, flags);
446 return ret;
447 }
448
p54spi_op_tx(struct ieee80211_hw * dev,struct sk_buff * skb)449 static void p54spi_op_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
450 {
451 struct p54s_priv *priv = dev->priv;
452 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
453 struct p54_tx_info *mi = (struct p54_tx_info *) info->rate_driver_data;
454 struct p54s_tx_info *di = (struct p54s_tx_info *) mi->data;
455 unsigned long flags;
456
457 BUILD_BUG_ON(sizeof(*di) > sizeof((mi->data)));
458
459 spin_lock_irqsave(&priv->tx_lock, flags);
460 list_add_tail(&di->tx_list, &priv->tx_pending);
461 spin_unlock_irqrestore(&priv->tx_lock, flags);
462
463 ieee80211_queue_work(priv->hw, &priv->work);
464 }
465
p54spi_work(struct work_struct * work)466 static void p54spi_work(struct work_struct *work)
467 {
468 struct p54s_priv *priv = container_of(work, struct p54s_priv, work);
469 u32 ints;
470 int ret;
471
472 mutex_lock(&priv->mutex);
473
474 if (priv->fw_state == FW_STATE_OFF)
475 goto out;
476
477 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
478
479 if (ints & SPI_HOST_INT_READY) {
480 p54spi_int_ready(priv);
481 p54spi_int_ack(priv, SPI_HOST_INT_READY);
482 }
483
484 if (priv->fw_state != FW_STATE_READY)
485 goto out;
486
487 if (ints & SPI_HOST_INT_UPDATE) {
488 p54spi_int_ack(priv, SPI_HOST_INT_UPDATE);
489 ret = p54spi_rx(priv);
490 if (ret < 0)
491 goto out;
492 }
493 if (ints & SPI_HOST_INT_SW_UPDATE) {
494 p54spi_int_ack(priv, SPI_HOST_INT_SW_UPDATE);
495 ret = p54spi_rx(priv);
496 if (ret < 0)
497 goto out;
498 }
499
500 ret = p54spi_wq_tx(priv);
501 out:
502 mutex_unlock(&priv->mutex);
503 }
504
p54spi_op_start(struct ieee80211_hw * dev)505 static int p54spi_op_start(struct ieee80211_hw *dev)
506 {
507 struct p54s_priv *priv = dev->priv;
508 long time_left;
509 int ret = 0;
510
511 if (mutex_lock_interruptible(&priv->mutex)) {
512 ret = -EINTR;
513 goto out;
514 }
515
516 priv->fw_state = FW_STATE_BOOTING;
517
518 p54spi_power_on(priv);
519
520 ret = p54spi_upload_firmware(dev);
521 if (ret < 0) {
522 p54spi_power_off(priv);
523 goto out_unlock;
524 }
525
526 mutex_unlock(&priv->mutex);
527
528 time_left = msecs_to_jiffies(2000);
529 time_left = wait_for_completion_interruptible_timeout(&priv->fw_comp,
530 time_left);
531 if (!time_left) {
532 dev_err(&priv->spi->dev, "firmware boot failed");
533 p54spi_power_off(priv);
534 ret = -1;
535 goto out;
536 }
537
538 if (mutex_lock_interruptible(&priv->mutex)) {
539 ret = -EINTR;
540 p54spi_power_off(priv);
541 goto out;
542 }
543
544 WARN_ON(priv->fw_state != FW_STATE_READY);
545
546 out_unlock:
547 mutex_unlock(&priv->mutex);
548
549 out:
550 return ret;
551 }
552
p54spi_op_stop(struct ieee80211_hw * dev)553 static void p54spi_op_stop(struct ieee80211_hw *dev)
554 {
555 struct p54s_priv *priv = dev->priv;
556 unsigned long flags;
557
558 mutex_lock(&priv->mutex);
559 WARN_ON(priv->fw_state != FW_STATE_READY);
560
561 p54spi_power_off(priv);
562 spin_lock_irqsave(&priv->tx_lock, flags);
563 INIT_LIST_HEAD(&priv->tx_pending);
564 spin_unlock_irqrestore(&priv->tx_lock, flags);
565
566 priv->fw_state = FW_STATE_OFF;
567 mutex_unlock(&priv->mutex);
568
569 cancel_work_sync(&priv->work);
570 }
571
p54spi_probe(struct spi_device * spi)572 static int p54spi_probe(struct spi_device *spi)
573 {
574 struct p54s_priv *priv = NULL;
575 struct ieee80211_hw *hw;
576 int ret = -EINVAL;
577
578 hw = p54_init_common(sizeof(*priv));
579 if (!hw) {
580 dev_err(&spi->dev, "could not alloc ieee80211_hw");
581 return -ENOMEM;
582 }
583
584 priv = hw->priv;
585 priv->hw = hw;
586 spi_set_drvdata(spi, priv);
587 priv->spi = spi;
588
589 spi->bits_per_word = 16;
590 spi->max_speed_hz = 24000000;
591
592 ret = spi_setup(spi);
593 if (ret < 0) {
594 dev_err(&priv->spi->dev, "spi_setup failed");
595 goto err_free;
596 }
597
598 priv->gpio_powerdown = gpiod_get_optional(&spi->dev, "powerdown", GPIOD_OUT_HIGH);
599 if (IS_ERR(priv->gpio_powerdown)) {
600 ret = dev_err_probe(&priv->spi->dev, PTR_ERR(priv->gpio_powerdown),
601 "powerdown GPIO request failed\n");
602 goto err_free;
603 }
604
605 ret = request_irq(spi->irq, p54spi_interrupt, IRQF_NO_AUTOEN, "p54spi", priv->spi);
606 if (ret < 0) {
607 dev_err(&priv->spi->dev, "request_irq() failed");
608 goto err_free_gpio_power;
609 }
610
611 priv->irq = spi->irq;
612 INIT_WORK(&priv->work, p54spi_work);
613 init_completion(&priv->fw_comp);
614 INIT_LIST_HEAD(&priv->tx_pending);
615 mutex_init(&priv->mutex);
616 spin_lock_init(&priv->tx_lock);
617 SET_IEEE80211_DEV(hw, &spi->dev);
618 priv->common.open = p54spi_op_start;
619 priv->common.stop = p54spi_op_stop;
620 priv->common.tx = p54spi_op_tx;
621
622 ret = p54spi_request_firmware(hw);
623 if (ret < 0)
624 goto err_free_common;
625
626 ret = p54spi_request_eeprom(hw);
627 if (ret)
628 goto err_free_common;
629
630 ret = p54_register_common(hw, &priv->spi->dev);
631 if (ret)
632 goto err_free_common;
633
634 return 0;
635
636 err_free_common:
637 release_firmware(priv->firmware);
638 free_irq(priv->irq, spi);
639 err_free_gpio_power:
640 gpiod_put(priv->gpio_powerdown);
641 err_free:
642 p54_free_common(priv->hw);
643 return ret;
644 }
645
p54spi_remove(struct spi_device * spi)646 static void p54spi_remove(struct spi_device *spi)
647 {
648 struct p54s_priv *priv = spi_get_drvdata(spi);
649
650 p54_unregister_common(priv->hw);
651
652 free_irq(priv->irq, spi);
653 gpiod_put(priv->gpio_powerdown);
654 release_firmware(priv->firmware);
655
656 mutex_destroy(&priv->mutex);
657
658 p54_free_common(priv->hw);
659 }
660
661 static const struct of_device_id p54spi_of_ids[] = {
662 { .compatible = "st,stlc4560", },
663 { },
664 };
665 MODULE_DEVICE_TABLE(of, p54spi_of_ids);
666
667 static struct spi_driver p54spi_driver = {
668 .driver = {
669 .name = "p54spi",
670 .of_match_table = p54spi_of_ids,
671 },
672
673 .probe = p54spi_probe,
674 .remove = p54spi_remove,
675 };
676
677 module_spi_driver(p54spi_driver);
678
679 MODULE_DESCRIPTION("Prism54 SPI wireless driver");
680 MODULE_LICENSE("GPL");
681 MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>");
682 MODULE_ALIAS("spi:cx3110x");
683 MODULE_ALIAS("spi:p54spi");
684 MODULE_ALIAS("spi:stlc45xx");
685