1 // SPDX-License-Identifier: GPL-2.0
2
3 /*
4 * Xen mmu operations
5 *
6 * This file contains the various mmu fetch and update operations.
7 * The most important job they must perform is the mapping between the
8 * domain's pfn and the overall machine mfns.
9 *
10 * Xen allows guests to directly update the pagetable, in a controlled
11 * fashion. In other words, the guest modifies the same pagetable
12 * that the CPU actually uses, which eliminates the overhead of having
13 * a separate shadow pagetable.
14 *
15 * In order to allow this, it falls on the guest domain to map its
16 * notion of a "physical" pfn - which is just a domain-local linear
17 * address - into a real "machine address" which the CPU's MMU can
18 * use.
19 *
20 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
21 * inserted directly into the pagetable. When creating a new
22 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
23 * when reading the content back with __(pgd|pmd|pte)_val, it converts
24 * the mfn back into a pfn.
25 *
26 * The other constraint is that all pages which make up a pagetable
27 * must be mapped read-only in the guest. This prevents uncontrolled
28 * guest updates to the pagetable. Xen strictly enforces this, and
29 * will disallow any pagetable update which will end up mapping a
30 * pagetable page RW, and will disallow using any writable page as a
31 * pagetable.
32 *
33 * Naively, when loading %cr3 with the base of a new pagetable, Xen
34 * would need to validate the whole pagetable before going on.
35 * Naturally, this is quite slow. The solution is to "pin" a
36 * pagetable, which enforces all the constraints on the pagetable even
37 * when it is not actively in use. This means that Xen can be assured
38 * that it is still valid when you do load it into %cr3, and doesn't
39 * need to revalidate it.
40 *
41 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
42 */
43 #include <linux/sched/mm.h>
44 #include <linux/debugfs.h>
45 #include <linux/bug.h>
46 #include <linux/vmalloc.h>
47 #include <linux/export.h>
48 #include <linux/init.h>
49 #include <linux/gfp.h>
50 #include <linux/memblock.h>
51 #include <linux/seq_file.h>
52 #include <linux/crash_dump.h>
53 #include <linux/pgtable.h>
54 #ifdef CONFIG_KEXEC_CORE
55 #include <linux/kexec.h>
56 #endif
57
58 #include <trace/events/xen.h>
59
60 #include <asm/tlbflush.h>
61 #include <asm/fixmap.h>
62 #include <asm/mmu_context.h>
63 #include <asm/setup.h>
64 #include <asm/paravirt.h>
65 #include <asm/e820/api.h>
66 #include <asm/linkage.h>
67 #include <asm/page.h>
68 #include <asm/init.h>
69 #include <asm/memtype.h>
70 #include <asm/smp.h>
71 #include <asm/tlb.h>
72
73 #include <asm/xen/hypercall.h>
74 #include <asm/xen/hypervisor.h>
75
76 #include <xen/xen.h>
77 #include <xen/page.h>
78 #include <xen/interface/xen.h>
79 #include <xen/interface/hvm/hvm_op.h>
80 #include <xen/interface/version.h>
81 #include <xen/interface/memory.h>
82 #include <xen/hvc-console.h>
83 #include <xen/swiotlb-xen.h>
84
85 #include "xen-ops.h"
86
87 enum pt_level {
88 PT_PGD,
89 PT_P4D,
90 PT_PUD,
91 PT_PMD,
92 PT_PTE
93 };
94
95 /*
96 * Prototypes for functions called via PV_CALLEE_SAVE_REGS_THUNK() in order
97 * to avoid warnings with "-Wmissing-prototypes".
98 */
99 pteval_t xen_pte_val(pte_t pte);
100 pgdval_t xen_pgd_val(pgd_t pgd);
101 pmdval_t xen_pmd_val(pmd_t pmd);
102 pudval_t xen_pud_val(pud_t pud);
103 p4dval_t xen_p4d_val(p4d_t p4d);
104 pte_t xen_make_pte(pteval_t pte);
105 pgd_t xen_make_pgd(pgdval_t pgd);
106 pmd_t xen_make_pmd(pmdval_t pmd);
107 pud_t xen_make_pud(pudval_t pud);
108 p4d_t xen_make_p4d(p4dval_t p4d);
109 pte_t xen_make_pte_init(pteval_t pte);
110
111 #ifdef CONFIG_X86_VSYSCALL_EMULATION
112 /* l3 pud for userspace vsyscall mapping */
113 static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
114 #endif
115
116 static pud_t level3_ident_pgt[PTRS_PER_PUD] __page_aligned_bss;
117 static pmd_t level2_ident_pgt[PTRS_PER_PMD] __page_aligned_bss;
118
119 /*
120 * Protects atomic reservation decrease/increase against concurrent increases.
121 * Also protects non-atomic updates of current_pages and balloon lists.
122 */
123 static DEFINE_SPINLOCK(xen_reservation_lock);
124
125 /* Protected by xen_reservation_lock. */
126 #define MIN_CONTIG_ORDER 9 /* 2MB */
127 static unsigned int discontig_frames_order = MIN_CONTIG_ORDER;
128 static unsigned long discontig_frames_early[1UL << MIN_CONTIG_ORDER] __initdata;
129 static unsigned long *discontig_frames __refdata = discontig_frames_early;
130 static bool discontig_frames_dyn;
131
alloc_discontig_frames(unsigned int order)132 static int alloc_discontig_frames(unsigned int order)
133 {
134 unsigned long *new_array, *old_array;
135 unsigned int old_order;
136 unsigned long flags;
137
138 BUG_ON(order < MIN_CONTIG_ORDER);
139 BUILD_BUG_ON(sizeof(discontig_frames_early) != PAGE_SIZE);
140
141 new_array = (unsigned long *)__get_free_pages(GFP_KERNEL,
142 order - MIN_CONTIG_ORDER);
143 if (!new_array)
144 return -ENOMEM;
145
146 spin_lock_irqsave(&xen_reservation_lock, flags);
147
148 old_order = discontig_frames_order;
149
150 if (order > discontig_frames_order || !discontig_frames_dyn) {
151 if (!discontig_frames_dyn)
152 old_array = NULL;
153 else
154 old_array = discontig_frames;
155
156 discontig_frames = new_array;
157 discontig_frames_order = order;
158 discontig_frames_dyn = true;
159 } else {
160 old_array = new_array;
161 }
162
163 spin_unlock_irqrestore(&xen_reservation_lock, flags);
164
165 free_pages((unsigned long)old_array, old_order - MIN_CONTIG_ORDER);
166
167 return 0;
168 }
169
170 /*
171 * Note about cr3 (pagetable base) values:
172 *
173 * xen_cr3 contains the current logical cr3 value; it contains the
174 * last set cr3. This may not be the current effective cr3, because
175 * its update may be being lazily deferred. However, a vcpu looking
176 * at its own cr3 can use this value knowing that it everything will
177 * be self-consistent.
178 *
179 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
180 * hypercall to set the vcpu cr3 is complete (so it may be a little
181 * out of date, but it will never be set early). If one vcpu is
182 * looking at another vcpu's cr3 value, it should use this variable.
183 */
184 DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
185 static DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
186
187 static phys_addr_t xen_pt_base, xen_pt_size __initdata;
188
189 static DEFINE_STATIC_KEY_FALSE(xen_struct_pages_ready);
190
191 /*
192 * Just beyond the highest usermode address. STACK_TOP_MAX has a
193 * redzone above it, so round it up to a PGD boundary.
194 */
195 #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
196
make_lowmem_page_readonly(void * vaddr)197 void make_lowmem_page_readonly(void *vaddr)
198 {
199 pte_t *pte, ptev;
200 unsigned long address = (unsigned long)vaddr;
201 unsigned int level;
202
203 pte = lookup_address(address, &level);
204 if (pte == NULL)
205 return; /* vaddr missing */
206
207 ptev = pte_wrprotect(*pte);
208
209 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
210 BUG();
211 }
212
make_lowmem_page_readwrite(void * vaddr)213 void make_lowmem_page_readwrite(void *vaddr)
214 {
215 pte_t *pte, ptev;
216 unsigned long address = (unsigned long)vaddr;
217 unsigned int level;
218
219 pte = lookup_address(address, &level);
220 if (pte == NULL)
221 return; /* vaddr missing */
222
223 ptev = pte_mkwrite_novma(*pte);
224
225 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
226 BUG();
227 }
228
229
230 /*
231 * During early boot all page table pages are pinned, but we do not have struct
232 * pages, so return true until struct pages are ready.
233 */
xen_page_pinned(void * ptr)234 static bool xen_page_pinned(void *ptr)
235 {
236 if (static_branch_likely(&xen_struct_pages_ready)) {
237 struct page *page = virt_to_page(ptr);
238
239 return PagePinned(page);
240 }
241 return true;
242 }
243
xen_extend_mmu_update(const struct mmu_update * update)244 static void xen_extend_mmu_update(const struct mmu_update *update)
245 {
246 struct multicall_space mcs;
247 struct mmu_update *u;
248
249 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
250
251 if (mcs.mc != NULL) {
252 mcs.mc->args[1]++;
253 } else {
254 mcs = __xen_mc_entry(sizeof(*u));
255 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
256 }
257
258 u = mcs.args;
259 *u = *update;
260 }
261
xen_extend_mmuext_op(const struct mmuext_op * op)262 static void xen_extend_mmuext_op(const struct mmuext_op *op)
263 {
264 struct multicall_space mcs;
265 struct mmuext_op *u;
266
267 mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u));
268
269 if (mcs.mc != NULL) {
270 mcs.mc->args[1]++;
271 } else {
272 mcs = __xen_mc_entry(sizeof(*u));
273 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
274 }
275
276 u = mcs.args;
277 *u = *op;
278 }
279
xen_set_pmd_hyper(pmd_t * ptr,pmd_t val)280 static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
281 {
282 struct mmu_update u;
283
284 preempt_disable();
285
286 xen_mc_batch();
287
288 /* ptr may be ioremapped for 64-bit pagetable setup */
289 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
290 u.val = pmd_val_ma(val);
291 xen_extend_mmu_update(&u);
292
293 xen_mc_issue(!is_lazy_mmu_mode_active());
294
295 preempt_enable();
296 }
297
xen_set_pmd(pmd_t * ptr,pmd_t val)298 static void xen_set_pmd(pmd_t *ptr, pmd_t val)
299 {
300 trace_xen_mmu_set_pmd(ptr, val);
301
302 /* If page is not pinned, we can just update the entry
303 directly */
304 if (!xen_page_pinned(ptr)) {
305 *ptr = val;
306 return;
307 }
308
309 xen_set_pmd_hyper(ptr, val);
310 }
311
312 /*
313 * Associate a virtual page frame with a given physical page frame
314 * and protection flags for that frame.
315 */
set_pte_mfn(unsigned long vaddr,unsigned long mfn,pgprot_t flags)316 void __init set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
317 {
318 if (HYPERVISOR_update_va_mapping(vaddr, mfn_pte(mfn, flags),
319 UVMF_INVLPG))
320 BUG();
321 }
322
xen_batched_set_pte(pte_t * ptep,pte_t pteval)323 static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
324 {
325 struct mmu_update u;
326
327 if (!is_lazy_mmu_mode_active())
328 return false;
329
330 xen_mc_batch();
331
332 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
333 u.val = pte_val_ma(pteval);
334 xen_extend_mmu_update(&u);
335
336 xen_mc_issue(!is_lazy_mmu_mode_active());
337
338 return true;
339 }
340
__xen_set_pte(pte_t * ptep,pte_t pteval)341 static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
342 {
343 if (!xen_batched_set_pte(ptep, pteval)) {
344 /*
345 * Could call native_set_pte() here and trap and
346 * emulate the PTE write, but a hypercall is much cheaper.
347 */
348 struct mmu_update u;
349
350 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
351 u.val = pte_val_ma(pteval);
352 HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF);
353 }
354 }
355
xen_set_pte(pte_t * ptep,pte_t pteval)356 static void xen_set_pte(pte_t *ptep, pte_t pteval)
357 {
358 trace_xen_mmu_set_pte(ptep, pteval);
359 __xen_set_pte(ptep, pteval);
360 }
361
xen_ptep_modify_prot_start(struct vm_area_struct * vma,unsigned long addr,pte_t * ptep)362 static pte_t xen_ptep_modify_prot_start(struct vm_area_struct *vma,
363 unsigned long addr, pte_t *ptep)
364 {
365 /* Just return the pte as-is. We preserve the bits on commit */
366 trace_xen_mmu_ptep_modify_prot_start(vma->vm_mm, addr, ptep, *ptep);
367 return *ptep;
368 }
369
xen_ptep_modify_prot_commit(struct vm_area_struct * vma,unsigned long addr,pte_t * ptep,pte_t pte)370 static void xen_ptep_modify_prot_commit(struct vm_area_struct *vma,
371 unsigned long addr,
372 pte_t *ptep, pte_t pte)
373 {
374 struct mmu_update u;
375
376 trace_xen_mmu_ptep_modify_prot_commit(vma->vm_mm, addr, ptep, pte);
377 xen_mc_batch();
378
379 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
380 u.val = pte_val_ma(pte);
381 xen_extend_mmu_update(&u);
382
383 xen_mc_issue(!is_lazy_mmu_mode_active());
384 }
385
386 /* Assume pteval_t is equivalent to all the other *val_t types. */
pte_mfn_to_pfn(pteval_t val)387 static pteval_t pte_mfn_to_pfn(pteval_t val)
388 {
389 if (val & _PAGE_PRESENT) {
390 unsigned long mfn = (val & XEN_PTE_MFN_MASK) >> PAGE_SHIFT;
391 unsigned long pfn = mfn_to_pfn(mfn);
392
393 pteval_t flags = val & PTE_FLAGS_MASK;
394 if (unlikely(pfn == ~0))
395 val = flags & ~_PAGE_PRESENT;
396 else
397 val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
398 }
399
400 return val;
401 }
402
pte_pfn_to_mfn(pteval_t val)403 static pteval_t pte_pfn_to_mfn(pteval_t val)
404 {
405 if (val & _PAGE_PRESENT) {
406 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
407 pteval_t flags = val & PTE_FLAGS_MASK;
408 unsigned long mfn;
409
410 mfn = __pfn_to_mfn(pfn);
411
412 /*
413 * If there's no mfn for the pfn, then just create an
414 * empty non-present pte. Unfortunately this loses
415 * information about the original pfn, so
416 * pte_mfn_to_pfn is asymmetric.
417 */
418 if (unlikely(mfn == INVALID_P2M_ENTRY)) {
419 mfn = 0;
420 flags = 0;
421 } else
422 mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT);
423 val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
424 }
425
426 return val;
427 }
428
xen_pte_val(pte_t pte)429 __visible pteval_t xen_pte_val(pte_t pte)
430 {
431 pteval_t pteval = pte.pte;
432
433 return pte_mfn_to_pfn(pteval);
434 }
435 PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
436
xen_pgd_val(pgd_t pgd)437 __visible pgdval_t xen_pgd_val(pgd_t pgd)
438 {
439 return pte_mfn_to_pfn(pgd.pgd);
440 }
441 PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
442
xen_make_pte(pteval_t pte)443 __visible pte_t xen_make_pte(pteval_t pte)
444 {
445 pte = pte_pfn_to_mfn(pte);
446
447 return native_make_pte(pte);
448 }
449 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
450
xen_make_pgd(pgdval_t pgd)451 __visible pgd_t xen_make_pgd(pgdval_t pgd)
452 {
453 pgd = pte_pfn_to_mfn(pgd);
454 return native_make_pgd(pgd);
455 }
456 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
457
xen_pmd_val(pmd_t pmd)458 __visible pmdval_t xen_pmd_val(pmd_t pmd)
459 {
460 return pte_mfn_to_pfn(pmd.pmd);
461 }
462 PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
463
xen_set_pud_hyper(pud_t * ptr,pud_t val)464 static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
465 {
466 struct mmu_update u;
467
468 preempt_disable();
469
470 xen_mc_batch();
471
472 /* ptr may be ioremapped for 64-bit pagetable setup */
473 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
474 u.val = pud_val_ma(val);
475 xen_extend_mmu_update(&u);
476
477 xen_mc_issue(!is_lazy_mmu_mode_active());
478
479 preempt_enable();
480 }
481
xen_set_pud(pud_t * ptr,pud_t val)482 static void xen_set_pud(pud_t *ptr, pud_t val)
483 {
484 trace_xen_mmu_set_pud(ptr, val);
485
486 /* If page is not pinned, we can just update the entry
487 directly */
488 if (!xen_page_pinned(ptr)) {
489 *ptr = val;
490 return;
491 }
492
493 xen_set_pud_hyper(ptr, val);
494 }
495
xen_make_pmd(pmdval_t pmd)496 __visible pmd_t xen_make_pmd(pmdval_t pmd)
497 {
498 pmd = pte_pfn_to_mfn(pmd);
499 return native_make_pmd(pmd);
500 }
501 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
502
xen_pud_val(pud_t pud)503 __visible pudval_t xen_pud_val(pud_t pud)
504 {
505 return pte_mfn_to_pfn(pud.pud);
506 }
507 PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
508
xen_make_pud(pudval_t pud)509 __visible pud_t xen_make_pud(pudval_t pud)
510 {
511 pud = pte_pfn_to_mfn(pud);
512
513 return native_make_pud(pud);
514 }
515 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
516
xen_get_user_pgd(pgd_t * pgd)517 static pgd_t *xen_get_user_pgd(pgd_t *pgd)
518 {
519 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
520 unsigned offset = pgd - pgd_page;
521 pgd_t *user_ptr = NULL;
522
523 if (!static_branch_likely(&xen_struct_pages_ready))
524 return NULL;
525
526 if (offset < pgd_index(USER_LIMIT)) {
527 struct page *page = virt_to_page(pgd_page);
528 user_ptr = (pgd_t *)page->private;
529 if (user_ptr)
530 user_ptr += offset;
531 }
532
533 return user_ptr;
534 }
535
__xen_set_p4d_hyper(p4d_t * ptr,p4d_t val)536 static void __xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
537 {
538 struct mmu_update u;
539
540 u.ptr = virt_to_machine(ptr).maddr;
541 u.val = p4d_val_ma(val);
542 xen_extend_mmu_update(&u);
543 }
544
545 /*
546 * Raw hypercall-based set_p4d, intended for in early boot before
547 * there's a page structure. This implies:
548 * 1. The only existing pagetable is the kernel's
549 * 2. It is always pinned
550 * 3. It has no user pagetable attached to it
551 */
xen_set_p4d_hyper(p4d_t * ptr,p4d_t val)552 static void __init xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
553 {
554 preempt_disable();
555
556 xen_mc_batch();
557
558 __xen_set_p4d_hyper(ptr, val);
559
560 xen_mc_issue(!is_lazy_mmu_mode_active());
561
562 preempt_enable();
563 }
564
xen_set_p4d(p4d_t * ptr,p4d_t val)565 static void xen_set_p4d(p4d_t *ptr, p4d_t val)
566 {
567 pgd_t *user_ptr = xen_get_user_pgd((pgd_t *)ptr);
568 pgd_t pgd_val;
569
570 trace_xen_mmu_set_p4d(ptr, (p4d_t *)user_ptr, val);
571
572 /* If page is not pinned, we can just update the entry
573 directly */
574 if (!xen_page_pinned(ptr)) {
575 *ptr = val;
576 if (user_ptr) {
577 WARN_ON(xen_page_pinned(user_ptr));
578 pgd_val.pgd = p4d_val_ma(val);
579 *user_ptr = pgd_val;
580 }
581 return;
582 }
583
584 /* If it's pinned, then we can at least batch the kernel and
585 user updates together. */
586 xen_mc_batch();
587
588 __xen_set_p4d_hyper(ptr, val);
589 if (user_ptr)
590 __xen_set_p4d_hyper((p4d_t *)user_ptr, val);
591
592 xen_mc_issue(!is_lazy_mmu_mode_active());
593 }
594
xen_p4d_val(p4d_t p4d)595 __visible p4dval_t xen_p4d_val(p4d_t p4d)
596 {
597 return pte_mfn_to_pfn(p4d.p4d);
598 }
599 PV_CALLEE_SAVE_REGS_THUNK(xen_p4d_val);
600
xen_make_p4d(p4dval_t p4d)601 __visible p4d_t xen_make_p4d(p4dval_t p4d)
602 {
603 p4d = pte_pfn_to_mfn(p4d);
604
605 return native_make_p4d(p4d);
606 }
607 PV_CALLEE_SAVE_REGS_THUNK(xen_make_p4d);
608
xen_pmd_walk(struct mm_struct * mm,pmd_t * pmd,void (* func)(struct mm_struct * mm,struct page *,enum pt_level),bool last,unsigned long limit)609 static void xen_pmd_walk(struct mm_struct *mm, pmd_t *pmd,
610 void (*func)(struct mm_struct *mm, struct page *,
611 enum pt_level),
612 bool last, unsigned long limit)
613 {
614 int i, nr;
615
616 nr = last ? pmd_index(limit) + 1 : PTRS_PER_PMD;
617 for (i = 0; i < nr; i++) {
618 if (!pmd_none(pmd[i]))
619 (*func)(mm, pmd_page(pmd[i]), PT_PTE);
620 }
621 }
622
xen_pud_walk(struct mm_struct * mm,pud_t * pud,void (* func)(struct mm_struct * mm,struct page *,enum pt_level),bool last,unsigned long limit)623 static void xen_pud_walk(struct mm_struct *mm, pud_t *pud,
624 void (*func)(struct mm_struct *mm, struct page *,
625 enum pt_level),
626 bool last, unsigned long limit)
627 {
628 int i, nr;
629
630 nr = last ? pud_index(limit) + 1 : PTRS_PER_PUD;
631 for (i = 0; i < nr; i++) {
632 pmd_t *pmd;
633
634 if (pud_none(pud[i]))
635 continue;
636
637 pmd = pmd_offset(&pud[i], 0);
638 if (PTRS_PER_PMD > 1)
639 (*func)(mm, virt_to_page(pmd), PT_PMD);
640 xen_pmd_walk(mm, pmd, func, last && i == nr - 1, limit);
641 }
642 }
643
xen_p4d_walk(struct mm_struct * mm,p4d_t * p4d,void (* func)(struct mm_struct * mm,struct page *,enum pt_level),bool last,unsigned long limit)644 static void xen_p4d_walk(struct mm_struct *mm, p4d_t *p4d,
645 void (*func)(struct mm_struct *mm, struct page *,
646 enum pt_level),
647 bool last, unsigned long limit)
648 {
649 pud_t *pud;
650
651
652 if (p4d_none(*p4d))
653 return;
654
655 pud = pud_offset(p4d, 0);
656 if (PTRS_PER_PUD > 1)
657 (*func)(mm, virt_to_page(pud), PT_PUD);
658 xen_pud_walk(mm, pud, func, last, limit);
659 }
660
661 /*
662 * (Yet another) pagetable walker. This one is intended for pinning a
663 * pagetable. This means that it walks a pagetable and calls the
664 * callback function on each page it finds making up the page table,
665 * at every level. It walks the entire pagetable, but it only bothers
666 * pinning pte pages which are below limit. In the normal case this
667 * will be STACK_TOP_MAX, but at boot we need to pin up to
668 * FIXADDR_TOP.
669 *
670 * We must skip the Xen hole in the middle of the address space, just after
671 * the big x86-64 virtual hole.
672 */
__xen_pgd_walk(struct mm_struct * mm,pgd_t * pgd,void (* func)(struct mm_struct * mm,struct page *,enum pt_level),unsigned long limit)673 static void __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
674 void (*func)(struct mm_struct *mm, struct page *,
675 enum pt_level),
676 unsigned long limit)
677 {
678 int i, nr;
679 unsigned hole_low = 0, hole_high = 0;
680
681 /* The limit is the last byte to be touched */
682 limit--;
683 BUG_ON(limit >= FIXADDR_TOP);
684
685 /*
686 * 64-bit has a great big hole in the middle of the address
687 * space, which contains the Xen mappings.
688 */
689 hole_low = pgd_index(GUARD_HOLE_BASE_ADDR);
690 hole_high = pgd_index(GUARD_HOLE_END_ADDR);
691
692 nr = pgd_index(limit) + 1;
693 for (i = 0; i < nr; i++) {
694 p4d_t *p4d;
695
696 if (i >= hole_low && i < hole_high)
697 continue;
698
699 if (pgd_none(pgd[i]))
700 continue;
701
702 p4d = p4d_offset(&pgd[i], 0);
703 xen_p4d_walk(mm, p4d, func, i == nr - 1, limit);
704 }
705
706 /* Do the top level last, so that the callbacks can use it as
707 a cue to do final things like tlb flushes. */
708 (*func)(mm, virt_to_page(pgd), PT_PGD);
709 }
710
xen_pgd_walk(struct mm_struct * mm,void (* func)(struct mm_struct * mm,struct page *,enum pt_level),unsigned long limit)711 static void xen_pgd_walk(struct mm_struct *mm,
712 void (*func)(struct mm_struct *mm, struct page *,
713 enum pt_level),
714 unsigned long limit)
715 {
716 __xen_pgd_walk(mm, mm->pgd, func, limit);
717 }
718
719 /* If we're using split pte locks, then take the page's lock and
720 return a pointer to it. Otherwise return NULL. */
xen_pte_lock(struct page * page,struct mm_struct * mm)721 static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
722 {
723 spinlock_t *ptl = NULL;
724
725 #if defined(CONFIG_SPLIT_PTE_PTLOCKS)
726 ptl = ptlock_ptr(page_ptdesc(page));
727 spin_lock_nest_lock(ptl, &mm->page_table_lock);
728 #endif
729
730 return ptl;
731 }
732
xen_pte_unlock(void * v)733 static void xen_pte_unlock(void *v)
734 {
735 spinlock_t *ptl = v;
736 spin_unlock(ptl);
737 }
738
xen_do_pin(unsigned level,unsigned long pfn)739 static void xen_do_pin(unsigned level, unsigned long pfn)
740 {
741 struct mmuext_op op;
742
743 op.cmd = level;
744 op.arg1.mfn = pfn_to_mfn(pfn);
745
746 xen_extend_mmuext_op(&op);
747 }
748
xen_pin_page(struct mm_struct * mm,struct page * page,enum pt_level level)749 static void xen_pin_page(struct mm_struct *mm, struct page *page,
750 enum pt_level level)
751 {
752 unsigned pgfl = TestSetPagePinned(page);
753
754 if (!pgfl) {
755 void *pt = lowmem_page_address(page);
756 unsigned long pfn = page_to_pfn(page);
757 struct multicall_space mcs = __xen_mc_entry(0);
758 spinlock_t *ptl;
759
760 /*
761 * We need to hold the pagetable lock between the time
762 * we make the pagetable RO and when we actually pin
763 * it. If we don't, then other users may come in and
764 * attempt to update the pagetable by writing it,
765 * which will fail because the memory is RO but not
766 * pinned, so Xen won't do the trap'n'emulate.
767 *
768 * If we're using split pte locks, we can't hold the
769 * entire pagetable's worth of locks during the
770 * traverse, because we may wrap the preempt count (8
771 * bits). The solution is to mark RO and pin each PTE
772 * page while holding the lock. This means the number
773 * of locks we end up holding is never more than a
774 * batch size (~32 entries, at present).
775 *
776 * If we're not using split pte locks, we needn't pin
777 * the PTE pages independently, because we're
778 * protected by the overall pagetable lock.
779 */
780 ptl = NULL;
781 if (level == PT_PTE)
782 ptl = xen_pte_lock(page, mm);
783
784 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
785 pfn_pte(pfn, PAGE_KERNEL_RO),
786 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
787
788 if (ptl) {
789 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
790
791 /* Queue a deferred unlock for when this batch
792 is completed. */
793 xen_mc_callback(xen_pte_unlock, ptl);
794 }
795 }
796 }
797
798 /* This is called just after a mm has been created, but it has not
799 been used yet. We need to make sure that its pagetable is all
800 read-only, and can be pinned. */
__xen_pgd_pin(struct mm_struct * mm,pgd_t * pgd)801 static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
802 {
803 pgd_t *user_pgd = xen_get_user_pgd(pgd);
804
805 trace_xen_mmu_pgd_pin(mm, pgd);
806
807 xen_mc_batch();
808
809 __xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT);
810
811 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
812
813 if (user_pgd) {
814 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
815 xen_do_pin(MMUEXT_PIN_L4_TABLE,
816 PFN_DOWN(__pa(user_pgd)));
817 }
818
819 xen_mc_issue(true);
820 }
821
xen_pgd_pin(struct mm_struct * mm)822 static void xen_pgd_pin(struct mm_struct *mm)
823 {
824 __xen_pgd_pin(mm, mm->pgd);
825 }
826
827 /*
828 * On save, we need to pin all pagetables to make sure they get their
829 * mfns turned into pfns. Search the list for any unpinned pgds and pin
830 * them (unpinned pgds are not currently in use, probably because the
831 * process is under construction or destruction).
832 *
833 * Expected to be called in stop_machine() ("equivalent to taking
834 * every spinlock in the system"), so the locking doesn't really
835 * matter all that much.
836 */
xen_mm_pin_all(void)837 void xen_mm_pin_all(void)
838 {
839 struct ptdesc *ptdesc;
840
841 spin_lock(&init_mm.page_table_lock);
842 spin_lock(&pgd_lock);
843
844 list_for_each_entry(ptdesc, &pgd_list, pt_list) {
845 if (!PagePinned(ptdesc_page(ptdesc))) {
846 __xen_pgd_pin(&init_mm, (pgd_t *)ptdesc_address(ptdesc));
847 SetPageSavePinned(ptdesc_page(ptdesc));
848 }
849 }
850
851 spin_unlock(&pgd_lock);
852 spin_unlock(&init_mm.page_table_lock);
853 }
854
xen_mark_pinned(struct mm_struct * mm,struct page * page,enum pt_level level)855 static void __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
856 enum pt_level level)
857 {
858 SetPagePinned(page);
859 }
860
861 /*
862 * The init_mm pagetable is really pinned as soon as its created, but
863 * that's before we have page structures to store the bits. So do all
864 * the book-keeping now once struct pages for allocated pages are
865 * initialized. This happens only after memblock_free_all() is called.
866 */
xen_after_bootmem(void)867 static void __init xen_after_bootmem(void)
868 {
869 static_branch_enable(&xen_struct_pages_ready);
870 #ifdef CONFIG_X86_VSYSCALL_EMULATION
871 SetPagePinned(virt_to_page(level3_user_vsyscall));
872 #endif
873 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
874
875 if (alloc_discontig_frames(MIN_CONTIG_ORDER))
876 BUG();
877 }
878
xen_unpin_page(struct mm_struct * mm,struct page * page,enum pt_level level)879 static void xen_unpin_page(struct mm_struct *mm, struct page *page,
880 enum pt_level level)
881 {
882 unsigned pgfl = TestClearPagePinned(page);
883
884 if (pgfl) {
885 void *pt = lowmem_page_address(page);
886 unsigned long pfn = page_to_pfn(page);
887 spinlock_t *ptl = NULL;
888 struct multicall_space mcs;
889
890 /*
891 * Do the converse to pin_page. If we're using split
892 * pte locks, we must be holding the lock for while
893 * the pte page is unpinned but still RO to prevent
894 * concurrent updates from seeing it in this
895 * partially-pinned state.
896 */
897 if (level == PT_PTE) {
898 ptl = xen_pte_lock(page, mm);
899
900 if (ptl)
901 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
902 }
903
904 mcs = __xen_mc_entry(0);
905
906 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
907 pfn_pte(pfn, PAGE_KERNEL),
908 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
909
910 if (ptl) {
911 /* unlock when batch completed */
912 xen_mc_callback(xen_pte_unlock, ptl);
913 }
914 }
915 }
916
917 /* Release a pagetables pages back as normal RW */
__xen_pgd_unpin(struct mm_struct * mm,pgd_t * pgd)918 static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
919 {
920 pgd_t *user_pgd = xen_get_user_pgd(pgd);
921
922 trace_xen_mmu_pgd_unpin(mm, pgd);
923
924 xen_mc_batch();
925
926 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
927
928 if (user_pgd) {
929 xen_do_pin(MMUEXT_UNPIN_TABLE,
930 PFN_DOWN(__pa(user_pgd)));
931 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
932 }
933
934 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
935
936 xen_mc_issue(true);
937 }
938
xen_pgd_unpin(struct mm_struct * mm)939 static void xen_pgd_unpin(struct mm_struct *mm)
940 {
941 __xen_pgd_unpin(mm, mm->pgd);
942 }
943
944 /*
945 * On resume, undo any pinning done at save, so that the rest of the
946 * kernel doesn't see any unexpected pinned pagetables.
947 */
xen_mm_unpin_all(void)948 void xen_mm_unpin_all(void)
949 {
950 struct ptdesc *ptdesc;
951
952 spin_lock(&init_mm.page_table_lock);
953 spin_lock(&pgd_lock);
954
955 list_for_each_entry(ptdesc, &pgd_list, pt_list) {
956 if (PageSavePinned(ptdesc_page(ptdesc))) {
957 BUG_ON(!PagePinned(ptdesc_page(ptdesc)));
958 __xen_pgd_unpin(&init_mm, (pgd_t *)ptdesc_address(ptdesc));
959 ClearPageSavePinned(ptdesc_page(ptdesc));
960 }
961 }
962
963 spin_unlock(&pgd_lock);
964 spin_unlock(&init_mm.page_table_lock);
965 }
966
xen_enter_mmap(struct mm_struct * mm)967 static void xen_enter_mmap(struct mm_struct *mm)
968 {
969 spin_lock(&mm->page_table_lock);
970 xen_pgd_pin(mm);
971 spin_unlock(&mm->page_table_lock);
972 }
973
drop_mm_ref_this_cpu(void * info)974 static void drop_mm_ref_this_cpu(void *info)
975 {
976 struct mm_struct *mm = info;
977
978 if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm)
979 leave_mm();
980
981 /*
982 * If this cpu still has a stale cr3 reference, then make sure
983 * it has been flushed.
984 */
985 if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd))
986 xen_mc_flush();
987 }
988
989 #ifdef CONFIG_SMP
990 /*
991 * Another cpu may still have their %cr3 pointing at the pagetable, so
992 * we need to repoint it somewhere else before we can unpin it.
993 */
xen_drop_mm_ref(struct mm_struct * mm)994 static void xen_drop_mm_ref(struct mm_struct *mm)
995 {
996 cpumask_var_t mask;
997 unsigned cpu;
998
999 drop_mm_ref_this_cpu(mm);
1000
1001 /* Get the "official" set of cpus referring to our pagetable. */
1002 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1003 for_each_online_cpu(cpu) {
1004 if (per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1005 continue;
1006 smp_call_function_single(cpu, drop_mm_ref_this_cpu, mm, 1);
1007 }
1008 return;
1009 }
1010
1011 /*
1012 * It's possible that a vcpu may have a stale reference to our
1013 * cr3, because its in lazy mode, and it hasn't yet flushed
1014 * its set of pending hypercalls yet. In this case, we can
1015 * look at its actual current cr3 value, and force it to flush
1016 * if needed.
1017 */
1018 cpumask_clear(mask);
1019 for_each_online_cpu(cpu) {
1020 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
1021 cpumask_set_cpu(cpu, mask);
1022 }
1023
1024 smp_call_function_many(mask, drop_mm_ref_this_cpu, mm, 1);
1025 free_cpumask_var(mask);
1026 }
1027 #else
xen_drop_mm_ref(struct mm_struct * mm)1028 static void xen_drop_mm_ref(struct mm_struct *mm)
1029 {
1030 drop_mm_ref_this_cpu(mm);
1031 }
1032 #endif
1033
1034 /*
1035 * While a process runs, Xen pins its pagetables, which means that the
1036 * hypervisor forces it to be read-only, and it controls all updates
1037 * to it. This means that all pagetable updates have to go via the
1038 * hypervisor, which is moderately expensive.
1039 *
1040 * Since we're pulling the pagetable down, we switch to use init_mm,
1041 * unpin old process pagetable and mark it all read-write, which
1042 * allows further operations on it to be simple memory accesses.
1043 *
1044 * The only subtle point is that another CPU may be still using the
1045 * pagetable because of lazy tlb flushing. This means we need need to
1046 * switch all CPUs off this pagetable before we can unpin it.
1047 */
xen_exit_mmap(struct mm_struct * mm)1048 static void xen_exit_mmap(struct mm_struct *mm)
1049 {
1050 get_cpu(); /* make sure we don't move around */
1051 xen_drop_mm_ref(mm);
1052 put_cpu();
1053
1054 spin_lock(&mm->page_table_lock);
1055
1056 /* pgd may not be pinned in the error exit path of execve */
1057 if (xen_page_pinned(mm->pgd))
1058 xen_pgd_unpin(mm);
1059
1060 spin_unlock(&mm->page_table_lock);
1061 }
1062
1063 static void xen_post_allocator_init(void);
1064
pin_pagetable_pfn(unsigned cmd,unsigned long pfn)1065 static void __init pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1066 {
1067 struct mmuext_op op;
1068
1069 op.cmd = cmd;
1070 op.arg1.mfn = pfn_to_mfn(pfn);
1071 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1072 BUG();
1073 }
1074
xen_cleanhighmap(unsigned long vaddr,unsigned long vaddr_end)1075 static void __init xen_cleanhighmap(unsigned long vaddr,
1076 unsigned long vaddr_end)
1077 {
1078 unsigned long kernel_end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
1079 pmd_t *pmd = level2_kernel_pgt + pmd_index(vaddr);
1080
1081 /* NOTE: The loop is more greedy than the cleanup_highmap variant.
1082 * We include the PMD passed in on _both_ boundaries. */
1083 for (; vaddr <= vaddr_end && (pmd < (level2_kernel_pgt + PTRS_PER_PMD));
1084 pmd++, vaddr += PMD_SIZE) {
1085 if (pmd_none(*pmd))
1086 continue;
1087 if (vaddr < (unsigned long) _text || vaddr > kernel_end)
1088 set_pmd(pmd, __pmd(0));
1089 }
1090 /* In case we did something silly, we should crash in this function
1091 * instead of somewhere later and be confusing. */
1092 xen_mc_flush();
1093 }
1094
1095 /*
1096 * Make a page range writeable and free it.
1097 */
xen_free_ro_pages(unsigned long paddr,unsigned long size)1098 static void __init xen_free_ro_pages(unsigned long paddr, unsigned long size)
1099 {
1100 void *vaddr = __va(paddr);
1101 void *vaddr_end = vaddr + size;
1102
1103 for (; vaddr < vaddr_end; vaddr += PAGE_SIZE)
1104 make_lowmem_page_readwrite(vaddr);
1105
1106 memblock_phys_free(paddr, size);
1107 }
1108
xen_cleanmfnmap_free_pgtbl(void * pgtbl,bool unpin)1109 static void __init xen_cleanmfnmap_free_pgtbl(void *pgtbl, bool unpin)
1110 {
1111 unsigned long pa = __pa(pgtbl) & PHYSICAL_PAGE_MASK;
1112
1113 if (unpin)
1114 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(pa));
1115 if (static_branch_likely(&xen_struct_pages_ready))
1116 ClearPagePinned(virt_to_page(__va(pa)));
1117 xen_free_ro_pages(pa, PAGE_SIZE);
1118 }
1119
xen_cleanmfnmap_pmd(pmd_t * pmd,bool unpin)1120 static void __init xen_cleanmfnmap_pmd(pmd_t *pmd, bool unpin)
1121 {
1122 unsigned long pa;
1123 pte_t *pte_tbl;
1124 int i;
1125
1126 if (pmd_leaf(*pmd)) {
1127 pa = pmd_val(*pmd) & PHYSICAL_PAGE_MASK;
1128 xen_free_ro_pages(pa, PMD_SIZE);
1129 return;
1130 }
1131
1132 pte_tbl = pte_offset_kernel(pmd, 0);
1133 for (i = 0; i < PTRS_PER_PTE; i++) {
1134 if (pte_none(pte_tbl[i]))
1135 continue;
1136 pa = pte_pfn(pte_tbl[i]) << PAGE_SHIFT;
1137 xen_free_ro_pages(pa, PAGE_SIZE);
1138 }
1139 set_pmd(pmd, __pmd(0));
1140 xen_cleanmfnmap_free_pgtbl(pte_tbl, unpin);
1141 }
1142
xen_cleanmfnmap_pud(pud_t * pud,bool unpin)1143 static void __init xen_cleanmfnmap_pud(pud_t *pud, bool unpin)
1144 {
1145 unsigned long pa;
1146 pmd_t *pmd_tbl;
1147 int i;
1148
1149 if (pud_leaf(*pud)) {
1150 pa = pud_val(*pud) & PHYSICAL_PAGE_MASK;
1151 xen_free_ro_pages(pa, PUD_SIZE);
1152 return;
1153 }
1154
1155 pmd_tbl = pmd_offset(pud, 0);
1156 for (i = 0; i < PTRS_PER_PMD; i++) {
1157 if (pmd_none(pmd_tbl[i]))
1158 continue;
1159 xen_cleanmfnmap_pmd(pmd_tbl + i, unpin);
1160 }
1161 set_pud(pud, __pud(0));
1162 xen_cleanmfnmap_free_pgtbl(pmd_tbl, unpin);
1163 }
1164
xen_cleanmfnmap_p4d(p4d_t * p4d,bool unpin)1165 static void __init xen_cleanmfnmap_p4d(p4d_t *p4d, bool unpin)
1166 {
1167 unsigned long pa;
1168 pud_t *pud_tbl;
1169 int i;
1170
1171 if (p4d_leaf(*p4d)) {
1172 pa = p4d_val(*p4d) & PHYSICAL_PAGE_MASK;
1173 xen_free_ro_pages(pa, P4D_SIZE);
1174 return;
1175 }
1176
1177 pud_tbl = pud_offset(p4d, 0);
1178 for (i = 0; i < PTRS_PER_PUD; i++) {
1179 if (pud_none(pud_tbl[i]))
1180 continue;
1181 xen_cleanmfnmap_pud(pud_tbl + i, unpin);
1182 }
1183 set_p4d(p4d, __p4d(0));
1184 xen_cleanmfnmap_free_pgtbl(pud_tbl, unpin);
1185 }
1186
1187 /*
1188 * Since it is well isolated we can (and since it is perhaps large we should)
1189 * also free the page tables mapping the initial P->M table.
1190 */
xen_cleanmfnmap(unsigned long vaddr)1191 static void __init xen_cleanmfnmap(unsigned long vaddr)
1192 {
1193 pgd_t *pgd;
1194 p4d_t *p4d;
1195 bool unpin;
1196
1197 unpin = (vaddr == 2 * PGDIR_SIZE);
1198 vaddr &= PMD_MASK;
1199 pgd = pgd_offset_k(vaddr);
1200 p4d = p4d_offset(pgd, 0);
1201 if (!p4d_none(*p4d))
1202 xen_cleanmfnmap_p4d(p4d, unpin);
1203 }
1204
xen_pagetable_p2m_free(void)1205 static void __init xen_pagetable_p2m_free(void)
1206 {
1207 unsigned long size;
1208 unsigned long addr;
1209
1210 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
1211
1212 /* No memory or already called. */
1213 if ((unsigned long)xen_p2m_addr == xen_start_info->mfn_list)
1214 return;
1215
1216 /* using __ka address and sticking INVALID_P2M_ENTRY! */
1217 memset((void *)xen_start_info->mfn_list, 0xff, size);
1218
1219 addr = xen_start_info->mfn_list;
1220 /*
1221 * We could be in __ka space.
1222 * We roundup to the PMD, which means that if anybody at this stage is
1223 * using the __ka address of xen_start_info or
1224 * xen_start_info->shared_info they are in going to crash. Fortunately
1225 * we have already revectored in xen_setup_kernel_pagetable.
1226 */
1227 size = roundup(size, PMD_SIZE);
1228
1229 if (addr >= __START_KERNEL_map) {
1230 xen_cleanhighmap(addr, addr + size);
1231 size = PAGE_ALIGN(xen_start_info->nr_pages *
1232 sizeof(unsigned long));
1233 memblock_free((void *)addr, size);
1234 } else {
1235 xen_cleanmfnmap(addr);
1236 }
1237 }
1238
xen_pagetable_cleanhighmap(void)1239 static void __init xen_pagetable_cleanhighmap(void)
1240 {
1241 unsigned long size;
1242 unsigned long addr;
1243
1244 /* At this stage, cleanup_highmap has already cleaned __ka space
1245 * from _brk_limit way up to the max_pfn_mapped (which is the end of
1246 * the ramdisk). We continue on, erasing PMD entries that point to page
1247 * tables - do note that they are accessible at this stage via __va.
1248 * As Xen is aligning the memory end to a 4MB boundary, for good
1249 * measure we also round up to PMD_SIZE * 2 - which means that if
1250 * anybody is using __ka address to the initial boot-stack - and try
1251 * to use it - they are going to crash. The xen_start_info has been
1252 * taken care of already in xen_setup_kernel_pagetable. */
1253 addr = xen_start_info->pt_base;
1254 size = xen_start_info->nr_pt_frames * PAGE_SIZE;
1255
1256 xen_cleanhighmap(addr, roundup(addr + size, PMD_SIZE * 2));
1257 xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base));
1258 }
1259
xen_pagetable_p2m_setup(void)1260 static void __init xen_pagetable_p2m_setup(void)
1261 {
1262 xen_vmalloc_p2m_tree();
1263
1264 xen_pagetable_p2m_free();
1265
1266 xen_pagetable_cleanhighmap();
1267
1268 /* And revector! Bye bye old array */
1269 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
1270 }
1271
xen_pagetable_init(void)1272 static void __init xen_pagetable_init(void)
1273 {
1274 /*
1275 * The majority of further PTE writes is to pagetables already
1276 * announced as such to Xen. Hence it is more efficient to use
1277 * hypercalls for these updates.
1278 */
1279 pv_ops.mmu.set_pte = __xen_set_pte;
1280
1281 paging_init();
1282 xen_post_allocator_init();
1283
1284 xen_pagetable_p2m_setup();
1285
1286 /* Allocate and initialize top and mid mfn levels for p2m structure */
1287 xen_build_mfn_list_list();
1288
1289 /* Remap memory freed due to conflicts with E820 map */
1290 xen_remap_memory();
1291 xen_setup_mfn_list_list();
1292 }
1293
xen_write_cr2(unsigned long cr2)1294 static noinstr void xen_write_cr2(unsigned long cr2)
1295 {
1296 this_cpu_read(xen_vcpu)->arch.cr2 = cr2;
1297 }
1298
xen_flush_tlb(void)1299 static noinline void xen_flush_tlb(void)
1300 {
1301 struct mmuext_op *op;
1302 struct multicall_space mcs;
1303
1304 preempt_disable();
1305
1306 mcs = xen_mc_entry(sizeof(*op));
1307
1308 op = mcs.args;
1309 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1310 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1311
1312 xen_mc_issue(!is_lazy_mmu_mode_active());
1313
1314 preempt_enable();
1315 }
1316
xen_flush_tlb_one_user(unsigned long addr)1317 static void xen_flush_tlb_one_user(unsigned long addr)
1318 {
1319 struct mmuext_op *op;
1320 struct multicall_space mcs;
1321
1322 trace_xen_mmu_flush_tlb_one_user(addr);
1323
1324 preempt_disable();
1325
1326 mcs = xen_mc_entry(sizeof(*op));
1327 op = mcs.args;
1328 op->cmd = MMUEXT_INVLPG_LOCAL;
1329 op->arg1.linear_addr = addr & PAGE_MASK;
1330 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1331
1332 xen_mc_issue(!is_lazy_mmu_mode_active());
1333
1334 preempt_enable();
1335 }
1336
xen_flush_tlb_multi(const struct cpumask * cpus,const struct flush_tlb_info * info)1337 static void xen_flush_tlb_multi(const struct cpumask *cpus,
1338 const struct flush_tlb_info *info)
1339 {
1340 struct {
1341 struct mmuext_op op;
1342 DECLARE_BITMAP(mask, NR_CPUS);
1343 } *args;
1344 struct multicall_space mcs;
1345 const size_t mc_entry_size = sizeof(args->op) +
1346 sizeof(args->mask[0]) * BITS_TO_LONGS(num_possible_cpus());
1347
1348 trace_xen_mmu_flush_tlb_multi(cpus, info->mm, info->start, info->end);
1349
1350 if (cpumask_empty(cpus))
1351 return; /* nothing to do */
1352
1353 mcs = xen_mc_entry(mc_entry_size);
1354 args = mcs.args;
1355 args->op.arg2.vcpumask = to_cpumask(args->mask);
1356
1357 /* Remove any offline CPUs */
1358 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1359
1360 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1361 if (info->end != TLB_FLUSH_ALL &&
1362 (info->end - info->start) <= PAGE_SIZE) {
1363 args->op.cmd = MMUEXT_INVLPG_MULTI;
1364 args->op.arg1.linear_addr = info->start;
1365 }
1366
1367 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1368
1369 xen_mc_issue(!is_lazy_mmu_mode_active());
1370 }
1371
xen_read_cr3(void)1372 static unsigned long xen_read_cr3(void)
1373 {
1374 return this_cpu_read(xen_cr3);
1375 }
1376
set_current_cr3(void * v)1377 static void set_current_cr3(void *v)
1378 {
1379 this_cpu_write(xen_current_cr3, (unsigned long)v);
1380 }
1381
__xen_write_cr3(bool kernel,unsigned long cr3)1382 static void __xen_write_cr3(bool kernel, unsigned long cr3)
1383 {
1384 struct mmuext_op op;
1385 unsigned long mfn;
1386
1387 trace_xen_mmu_write_cr3(kernel, cr3);
1388
1389 if (cr3)
1390 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1391 else
1392 mfn = 0;
1393
1394 WARN_ON(mfn == 0 && kernel);
1395
1396 op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1397 op.arg1.mfn = mfn;
1398
1399 xen_extend_mmuext_op(&op);
1400
1401 if (kernel) {
1402 this_cpu_write(xen_cr3, cr3);
1403
1404 /* Update xen_current_cr3 once the batch has actually
1405 been submitted. */
1406 xen_mc_callback(set_current_cr3, (void *)cr3);
1407 }
1408 }
xen_write_cr3(unsigned long cr3)1409 static void xen_write_cr3(unsigned long cr3)
1410 {
1411 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1412
1413 BUG_ON(preemptible());
1414
1415 xen_mc_batch(); /* disables interrupts */
1416
1417 /* Update while interrupts are disabled, so its atomic with
1418 respect to ipis */
1419 this_cpu_write(xen_cr3, cr3);
1420
1421 __xen_write_cr3(true, cr3);
1422
1423 if (user_pgd)
1424 __xen_write_cr3(false, __pa(user_pgd));
1425 else
1426 __xen_write_cr3(false, 0);
1427
1428 xen_mc_issue(!xen_is_cpu_lazy_mode()); /* interrupts restored */
1429 }
1430
1431 /*
1432 * At the start of the day - when Xen launches a guest, it has already
1433 * built pagetables for the guest. We diligently look over them
1434 * in xen_setup_kernel_pagetable and graft as appropriate them in the
1435 * init_top_pgt and its friends. Then when we are happy we load
1436 * the new init_top_pgt - and continue on.
1437 *
1438 * The generic code starts (start_kernel) and 'init_mem_mapping' sets
1439 * up the rest of the pagetables. When it has completed it loads the cr3.
1440 * N.B. that baremetal would start at 'start_kernel' (and the early
1441 * #PF handler would create bootstrap pagetables) - so we are running
1442 * with the same assumptions as what to do when write_cr3 is executed
1443 * at this point.
1444 *
1445 * Since there are no user-page tables at all, we have two variants
1446 * of xen_write_cr3 - the early bootup (this one), and the late one
1447 * (xen_write_cr3). The reason we have to do that is that in 64-bit
1448 * the Linux kernel and user-space are both in ring 3 while the
1449 * hypervisor is in ring 0.
1450 */
xen_write_cr3_init(unsigned long cr3)1451 static void __init xen_write_cr3_init(unsigned long cr3)
1452 {
1453 BUG_ON(preemptible());
1454
1455 xen_mc_batch(); /* disables interrupts */
1456
1457 /* Update while interrupts are disabled, so its atomic with
1458 respect to ipis */
1459 this_cpu_write(xen_cr3, cr3);
1460
1461 __xen_write_cr3(true, cr3);
1462
1463 xen_mc_issue(!xen_is_cpu_lazy_mode()); /* interrupts restored */
1464 }
1465
xen_pgd_alloc(struct mm_struct * mm)1466 static int xen_pgd_alloc(struct mm_struct *mm)
1467 {
1468 pgd_t *pgd = mm->pgd;
1469 struct page *page = virt_to_page(pgd);
1470 pgd_t *user_pgd;
1471 int ret = -ENOMEM;
1472
1473 BUG_ON(PagePinned(virt_to_page(pgd)));
1474 BUG_ON(page->private != 0);
1475
1476 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1477 page->private = (unsigned long)user_pgd;
1478
1479 if (user_pgd != NULL) {
1480 #ifdef CONFIG_X86_VSYSCALL_EMULATION
1481 user_pgd[pgd_index(VSYSCALL_ADDR)] =
1482 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1483 #endif
1484 ret = 0;
1485 }
1486
1487 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1488
1489 return ret;
1490 }
1491
xen_pgd_free(struct mm_struct * mm,pgd_t * pgd)1492 static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1493 {
1494 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1495
1496 if (user_pgd)
1497 free_page((unsigned long)user_pgd);
1498 }
1499
1500 /*
1501 * Init-time set_pte while constructing initial pagetables, which
1502 * doesn't allow RO page table pages to be remapped RW.
1503 *
1504 * If there is no MFN for this PFN then this page is initially
1505 * ballooned out so clear the PTE (as in decrease_reservation() in
1506 * drivers/xen/balloon.c).
1507 *
1508 * Many of these PTE updates are done on unpinned and writable pages
1509 * and doing a hypercall for these is unnecessary and expensive. At
1510 * this point it is rarely possible to tell if a page is pinned, so
1511 * mostly write the PTE directly and rely on Xen trapping and
1512 * emulating any updates as necessary.
1513 */
xen_set_pte_init(pte_t * ptep,pte_t pte)1514 static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
1515 {
1516 if (unlikely(is_early_ioremap_ptep(ptep)))
1517 __xen_set_pte(ptep, pte);
1518 else
1519 native_set_pte(ptep, pte);
1520 }
1521
xen_make_pte_init(pteval_t pte)1522 __visible pte_t xen_make_pte_init(pteval_t pte)
1523 {
1524 unsigned long pfn;
1525
1526 /*
1527 * Pages belonging to the initial p2m list mapped outside the default
1528 * address range must be mapped read-only. This region contains the
1529 * page tables for mapping the p2m list, too, and page tables MUST be
1530 * mapped read-only.
1531 */
1532 pfn = (pte & PTE_PFN_MASK) >> PAGE_SHIFT;
1533 if (xen_start_info->mfn_list < __START_KERNEL_map &&
1534 pfn >= xen_start_info->first_p2m_pfn &&
1535 pfn < xen_start_info->first_p2m_pfn + xen_start_info->nr_p2m_frames)
1536 pte &= ~_PAGE_RW;
1537
1538 pte = pte_pfn_to_mfn(pte);
1539 return native_make_pte(pte);
1540 }
1541 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_init);
1542
1543 /* Early in boot, while setting up the initial pagetable, assume
1544 everything is pinned. */
xen_alloc_pte_init(struct mm_struct * mm,unsigned long pfn)1545 static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1546 {
1547 #ifdef CONFIG_FLATMEM
1548 BUG_ON(mem_map); /* should only be used early */
1549 #endif
1550 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1551 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1552 }
1553
1554 /* Used for pmd and pud */
xen_alloc_pmd_init(struct mm_struct * mm,unsigned long pfn)1555 static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
1556 {
1557 #ifdef CONFIG_FLATMEM
1558 BUG_ON(mem_map); /* should only be used early */
1559 #endif
1560 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1561 }
1562
1563 /* Early release_pte assumes that all pts are pinned, since there's
1564 only init_mm and anything attached to that is pinned. */
xen_release_pte_init(unsigned long pfn)1565 static void __init xen_release_pte_init(unsigned long pfn)
1566 {
1567 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1568 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1569 }
1570
xen_release_pmd_init(unsigned long pfn)1571 static void __init xen_release_pmd_init(unsigned long pfn)
1572 {
1573 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1574 }
1575
__pin_pagetable_pfn(unsigned cmd,unsigned long pfn)1576 static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1577 {
1578 struct multicall_space mcs;
1579 struct mmuext_op *op;
1580
1581 mcs = __xen_mc_entry(sizeof(*op));
1582 op = mcs.args;
1583 op->cmd = cmd;
1584 op->arg1.mfn = pfn_to_mfn(pfn);
1585
1586 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
1587 }
1588
__set_pfn_prot(unsigned long pfn,pgprot_t prot)1589 static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot)
1590 {
1591 struct multicall_space mcs;
1592 unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT);
1593
1594 mcs = __xen_mc_entry(0);
1595 MULTI_update_va_mapping(mcs.mc, (unsigned long)addr,
1596 pfn_pte(pfn, prot), 0);
1597 }
1598
1599 /* This needs to make sure the new pte page is pinned iff its being
1600 attached to a pinned pagetable. */
xen_alloc_ptpage(struct mm_struct * mm,unsigned long pfn,unsigned level)1601 static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn,
1602 unsigned level)
1603 {
1604 bool pinned = xen_page_pinned(mm->pgd);
1605
1606 trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
1607
1608 if (pinned) {
1609 struct page *page = pfn_to_page(pfn);
1610
1611 pinned = false;
1612 if (static_branch_likely(&xen_struct_pages_ready)) {
1613 pinned = PagePinned(page);
1614 SetPagePinned(page);
1615 }
1616
1617 xen_mc_batch();
1618
1619 __set_pfn_prot(pfn, PAGE_KERNEL_RO);
1620
1621 if (level == PT_PTE && IS_ENABLED(CONFIG_SPLIT_PTE_PTLOCKS) &&
1622 !pinned)
1623 __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1624
1625 xen_mc_issue(!is_lazy_mmu_mode_active());
1626 }
1627 }
1628
xen_alloc_pte(struct mm_struct * mm,unsigned long pfn)1629 static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1630 {
1631 xen_alloc_ptpage(mm, pfn, PT_PTE);
1632 }
1633
xen_alloc_pmd(struct mm_struct * mm,unsigned long pfn)1634 static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1635 {
1636 xen_alloc_ptpage(mm, pfn, PT_PMD);
1637 }
1638
1639 /* This should never happen until we're OK to use struct page */
xen_release_ptpage(unsigned long pfn,unsigned level)1640 static inline void xen_release_ptpage(unsigned long pfn, unsigned level)
1641 {
1642 struct page *page = pfn_to_page(pfn);
1643 bool pinned = PagePinned(page);
1644
1645 trace_xen_mmu_release_ptpage(pfn, level, pinned);
1646
1647 if (pinned) {
1648 xen_mc_batch();
1649
1650 if (level == PT_PTE && IS_ENABLED(CONFIG_SPLIT_PTE_PTLOCKS))
1651 __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1652
1653 __set_pfn_prot(pfn, PAGE_KERNEL);
1654
1655 xen_mc_issue(!is_lazy_mmu_mode_active());
1656
1657 ClearPagePinned(page);
1658 }
1659 }
1660
xen_release_pte(unsigned long pfn)1661 static void xen_release_pte(unsigned long pfn)
1662 {
1663 xen_release_ptpage(pfn, PT_PTE);
1664 }
1665
xen_release_pmd(unsigned long pfn)1666 static void xen_release_pmd(unsigned long pfn)
1667 {
1668 xen_release_ptpage(pfn, PT_PMD);
1669 }
1670
xen_alloc_pud(struct mm_struct * mm,unsigned long pfn)1671 static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1672 {
1673 xen_alloc_ptpage(mm, pfn, PT_PUD);
1674 }
1675
xen_release_pud(unsigned long pfn)1676 static void xen_release_pud(unsigned long pfn)
1677 {
1678 xen_release_ptpage(pfn, PT_PUD);
1679 }
1680
1681 /*
1682 * Like __va(), but returns address in the kernel mapping (which is
1683 * all we have until the physical memory mapping has been set up.
1684 */
__ka(phys_addr_t paddr)1685 static void * __init __ka(phys_addr_t paddr)
1686 {
1687 return (void *)(paddr + __START_KERNEL_map);
1688 }
1689
1690 /* Convert a machine address to physical address */
m2p(phys_addr_t maddr)1691 static unsigned long __init m2p(phys_addr_t maddr)
1692 {
1693 phys_addr_t paddr;
1694
1695 maddr &= XEN_PTE_MFN_MASK;
1696 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1697
1698 return paddr;
1699 }
1700
1701 /* Convert a machine address to kernel virtual */
m2v(phys_addr_t maddr)1702 static void * __init m2v(phys_addr_t maddr)
1703 {
1704 return __ka(m2p(maddr));
1705 }
1706
1707 /* Set the page permissions on an identity-mapped pages */
set_page_prot_flags(void * addr,pgprot_t prot,unsigned long flags)1708 static void __init set_page_prot_flags(void *addr, pgprot_t prot,
1709 unsigned long flags)
1710 {
1711 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1712 pte_t pte = pfn_pte(pfn, prot);
1713
1714 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags))
1715 BUG();
1716 }
set_page_prot(void * addr,pgprot_t prot)1717 static void __init set_page_prot(void *addr, pgprot_t prot)
1718 {
1719 return set_page_prot_flags(addr, prot, UVMF_NONE);
1720 }
1721
xen_setup_machphys_mapping(void)1722 void __init xen_setup_machphys_mapping(void)
1723 {
1724 struct xen_machphys_mapping mapping;
1725
1726 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
1727 machine_to_phys_mapping = (unsigned long *)mapping.v_start;
1728 machine_to_phys_nr = mapping.max_mfn + 1;
1729 } else {
1730 machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
1731 }
1732 }
1733
convert_pfn_mfn(void * v)1734 static void __init convert_pfn_mfn(void *v)
1735 {
1736 pte_t *pte = v;
1737 int i;
1738
1739 /* All levels are converted the same way, so just treat them
1740 as ptes. */
1741 for (i = 0; i < PTRS_PER_PTE; i++)
1742 pte[i] = xen_make_pte(pte[i].pte);
1743 }
check_pt_base(unsigned long * pt_base,unsigned long * pt_end,unsigned long addr)1744 static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end,
1745 unsigned long addr)
1746 {
1747 if (*pt_base == PFN_DOWN(__pa(addr))) {
1748 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1749 clear_page((void *)addr);
1750 (*pt_base)++;
1751 }
1752 if (*pt_end == PFN_DOWN(__pa(addr))) {
1753 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1754 clear_page((void *)addr);
1755 (*pt_end)--;
1756 }
1757 }
1758 /*
1759 * Set up the initial kernel pagetable.
1760 *
1761 * We can construct this by grafting the Xen provided pagetable into
1762 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1763 * level2_ident_pgt, and level2_kernel_pgt. This means that only the
1764 * kernel has a physical mapping to start with - but that's enough to
1765 * get __va working. We need to fill in the rest of the physical
1766 * mapping once some sort of allocator has been set up.
1767 */
xen_setup_kernel_pagetable(pgd_t * pgd,unsigned long max_pfn)1768 void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
1769 {
1770 pud_t *l3;
1771 pmd_t *l2;
1772 unsigned long addr[3];
1773 unsigned long pt_base, pt_end;
1774 unsigned i;
1775
1776 /* max_pfn_mapped is the last pfn mapped in the initial memory
1777 * mappings. Considering that on Xen after the kernel mappings we
1778 * have the mappings of some pages that don't exist in pfn space, we
1779 * set max_pfn_mapped to the last real pfn mapped. */
1780 if (xen_start_info->mfn_list < __START_KERNEL_map)
1781 max_pfn_mapped = xen_start_info->first_p2m_pfn;
1782 else
1783 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
1784
1785 pt_base = PFN_DOWN(__pa(xen_start_info->pt_base));
1786 pt_end = pt_base + xen_start_info->nr_pt_frames;
1787
1788 /* Zap identity mapping */
1789 init_top_pgt[0] = __pgd(0);
1790
1791 init_top_pgt[pgd_index(__PAGE_OFFSET_BASE_L4)].pgd =
1792 __pa_symbol(level3_ident_pgt) + _KERNPG_TABLE_NOENC;
1793 init_top_pgt[pgd_index(__START_KERNEL_map)].pgd =
1794 __pa_symbol(level3_kernel_pgt) + _PAGE_TABLE_NOENC;
1795 level3_ident_pgt[0].pud = __pa_symbol(level2_ident_pgt) + _KERNPG_TABLE_NOENC;
1796
1797 /* Pre-constructed entries are in pfn, so convert to mfn */
1798 /* L4[273] -> level3_ident_pgt */
1799 /* L4[511] -> level3_kernel_pgt */
1800 convert_pfn_mfn(init_top_pgt);
1801
1802 /* L3_i[0] -> level2_ident_pgt */
1803 convert_pfn_mfn(level3_ident_pgt);
1804 /* L3_k[510] -> level2_kernel_pgt */
1805 /* L3_k[511] -> level2_fixmap_pgt */
1806 convert_pfn_mfn(level3_kernel_pgt);
1807
1808 /* L3_k[511][508-FIXMAP_PMD_NUM ... 507] -> level1_fixmap_pgt */
1809 convert_pfn_mfn(level2_fixmap_pgt);
1810
1811 /* We get [511][511] and have Xen's version of level2_kernel_pgt */
1812 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1813 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1814
1815 addr[0] = (unsigned long)pgd;
1816 addr[1] = (unsigned long)l3;
1817 addr[2] = (unsigned long)l2;
1818 /* Graft it onto L4[273][0]. Note that we creating an aliasing problem:
1819 * Both L4[273][0] and L4[511][510] have entries that point to the same
1820 * L2 (PMD) tables. Meaning that if you modify it in __va space
1821 * it will be also modified in the __ka space! (But if you just
1822 * modify the PMD table to point to other PTE's or none, then you
1823 * are OK - which is what cleanup_highmap does) */
1824 copy_page(level2_ident_pgt, l2);
1825 /* Graft it onto L4[511][510] */
1826 copy_page(level2_kernel_pgt, l2);
1827
1828 /*
1829 * Zap execute permission from the ident map. Due to the sharing of
1830 * L1 entries we need to do this in the L2.
1831 */
1832 if (__supported_pte_mask & _PAGE_NX) {
1833 for (i = 0; i < PTRS_PER_PMD; ++i) {
1834 if (pmd_none(level2_ident_pgt[i]))
1835 continue;
1836 level2_ident_pgt[i] = pmd_set_flags(level2_ident_pgt[i], _PAGE_NX);
1837 }
1838 }
1839
1840 /* Copy the initial P->M table mappings if necessary. */
1841 i = pgd_index(xen_start_info->mfn_list);
1842 if (i && i < pgd_index(__START_KERNEL_map))
1843 init_top_pgt[i] = ((pgd_t *)xen_start_info->pt_base)[i];
1844
1845 /* Make pagetable pieces RO */
1846 set_page_prot(init_top_pgt, PAGE_KERNEL_RO);
1847 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1848 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1849 set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO);
1850 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1851 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1852
1853 for (i = 0; i < FIXMAP_PMD_NUM; i++) {
1854 set_page_prot(level1_fixmap_pgt + i * PTRS_PER_PTE,
1855 PAGE_KERNEL_RO);
1856 }
1857
1858 /* Pin down new L4 */
1859 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1860 PFN_DOWN(__pa_symbol(init_top_pgt)));
1861
1862 /* Unpin Xen-provided one */
1863 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1864
1865 #ifdef CONFIG_X86_VSYSCALL_EMULATION
1866 /* Pin user vsyscall L3 */
1867 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1868 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
1869 PFN_DOWN(__pa_symbol(level3_user_vsyscall)));
1870 #endif
1871
1872 /*
1873 * At this stage there can be no user pgd, and no page structure to
1874 * attach it to, so make sure we just set kernel pgd.
1875 */
1876 xen_mc_batch();
1877 __xen_write_cr3(true, __pa(init_top_pgt));
1878 xen_mc_issue(!xen_is_cpu_lazy_mode());
1879
1880 /* We can't that easily rip out L3 and L2, as the Xen pagetables are
1881 * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ... for
1882 * the initial domain. For guests using the toolstack, they are in:
1883 * [L4], [L3], [L2], [L1], [L1], order .. So for dom0 we can only
1884 * rip out the [L4] (pgd), but for guests we shave off three pages.
1885 */
1886 for (i = 0; i < ARRAY_SIZE(addr); i++)
1887 check_pt_base(&pt_base, &pt_end, addr[i]);
1888
1889 /* Our (by three pages) smaller Xen pagetable that we are using */
1890 xen_pt_base = PFN_PHYS(pt_base);
1891 xen_pt_size = (pt_end - pt_base) * PAGE_SIZE;
1892 memblock_reserve(xen_pt_base, xen_pt_size);
1893
1894 /* Revector the xen_start_info */
1895 xen_start_info = (struct start_info *)__va(__pa(xen_start_info));
1896 }
1897
1898 /*
1899 * Read a value from a physical address.
1900 */
xen_read_phys_ulong(phys_addr_t addr)1901 static unsigned long __init xen_read_phys_ulong(phys_addr_t addr)
1902 {
1903 unsigned long *vaddr;
1904 unsigned long val;
1905
1906 vaddr = early_memremap_ro(addr, sizeof(val));
1907 val = *vaddr;
1908 early_memunmap(vaddr, sizeof(val));
1909 return val;
1910 }
1911
1912 /*
1913 * Translate a virtual address to a physical one without relying on mapped
1914 * page tables. Don't rely on big pages being aligned in (guest) physical
1915 * space!
1916 */
xen_early_virt_to_phys(unsigned long vaddr)1917 static phys_addr_t __init xen_early_virt_to_phys(unsigned long vaddr)
1918 {
1919 phys_addr_t pa;
1920 pgd_t pgd;
1921 pud_t pud;
1922 pmd_t pmd;
1923 pte_t pte;
1924
1925 pa = read_cr3_pa();
1926 pgd = native_make_pgd(xen_read_phys_ulong(pa + pgd_index(vaddr) *
1927 sizeof(pgd)));
1928 if (!pgd_present(pgd))
1929 return 0;
1930
1931 pa = pgd_val(pgd) & PTE_PFN_MASK;
1932 pud = native_make_pud(xen_read_phys_ulong(pa + pud_index(vaddr) *
1933 sizeof(pud)));
1934 if (!pud_present(pud))
1935 return 0;
1936 pa = pud_val(pud) & PTE_PFN_MASK;
1937 if (pud_leaf(pud))
1938 return pa + (vaddr & ~PUD_MASK);
1939
1940 pmd = native_make_pmd(xen_read_phys_ulong(pa + pmd_index(vaddr) *
1941 sizeof(pmd)));
1942 if (!pmd_present(pmd))
1943 return 0;
1944 pa = pmd_val(pmd) & PTE_PFN_MASK;
1945 if (pmd_leaf(pmd))
1946 return pa + (vaddr & ~PMD_MASK);
1947
1948 pte = native_make_pte(xen_read_phys_ulong(pa + pte_index(vaddr) *
1949 sizeof(pte)));
1950 if (!pte_present(pte))
1951 return 0;
1952 pa = pte_pfn(pte) << PAGE_SHIFT;
1953
1954 return pa | (vaddr & ~PAGE_MASK);
1955 }
1956
1957 /*
1958 * Find a new area for the hypervisor supplied p2m list and relocate the p2m to
1959 * this area.
1960 */
xen_relocate_p2m(void)1961 void __init xen_relocate_p2m(void)
1962 {
1963 phys_addr_t size, new_area, pt_phys, pmd_phys, pud_phys;
1964 unsigned long p2m_pfn, p2m_pfn_end, n_frames, pfn, pfn_end;
1965 int n_pte, n_pt, n_pmd, n_pud, idx_pte, idx_pt, idx_pmd, idx_pud;
1966 pte_t *pt;
1967 pmd_t *pmd;
1968 pud_t *pud;
1969 pgd_t *pgd;
1970 unsigned long *new_p2m;
1971
1972 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
1973 n_pte = roundup(size, PAGE_SIZE) >> PAGE_SHIFT;
1974 n_pt = roundup(size, PMD_SIZE) >> PMD_SHIFT;
1975 n_pmd = roundup(size, PUD_SIZE) >> PUD_SHIFT;
1976 n_pud = roundup(size, P4D_SIZE) >> P4D_SHIFT;
1977 n_frames = n_pte + n_pt + n_pmd + n_pud;
1978
1979 new_area = xen_find_free_area(PFN_PHYS(n_frames));
1980 if (!new_area) {
1981 xen_raw_console_write("Can't find new memory area for p2m needed due to E820 map conflict\n");
1982 BUG();
1983 }
1984
1985 /*
1986 * Setup the page tables for addressing the new p2m list.
1987 * We have asked the hypervisor to map the p2m list at the user address
1988 * PUD_SIZE. It may have done so, or it may have used a kernel space
1989 * address depending on the Xen version.
1990 * To avoid any possible virtual address collision, just use
1991 * 2 * PUD_SIZE for the new area.
1992 */
1993 pud_phys = new_area;
1994 pmd_phys = pud_phys + PFN_PHYS(n_pud);
1995 pt_phys = pmd_phys + PFN_PHYS(n_pmd);
1996 p2m_pfn = PFN_DOWN(pt_phys) + n_pt;
1997
1998 pgd = __va(read_cr3_pa());
1999 new_p2m = (unsigned long *)(2 * PGDIR_SIZE);
2000 for (idx_pud = 0; idx_pud < n_pud; idx_pud++) {
2001 pud = early_memremap(pud_phys, PAGE_SIZE);
2002 clear_page(pud);
2003 for (idx_pmd = 0; idx_pmd < min(n_pmd, PTRS_PER_PUD);
2004 idx_pmd++) {
2005 pmd = early_memremap(pmd_phys, PAGE_SIZE);
2006 clear_page(pmd);
2007 for (idx_pt = 0; idx_pt < min(n_pt, PTRS_PER_PMD);
2008 idx_pt++) {
2009 pt = early_memremap(pt_phys, PAGE_SIZE);
2010 clear_page(pt);
2011 for (idx_pte = 0;
2012 idx_pte < min(n_pte, PTRS_PER_PTE);
2013 idx_pte++) {
2014 pt[idx_pte] = pfn_pte(p2m_pfn,
2015 PAGE_KERNEL);
2016 p2m_pfn++;
2017 }
2018 n_pte -= PTRS_PER_PTE;
2019 early_memunmap(pt, PAGE_SIZE);
2020 make_lowmem_page_readonly(__va(pt_phys));
2021 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE,
2022 PFN_DOWN(pt_phys));
2023 pmd[idx_pt] = __pmd(_PAGE_TABLE | pt_phys);
2024 pt_phys += PAGE_SIZE;
2025 }
2026 n_pt -= PTRS_PER_PMD;
2027 early_memunmap(pmd, PAGE_SIZE);
2028 make_lowmem_page_readonly(__va(pmd_phys));
2029 pin_pagetable_pfn(MMUEXT_PIN_L2_TABLE,
2030 PFN_DOWN(pmd_phys));
2031 pud[idx_pmd] = __pud(_PAGE_TABLE | pmd_phys);
2032 pmd_phys += PAGE_SIZE;
2033 }
2034 n_pmd -= PTRS_PER_PUD;
2035 early_memunmap(pud, PAGE_SIZE);
2036 make_lowmem_page_readonly(__va(pud_phys));
2037 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(pud_phys));
2038 set_pgd(pgd + 2 + idx_pud, __pgd(_PAGE_TABLE | pud_phys));
2039 pud_phys += PAGE_SIZE;
2040 }
2041
2042 /* Now copy the old p2m info to the new area. */
2043 memcpy(new_p2m, xen_p2m_addr, size);
2044 xen_p2m_addr = new_p2m;
2045
2046 /* Release the old p2m list and set new list info. */
2047 p2m_pfn = PFN_DOWN(xen_early_virt_to_phys(xen_start_info->mfn_list));
2048 BUG_ON(!p2m_pfn);
2049 p2m_pfn_end = p2m_pfn + PFN_DOWN(size);
2050
2051 if (xen_start_info->mfn_list < __START_KERNEL_map) {
2052 pfn = xen_start_info->first_p2m_pfn;
2053 pfn_end = xen_start_info->first_p2m_pfn +
2054 xen_start_info->nr_p2m_frames;
2055 set_pgd(pgd + 1, __pgd(0));
2056 } else {
2057 pfn = p2m_pfn;
2058 pfn_end = p2m_pfn_end;
2059 }
2060
2061 memblock_phys_free(PFN_PHYS(pfn), PAGE_SIZE * (pfn_end - pfn));
2062 while (pfn < pfn_end) {
2063 if (pfn == p2m_pfn) {
2064 pfn = p2m_pfn_end;
2065 continue;
2066 }
2067 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
2068 pfn++;
2069 }
2070
2071 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
2072 xen_start_info->first_p2m_pfn = PFN_DOWN(new_area);
2073 xen_start_info->nr_p2m_frames = n_frames;
2074 }
2075
xen_reserve_special_pages(void)2076 void __init xen_reserve_special_pages(void)
2077 {
2078 phys_addr_t paddr;
2079
2080 memblock_reserve(__pa(xen_start_info), PAGE_SIZE);
2081 if (xen_start_info->store_mfn) {
2082 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->store_mfn));
2083 memblock_reserve(paddr, PAGE_SIZE);
2084 }
2085 if (!xen_initial_domain()) {
2086 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->console.domU.mfn));
2087 memblock_reserve(paddr, PAGE_SIZE);
2088 }
2089 }
2090
xen_pt_check_e820(void)2091 void __init xen_pt_check_e820(void)
2092 {
2093 xen_chk_is_e820_usable(xen_pt_base, xen_pt_size, "page table");
2094 }
2095
2096 static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
2097
xen_set_fixmap(unsigned idx,phys_addr_t phys,pgprot_t prot)2098 static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
2099 {
2100 pte_t pte;
2101 unsigned long vaddr;
2102
2103 phys >>= PAGE_SHIFT;
2104
2105 switch (idx) {
2106 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
2107 #ifdef CONFIG_X86_VSYSCALL_EMULATION
2108 case VSYSCALL_PAGE:
2109 #endif
2110 /* All local page mappings */
2111 pte = pfn_pte(phys, prot);
2112 break;
2113
2114 #ifdef CONFIG_X86_LOCAL_APIC
2115 case FIX_APIC_BASE: /* maps dummy local APIC */
2116 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2117 break;
2118 #endif
2119
2120 #ifdef CONFIG_X86_IO_APIC
2121 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
2122 /*
2123 * We just don't map the IO APIC - all access is via
2124 * hypercalls. Keep the address in the pte for reference.
2125 */
2126 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2127 break;
2128 #endif
2129
2130 case FIX_PARAVIRT_BOOTMAP:
2131 /* This is an MFN, but it isn't an IO mapping from the
2132 IO domain */
2133 pte = mfn_pte(phys, prot);
2134 break;
2135
2136 default:
2137 /* By default, set_fixmap is used for hardware mappings */
2138 pte = mfn_pte(phys, prot);
2139 break;
2140 }
2141
2142 vaddr = __fix_to_virt(idx);
2143 if (HYPERVISOR_update_va_mapping(vaddr, pte, UVMF_INVLPG))
2144 BUG();
2145
2146 #ifdef CONFIG_X86_VSYSCALL_EMULATION
2147 /* Replicate changes to map the vsyscall page into the user
2148 pagetable vsyscall mapping. */
2149 if (idx == VSYSCALL_PAGE)
2150 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
2151 #endif
2152 }
2153
xen_flush_lazy_mmu(void)2154 static void xen_flush_lazy_mmu(void)
2155 {
2156 preempt_disable();
2157 xen_mc_flush();
2158 preempt_enable();
2159 }
2160
xen_post_allocator_init(void)2161 static void __init xen_post_allocator_init(void)
2162 {
2163 pv_ops.mmu.set_pte = xen_set_pte;
2164 pv_ops.mmu.set_pmd = xen_set_pmd;
2165 pv_ops.mmu.set_pud = xen_set_pud;
2166 pv_ops.mmu.set_p4d = xen_set_p4d;
2167
2168 /* This will work as long as patching hasn't happened yet
2169 (which it hasn't) */
2170 pv_ops.mmu.alloc_pte = xen_alloc_pte;
2171 pv_ops.mmu.alloc_pmd = xen_alloc_pmd;
2172 pv_ops.mmu.release_pte = xen_release_pte;
2173 pv_ops.mmu.release_pmd = xen_release_pmd;
2174 pv_ops.mmu.alloc_pud = xen_alloc_pud;
2175 pv_ops.mmu.release_pud = xen_release_pud;
2176 pv_ops.mmu.make_pte = PV_CALLEE_SAVE(xen_make_pte);
2177
2178 pv_ops.mmu.write_cr3 = &xen_write_cr3;
2179 }
2180
xen_init_mmu_ops(void)2181 void __init xen_init_mmu_ops(void)
2182 {
2183 x86_init.paging.pagetable_init = xen_pagetable_init;
2184 x86_init.hyper.init_after_bootmem = xen_after_bootmem;
2185
2186 pv_ops.mmu.read_cr2 = __PV_IS_CALLEE_SAVE(xen_read_cr2);
2187 pv_ops.mmu.write_cr2 = xen_write_cr2;
2188 pv_ops.mmu.read_cr3 = xen_read_cr3;
2189 pv_ops.mmu.write_cr3 = xen_write_cr3_init;
2190 pv_ops.mmu.flush_tlb_user = xen_flush_tlb;
2191 pv_ops.mmu.flush_tlb_kernel = xen_flush_tlb;
2192 pv_ops.mmu.flush_tlb_one_user = xen_flush_tlb_one_user;
2193 pv_ops.mmu.flush_tlb_multi = xen_flush_tlb_multi;
2194 pv_ops.mmu.pgd_alloc = xen_pgd_alloc;
2195 pv_ops.mmu.pgd_free = xen_pgd_free;
2196 pv_ops.mmu.alloc_pte = xen_alloc_pte_init;
2197 pv_ops.mmu.release_pte = xen_release_pte_init;
2198 pv_ops.mmu.alloc_pmd = xen_alloc_pmd_init;
2199 pv_ops.mmu.release_pmd = xen_release_pmd_init;
2200 pv_ops.mmu.set_pte = xen_set_pte_init;
2201 pv_ops.mmu.set_pmd = xen_set_pmd_hyper;
2202 pv_ops.mmu.ptep_modify_prot_start = xen_ptep_modify_prot_start;
2203 pv_ops.mmu.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
2204 pv_ops.mmu.pte_val = PV_CALLEE_SAVE(xen_pte_val);
2205 pv_ops.mmu.pgd_val = PV_CALLEE_SAVE(xen_pgd_val);
2206 pv_ops.mmu.make_pte = PV_CALLEE_SAVE(xen_make_pte_init);
2207 pv_ops.mmu.make_pgd = PV_CALLEE_SAVE(xen_make_pgd);
2208 pv_ops.mmu.set_pud = xen_set_pud_hyper;
2209 pv_ops.mmu.make_pmd = PV_CALLEE_SAVE(xen_make_pmd);
2210 pv_ops.mmu.pmd_val = PV_CALLEE_SAVE(xen_pmd_val);
2211 pv_ops.mmu.pud_val = PV_CALLEE_SAVE(xen_pud_val);
2212 pv_ops.mmu.make_pud = PV_CALLEE_SAVE(xen_make_pud);
2213 pv_ops.mmu.set_p4d = xen_set_p4d_hyper;
2214 pv_ops.mmu.alloc_pud = xen_alloc_pmd_init;
2215 pv_ops.mmu.release_pud = xen_release_pmd_init;
2216 pv_ops.mmu.p4d_val = PV_CALLEE_SAVE(xen_p4d_val);
2217 pv_ops.mmu.make_p4d = PV_CALLEE_SAVE(xen_make_p4d);
2218 pv_ops.mmu.enter_mmap = xen_enter_mmap;
2219 pv_ops.mmu.exit_mmap = xen_exit_mmap;
2220 pv_ops.mmu.lazy_mode_flush = xen_flush_lazy_mmu;
2221 pv_ops.mmu.set_fixmap = xen_set_fixmap;
2222
2223 memset(dummy_mapping, 0xff, PAGE_SIZE);
2224 }
2225
2226 #define VOID_PTE (mfn_pte(0, __pgprot(0)))
xen_zap_pfn_range(unsigned long vaddr,unsigned int order,unsigned long * in_frames,unsigned long * out_frames)2227 static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
2228 unsigned long *in_frames,
2229 unsigned long *out_frames)
2230 {
2231 int i;
2232 struct multicall_space mcs;
2233
2234 xen_mc_batch();
2235 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
2236 mcs = __xen_mc_entry(0);
2237
2238 if (in_frames)
2239 in_frames[i] = virt_to_mfn((void *)vaddr);
2240
2241 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
2242 __set_phys_to_machine(virt_to_pfn((void *)vaddr), INVALID_P2M_ENTRY);
2243
2244 if (out_frames)
2245 out_frames[i] = virt_to_pfn((void *)vaddr);
2246 }
2247 xen_mc_issue(true);
2248 }
2249
2250 /*
2251 * Update the pfn-to-mfn mappings for a virtual address range, either to
2252 * point to an array of mfns, or contiguously from a single starting
2253 * mfn.
2254 */
xen_remap_exchanged_ptes(unsigned long vaddr,int order,unsigned long * mfns,unsigned long first_mfn)2255 static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
2256 unsigned long *mfns,
2257 unsigned long first_mfn)
2258 {
2259 unsigned i, limit;
2260 unsigned long mfn;
2261
2262 xen_mc_batch();
2263
2264 limit = 1u << order;
2265 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
2266 struct multicall_space mcs;
2267 unsigned flags;
2268
2269 mcs = __xen_mc_entry(0);
2270 if (mfns)
2271 mfn = mfns[i];
2272 else
2273 mfn = first_mfn + i;
2274
2275 if (i < (limit - 1))
2276 flags = 0;
2277 else {
2278 if (order == 0)
2279 flags = UVMF_INVLPG | UVMF_ALL;
2280 else
2281 flags = UVMF_TLB_FLUSH | UVMF_ALL;
2282 }
2283
2284 MULTI_update_va_mapping(mcs.mc, vaddr,
2285 mfn_pte(mfn, PAGE_KERNEL), flags);
2286
2287 set_phys_to_machine(virt_to_pfn((void *)vaddr), mfn);
2288 }
2289
2290 xen_mc_issue(true);
2291 }
2292
2293 /*
2294 * Perform the hypercall to exchange a region of our pages to point to memory
2295 * with the required contiguous alignment. Takes as input the mfns to trade
2296 * in (mfns_in) and the pfns where the new pages are to appear (fns_inout),
2297 * and populates mfns as output (fns_inout).
2298 *
2299 * Returns a success code indicating whether the hypervisor was able to
2300 * satisfy the request or not.
2301 */
xen_exchange_memory(unsigned long extents_in,unsigned int order_in,unsigned long * mfns_in,unsigned long extents_out,unsigned int order_out,unsigned long * fns_inout,unsigned int address_bits)2302 static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
2303 unsigned long *mfns_in,
2304 unsigned long extents_out,
2305 unsigned int order_out,
2306 unsigned long *fns_inout,
2307 unsigned int address_bits)
2308 {
2309 long rc;
2310 int success;
2311
2312 struct xen_memory_exchange exchange = {
2313 .in = {
2314 .nr_extents = extents_in,
2315 .extent_order = order_in,
2316 .extent_start = mfns_in,
2317 .domid = DOMID_SELF
2318 },
2319 .out = {
2320 .nr_extents = extents_out,
2321 .extent_order = order_out,
2322 .extent_start = fns_inout,
2323 .address_bits = address_bits,
2324 .domid = DOMID_SELF
2325 }
2326 };
2327
2328 BUG_ON(extents_in << order_in != extents_out << order_out);
2329
2330 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
2331 success = (exchange.nr_exchanged == extents_in);
2332
2333 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
2334 BUG_ON(success && (rc != 0));
2335
2336 return success;
2337 }
2338
xen_create_contiguous_region(phys_addr_t pstart,unsigned int order,unsigned int address_bits,dma_addr_t * dma_handle)2339 int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order,
2340 unsigned int address_bits,
2341 dma_addr_t *dma_handle)
2342 {
2343 unsigned long *in_frames, out_frame;
2344 unsigned long flags;
2345 int success;
2346 unsigned long vstart = (unsigned long)phys_to_virt(pstart);
2347
2348 if (unlikely(order > discontig_frames_order)) {
2349 if (!discontig_frames_dyn)
2350 return -ENOMEM;
2351
2352 if (alloc_discontig_frames(order))
2353 return -ENOMEM;
2354 }
2355
2356 memset((void *) vstart, 0, PAGE_SIZE << order);
2357
2358 spin_lock_irqsave(&xen_reservation_lock, flags);
2359
2360 in_frames = discontig_frames;
2361
2362 /* 1. Zap current PTEs, remembering MFNs. */
2363 xen_zap_pfn_range(vstart, order, in_frames, NULL);
2364
2365 /* 2. Get a new contiguous memory extent. */
2366 out_frame = virt_to_pfn((void *)vstart);
2367 success = xen_exchange_memory(1UL << order, 0, in_frames,
2368 1, order, &out_frame,
2369 address_bits);
2370
2371 /* 3. Map the new extent in place of old pages. */
2372 if (success)
2373 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
2374 else
2375 xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
2376
2377 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2378
2379 *dma_handle = virt_to_machine(vstart).maddr;
2380 return success ? 0 : -ENOMEM;
2381 }
2382
xen_destroy_contiguous_region(phys_addr_t pstart,unsigned int order)2383 void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order)
2384 {
2385 unsigned long *out_frames, in_frame;
2386 unsigned long flags;
2387 int success;
2388 unsigned long vstart;
2389
2390 if (unlikely(order > discontig_frames_order))
2391 return;
2392
2393 vstart = (unsigned long)phys_to_virt(pstart);
2394 memset((void *) vstart, 0, PAGE_SIZE << order);
2395
2396 spin_lock_irqsave(&xen_reservation_lock, flags);
2397
2398 out_frames = discontig_frames;
2399
2400 /* 1. Find start MFN of contiguous extent. */
2401 in_frame = virt_to_mfn((void *)vstart);
2402
2403 /* 2. Zap current PTEs. */
2404 xen_zap_pfn_range(vstart, order, NULL, out_frames);
2405
2406 /* 3. Do the exchange for non-contiguous MFNs. */
2407 success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
2408 0, out_frames, 0);
2409
2410 /* 4. Map new pages in place of old pages. */
2411 if (success)
2412 xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
2413 else
2414 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
2415
2416 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2417 }
2418
xen_flush_tlb_all(void)2419 static noinline void xen_flush_tlb_all(void)
2420 {
2421 struct mmuext_op *op;
2422 struct multicall_space mcs;
2423
2424 preempt_disable();
2425
2426 mcs = xen_mc_entry(sizeof(*op));
2427
2428 op = mcs.args;
2429 op->cmd = MMUEXT_TLB_FLUSH_ALL;
2430 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
2431
2432 xen_mc_issue(!is_lazy_mmu_mode_active());
2433
2434 preempt_enable();
2435 }
2436
2437 #define REMAP_BATCH_SIZE 16
2438
2439 struct remap_data {
2440 xen_pfn_t *pfn;
2441 bool contiguous;
2442 bool no_translate;
2443 pgprot_t prot;
2444 struct mmu_update *mmu_update;
2445 };
2446
remap_area_pfn_pte_fn(pte_t * ptep,unsigned long addr,void * data)2447 static int remap_area_pfn_pte_fn(pte_t *ptep, unsigned long addr, void *data)
2448 {
2449 struct remap_data *rmd = data;
2450 pte_t pte = pte_mkspecial(mfn_pte(*rmd->pfn, rmd->prot));
2451
2452 /*
2453 * If we have a contiguous range, just update the pfn itself,
2454 * else update pointer to be "next pfn".
2455 */
2456 if (rmd->contiguous)
2457 (*rmd->pfn)++;
2458 else
2459 rmd->pfn++;
2460
2461 rmd->mmu_update->ptr = virt_to_machine(ptep).maddr;
2462 rmd->mmu_update->ptr |= rmd->no_translate ?
2463 MMU_PT_UPDATE_NO_TRANSLATE :
2464 MMU_NORMAL_PT_UPDATE;
2465 rmd->mmu_update->val = pte_val_ma(pte);
2466 rmd->mmu_update++;
2467
2468 return 0;
2469 }
2470
xen_remap_pfn(struct vm_area_struct * vma,unsigned long addr,xen_pfn_t * pfn,int nr,int * err_ptr,pgprot_t prot,unsigned int domid,bool no_translate)2471 int xen_remap_pfn(struct vm_area_struct *vma, unsigned long addr,
2472 xen_pfn_t *pfn, int nr, int *err_ptr, pgprot_t prot,
2473 unsigned int domid, bool no_translate)
2474 {
2475 int err = 0;
2476 struct remap_data rmd;
2477 struct mmu_update mmu_update[REMAP_BATCH_SIZE];
2478 unsigned long range;
2479 int mapped = 0;
2480
2481 BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_IO)) == (VM_PFNMAP | VM_IO)));
2482
2483 rmd.pfn = pfn;
2484 rmd.prot = prot;
2485 /*
2486 * We use the err_ptr to indicate if there we are doing a contiguous
2487 * mapping or a discontiguous mapping.
2488 */
2489 rmd.contiguous = !err_ptr;
2490 rmd.no_translate = no_translate;
2491
2492 while (nr) {
2493 int index = 0;
2494 int done = 0;
2495 int batch = min(REMAP_BATCH_SIZE, nr);
2496 int batch_left = batch;
2497
2498 range = (unsigned long)batch << PAGE_SHIFT;
2499
2500 rmd.mmu_update = mmu_update;
2501 err = apply_to_page_range(vma->vm_mm, addr, range,
2502 remap_area_pfn_pte_fn, &rmd);
2503 if (err)
2504 goto out;
2505
2506 /*
2507 * We record the error for each page that gives an error, but
2508 * continue mapping until the whole set is done
2509 */
2510 do {
2511 int i;
2512
2513 err = HYPERVISOR_mmu_update(&mmu_update[index],
2514 batch_left, &done, domid);
2515
2516 /*
2517 * @err_ptr may be the same buffer as @gfn, so
2518 * only clear it after each chunk of @gfn is
2519 * used.
2520 */
2521 if (err_ptr) {
2522 for (i = index; i < index + done; i++)
2523 err_ptr[i] = 0;
2524 }
2525 if (err < 0) {
2526 if (!err_ptr)
2527 goto out;
2528 err_ptr[i] = err;
2529 done++; /* Skip failed frame. */
2530 } else
2531 mapped += done;
2532 batch_left -= done;
2533 index += done;
2534 } while (batch_left);
2535
2536 nr -= batch;
2537 addr += range;
2538 if (err_ptr)
2539 err_ptr += batch;
2540 cond_resched();
2541 }
2542 out:
2543
2544 xen_flush_tlb_all();
2545
2546 return err < 0 ? err : mapped;
2547 }
2548 EXPORT_SYMBOL_GPL(xen_remap_pfn);
2549
2550 #ifdef CONFIG_VMCORE_INFO
paddr_vmcoreinfo_note(void)2551 phys_addr_t paddr_vmcoreinfo_note(void)
2552 {
2553 if (xen_pv_domain())
2554 return virt_to_machine(vmcoreinfo_note).maddr;
2555 else
2556 return __pa(vmcoreinfo_note);
2557 }
2558 #endif /* CONFIG_KEXEC_CORE */
2559