xref: /linux/arch/mips/Kconfig (revision 6a74422b9710e987c7d6b85a1ade7330b1e61626)
1# SPDX-License-Identifier: GPL-2.0
2config MIPS
3	bool
4	default y
5	select ARCH_32BIT_OFF_T if !64BIT
6	select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7	select ARCH_HAS_CPU_CACHE_ALIASING
8	select ARCH_HAS_CPU_FINALIZE_INIT
9	select ARCH_HAS_CURRENT_STACK_POINTER
10	select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
11	select ARCH_HAS_DMA_OPS if MACH_JAZZ
12	select ARCH_HAS_FORTIFY_SOURCE
13	select ARCH_HAS_KCOV
14	select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
15	select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
16	select ARCH_HAS_STRNCPY_FROM_USER
17	select ARCH_HAS_STRNLEN_USER
18	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
19	select ARCH_HAS_UBSAN
20	select ARCH_HAS_GCOV_PROFILE_ALL
21	select ARCH_KEEP_MEMBLOCK
22	select ARCH_USE_BUILTIN_BSWAP
23	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
24	select ARCH_USE_MEMTEST
25	select ARCH_USE_QUEUED_RWLOCKS
26	select ARCH_USE_QUEUED_SPINLOCKS
27	select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
28	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
29	select ARCH_WANT_IPC_PARSE_VERSION
30	select ARCH_WANT_LD_ORPHAN_WARN
31	select BUILDTIME_TABLE_SORT
32	select BUILTIN_DTB_ALL if BUILTIN_DTB
33	select CLONE_BACKWARDS
34	select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
35	select CPU_PM if CPU_IDLE || SUSPEND
36	select GENERIC_ATOMIC64 if !64BIT
37	select GENERIC_BUILTIN_DTB if BUILTIN_DTB
38	select GENERIC_CMOS_UPDATE
39	select GENERIC_CPU_AUTOPROBE
40	select GENERIC_GETTIMEOFDAY
41	select GENERIC_IRQ_PROBE
42	select GENERIC_IRQ_SHOW
43	select GENERIC_ISA_DMA if EISA
44	select GENERIC_LIB_ASHLDI3
45	select GENERIC_LIB_ASHRDI3
46	select GENERIC_LIB_CMPDI2
47	select GENERIC_LIB_LSHRDI3
48	select GENERIC_LIB_UCMPDI2
49	select GENERIC_PCI_IOMAP
50	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
51	select GENERIC_SMP_IDLE_THREAD
52	select GENERIC_IDLE_POLL_SETUP
53	select GENERIC_TIME_VSYSCALL
54	select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
55	select HAS_IOPORT if !NO_IOPORT_MAP || ISA
56	select HAVE_ARCH_COMPILER_H
57	select HAVE_ARCH_JUMP_LABEL
58	select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
59	select HAVE_ARCH_MMAP_RND_BITS if MMU
60	select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
61	select HAVE_ARCH_SECCOMP_FILTER
62	select HAVE_ARCH_TRACEHOOK
63	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
64	select HAVE_ASM_MODVERSIONS
65	select HAVE_CONTEXT_TRACKING_USER
66	select HAVE_TIF_NOHZ
67	select HAVE_C_RECORDMCOUNT
68	select HAVE_DEBUG_KMEMLEAK
69	select HAVE_DEBUG_STACKOVERFLOW
70	select HAVE_DMA_CONTIGUOUS
71	select HAVE_DYNAMIC_FTRACE
72	select HAVE_EBPF_JIT if !CPU_MICROMIPS
73	select HAVE_EXIT_THREAD
74	select HAVE_GUP_FAST
75	select HAVE_FUNCTION_GRAPH_TRACER
76	select HAVE_FUNCTION_TRACER
77	select HAVE_GCC_PLUGINS
78	select HAVE_GENERIC_VDSO
79	select HAVE_IOREMAP_PROT
80	select HAVE_IRQ_EXIT_ON_IRQ_STACK
81	select HAVE_IRQ_TIME_ACCOUNTING
82	select HAVE_KPROBES
83	select HAVE_KRETPROBES
84	select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
85	select HAVE_MOD_ARCH_SPECIFIC
86	select HAVE_NMI
87	select HAVE_PAGE_SIZE_4KB if !CPU_LOONGSON2EF && !CPU_LOONGSON64
88	select HAVE_PAGE_SIZE_16KB if !CPU_R3000
89	select HAVE_PAGE_SIZE_64KB if !CPU_R3000
90	select HAVE_PERF_EVENTS
91	select HAVE_PERF_REGS
92	select HAVE_PERF_USER_STACK_DUMP
93	select HAVE_REGS_AND_STACK_ACCESS_API
94	select HAVE_RSEQ
95	select HAVE_SPARSE_SYSCALL_NR
96	select HAVE_STACKPROTECTOR
97	select HAVE_SYSCALL_TRACEPOINTS
98	select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
99	select IRQ_FORCED_THREADING
100	select ISA if EISA
101	select LOCK_MM_AND_FIND_VMA
102	select MODULES_USE_ELF_REL if MODULES
103	select MODULES_USE_ELF_RELA if MODULES && 64BIT
104	select PERF_USE_VMALLOC
105	select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
106	select RTC_LIB
107	select SYSCTL_EXCEPTION_TRACE
108	select TRACE_IRQFLAGS_SUPPORT
109	select ARCH_HAS_ELFCORE_COMPAT
110	select HAVE_ARCH_KCSAN if 64BIT
111
112config MIPS_FIXUP_BIGPHYS_ADDR
113	bool
114
115config MIPS_GENERIC
116	bool
117
118config MACH_GENERIC_CORE
119	bool
120
121config MACH_INGENIC
122	bool
123	select SYS_SUPPORTS_32BIT_KERNEL
124	select SYS_SUPPORTS_LITTLE_ENDIAN
125	select SYS_SUPPORTS_ZBOOT
126	select DMA_NONCOHERENT
127	select IRQ_MIPS_CPU
128	select PINCTRL
129	select GPIOLIB
130	select COMMON_CLK
131	select GENERIC_IRQ_CHIP
132	select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
133	select USE_OF
134	select CPU_SUPPORTS_CPUFREQ
135	select MIPS_EXTERNAL_TIMER
136
137menu "Machine selection"
138
139choice
140	prompt "System type"
141	default MIPS_GENERIC_KERNEL
142
143config MIPS_GENERIC_KERNEL
144	bool "Generic board-agnostic MIPS kernel"
145	select MIPS_GENERIC
146	select BOOT_RAW
147	select BUILTIN_DTB
148	select CEVT_R4K
149	select CLKSRC_MIPS_GIC
150	select COMMON_CLK
151	select CPU_MIPSR2_IRQ_EI
152	select CPU_MIPSR2_IRQ_VI
153	select CSRC_R4K
154	select DMA_NONCOHERENT
155	select HAVE_PCI
156	select IRQ_MIPS_CPU
157	select MACH_GENERIC_CORE
158	select MIPS_AUTO_PFN_OFFSET
159	select MIPS_CPU_SCACHE
160	select MIPS_GIC
161	select MIPS_L1_CACHE_SHIFT_7
162	select NO_EXCEPT_FILL
163	select PCI_DRIVERS_GENERIC
164	select SMP_UP if SMP
165	select SWAP_IO_SPACE
166	select SYS_HAS_CPU_MIPS32_R1
167	select SYS_HAS_CPU_MIPS32_R2
168	select SYS_HAS_CPU_MIPS32_R5
169	select SYS_HAS_CPU_MIPS32_R6
170	select SYS_HAS_CPU_MIPS64_R1
171	select SYS_HAS_CPU_MIPS64_R2
172	select SYS_HAS_CPU_MIPS64_R5
173	select SYS_HAS_CPU_MIPS64_R6
174	select SYS_SUPPORTS_32BIT_KERNEL
175	select SYS_SUPPORTS_64BIT_KERNEL
176	select SYS_SUPPORTS_BIG_ENDIAN
177	select SYS_SUPPORTS_HIGHMEM
178	select SYS_SUPPORTS_LITTLE_ENDIAN
179	select SYS_SUPPORTS_MICROMIPS
180	select SYS_SUPPORTS_MIPS16
181	select SYS_SUPPORTS_MIPS_CPS
182	select SYS_SUPPORTS_MULTITHREADING
183	select SYS_SUPPORTS_RELOCATABLE
184	select SYS_SUPPORTS_SMARTMIPS
185	select SYS_SUPPORTS_ZBOOT
186	select UHI_BOOT
187	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
188	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
189	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
190	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
191	select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
192	select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
193	select USE_OF
194	help
195	  Select this to build a kernel which aims to support multiple boards,
196	  generally using a flattened device tree passed from the bootloader
197	  using the boot protocol defined in the UHI (Unified Hosting
198	  Interface) specification.
199
200config MIPS_ALCHEMY
201	bool "Alchemy processor based machines"
202	select PHYS_ADDR_T_64BIT
203	select CEVT_R4K
204	select CSRC_R4K
205	select IRQ_MIPS_CPU
206	select DMA_NONCOHERENT		# Au1000,1500,1100 aren't, rest is
207	select MIPS_FIXUP_BIGPHYS_ADDR if PCI
208	select SYS_HAS_CPU_MIPS32_R1
209	select SYS_SUPPORTS_32BIT_KERNEL
210	select SYS_SUPPORTS_APM_EMULATION
211	select GPIOLIB
212	select SYS_SUPPORTS_ZBOOT
213	select COMMON_CLK
214
215config ATH25
216	bool "Atheros AR231x/AR531x SoC support"
217	select CEVT_R4K
218	select CSRC_R4K
219	select DMA_NONCOHERENT
220	select IRQ_MIPS_CPU
221	select IRQ_DOMAIN
222	select SYS_HAS_CPU_MIPS32_R1
223	select SYS_SUPPORTS_BIG_ENDIAN
224	select SYS_SUPPORTS_32BIT_KERNEL
225	select SYS_HAS_EARLY_PRINTK
226	help
227	  Support for Atheros AR231x and Atheros AR531x based boards
228
229config ATH79
230	bool "Atheros AR71XX/AR724X/AR913X based boards"
231	select ARCH_HAS_RESET_CONTROLLER
232	select BOOT_RAW
233	select CEVT_R4K
234	select CSRC_R4K
235	select DMA_NONCOHERENT
236	select GPIOLIB
237	select PINCTRL
238	select COMMON_CLK
239	select IRQ_MIPS_CPU
240	select SYS_HAS_CPU_MIPS32_R2
241	select SYS_HAS_EARLY_PRINTK
242	select SYS_SUPPORTS_32BIT_KERNEL
243	select SYS_SUPPORTS_BIG_ENDIAN
244	select SYS_SUPPORTS_MIPS16
245	select SYS_SUPPORTS_ZBOOT_UART_PROM
246	select USE_OF
247	select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
248	help
249	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
250
251config BMIPS_GENERIC
252	bool "Broadcom Generic BMIPS kernel"
253	select ARCH_HAS_RESET_CONTROLLER
254	select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
255	select BOOT_RAW
256	select NO_EXCEPT_FILL
257	select USE_OF
258	select CEVT_R4K
259	select CSRC_R4K
260	select SYNC_R4K
261	select COMMON_CLK
262	select BCM6345_L1_IRQ
263	select BCM7038_L1_IRQ
264	select BCM7120_L2_IRQ
265	select BRCMSTB_L2_IRQ
266	select IRQ_MIPS_CPU
267	select DMA_NONCOHERENT
268	select SYS_SUPPORTS_32BIT_KERNEL
269	select SYS_SUPPORTS_LITTLE_ENDIAN
270	select SYS_SUPPORTS_BIG_ENDIAN
271	select SYS_SUPPORTS_HIGHMEM
272	select SYS_HAS_CPU_BMIPS32_3300
273	select SYS_HAS_CPU_BMIPS4350
274	select SYS_HAS_CPU_BMIPS4380
275	select SYS_HAS_CPU_BMIPS5000
276	select SWAP_IO_SPACE
277	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
278	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
279	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
280	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
281	select HARDIRQS_SW_RESEND
282	select HAVE_PCI
283	select PCI_DRIVERS_GENERIC
284	select FW_CFE
285	help
286	  Build a generic DT-based kernel image that boots on select
287	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
288	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
289	  must be set appropriately for your board.
290
291config BCM47XX
292	bool "Broadcom BCM47XX based boards"
293	select BOOT_RAW
294	select CEVT_R4K
295	select CSRC_R4K
296	select DMA_NONCOHERENT
297	select HAVE_PCI
298	select IRQ_MIPS_CPU
299	select SYS_HAS_CPU_MIPS32_R1
300	select NO_EXCEPT_FILL
301	select SYS_SUPPORTS_32BIT_KERNEL
302	select SYS_SUPPORTS_LITTLE_ENDIAN
303	select SYS_SUPPORTS_MIPS16
304	select SYS_SUPPORTS_ZBOOT
305	select SYS_HAS_EARLY_PRINTK
306	select USE_GENERIC_EARLY_PRINTK_8250
307	select GPIOLIB
308	select LEDS_GPIO_REGISTER
309	select BCM47XX_NVRAM
310	select BCM47XX_SPROM
311	select BCM47XX_SSB if !BCM47XX_BCMA
312	help
313	  Support for BCM47XX based boards
314
315config BCM63XX
316	bool "Broadcom BCM63XX based boards"
317	select BOOT_RAW
318	select CEVT_R4K
319	select CSRC_R4K
320	select SYNC_R4K
321	select DMA_NONCOHERENT
322	select IRQ_MIPS_CPU
323	select SYS_SUPPORTS_32BIT_KERNEL
324	select SYS_SUPPORTS_BIG_ENDIAN
325	select SYS_HAS_EARLY_PRINTK
326	select SYS_HAS_CPU_BMIPS32_3300
327	select SYS_HAS_CPU_BMIPS4350
328	select SYS_HAS_CPU_BMIPS4380
329	select SWAP_IO_SPACE
330	select GPIOLIB
331	select MIPS_L1_CACHE_SHIFT_4
332	select HAVE_LEGACY_CLK
333	help
334	  Support for BCM63XX based boards
335
336config MIPS_COBALT
337	bool "Cobalt Server"
338	select CEVT_R4K
339	select CSRC_R4K
340	select CEVT_GT641XX
341	select DMA_NONCOHERENT
342	select FORCE_PCI
343	select I8253
344	select I8259
345	select IRQ_MIPS_CPU
346	select IRQ_GT641XX
347	select PCI_GT64XXX_PCI0
348	select SYS_HAS_CPU_NEVADA
349	select SYS_HAS_EARLY_PRINTK
350	select SYS_SUPPORTS_32BIT_KERNEL
351	select SYS_SUPPORTS_64BIT_KERNEL
352	select SYS_SUPPORTS_LITTLE_ENDIAN
353	select USE_GENERIC_EARLY_PRINTK_8250
354
355config MACH_DECSTATION
356	bool "DECstations"
357	select BOOT_ELF32
358	select CEVT_DS1287
359	select CEVT_R4K if CPU_R4X00
360	select CSRC_IOASIC
361	select CSRC_R4K if CPU_R4X00
362	select CPU_DADDI_WORKAROUNDS if 64BIT
363	select CPU_R4000_WORKAROUNDS if 64BIT
364	select CPU_R4400_WORKAROUNDS if 64BIT
365	select DMA_NONCOHERENT
366	select NO_IOPORT_MAP
367	select IRQ_MIPS_CPU
368	select SYS_HAS_CPU_R3000
369	select SYS_HAS_CPU_R4X00
370	select SYS_SUPPORTS_32BIT_KERNEL
371	select SYS_SUPPORTS_64BIT_KERNEL
372	select SYS_SUPPORTS_LITTLE_ENDIAN
373	select SYS_SUPPORTS_128HZ
374	select SYS_SUPPORTS_256HZ
375	select SYS_SUPPORTS_1024HZ
376	select MIPS_L1_CACHE_SHIFT_4
377	help
378	  This enables support for DEC's MIPS based workstations.  For details
379	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
380	  DECstation porting pages on <http://decstation.unix-ag.org/>.
381
382	  If you have one of the following DECstation Models you definitely
383	  want to choose R4xx0 for the CPU Type:
384
385		DECstation 5000/50
386		DECstation 5000/150
387		DECstation 5000/260
388		DECsystem 5900/260
389
390	  otherwise choose R3000.
391
392config ECONET
393	bool "EcoNet MIPS family"
394	select BOOT_RAW
395	select CPU_BIG_ENDIAN
396	select DEBUG_ZBOOT if DEBUG_KERNEL
397	select EARLY_PRINTK_8250
398	select ECONET_EN751221_TIMER
399	select SERIAL_8250
400	select SERIAL_OF_PLATFORM
401	select SYS_SUPPORTS_BIG_ENDIAN
402	select SYS_HAS_CPU_MIPS32_R1
403	select SYS_HAS_CPU_MIPS32_R2
404	select SYS_HAS_EARLY_PRINTK
405	select SYS_SUPPORTS_32BIT_KERNEL
406	select SYS_SUPPORTS_MIPS16
407	select SYS_SUPPORTS_ZBOOT_UART16550
408	select USE_GENERIC_EARLY_PRINTK_8250
409	select USE_OF
410	help
411	  EcoNet EN75xx MIPS devices are big endian MIPS machines used
412	  in XPON (fiber) and DSL applications. They have SPI, PCI, USB,
413	  GPIO, and Ethernet, with optional XPON, DSL, and VoIP DSP cores.
414	  Don't confuse these with the Airoha ARM devices sometimes referred
415	  to as "EcoNet", this family is for MIPS based devices only.
416
417config MACH_JAZZ
418	bool "Jazz family of machines"
419	select ARC_MEMORY
420	select ARC_PROMLIB
421	select ARCH_MIGHT_HAVE_PC_PARPORT
422	select ARCH_MIGHT_HAVE_PC_SERIO
423	select FW_ARC
424	select FW_ARC32
425	select ARCH_MAY_HAVE_PC_FDC
426	select CEVT_R4K
427	select CSRC_R4K
428	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
429	select GENERIC_ISA_DMA
430	select HAVE_PCSPKR_PLATFORM
431	select IRQ_MIPS_CPU
432	select I8253
433	select I8259
434	select ISA
435	select SYS_HAS_CPU_R4X00
436	select SYS_SUPPORTS_32BIT_KERNEL
437	select SYS_SUPPORTS_64BIT_KERNEL
438	select SYS_SUPPORTS_100HZ
439	select SYS_SUPPORTS_LITTLE_ENDIAN
440	help
441	  This a family of machines based on the MIPS R4030 chipset which was
442	  used by several vendors to build RISC/os and Windows NT workstations.
443	  Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
444	  Olivetti M700-10 workstations.
445
446config MACH_INGENIC_SOC
447	bool "Ingenic SoC based machines"
448	select MIPS_GENERIC
449	select MACH_INGENIC
450	select MACH_GENERIC_CORE
451	select SYS_SUPPORTS_ZBOOT_UART16550
452	select CPU_SUPPORTS_CPUFREQ
453	select MIPS_EXTERNAL_TIMER
454
455config LANTIQ
456	bool "Lantiq based platforms"
457	select DMA_NONCOHERENT
458	select IRQ_MIPS_CPU
459	select CEVT_R4K
460	select CSRC_R4K
461	select NO_EXCEPT_FILL
462	select SYS_HAS_CPU_MIPS32_R1
463	select SYS_HAS_CPU_MIPS32_R2
464	select SYS_SUPPORTS_BIG_ENDIAN
465	select SYS_SUPPORTS_32BIT_KERNEL
466	select SYS_SUPPORTS_MIPS16
467	select SYS_SUPPORTS_MULTITHREADING
468	select SYS_SUPPORTS_VPE_LOADER
469	select SYS_HAS_EARLY_PRINTK
470	select GPIOLIB
471	select SWAP_IO_SPACE
472	select BOOT_RAW
473	select HAVE_LEGACY_CLK
474	select USE_OF
475	select PINCTRL
476	select PINCTRL_LANTIQ
477	select ARCH_HAS_RESET_CONTROLLER
478	select RESET_CONTROLLER
479
480config MACH_LOONGSON32
481	bool "Loongson 32-bit family of machines"
482	select MACH_GENERIC_CORE
483	select USE_OF
484	select BUILTIN_DTB
485	select BOOT_ELF32
486	select CEVT_R4K
487	select CSRC_R4K
488	select COMMON_CLK
489	select DMA_NONCOHERENT
490	select GENERIC_IRQ_SHOW_LEVEL
491	select IRQ_MIPS_CPU
492	select LS1X_IRQ
493	select SYS_HAS_CPU_LOONGSON32
494	select SYS_HAS_EARLY_PRINTK
495	select USE_GENERIC_EARLY_PRINTK_8250
496	select SYS_SUPPORTS_32BIT_KERNEL
497	select SYS_SUPPORTS_LITTLE_ENDIAN
498	select SYS_SUPPORTS_HIGHMEM
499	select SYS_SUPPORTS_ZBOOT
500	help
501	  This enables support for the Loongson-1 family of machines.
502
503	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
504	  the Institute of Computing Technology (ICT), Chinese Academy of
505	  Sciences (CAS).
506
507config MACH_LOONGSON2EF
508	bool "Loongson-2E/F family of machines"
509	select SYS_SUPPORTS_ZBOOT
510	help
511	  This enables the support of early Loongson-2E/F family of machines.
512
513config MACH_LOONGSON64
514	bool "Loongson 64-bit family of machines"
515	select ARCH_DMA_DEFAULT_COHERENT
516	select ARCH_SPARSEMEM_ENABLE
517	select ARCH_MIGHT_HAVE_PC_PARPORT
518	select ARCH_MIGHT_HAVE_PC_SERIO
519	select GENERIC_ISA_DMA_SUPPORT_BROKEN
520	select BOOT_ELF32
521	select BOARD_SCACHE
522	select CSRC_R4K
523	select CEVT_R4K
524	select SYNC_R4K
525	select FORCE_PCI
526	select ISA
527	select I8259
528	select IRQ_MIPS_CPU
529	select NO_EXCEPT_FILL
530	select NR_CPUS_DEFAULT_64
531	select USE_GENERIC_EARLY_PRINTK_8250
532	select PCI_DRIVERS_GENERIC
533	select SYS_HAS_CPU_LOONGSON64
534	select SYS_HAS_EARLY_PRINTK
535	select SYS_SUPPORTS_SMP
536	select SYS_SUPPORTS_HOTPLUG_CPU
537	select SYS_SUPPORTS_NUMA
538	select SYS_SUPPORTS_64BIT_KERNEL
539	select SYS_SUPPORTS_HIGHMEM
540	select SYS_SUPPORTS_LITTLE_ENDIAN
541	select SYS_SUPPORTS_ZBOOT
542	select SYS_SUPPORTS_RELOCATABLE
543	select ZONE_DMA32
544	select COMMON_CLK
545	select USE_OF
546	select BUILTIN_DTB
547	select PCI_HOST_GENERIC
548	help
549	  This enables the support of Loongson-2/3 family of machines.
550
551	  Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
552	  GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
553	  and Loongson-2F which will be removed), developed by the Institute
554	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
555
556config MIPS_MALTA
557	bool "MIPS Malta board"
558	select ARCH_MAY_HAVE_PC_FDC
559	select ARCH_MIGHT_HAVE_PC_PARPORT
560	select ARCH_MIGHT_HAVE_PC_SERIO
561	select BOOT_ELF32
562	select BOOT_RAW
563	select BUILTIN_DTB
564	select CEVT_R4K
565	select CLKSRC_MIPS_GIC
566	select COMMON_CLK
567	select CSRC_R4K
568	select DMA_NONCOHERENT
569	select GENERIC_ISA_DMA
570	select HAVE_PCSPKR_PLATFORM
571	select HAVE_PCI
572	select I8253
573	select I8259
574	select IRQ_MIPS_CPU
575	select MIPS_BONITO64
576	select MIPS_CPU_SCACHE
577	select MIPS_GIC
578	select MIPS_L1_CACHE_SHIFT_6
579	select MIPS_MSC
580	select PCI_GT64XXX_PCI0
581	select RTC_MC146818_LIB
582	select SMP_UP if SMP
583	select SWAP_IO_SPACE
584	select SYS_HAS_CPU_MIPS32_R1
585	select SYS_HAS_CPU_MIPS32_R2
586	select SYS_HAS_CPU_MIPS32_R3_5
587	select SYS_HAS_CPU_MIPS32_R5
588	select SYS_HAS_CPU_MIPS32_R6
589	select SYS_HAS_CPU_MIPS64_R1
590	select SYS_HAS_CPU_MIPS64_R2
591	select SYS_HAS_CPU_MIPS64_R6
592	select SYS_HAS_CPU_NEVADA
593	select SYS_HAS_CPU_RM7000
594	select SYS_SUPPORTS_32BIT_KERNEL
595	select SYS_SUPPORTS_64BIT_KERNEL
596	select SYS_SUPPORTS_BIG_ENDIAN
597	select SYS_SUPPORTS_HIGHMEM
598	select SYS_SUPPORTS_LITTLE_ENDIAN
599	select SYS_SUPPORTS_MICROMIPS
600	select SYS_SUPPORTS_MIPS16
601	select SYS_SUPPORTS_MIPS_CPS
602	select SYS_SUPPORTS_MULTITHREADING
603	select SYS_SUPPORTS_RELOCATABLE
604	select SYS_SUPPORTS_SMARTMIPS
605	select SYS_SUPPORTS_VPE_LOADER
606	select SYS_SUPPORTS_ZBOOT
607	select USE_OF
608	select WAR_ICACHE_REFILLS
609	select ZONE_DMA32 if 64BIT
610	help
611	  This enables support for the MIPS Technologies Malta evaluation
612	  board.
613
614config MACH_PIC32
615	bool "Microchip PIC32 Family"
616	help
617	  This enables support for the Microchip PIC32 family of platforms.
618
619	  Microchip PIC32 is a family of general-purpose 32 bit MIPS core
620	  microcontrollers.
621
622config EYEQ
623	bool "Mobileye EyeQ SoC"
624	select MACH_GENERIC_CORE
625	select ARM_AMBA
626	select PHYSICAL_START_BOOL
627	select ARCH_SPARSEMEM_DEFAULT if 64BIT
628	select BOOT_RAW
629	select BUILTIN_DTB
630	select CEVT_R4K
631	select CLKSRC_MIPS_GIC
632	select COMMON_CLK
633	select CPU_MIPSR2_IRQ_EI
634	select CPU_MIPSR2_IRQ_VI
635	select CSRC_R4K
636	select DMA_NONCOHERENT
637	select HAVE_PCI
638	select IRQ_MIPS_CPU
639	select MIPS_AUTO_PFN_OFFSET
640	select MIPS_CPU_SCACHE
641	select MIPS_GIC
642	select MIPS_L1_CACHE_SHIFT_7
643	select PCI_DRIVERS_GENERIC
644	select SMP_UP if SMP
645	select SWAP_IO_SPACE
646	select SYS_HAS_CPU_MIPS64_R6
647	select SYS_SUPPORTS_64BIT_KERNEL
648	select SYS_SUPPORTS_HIGHMEM
649	select SYS_SUPPORTS_LITTLE_ENDIAN
650	select SYS_SUPPORTS_MIPS_CPS
651	select SYS_SUPPORTS_RELOCATABLE
652	select SYS_SUPPORTS_ZBOOT
653	select UHI_BOOT
654	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
655	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
656	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
657	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
658	select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
659	select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
660	select USE_OF
661	select HOTPLUG_PARALLEL if SMP
662	help
663	  Select this to build a kernel supporting EyeQ SoC from Mobileye.
664
665	bool
666
667config MACH_NINTENDO64
668	bool "Nintendo 64 console"
669	select CEVT_R4K
670	select CSRC_R4K
671	select SYS_HAS_CPU_R4300
672	select SYS_SUPPORTS_BIG_ENDIAN
673	select SYS_SUPPORTS_ZBOOT
674	select SYS_SUPPORTS_32BIT_KERNEL
675	select SYS_SUPPORTS_64BIT_KERNEL
676	select DMA_NONCOHERENT
677	select IRQ_MIPS_CPU
678
679config RALINK
680	bool "Ralink based machines"
681	select CEVT_R4K
682	select COMMON_CLK
683	select CSRC_R4K
684	select BOOT_RAW
685	select DMA_NONCOHERENT
686	select IRQ_MIPS_CPU
687	select USE_OF
688	select SYS_HAS_CPU_MIPS32_R2
689	select SYS_SUPPORTS_32BIT_KERNEL
690	select SYS_SUPPORTS_LITTLE_ENDIAN
691	select SYS_SUPPORTS_MIPS16
692	select SYS_SUPPORTS_ZBOOT
693	select SYS_HAS_EARLY_PRINTK
694	select ARCH_HAS_RESET_CONTROLLER
695	select RESET_CONTROLLER
696
697config MACH_REALTEK_RTL
698	bool "Realtek RTL838x/RTL839x based machines"
699	select MIPS_GENERIC
700	select MACH_GENERIC_CORE
701	select DMA_NONCOHERENT
702	select IRQ_MIPS_CPU
703	select CSRC_R4K
704	select CEVT_R4K
705	select SYS_HAS_CPU_MIPS32_R1
706	select SYS_HAS_CPU_MIPS32_R2
707	select SYS_SUPPORTS_BIG_ENDIAN
708	select SYS_SUPPORTS_32BIT_KERNEL
709	select SYS_SUPPORTS_MIPS16
710	select SYS_SUPPORTS_MULTITHREADING
711	select SYS_SUPPORTS_VPE_LOADER
712	select BOOT_RAW
713	select PINCTRL
714	select USE_OF
715	select REALTEK_OTTO_TIMER
716
717config SGI_IP22
718	bool "SGI IP22 (Indy/Indigo2)"
719	select ARC_MEMORY
720	select ARC_PROMLIB
721	select FW_ARC
722	select FW_ARC32
723	select ARCH_MIGHT_HAVE_PC_SERIO
724	select BOOT_ELF32
725	select CEVT_R4K
726	select CSRC_R4K
727	select DEFAULT_SGI_PARTITION
728	select DMA_NONCOHERENT
729	select HAVE_EISA
730	select I8253
731	select I8259
732	select IP22_CPU_SCACHE
733	select IRQ_MIPS_CPU
734	select GENERIC_ISA_DMA_SUPPORT_BROKEN
735	select SGI_HAS_I8042
736	select SGI_HAS_INDYDOG
737	select SGI_HAS_HAL2
738	select SGI_HAS_SEEQ
739	select SGI_HAS_WD93
740	select SGI_HAS_ZILOG
741	select SWAP_IO_SPACE
742	select SYS_HAS_CPU_R4X00
743	select SYS_HAS_CPU_R5000
744	select SYS_HAS_EARLY_PRINTK
745	select SYS_SUPPORTS_32BIT_KERNEL
746	select SYS_SUPPORTS_64BIT_KERNEL
747	select SYS_SUPPORTS_BIG_ENDIAN
748	select WAR_R4600_V1_INDEX_ICACHEOP
749	select WAR_R4600_V1_HIT_CACHEOP
750	select WAR_R4600_V2_HIT_CACHEOP
751	select MIPS_L1_CACHE_SHIFT_7
752	help
753	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
754	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
755	  that runs on these, say Y here.
756
757config SGI_IP27
758	bool "SGI IP27 (Origin200/2000)"
759	select ARCH_HAS_PHYS_TO_DMA
760	select ARCH_SPARSEMEM_ENABLE
761	select FW_ARC
762	select FW_ARC64
763	select ARC_CMDLINE_ONLY
764	select BOOT_ELF64
765	select DEFAULT_SGI_PARTITION
766	select FORCE_PCI
767	select SYS_HAS_EARLY_PRINTK
768	select HAVE_PCI
769	select IRQ_MIPS_CPU
770	select IRQ_DOMAIN_HIERARCHY
771	select NR_CPUS_DEFAULT_64
772	select PCI_DRIVERS_GENERIC
773	select PCI_XTALK_BRIDGE
774	select SYS_HAS_CPU_R10000
775	select SYS_SUPPORTS_64BIT_KERNEL
776	select SYS_SUPPORTS_BIG_ENDIAN
777	select SYS_SUPPORTS_NUMA
778	select SYS_SUPPORTS_SMP
779	select WAR_R10000_LLSC
780	select MIPS_L1_CACHE_SHIFT_7
781	select NUMA
782	help
783	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
784	  workstations.  To compile a Linux kernel that runs on these, say Y
785	  here.
786
787config SGI_IP28
788	bool "SGI IP28 (Indigo2 R10k)"
789	select ARC_MEMORY
790	select ARC_PROMLIB
791	select FW_ARC
792	select FW_ARC64
793	select ARCH_MIGHT_HAVE_PC_SERIO
794	select BOOT_ELF64
795	select CEVT_R4K
796	select CSRC_R4K
797	select DEFAULT_SGI_PARTITION
798	select DMA_NONCOHERENT
799	select GENERIC_ISA_DMA_SUPPORT_BROKEN
800	select IRQ_MIPS_CPU
801	select HAVE_EISA
802	select I8253
803	select I8259
804	select SGI_HAS_I8042
805	select SGI_HAS_INDYDOG
806	select SGI_HAS_HAL2
807	select SGI_HAS_SEEQ
808	select SGI_HAS_WD93
809	select SGI_HAS_ZILOG
810	select SWAP_IO_SPACE
811	select SYS_HAS_CPU_R10000
812	select SYS_HAS_EARLY_PRINTK
813	select SYS_SUPPORTS_64BIT_KERNEL
814	select SYS_SUPPORTS_BIG_ENDIAN
815	select WAR_R10000_LLSC
816	select MIPS_L1_CACHE_SHIFT_7
817	help
818	  This is the SGI Indigo2 with R10000 processor.  To compile a Linux
819	  kernel that runs on these, say Y here.
820
821config SGI_IP30
822	bool "SGI IP30 (Octane/Octane2)"
823	select ARCH_HAS_PHYS_TO_DMA
824	select FW_ARC
825	select FW_ARC64
826	select BOOT_ELF64
827	select CEVT_R4K
828	select CSRC_R4K
829	select FORCE_PCI
830	select SYNC_R4K if SMP
831	select ZONE_DMA32
832	select HAVE_PCI
833	select IRQ_MIPS_CPU
834	select IRQ_DOMAIN_HIERARCHY
835	select PCI_DRIVERS_GENERIC
836	select PCI_XTALK_BRIDGE
837	select SYS_HAS_EARLY_PRINTK
838	select SYS_HAS_CPU_R10000
839	select SYS_SUPPORTS_64BIT_KERNEL
840	select SYS_SUPPORTS_BIG_ENDIAN
841	select SYS_SUPPORTS_SMP
842	select WAR_R10000_LLSC
843	select MIPS_L1_CACHE_SHIFT_7
844	select ARC_MEMORY
845	help
846	  These are the SGI Octane and Octane2 graphics workstations.  To
847	  compile a Linux kernel that runs on these, say Y here.
848
849config SGI_IP32
850	bool "SGI IP32 (O2)"
851	select ARC_MEMORY
852	select ARC_PROMLIB
853	select ARCH_HAS_PHYS_TO_DMA
854	select FW_ARC
855	select FW_ARC32
856	select BOOT_ELF32
857	select CEVT_R4K
858	select CSRC_R4K
859	select DMA_NONCOHERENT
860	select HAVE_PCI
861	select IRQ_MIPS_CPU
862	select R5000_CPU_SCACHE
863	select RM7000_CPU_SCACHE
864	select SYS_HAS_CPU_R5000
865	select SYS_HAS_CPU_R10000 if BROKEN
866	select SYS_HAS_CPU_RM7000
867	select SYS_HAS_CPU_NEVADA
868	select SYS_SUPPORTS_64BIT_KERNEL
869	select SYS_SUPPORTS_BIG_ENDIAN
870	select WAR_ICACHE_REFILLS
871	help
872	  If you want this kernel to run on SGI O2 workstation, say Y here.
873
874config SIBYTE_CRHONE
875	bool "Sibyte BCM91125C-CRhone"
876	select BOOT_ELF32
877	select SIBYTE_BCM1125
878	select SWAP_IO_SPACE
879	select SYS_HAS_CPU_SB1
880	select SYS_SUPPORTS_BIG_ENDIAN
881	select SYS_SUPPORTS_HIGHMEM
882	select SYS_SUPPORTS_LITTLE_ENDIAN
883
884config SIBYTE_RHONE
885	bool "Sibyte BCM91125E-Rhone"
886	select BOOT_ELF32
887	select SIBYTE_SB1250
888	select SWAP_IO_SPACE
889	select SYS_HAS_CPU_SB1
890	select SYS_SUPPORTS_BIG_ENDIAN
891	select SYS_SUPPORTS_LITTLE_ENDIAN
892
893config SIBYTE_SWARM
894	bool "Sibyte BCM91250A-SWARM"
895	select BOOT_ELF32
896	select HAVE_PATA_PLATFORM
897	select SIBYTE_SB1250
898	select SWAP_IO_SPACE
899	select SYS_HAS_CPU_SB1
900	select SYS_SUPPORTS_BIG_ENDIAN
901	select SYS_SUPPORTS_HIGHMEM
902	select SYS_SUPPORTS_LITTLE_ENDIAN
903	select ZONE_DMA32 if 64BIT
904	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
905
906config SIBYTE_LITTLESUR
907	bool "Sibyte BCM91250C2-LittleSur"
908	select BOOT_ELF32
909	select HAVE_PATA_PLATFORM
910	select SIBYTE_SB1250
911	select SWAP_IO_SPACE
912	select SYS_HAS_CPU_SB1
913	select SYS_SUPPORTS_BIG_ENDIAN
914	select SYS_SUPPORTS_HIGHMEM
915	select SYS_SUPPORTS_LITTLE_ENDIAN
916	select ZONE_DMA32 if 64BIT
917
918config SIBYTE_SENTOSA
919	bool "Sibyte BCM91250E-Sentosa"
920	select BOOT_ELF32
921	select SIBYTE_SB1250
922	select SWAP_IO_SPACE
923	select SYS_HAS_CPU_SB1
924	select SYS_SUPPORTS_BIG_ENDIAN
925	select SYS_SUPPORTS_LITTLE_ENDIAN
926	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
927
928config SIBYTE_BIGSUR
929	bool "Sibyte BCM91480B-BigSur"
930	select BOOT_ELF32
931	select NR_CPUS_DEFAULT_4
932	select SIBYTE_BCM1x80
933	select SWAP_IO_SPACE
934	select SYS_HAS_CPU_SB1
935	select SYS_SUPPORTS_BIG_ENDIAN
936	select SYS_SUPPORTS_HIGHMEM
937	select SYS_SUPPORTS_LITTLE_ENDIAN
938	select ZONE_DMA32 if 64BIT
939	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
940
941config SNI_RM
942	bool "SNI RM200/300/400"
943	select ARC_MEMORY
944	select ARC_PROMLIB
945	select FW_ARC if CPU_LITTLE_ENDIAN
946	select FW_ARC32 if CPU_LITTLE_ENDIAN
947	select FW_SNIPROM if CPU_BIG_ENDIAN
948	select ARCH_MAY_HAVE_PC_FDC
949	select ARCH_MIGHT_HAVE_PC_PARPORT
950	select ARCH_MIGHT_HAVE_PC_SERIO
951	select BOOT_ELF32
952	select CEVT_R4K
953	select CSRC_R4K
954	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
955	select DMA_NONCOHERENT
956	select GENERIC_ISA_DMA
957	select HAVE_EISA
958	select HAVE_PCSPKR_PLATFORM
959	select HAVE_PCI
960	select IRQ_MIPS_CPU
961	select I8253
962	select I8259
963	select ISA
964	select MIPS_L1_CACHE_SHIFT_6
965	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
966	select SYS_HAS_CPU_R4X00
967	select SYS_HAS_CPU_R5000
968	select SYS_HAS_CPU_R10000
969	select R5000_CPU_SCACHE
970	select SYS_HAS_EARLY_PRINTK
971	select SYS_SUPPORTS_32BIT_KERNEL
972	select SYS_SUPPORTS_64BIT_KERNEL
973	select SYS_SUPPORTS_BIG_ENDIAN
974	select SYS_SUPPORTS_HIGHMEM
975	select SYS_SUPPORTS_LITTLE_ENDIAN
976	select WAR_R4600_V2_HIT_CACHEOP
977	help
978	  The SNI RM200/300/400 are MIPS-based machines manufactured by
979	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
980	  Technology and now in turn merged with Fujitsu.  Say Y here to
981	  support this machine type.
982
983config MACH_TX49XX
984	bool "Toshiba TX49 series based machines"
985	select WAR_TX49XX_ICACHE_INDEX_INV
986
987config MIKROTIK_RB532
988	bool "Mikrotik RB532 boards"
989	select CEVT_R4K
990	select CSRC_R4K
991	select DMA_NONCOHERENT
992	select HAVE_PCI
993	select IRQ_MIPS_CPU
994	select SYS_HAS_CPU_MIPS32_R1
995	select SYS_SUPPORTS_32BIT_KERNEL
996	select SYS_SUPPORTS_LITTLE_ENDIAN
997	select SWAP_IO_SPACE
998	select BOOT_RAW
999	select GPIOLIB
1000	select MIPS_L1_CACHE_SHIFT_4
1001	help
1002	  Support the Mikrotik(tm) RouterBoard 532 series,
1003	  based on the IDT RC32434 SoC.
1004
1005config CAVIUM_OCTEON_SOC
1006	bool "Cavium Networks Octeon SoC based boards"
1007	select CEVT_R4K
1008	select ARCH_HAS_PHYS_TO_DMA
1009	select HAVE_RAPIDIO
1010	select PHYS_ADDR_T_64BIT
1011	select SYS_SUPPORTS_64BIT_KERNEL
1012	select SYS_SUPPORTS_BIG_ENDIAN
1013	select EDAC_SUPPORT
1014	select EDAC_ATOMIC_SCRUB
1015	select SYS_SUPPORTS_LITTLE_ENDIAN
1016	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
1017	select SYS_HAS_EARLY_PRINTK
1018	select SYS_HAS_CPU_CAVIUM_OCTEON
1019	select HAVE_PCI
1020	select HAVE_PLAT_DELAY
1021	select HAVE_PLAT_FW_INIT_CMDLINE
1022	select HAVE_PLAT_MEMCPY
1023	select ZONE_DMA32
1024	select GPIOLIB
1025	select USE_OF
1026	select ARCH_SPARSEMEM_ENABLE
1027	select SYS_SUPPORTS_SMP
1028	select NR_CPUS_DEFAULT_64
1029	select MIPS_NR_CPU_NR_MAP_1024
1030	select BUILTIN_DTB
1031	select MTD
1032	select MTD_COMPLEX_MAPPINGS
1033	select SWIOTLB
1034	select SYS_SUPPORTS_RELOCATABLE
1035	help
1036	  This option supports all of the Octeon reference boards from Cavium
1037	  Networks. It builds a kernel that dynamically determines the Octeon
1038	  CPU type and supports all known board reference implementations.
1039	  Some of the supported boards are:
1040		EBT3000
1041		EBH3000
1042		EBH3100
1043		Thunder
1044		Kodama
1045		Hikari
1046	  Say Y here for most Octeon reference boards.
1047
1048endchoice
1049
1050config FIT_IMAGE_FDT_EPM5
1051	bool "Include FDT for Mobileye EyeQ5 development platforms"
1052	depends on MACH_EYEQ5
1053	default n
1054	help
1055	  Enable this to include the FDT for the EyeQ5 development platforms
1056	  from Mobileye in the FIT kernel image.
1057	  This requires u-boot on the platform.
1058
1059source "arch/mips/alchemy/Kconfig"
1060source "arch/mips/ath25/Kconfig"
1061source "arch/mips/ath79/Kconfig"
1062source "arch/mips/bcm47xx/Kconfig"
1063source "arch/mips/bcm63xx/Kconfig"
1064source "arch/mips/bmips/Kconfig"
1065source "arch/mips/econet/Kconfig"
1066source "arch/mips/generic/Kconfig"
1067source "arch/mips/ingenic/Kconfig"
1068source "arch/mips/jazz/Kconfig"
1069source "arch/mips/lantiq/Kconfig"
1070source "arch/mips/mobileye/Kconfig"
1071source "arch/mips/pic32/Kconfig"
1072source "arch/mips/ralink/Kconfig"
1073source "arch/mips/sgi-ip27/Kconfig"
1074source "arch/mips/sibyte/Kconfig"
1075source "arch/mips/txx9/Kconfig"
1076source "arch/mips/cavium-octeon/Kconfig"
1077source "arch/mips/loongson2ef/Kconfig"
1078source "arch/mips/loongson32/Kconfig"
1079source "arch/mips/loongson64/Kconfig"
1080
1081endmenu
1082
1083config GENERIC_HWEIGHT
1084	bool
1085	default y
1086
1087config GENERIC_CALIBRATE_DELAY
1088	bool
1089	default y
1090
1091config SCHED_OMIT_FRAME_POINTER
1092	bool
1093	default y
1094
1095#
1096# Select some configuration options automatically based on user selections.
1097#
1098config FW_ARC
1099	bool
1100
1101config ARCH_MAY_HAVE_PC_FDC
1102	bool
1103
1104config BOOT_RAW
1105	bool
1106
1107config CEVT_BCM1480
1108	bool
1109
1110config CEVT_DS1287
1111	bool
1112
1113config CEVT_GT641XX
1114	bool
1115
1116config CEVT_R4K
1117	bool
1118
1119config CEVT_SB1250
1120	bool
1121
1122config CEVT_TXX9
1123	bool
1124
1125config CSRC_BCM1480
1126	bool
1127
1128config CSRC_IOASIC
1129	bool
1130
1131config CSRC_R4K
1132	select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1133	bool
1134
1135config CSRC_SB1250
1136	bool
1137
1138config MIPS_CLOCK_VSYSCALL
1139	def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1140
1141config GPIO_TXX9
1142	select GPIOLIB
1143	bool
1144
1145config FW_CFE
1146	bool
1147
1148config ARCH_SUPPORTS_UPROBES
1149	def_bool y
1150
1151config DMA_NONCOHERENT
1152	bool
1153	#
1154	# MIPS allows mixing "slightly different" Cacheability and Coherency
1155	# Attribute bits.  It is believed that the uncached access through
1156	# KSEG1 and the implementation specific "uncached accelerated" used
1157	# by pgprot_writcombine can be mixed, and the latter sometimes provides
1158	# significant advantages.
1159	#
1160	select ARCH_HAS_SETUP_DMA_OPS
1161	select ARCH_HAS_DMA_WRITE_COMBINE
1162	select ARCH_HAS_DMA_PREP_COHERENT
1163	select ARCH_HAS_SYNC_DMA_FOR_CPU
1164	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1165	select ARCH_HAS_DMA_SET_UNCACHED
1166	select DMA_NONCOHERENT_MMAP
1167	select NEED_DMA_MAP_STATE
1168
1169config SYS_HAS_EARLY_PRINTK
1170	bool
1171
1172config SYS_SUPPORTS_HOTPLUG_CPU
1173	bool
1174
1175config MIPS_BONITO64
1176	bool
1177
1178config MIPS_MSC
1179	bool
1180
1181config SYNC_R4K
1182	bool
1183
1184config NO_IOPORT_MAP
1185	def_bool n
1186
1187config GENERIC_CSUM
1188	def_bool CPU_NO_LOAD_STORE_LR
1189
1190config GENERIC_ISA_DMA
1191	bool
1192	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1193	select ISA_DMA_API
1194
1195config GENERIC_ISA_DMA_SUPPORT_BROKEN
1196	bool
1197	select GENERIC_ISA_DMA
1198
1199config HAVE_PLAT_DELAY
1200	bool
1201
1202config HAVE_PLAT_FW_INIT_CMDLINE
1203	bool
1204
1205config HAVE_PLAT_MEMCPY
1206	bool
1207
1208config ISA_DMA_API
1209	bool
1210
1211config SYS_SUPPORTS_RELOCATABLE
1212	bool
1213	help
1214	  Selected if the platform supports relocating the kernel.
1215	  The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1216	  to allow access to command line and entropy sources.
1217
1218#
1219# Endianness selection.  Sufficiently obscure so many users don't know what to
1220# answer,so we try hard to limit the available choices.  Also the use of a
1221# choice statement should be more obvious to the user.
1222#
1223choice
1224	prompt "Endianness selection"
1225	help
1226	  Some MIPS machines can be configured for either little or big endian
1227	  byte order. These modes require different kernels and a different
1228	  Linux distribution.  In general there is one preferred byteorder for a
1229	  particular system but some systems are just as commonly used in the
1230	  one or the other endianness.
1231
1232config CPU_BIG_ENDIAN
1233	bool "Big endian"
1234	depends on SYS_SUPPORTS_BIG_ENDIAN
1235
1236config CPU_LITTLE_ENDIAN
1237	bool "Little endian"
1238	depends on SYS_SUPPORTS_LITTLE_ENDIAN
1239
1240endchoice
1241
1242config EXPORT_UASM
1243	bool
1244
1245config SYS_SUPPORTS_APM_EMULATION
1246	bool
1247
1248config SYS_SUPPORTS_BIG_ENDIAN
1249	bool
1250
1251config SYS_SUPPORTS_LITTLE_ENDIAN
1252	bool
1253
1254config MIPS_HUGE_TLB_SUPPORT
1255	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1256
1257config IRQ_TXX9
1258	bool
1259
1260config IRQ_GT641XX
1261	bool
1262
1263config PCI_GT64XXX_PCI0
1264	bool
1265
1266config PCI_XTALK_BRIDGE
1267	bool
1268
1269config NO_EXCEPT_FILL
1270	bool
1271
1272config MIPS_SPRAM
1273	bool
1274
1275config SWAP_IO_SPACE
1276	bool
1277
1278config SGI_HAS_INDYDOG
1279	bool
1280
1281config SGI_HAS_HAL2
1282	bool
1283
1284config SGI_HAS_SEEQ
1285	bool
1286
1287config SGI_HAS_WD93
1288	bool
1289
1290config SGI_HAS_ZILOG
1291	bool
1292
1293config SGI_HAS_I8042
1294	bool
1295
1296config DEFAULT_SGI_PARTITION
1297	bool
1298
1299config FW_ARC32
1300	bool
1301
1302config FW_SNIPROM
1303	bool
1304
1305config BOOT_ELF32
1306	bool
1307
1308config MIPS_L1_CACHE_SHIFT_4
1309	bool
1310
1311config MIPS_L1_CACHE_SHIFT_5
1312	bool
1313
1314config MIPS_L1_CACHE_SHIFT_6
1315	bool
1316
1317config MIPS_L1_CACHE_SHIFT_7
1318	bool
1319
1320config MIPS_L1_CACHE_SHIFT
1321	int
1322	default "7" if MIPS_L1_CACHE_SHIFT_7
1323	default "6" if MIPS_L1_CACHE_SHIFT_6
1324	default "5" if MIPS_L1_CACHE_SHIFT_5
1325	default "4" if MIPS_L1_CACHE_SHIFT_4
1326	default "5"
1327
1328config ARC_CMDLINE_ONLY
1329	bool
1330
1331config ARC_CONSOLE
1332	bool "ARC console support"
1333	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1334
1335config ARC_MEMORY
1336	bool
1337
1338config ARC_PROMLIB
1339	bool
1340
1341config FW_ARC64
1342	bool
1343
1344config BOOT_ELF64
1345	bool
1346
1347menu "CPU selection"
1348
1349choice
1350	prompt "CPU type"
1351	default CPU_R4X00
1352
1353config CPU_LOONGSON64
1354	bool "Loongson 64-bit CPU"
1355	depends on SYS_HAS_CPU_LOONGSON64
1356	select ARCH_HAS_PHYS_TO_DMA
1357	select CPU_MIPSR2
1358	select CPU_HAS_PREFETCH
1359	select CPU_SUPPORTS_64BIT_KERNEL
1360	select CPU_SUPPORTS_HIGHMEM
1361	select CPU_SUPPORTS_HUGEPAGES
1362	select CPU_SUPPORTS_MSA
1363	select CPU_SUPPORTS_VZ
1364	select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1365	select CPU_MIPSR2_IRQ_VI
1366	select DMA_NONCOHERENT
1367	select WEAK_ORDERING
1368	select WEAK_REORDERING_BEYOND_LLSC
1369	select MIPS_ASID_BITS_VARIABLE
1370	select MIPS_PGD_C0_CONTEXT
1371	select MIPS_L1_CACHE_SHIFT_6
1372	select MIPS_FP_SUPPORT
1373	select GPIOLIB
1374	select SWIOTLB
1375	help
1376	  The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1377	  cores implements the MIPS64R2 instruction set with many extensions,
1378	  including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1379	  3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1380	  Loongson-2E/2F is not covered here and will be removed in future.
1381
1382config CPU_LOONGSON2E
1383	bool "Loongson 2E"
1384	depends on SYS_HAS_CPU_LOONGSON2E
1385	select CPU_LOONGSON2EF
1386	help
1387	  The Loongson 2E processor implements the MIPS III instruction set
1388	  with many extensions.
1389
1390	  It has an internal FPGA northbridge, which is compatible to
1391	  bonito64.
1392
1393config CPU_LOONGSON2F
1394	bool "Loongson 2F"
1395	depends on SYS_HAS_CPU_LOONGSON2F
1396	select CPU_LOONGSON2EF
1397	help
1398	  The Loongson 2F processor implements the MIPS III instruction set
1399	  with many extensions.
1400
1401	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1402	  have a similar programming interface with FPGA northbridge used in
1403	  Loongson2E.
1404
1405config CPU_LOONGSON32
1406	bool "Loongson 32-bit CPU"
1407	depends on SYS_HAS_CPU_LOONGSON32
1408	select CPU_MIPS32
1409	select CPU_MIPSR2
1410	select CPU_HAS_PREFETCH
1411	select CPU_HAS_LOAD_STORE_LR
1412	select CPU_SUPPORTS_32BIT_KERNEL
1413	select CPU_SUPPORTS_HIGHMEM
1414	select CPU_SUPPORTS_CPUFREQ
1415	select LEDS_GPIO_REGISTER
1416	help
1417	  The Loongson GS232 microarchitecture implements the MIPS32 Release 1
1418	  instruction set and part of the MIPS32 Release 2 instruction set.
1419
1420config CPU_MIPS32_R1
1421	bool "MIPS32 Release 1"
1422	depends on SYS_HAS_CPU_MIPS32_R1
1423	select CPU_HAS_PREFETCH
1424	select CPU_SUPPORTS_32BIT_KERNEL
1425	select CPU_SUPPORTS_HIGHMEM
1426	help
1427	  Choose this option to build a kernel for release 1 or later of the
1428	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1429	  MIPS processor are based on a MIPS32 processor.  If you know the
1430	  specific type of processor in your system, choose those that one
1431	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1432	  Release 2 of the MIPS32 architecture is available since several
1433	  years so chances are you even have a MIPS32 Release 2 processor
1434	  in which case you should choose CPU_MIPS32_R2 instead for better
1435	  performance.
1436
1437config CPU_MIPS32_R2
1438	bool "MIPS32 Release 2"
1439	depends on SYS_HAS_CPU_MIPS32_R2
1440	select CPU_HAS_PREFETCH
1441	select CPU_SUPPORTS_32BIT_KERNEL
1442	select CPU_SUPPORTS_HIGHMEM
1443	select CPU_SUPPORTS_MSA
1444	help
1445	  Choose this option to build a kernel for release 2 or later of the
1446	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1447	  MIPS processor are based on a MIPS32 processor.  If you know the
1448	  specific type of processor in your system, choose those that one
1449	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1450
1451config CPU_MIPS32_R5
1452	bool "MIPS32 Release 5"
1453	depends on SYS_HAS_CPU_MIPS32_R5
1454	select CPU_HAS_PREFETCH
1455	select CPU_SUPPORTS_32BIT_KERNEL
1456	select CPU_SUPPORTS_HIGHMEM
1457	select CPU_SUPPORTS_MSA
1458	select CPU_SUPPORTS_VZ
1459	select MIPS_O32_FP64_SUPPORT
1460	help
1461	  Choose this option to build a kernel for release 5 or later of the
1462	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
1463	  family, are based on a MIPS32r5 processor. If you own an older
1464	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1465
1466config CPU_MIPS32_R6
1467	bool "MIPS32 Release 6"
1468	depends on SYS_HAS_CPU_MIPS32_R6
1469	select CPU_HAS_PREFETCH
1470	select CPU_NO_LOAD_STORE_LR
1471	select CPU_SUPPORTS_32BIT_KERNEL
1472	select CPU_SUPPORTS_HIGHMEM
1473	select CPU_SUPPORTS_MSA
1474	select CPU_SUPPORTS_VZ
1475	select MIPS_O32_FP64_SUPPORT
1476	help
1477	  Choose this option to build a kernel for release 6 or later of the
1478	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
1479	  family, are based on a MIPS32r6 processor. If you own an older
1480	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1481
1482config CPU_MIPS64_R1
1483	bool "MIPS64 Release 1"
1484	depends on SYS_HAS_CPU_MIPS64_R1
1485	select CPU_HAS_PREFETCH
1486	select CPU_SUPPORTS_32BIT_KERNEL
1487	select CPU_SUPPORTS_64BIT_KERNEL
1488	select CPU_SUPPORTS_HIGHMEM
1489	select CPU_SUPPORTS_HUGEPAGES
1490	help
1491	  Choose this option to build a kernel for release 1 or later of the
1492	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1493	  MIPS processor are based on a MIPS64 processor.  If you know the
1494	  specific type of processor in your system, choose those that one
1495	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1496	  Release 2 of the MIPS64 architecture is available since several
1497	  years so chances are you even have a MIPS64 Release 2 processor
1498	  in which case you should choose CPU_MIPS64_R2 instead for better
1499	  performance.
1500
1501config CPU_MIPS64_R2
1502	bool "MIPS64 Release 2"
1503	depends on SYS_HAS_CPU_MIPS64_R2
1504	select CPU_HAS_PREFETCH
1505	select CPU_SUPPORTS_32BIT_KERNEL
1506	select CPU_SUPPORTS_64BIT_KERNEL
1507	select CPU_SUPPORTS_HIGHMEM
1508	select CPU_SUPPORTS_HUGEPAGES
1509	select CPU_SUPPORTS_MSA
1510	help
1511	  Choose this option to build a kernel for release 2 or later of the
1512	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1513	  MIPS processor are based on a MIPS64 processor.  If you know the
1514	  specific type of processor in your system, choose those that one
1515	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1516
1517config CPU_MIPS64_R5
1518	bool "MIPS64 Release 5"
1519	depends on SYS_HAS_CPU_MIPS64_R5
1520	select CPU_HAS_PREFETCH
1521	select CPU_SUPPORTS_32BIT_KERNEL
1522	select CPU_SUPPORTS_64BIT_KERNEL
1523	select CPU_SUPPORTS_HIGHMEM
1524	select CPU_SUPPORTS_HUGEPAGES
1525	select CPU_SUPPORTS_MSA
1526	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1527	select CPU_SUPPORTS_VZ
1528	help
1529	  Choose this option to build a kernel for release 5 or later of the
1530	  MIPS64 architecture.  This is a intermediate MIPS architecture
1531	  release partly implementing release 6 features. Though there is no
1532	  any hardware known to be based on this release.
1533
1534config CPU_MIPS64_R6
1535	bool "MIPS64 Release 6"
1536	depends on SYS_HAS_CPU_MIPS64_R6
1537	select CPU_HAS_PREFETCH
1538	select CPU_NO_LOAD_STORE_LR
1539	select CPU_SUPPORTS_32BIT_KERNEL
1540	select CPU_SUPPORTS_64BIT_KERNEL
1541	select CPU_SUPPORTS_HIGHMEM
1542	select CPU_SUPPORTS_HUGEPAGES
1543	select CPU_SUPPORTS_MSA
1544	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1545	select CPU_SUPPORTS_VZ
1546	help
1547	  Choose this option to build a kernel for release 6 or later of the
1548	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
1549	  family, are based on a MIPS64r6 processor. If you own an older
1550	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1551
1552config CPU_P5600
1553	bool "MIPS Warrior P5600"
1554	depends on SYS_HAS_CPU_P5600
1555	select CPU_HAS_PREFETCH
1556	select CPU_SUPPORTS_32BIT_KERNEL
1557	select CPU_SUPPORTS_HIGHMEM
1558	select CPU_SUPPORTS_MSA
1559	select CPU_SUPPORTS_CPUFREQ
1560	select CPU_SUPPORTS_VZ
1561	select CPU_MIPSR2_IRQ_VI
1562	select CPU_MIPSR2_IRQ_EI
1563	select MIPS_O32_FP64_SUPPORT
1564	help
1565	  Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1566	  It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1567	  MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1568	  level features like up to six P5600 calculation cores, CM2 with L2
1569	  cache, IOCU/IOMMU (though might be unused depending on the system-
1570	  specific IP core configuration), GIC, CPC, virtualisation module,
1571	  eJTAG and PDtrace.
1572
1573config CPU_R3000
1574	bool "R3000"
1575	depends on SYS_HAS_CPU_R3000
1576	select CPU_HAS_WB
1577	select CPU_R3K_TLB
1578	select CPU_SUPPORTS_32BIT_KERNEL
1579	select CPU_SUPPORTS_HIGHMEM
1580	help
1581	  Please make sure to pick the right CPU type. Linux/MIPS is not
1582	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1583	  *not* work on R4000 machines and vice versa.  However, since most
1584	  of the supported machines have an R4000 (or similar) CPU, R4x00
1585	  might be a safe bet.  If the resulting kernel does not work,
1586	  try to recompile with R3000.
1587
1588config CPU_R4300
1589	bool "R4300"
1590	depends on SYS_HAS_CPU_R4300
1591	select CPU_SUPPORTS_32BIT_KERNEL
1592	select CPU_SUPPORTS_64BIT_KERNEL
1593	help
1594	  MIPS Technologies R4300-series processors.
1595
1596config CPU_R4X00
1597	bool "R4x00"
1598	depends on SYS_HAS_CPU_R4X00
1599	select CPU_SUPPORTS_32BIT_KERNEL
1600	select CPU_SUPPORTS_64BIT_KERNEL
1601	select CPU_SUPPORTS_HUGEPAGES
1602	help
1603	  MIPS Technologies R4000-series processors other than 4300, including
1604	  the R4000, R4400, R4600, and 4700.
1605
1606config CPU_TX49XX
1607	bool "R49XX"
1608	depends on SYS_HAS_CPU_TX49XX
1609	select CPU_HAS_PREFETCH
1610	select CPU_SUPPORTS_32BIT_KERNEL
1611	select CPU_SUPPORTS_64BIT_KERNEL
1612	select CPU_SUPPORTS_HUGEPAGES
1613
1614config CPU_R5000
1615	bool "R5000"
1616	depends on SYS_HAS_CPU_R5000
1617	select CPU_SUPPORTS_32BIT_KERNEL
1618	select CPU_SUPPORTS_64BIT_KERNEL
1619	select CPU_SUPPORTS_HUGEPAGES
1620	help
1621	  MIPS Technologies R5000-series processors other than the Nevada.
1622
1623config CPU_R5500
1624	bool "R5500"
1625	depends on SYS_HAS_CPU_R5500
1626	select CPU_SUPPORTS_32BIT_KERNEL
1627	select CPU_SUPPORTS_64BIT_KERNEL
1628	select CPU_SUPPORTS_HUGEPAGES
1629	help
1630	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1631	  instruction set.
1632
1633config CPU_NEVADA
1634	bool "RM52xx"
1635	depends on SYS_HAS_CPU_NEVADA
1636	select CPU_SUPPORTS_32BIT_KERNEL
1637	select CPU_SUPPORTS_64BIT_KERNEL
1638	select CPU_SUPPORTS_HUGEPAGES
1639	help
1640	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1641
1642config CPU_R10000
1643	bool "R10000"
1644	depends on SYS_HAS_CPU_R10000
1645	select CPU_HAS_PREFETCH
1646	select CPU_SUPPORTS_32BIT_KERNEL
1647	select CPU_SUPPORTS_64BIT_KERNEL
1648	select CPU_SUPPORTS_HIGHMEM
1649	select CPU_SUPPORTS_HUGEPAGES
1650	help
1651	  MIPS Technologies R10000-series processors.
1652
1653config CPU_RM7000
1654	bool "RM7000"
1655	depends on SYS_HAS_CPU_RM7000
1656	select CPU_HAS_PREFETCH
1657	select CPU_SUPPORTS_32BIT_KERNEL
1658	select CPU_SUPPORTS_64BIT_KERNEL
1659	select CPU_SUPPORTS_HIGHMEM
1660	select CPU_SUPPORTS_HUGEPAGES
1661
1662config CPU_SB1
1663	bool "SB1"
1664	depends on SYS_HAS_CPU_SB1
1665	select CPU_SUPPORTS_32BIT_KERNEL
1666	select CPU_SUPPORTS_64BIT_KERNEL
1667	select CPU_SUPPORTS_HIGHMEM
1668	select CPU_SUPPORTS_HUGEPAGES
1669	select WEAK_ORDERING
1670
1671config CPU_CAVIUM_OCTEON
1672	bool "Cavium Octeon processor"
1673	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1674	select CPU_HAS_PREFETCH
1675	select CPU_SUPPORTS_64BIT_KERNEL
1676	select HAVE_PAGE_SIZE_8KB if !MIPS_VA_BITS_48
1677	select HAVE_PAGE_SIZE_32KB if !MIPS_VA_BITS_48
1678	select WEAK_ORDERING
1679	select CPU_SUPPORTS_HIGHMEM
1680	select CPU_SUPPORTS_HUGEPAGES
1681	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1682	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1683	select MIPS_L1_CACHE_SHIFT_7
1684	select CPU_SUPPORTS_VZ
1685	help
1686	  The Cavium Octeon processor is a highly integrated chip containing
1687	  many ethernet hardware widgets for networking tasks. The processor
1688	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1689	  Full details can be found at http://www.caviumnetworks.com.
1690
1691config CPU_BMIPS
1692	bool "Broadcom BMIPS"
1693	depends on SYS_HAS_CPU_BMIPS
1694	select CPU_MIPS32
1695	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1696	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1697	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1698	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1699	select CPU_SUPPORTS_32BIT_KERNEL
1700	select DMA_NONCOHERENT
1701	select IRQ_MIPS_CPU
1702	select SWAP_IO_SPACE
1703	select WEAK_ORDERING
1704	select CPU_SUPPORTS_HIGHMEM
1705	select CPU_HAS_PREFETCH
1706	select CPU_SUPPORTS_CPUFREQ
1707	select MIPS_EXTERNAL_TIMER
1708	select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
1709	help
1710	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1711
1712endchoice
1713
1714config LOONGSON3_ENHANCEMENT
1715	bool "New Loongson-3 CPU Enhancements"
1716	default n
1717	depends on CPU_LOONGSON64
1718	help
1719	  New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1720	  R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1721	  FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1722	  Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1723	  Fast TLB refill support, etc.
1724
1725	  This option enable those enhancements which are not probed at run
1726	  time. If you want a generic kernel to run on all Loongson 3 machines,
1727	  please say 'N' here. If you want a high-performance kernel to run on
1728	  new Loongson-3 machines only, please say 'Y' here.
1729
1730config CPU_LOONGSON3_WORKAROUNDS
1731	bool "Loongson-3 LLSC Workarounds"
1732	default y if SMP
1733	depends on CPU_LOONGSON64
1734	help
1735	  Loongson-3 processors have the llsc issues which require workarounds.
1736	  Without workarounds the system may hang unexpectedly.
1737
1738	  Say Y, unless you know what you are doing.
1739
1740config CPU_LOONGSON3_CPUCFG_EMULATION
1741	bool "Emulate the CPUCFG instruction on older Loongson cores"
1742	default y
1743	depends on CPU_LOONGSON64
1744	help
1745	  Loongson-3A R4 and newer have the CPUCFG instruction available for
1746	  userland to query CPU capabilities, much like CPUID on x86. This
1747	  option provides emulation of the instruction on older Loongson
1748	  cores, back to Loongson-3A1000.
1749
1750	  If unsure, please say Y.
1751
1752config CPU_MIPS32_3_5_FEATURES
1753	bool "MIPS32 Release 3.5 Features"
1754	depends on SYS_HAS_CPU_MIPS32_R3_5
1755	depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1756		   CPU_P5600
1757	help
1758	  Choose this option to build a kernel for release 2 or later of the
1759	  MIPS32 architecture including features from the 3.5 release such as
1760	  support for Enhanced Virtual Addressing (EVA).
1761
1762config CPU_MIPS32_3_5_EVA
1763	bool "Enhanced Virtual Addressing (EVA)"
1764	depends on CPU_MIPS32_3_5_FEATURES
1765	select EVA
1766	default y
1767	help
1768	  Choose this option if you want to enable the Enhanced Virtual
1769	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1770	  One of its primary benefits is an increase in the maximum size
1771	  of lowmem (up to 3GB). If unsure, say 'N' here.
1772
1773config CPU_MIPS32_R5_FEATURES
1774	bool "MIPS32 Release 5 Features"
1775	depends on SYS_HAS_CPU_MIPS32_R5
1776	depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1777	help
1778	  Choose this option to build a kernel for release 2 or later of the
1779	  MIPS32 architecture including features from release 5 such as
1780	  support for Extended Physical Addressing (XPA).
1781
1782config CPU_MIPS32_R5_XPA
1783	bool "Extended Physical Addressing (XPA)"
1784	depends on CPU_MIPS32_R5_FEATURES
1785	depends on !EVA
1786	depends on !PAGE_SIZE_4KB
1787	depends on SYS_SUPPORTS_HIGHMEM
1788	select XPA
1789	select HIGHMEM
1790	select PHYS_ADDR_T_64BIT
1791	default n
1792	help
1793	  Choose this option if you want to enable the Extended Physical
1794	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1795	  benefit is to increase physical addressing equal to or greater
1796	  than 40 bits. Note that this has the side effect of turning on
1797	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1798	  If unsure, say 'N' here.
1799
1800if CPU_LOONGSON2F
1801config CPU_NOP_WORKAROUNDS
1802	bool
1803
1804config CPU_JUMP_WORKAROUNDS
1805	bool
1806
1807config CPU_LOONGSON2F_WORKAROUNDS
1808	bool "Loongson 2F Workarounds"
1809	default y
1810	select CPU_NOP_WORKAROUNDS
1811	select CPU_JUMP_WORKAROUNDS
1812	help
1813	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1814	  require workarounds.  Without workarounds the system may hang
1815	  unexpectedly.  For more information please refer to the gas
1816	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1817
1818	  Loongson 2F03 and later have fixed these issues and no workarounds
1819	  are needed.  The workarounds have no significant side effect on them
1820	  but may decrease the performance of the system so this option should
1821	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1822	  systems.
1823
1824	  If unsure, please say Y.
1825endif # CPU_LOONGSON2F
1826
1827config SYS_SUPPORTS_ZBOOT
1828	bool
1829	select HAVE_KERNEL_GZIP
1830	select HAVE_KERNEL_BZIP2
1831	select HAVE_KERNEL_LZ4
1832	select HAVE_KERNEL_LZMA
1833	select HAVE_KERNEL_LZO
1834	select HAVE_KERNEL_XZ
1835	select HAVE_KERNEL_ZSTD
1836
1837config SYS_SUPPORTS_ZBOOT_UART16550
1838	bool
1839	select SYS_SUPPORTS_ZBOOT
1840
1841config SYS_SUPPORTS_ZBOOT_UART_PROM
1842	bool
1843	select SYS_SUPPORTS_ZBOOT
1844
1845config CPU_LOONGSON2EF
1846	bool
1847	select CPU_SUPPORTS_32BIT_KERNEL
1848	select CPU_SUPPORTS_64BIT_KERNEL
1849	select CPU_SUPPORTS_HIGHMEM
1850	select CPU_SUPPORTS_HUGEPAGES
1851	select RTC_MC146818_LIB
1852
1853config CPU_BMIPS32_3300
1854	select SMP_UP if SMP
1855	bool
1856
1857config CPU_BMIPS4350
1858	bool
1859	select SYS_SUPPORTS_SMP
1860	select SYS_SUPPORTS_HOTPLUG_CPU
1861
1862config CPU_BMIPS4380
1863	bool
1864	select MIPS_L1_CACHE_SHIFT_6
1865	select SYS_SUPPORTS_SMP
1866	select SYS_SUPPORTS_HOTPLUG_CPU
1867	select CPU_HAS_RIXI
1868
1869config CPU_BMIPS5000
1870	bool
1871	select MIPS_CPU_SCACHE
1872	select MIPS_L1_CACHE_SHIFT_7
1873	select SYS_SUPPORTS_SMP
1874	select SYS_SUPPORTS_HOTPLUG_CPU
1875	select CPU_HAS_RIXI
1876
1877config SYS_HAS_CPU_LOONGSON64
1878	bool
1879	select CPU_SUPPORTS_CPUFREQ
1880	select CPU_HAS_RIXI
1881
1882config SYS_HAS_CPU_LOONGSON2E
1883	bool
1884
1885config SYS_HAS_CPU_LOONGSON2F
1886	bool
1887	select CPU_SUPPORTS_CPUFREQ
1888	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1889
1890config SYS_HAS_CPU_LOONGSON32
1891	bool
1892
1893config SYS_HAS_CPU_MIPS32_R1
1894	bool
1895
1896config SYS_HAS_CPU_MIPS32_R2
1897	bool
1898
1899config SYS_HAS_CPU_MIPS32_R3_5
1900	bool
1901
1902config SYS_HAS_CPU_MIPS32_R5
1903	bool
1904
1905config SYS_HAS_CPU_MIPS32_R6
1906	bool
1907
1908config SYS_HAS_CPU_MIPS64_R1
1909	bool
1910
1911config SYS_HAS_CPU_MIPS64_R2
1912	bool
1913
1914config SYS_HAS_CPU_MIPS64_R5
1915	bool
1916
1917config SYS_HAS_CPU_MIPS64_R6
1918	bool
1919
1920config SYS_HAS_CPU_P5600
1921	bool
1922
1923config SYS_HAS_CPU_R3000
1924	bool
1925
1926config SYS_HAS_CPU_R4300
1927	bool
1928
1929config SYS_HAS_CPU_R4X00
1930	bool
1931
1932config SYS_HAS_CPU_TX49XX
1933	bool
1934
1935config SYS_HAS_CPU_R5000
1936	bool
1937
1938config SYS_HAS_CPU_R5500
1939	bool
1940
1941config SYS_HAS_CPU_NEVADA
1942	bool
1943
1944config SYS_HAS_CPU_R10000
1945	bool
1946
1947config SYS_HAS_CPU_RM7000
1948	bool
1949
1950config SYS_HAS_CPU_SB1
1951	bool
1952
1953config SYS_HAS_CPU_CAVIUM_OCTEON
1954	bool
1955
1956config SYS_HAS_CPU_BMIPS
1957	bool
1958
1959config SYS_HAS_CPU_BMIPS32_3300
1960	bool
1961	select SYS_HAS_CPU_BMIPS
1962
1963config SYS_HAS_CPU_BMIPS4350
1964	bool
1965	select SYS_HAS_CPU_BMIPS
1966
1967config SYS_HAS_CPU_BMIPS4380
1968	bool
1969	select SYS_HAS_CPU_BMIPS
1970
1971config SYS_HAS_CPU_BMIPS5000
1972	bool
1973	select SYS_HAS_CPU_BMIPS
1974
1975#
1976# CPU may reorder R->R, R->W, W->R, W->W
1977# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1978#
1979config WEAK_ORDERING
1980	bool
1981
1982#
1983# CPU may reorder reads and writes beyond LL/SC
1984# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1985#
1986config WEAK_REORDERING_BEYOND_LLSC
1987	bool
1988endmenu
1989
1990#
1991# These two indicate any level of the MIPS32 and MIPS64 architecture
1992#
1993config CPU_MIPS32
1994	bool
1995	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1996		     CPU_MIPS32_R6 || CPU_P5600
1997
1998config CPU_MIPS64
1999	bool
2000	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2001		     CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
2002
2003#
2004# These indicate the revision of the architecture
2005#
2006config CPU_MIPSR1
2007	bool
2008	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2009
2010config CPU_MIPSR2
2011	bool
2012	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2013	select CPU_HAS_RIXI
2014	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2015	select MIPS_SPRAM
2016
2017config CPU_MIPSR5
2018	bool
2019	default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2020	select CPU_HAS_RIXI
2021	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2022	select MIPS_SPRAM
2023
2024config CPU_MIPSR6
2025	bool
2026	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2027	select CPU_HAS_RIXI
2028	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2029	select HAVE_ARCH_BITREVERSE
2030	select MIPS_ASID_BITS_VARIABLE
2031	select MIPS_SPRAM
2032
2033config TARGET_ISA_REV
2034	int
2035	default 1 if CPU_MIPSR1
2036	default 2 if CPU_MIPSR2
2037	default 5 if CPU_MIPSR5
2038	default 6 if CPU_MIPSR6
2039	default 0
2040	help
2041	  Reflects the ISA revision being targeted by the kernel build. This
2042	  is effectively the Kconfig equivalent of MIPS_ISA_REV.
2043
2044config EVA
2045	bool
2046
2047config XPA
2048	bool
2049
2050config SYS_SUPPORTS_32BIT_KERNEL
2051	bool
2052config SYS_SUPPORTS_64BIT_KERNEL
2053	bool
2054config CPU_SUPPORTS_32BIT_KERNEL
2055	bool
2056config CPU_SUPPORTS_64BIT_KERNEL
2057	bool
2058config CPU_SUPPORTS_CPUFREQ
2059	bool
2060config CPU_SUPPORTS_ADDRWINCFG
2061	bool
2062config CPU_SUPPORTS_HUGEPAGES
2063	bool
2064	depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
2065config CPU_SUPPORTS_VZ
2066	bool
2067config MIPS_PGD_C0_CONTEXT
2068	bool
2069	depends on 64BIT
2070	default y if (CPU_MIPSR2 || CPU_MIPSR6)
2071
2072#
2073# Set to y for ptrace access to watch registers.
2074#
2075config HARDWARE_WATCHPOINTS
2076	bool
2077	default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2078
2079menu "Kernel type"
2080
2081choice
2082	prompt "Kernel code model"
2083	help
2084	  You should only select this option if you have a workload that
2085	  actually benefits from 64-bit processing or if your machine has
2086	  large memory.  You will only be presented a single option in this
2087	  menu if your system does not support both 32-bit and 64-bit kernels.
2088
2089config 32BIT
2090	bool "32-bit kernel"
2091	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2092	select TRAD_SIGNALS
2093	help
2094	  Select this option if you want to build a 32-bit kernel.
2095
2096config 64BIT
2097	bool "64-bit kernel"
2098	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2099	help
2100	  Select this option if you want to build a 64-bit kernel.
2101
2102endchoice
2103
2104config MIPS_VA_BITS_48
2105	bool "48 bits virtual memory"
2106	depends on 64BIT
2107	help
2108	  Support a maximum at least 48 bits of application virtual
2109	  memory.  Default is 40 bits or less, depending on the CPU.
2110	  For page sizes 16k and above, this option results in a small
2111	  memory overhead for page tables.  For 4k page size, a fourth
2112	  level of page tables is added which imposes both a memory
2113	  overhead as well as slower TLB fault handling.
2114
2115	  If unsure, say N.
2116
2117config ZBOOT_LOAD_ADDRESS
2118	hex "Compressed kernel load address"
2119	default 0xffffffff80400000 if BCM47XX
2120	default 0x0
2121	depends on SYS_SUPPORTS_ZBOOT
2122	help
2123	  The address to load compressed kernel, aka vmlinuz.
2124
2125	  This is only used if non-zero.
2126
2127config ARCH_FORCE_MAX_ORDER
2128	int "Maximum zone order"
2129	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2130	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2131	default "11" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2132	default "10"
2133	help
2134	  The kernel memory allocator divides physically contiguous memory
2135	  blocks into "zones", where each zone is a power of two number of
2136	  pages.  This option selects the largest power of two that the kernel
2137	  keeps in the memory allocator.  If you need to allocate very large
2138	  blocks of physically contiguous memory, then you may need to
2139	  increase this value.
2140
2141	  The page size is not necessarily 4KB.  Keep this in mind
2142	  when choosing a value for this option.
2143
2144config BOARD_SCACHE
2145	bool
2146
2147config IP22_CPU_SCACHE
2148	bool
2149	select BOARD_SCACHE
2150
2151#
2152# Support for a MIPS32 / MIPS64 style S-caches
2153#
2154config MIPS_CPU_SCACHE
2155	bool
2156	select BOARD_SCACHE
2157
2158config R5000_CPU_SCACHE
2159	bool
2160	select BOARD_SCACHE
2161
2162config RM7000_CPU_SCACHE
2163	bool
2164	select BOARD_SCACHE
2165
2166config SIBYTE_DMA_PAGEOPS
2167	bool "Use DMA to clear/copy pages"
2168	depends on CPU_SB1
2169	help
2170	  Instead of using the CPU to zero and copy pages, use a Data Mover
2171	  channel.  These DMA channels are otherwise unused by the standard
2172	  SiByte Linux port.  Seems to give a small performance benefit.
2173
2174config CPU_HAS_PREFETCH
2175	bool
2176
2177config CPU_GENERIC_DUMP_TLB
2178	bool
2179	default y if !CPU_R3000
2180
2181config MIPS_FP_SUPPORT
2182	bool "Floating Point support" if EXPERT
2183	default y
2184	help
2185	  Select y to include support for floating point in the kernel
2186	  including initialization of FPU hardware, FP context save & restore
2187	  and emulation of an FPU where necessary. Without this support any
2188	  userland program attempting to use floating point instructions will
2189	  receive a SIGILL.
2190
2191	  If you know that your userland will not attempt to use floating point
2192	  instructions then you can say n here to shrink the kernel a little.
2193
2194	  If unsure, say y.
2195
2196config CPU_R2300_FPU
2197	bool
2198	depends on MIPS_FP_SUPPORT
2199	default y if CPU_R3000
2200
2201config CPU_R3K_TLB
2202	bool
2203
2204config CPU_R4K_FPU
2205	bool
2206	depends on MIPS_FP_SUPPORT
2207	default y if !CPU_R2300_FPU
2208
2209config CPU_R4K_CACHE_TLB
2210	bool
2211	default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2212
2213config MIPS_MT_SMP
2214	bool "MIPS MT SMP support (1 TC on each available VPE)"
2215	default y
2216	depends on TARGET_ISA_REV > 0 && TARGET_ISA_REV < 6
2217	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MICROMIPS
2218	select CPU_MIPSR2_IRQ_VI
2219	select CPU_MIPSR2_IRQ_EI
2220	select SYNC_R4K
2221	select MIPS_MT
2222	select SMP
2223	select SMP_UP
2224	select SYS_SUPPORTS_SMP
2225	select ARCH_SUPPORTS_SCHED_SMT
2226	select MIPS_PERF_SHARED_TC_COUNTERS
2227	help
2228	  This is a kernel model which is known as SMVP. This is supported
2229	  on cores with the MT ASE and uses the available VPEs to implement
2230	  virtual processors which supports SMP. This is equivalent to the
2231	  Intel Hyperthreading feature. For further information go to
2232	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
2233
2234config MIPS_MT
2235	bool
2236
2237config SYS_SUPPORTS_MULTITHREADING
2238	bool
2239
2240config MIPS_MT_FPAFF
2241	bool "Dynamic FPU affinity for FP-intensive threads"
2242	default y
2243	depends on MIPS_MT_SMP
2244
2245config MIPSR2_TO_R6_EMULATOR
2246	bool "MIPS R2-to-R6 emulator"
2247	depends on CPU_MIPSR6
2248	depends on MIPS_FP_SUPPORT
2249	default y
2250	help
2251	  Choose this option if you want to run non-R6 MIPS userland code.
2252	  Even if you say 'Y' here, the emulator will still be disabled by
2253	  default. You can enable it using the 'mipsr2emu' kernel option.
2254	  The only reason this is a build-time option is to save ~14K from the
2255	  final kernel image.
2256
2257config SYS_SUPPORTS_VPE_LOADER
2258	bool
2259	depends on SYS_SUPPORTS_MULTITHREADING
2260	help
2261	  Indicates that the platform supports the VPE loader, and provides
2262	  physical_memsize.
2263
2264config MIPS_VPE_LOADER
2265	bool "VPE loader support."
2266	depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2267	select CPU_MIPSR2_IRQ_VI
2268	select CPU_MIPSR2_IRQ_EI
2269	select MIPS_MT
2270	help
2271	  Includes a loader for loading an elf relocatable object
2272	  onto another VPE and running it.
2273
2274config MIPS_VPE_LOADER_MT
2275	bool
2276	default "y"
2277	depends on MIPS_VPE_LOADER
2278
2279config MIPS_VPE_LOADER_TOM
2280	bool "Load VPE program into memory hidden from linux"
2281	depends on MIPS_VPE_LOADER
2282	default y
2283	help
2284	  The loader can use memory that is present but has been hidden from
2285	  Linux using the kernel command line option "mem=xxMB". It's up to
2286	  you to ensure the amount you put in the option and the space your
2287	  program requires is less or equal to the amount physically present.
2288
2289config MIPS_VPE_APSP_API
2290	bool "Enable support for AP/SP API (RTLX)"
2291	depends on MIPS_VPE_LOADER
2292
2293config MIPS_VPE_APSP_API_MT
2294	bool
2295	default "y"
2296	depends on MIPS_VPE_APSP_API
2297
2298config MIPS_CPS
2299	bool "MIPS Coherent Processing System support"
2300	depends on SYS_SUPPORTS_MIPS_CPS
2301	select MIPS_CM
2302	select MIPS_CPS_PM if HOTPLUG_CPU
2303	select SMP
2304	select HOTPLUG_SMT if HOTPLUG_PARALLEL
2305	select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
2306	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2307	select SYS_SUPPORTS_HOTPLUG_CPU
2308	select ARCH_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2309	select SYS_SUPPORTS_SMP
2310	select WEAK_ORDERING
2311	select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2312	help
2313	  Select this if you wish to run an SMP kernel across multiple cores
2314	  within a MIPS Coherent Processing System. When this option is
2315	  enabled the kernel will probe for other cores and boot them with
2316	  no external assistance. It is safe to enable this when hardware
2317	  support is unavailable.
2318
2319config MIPS_CPS_PM
2320	depends on MIPS_CPS
2321	bool
2322
2323config MIPS_CM
2324	bool
2325	select MIPS_CPC
2326
2327config MIPS_CPC
2328	bool
2329
2330config SB1_PASS_2_WORKAROUNDS
2331	bool
2332	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2333	default y
2334
2335config SB1_PASS_2_1_WORKAROUNDS
2336	bool
2337	depends on CPU_SB1 && CPU_SB1_PASS_2
2338	default y
2339
2340choice
2341	prompt "SmartMIPS or microMIPS ASE support"
2342
2343config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2344	bool "None"
2345	help
2346	  Select this if you want neither microMIPS nor SmartMIPS support
2347
2348config CPU_HAS_SMARTMIPS
2349	depends on SYS_SUPPORTS_SMARTMIPS
2350	bool "SmartMIPS"
2351	help
2352	  SmartMIPS is a extension of the MIPS32 architecture aimed at
2353	  increased security at both hardware and software level for
2354	  smartcards.  Enabling this option will allow proper use of the
2355	  SmartMIPS instructions by Linux applications.  However a kernel with
2356	  this option will not work on a MIPS core without SmartMIPS core.  If
2357	  you don't know you probably don't have SmartMIPS and should say N
2358	  here.
2359
2360config CPU_MICROMIPS
2361	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2362	bool "microMIPS"
2363	help
2364	  When this option is enabled the kernel will be built using the
2365	  microMIPS ISA
2366
2367endchoice
2368
2369config CPU_HAS_MSA
2370	bool "Support for the MIPS SIMD Architecture"
2371	depends on CPU_SUPPORTS_MSA
2372	depends on MIPS_FP_SUPPORT
2373	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2374	help
2375	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2376	  and a set of SIMD instructions to operate on them. When this option
2377	  is enabled the kernel will support allocating & switching MSA
2378	  vector register contexts. If you know that your kernel will only be
2379	  running on CPUs which do not support MSA or that your userland will
2380	  not be making use of it then you may wish to say N here to reduce
2381	  the size & complexity of your kernel.
2382
2383	  If unsure, say Y.
2384
2385config CPU_HAS_WB
2386	bool
2387
2388config XKS01
2389	bool
2390
2391config CPU_HAS_DIEI
2392	depends on !CPU_DIEI_BROKEN
2393	bool
2394
2395config CPU_DIEI_BROKEN
2396	bool
2397
2398config CPU_HAS_RIXI
2399	bool
2400
2401config CPU_NO_LOAD_STORE_LR
2402	bool
2403	help
2404	  CPU lacks support for unaligned load and store instructions:
2405	  LWL, LWR, SWL, SWR (Load/store word left/right).
2406	  LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2407	  systems).
2408
2409#
2410# Vectored interrupt mode is an R2 feature
2411#
2412config CPU_MIPSR2_IRQ_VI
2413	bool
2414
2415#
2416# Extended interrupt mode is an R2 feature
2417#
2418config CPU_MIPSR2_IRQ_EI
2419	bool
2420
2421config CPU_HAS_SYNC
2422	bool
2423	depends on !CPU_R3000
2424	default y
2425
2426#
2427# CPU non-features
2428#
2429
2430# Work around the "daddi" and "daddiu" CPU errata:
2431#
2432# - The `daddi' instruction fails to trap on overflow.
2433#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2434#   erratum #23
2435#
2436# - The `daddiu' instruction can produce an incorrect result.
2437#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2438#   erratum #41
2439#   "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2440#   #15
2441#   "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
2442#   "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
2443config CPU_DADDI_WORKAROUNDS
2444	bool
2445
2446# Work around certain R4000 CPU errata (as implemented by GCC):
2447#
2448# - A double-word or a variable shift may give an incorrect result
2449#   if executed immediately after starting an integer division:
2450#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2451#   erratum #28
2452#   "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2453#   #19
2454#
2455# - A double-word or a variable shift may give an incorrect result
2456#   if executed while an integer multiplication is in progress:
2457#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2458#   errata #16 & #28
2459#
2460# - An integer division may give an incorrect result if started in
2461#   a delay slot of a taken branch or a jump:
2462#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2463#   erratum #52
2464config CPU_R4000_WORKAROUNDS
2465	bool
2466	select CPU_R4400_WORKAROUNDS
2467
2468# Work around certain R4400 CPU errata (as implemented by GCC):
2469#
2470# - A double-word or a variable shift may give an incorrect result
2471#   if executed immediately after starting an integer division:
2472#   "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
2473#   "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
2474config CPU_R4400_WORKAROUNDS
2475	bool
2476
2477config CPU_R4X00_BUGS64
2478	bool
2479	default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2480
2481config MIPS_ASID_SHIFT
2482	int
2483	default 6 if CPU_R3000
2484	default 0
2485
2486config MIPS_ASID_BITS
2487	int
2488	default 0 if MIPS_ASID_BITS_VARIABLE
2489	default 6 if CPU_R3000
2490	default 8
2491
2492config MIPS_ASID_BITS_VARIABLE
2493	bool
2494
2495# R4600 erratum.  Due to the lack of errata information the exact
2496# technical details aren't known.  I've experimentally found that disabling
2497# interrupts during indexed I-cache flushes seems to be sufficient to deal
2498# with the issue.
2499config WAR_R4600_V1_INDEX_ICACHEOP
2500	bool
2501
2502# Pleasures of the R4600 V1.x.  Cite from the IDT R4600 V1.7 errata:
2503#
2504#  18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2505#      Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2506#      executed if there is no other dcache activity. If the dcache is
2507#      accessed for another instruction immediately preceding when these
2508#      cache instructions are executing, it is possible that the dcache
2509#      tag match outputs used by these cache instructions will be
2510#      incorrect. These cache instructions should be preceded by at least
2511#      four instructions that are not any kind of load or store
2512#      instruction.
2513#
2514#      This is not allowed:    lw
2515#                              nop
2516#                              nop
2517#                              nop
2518#                              cache       Hit_Writeback_Invalidate_D
2519#
2520#      This is allowed:        lw
2521#                              nop
2522#                              nop
2523#                              nop
2524#                              nop
2525#                              cache       Hit_Writeback_Invalidate_D
2526config WAR_R4600_V1_HIT_CACHEOP
2527	bool
2528
2529# Writeback and invalidate the primary cache dcache before DMA.
2530#
2531# R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2532# Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2533# operate correctly if the internal data cache refill buffer is empty.  These
2534# CACHE instructions should be separated from any potential data cache miss
2535# by a load instruction to an uncached address to empty the response buffer."
2536# (Revision 2.0 device errata from IDT available on https://www.idt.com/
2537# in .pdf format.)
2538config WAR_R4600_V2_HIT_CACHEOP
2539	bool
2540
2541# From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2542# the line which this instruction itself exists, the following
2543# operation is not guaranteed."
2544#
2545# Workaround: do two phase flushing for Index_Invalidate_I
2546config WAR_TX49XX_ICACHE_INDEX_INV
2547	bool
2548
2549# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2550# opposes it being called that) where invalid instructions in the same
2551# I-cache line worth of instructions being fetched may case spurious
2552# exceptions.
2553config WAR_ICACHE_REFILLS
2554	bool
2555
2556# On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2557# may cause ll / sc and lld / scd sequences to execute non-atomically.
2558config WAR_R10000_LLSC
2559	bool
2560
2561# 34K core erratum: "Problems Executing the TLBR Instruction"
2562config WAR_MIPS34K_MISSED_ITLB
2563	bool
2564
2565#
2566# - Highmem only makes sense for the 32-bit kernel.
2567# - The current highmem code will only work properly on physically indexed
2568#   caches such as R3000, SB1, R7000 or those that look like they're virtually
2569#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
2570#   moment we protect the user and offer the highmem option only on machines
2571#   where it's known to be safe.  This will not offer highmem on a few systems
2572#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2573#   indexed CPUs but we're playing safe.
2574# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2575#   know they might have memory configurations that could make use of highmem
2576#   support.
2577#
2578config HIGHMEM
2579	bool "High Memory Support"
2580	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2581	select KMAP_LOCAL
2582
2583config CPU_SUPPORTS_HIGHMEM
2584	bool
2585
2586config SYS_SUPPORTS_HIGHMEM
2587	bool
2588
2589config SYS_SUPPORTS_SMARTMIPS
2590	bool
2591
2592config SYS_SUPPORTS_MICROMIPS
2593	bool
2594
2595config SYS_SUPPORTS_MIPS16
2596	bool
2597	help
2598	  This option must be set if a kernel might be executed on a MIPS16-
2599	  enabled CPU even if MIPS16 is not actually being used.  In other
2600	  words, it makes the kernel MIPS16-tolerant.
2601
2602config CPU_SUPPORTS_MSA
2603	bool
2604
2605config ARCH_FLATMEM_ENABLE
2606	def_bool y
2607	depends on !NUMA && !CPU_LOONGSON2EF
2608
2609config ARCH_SPARSEMEM_ENABLE
2610	bool
2611
2612config NUMA
2613	bool "NUMA Support"
2614	depends on SYS_SUPPORTS_NUMA
2615	select SMP
2616	select HAVE_SETUP_PER_CPU_AREA
2617	select NEED_PER_CPU_EMBED_FIRST_CHUNK
2618	help
2619	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2620	  Access).  This option improves performance on systems with more
2621	  than two nodes; on two node systems it is generally better to
2622	  leave it disabled; on single node systems leave this option
2623	  disabled.
2624
2625config SYS_SUPPORTS_NUMA
2626	bool
2627
2628config RELOCATABLE
2629	bool "Relocatable kernel"
2630	depends on SYS_SUPPORTS_RELOCATABLE
2631	depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2632		   CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2633		   CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2634		   CPU_P5600 || CAVIUM_OCTEON_SOC || \
2635		   CPU_LOONGSON64
2636	select ARCH_VMLINUX_NEEDS_RELOCS
2637	help
2638	  This builds a kernel image that retains relocation information
2639	  so it can be loaded someplace besides the default 1MB.
2640	  The relocations make the kernel binary about 15% larger,
2641	  but are discarded at runtime
2642
2643config RELOCATION_TABLE_SIZE
2644	hex "Relocation table size"
2645	depends on RELOCATABLE
2646	range 0x0 0x01000000
2647	default "0x00200000" if CPU_LOONGSON64
2648	default "0x00100000"
2649	help
2650	  A table of relocation data will be appended to the kernel binary
2651	  and parsed at boot to fix up the relocated kernel.
2652
2653	  This option allows the amount of space reserved for the table to be
2654	  adjusted, although the default of 1Mb should be ok in most cases.
2655
2656	  The build will fail and a valid size suggested if this is too small.
2657
2658	  If unsure, leave at the default value.
2659
2660config RANDOMIZE_BASE
2661	bool "Randomize the address of the kernel image"
2662	depends on RELOCATABLE
2663	help
2664	  Randomizes the physical and virtual address at which the
2665	  kernel image is loaded, as a security feature that
2666	  deters exploit attempts relying on knowledge of the location
2667	  of kernel internals.
2668
2669	  Entropy is generated using any coprocessor 0 registers available.
2670
2671	  The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2672
2673	  If unsure, say N.
2674
2675config RANDOMIZE_BASE_MAX_OFFSET
2676	hex "Maximum kASLR offset" if EXPERT
2677	depends on RANDOMIZE_BASE
2678	range 0x0 0x40000000 if EVA || 64BIT
2679	range 0x0 0x08000000
2680	default "0x01000000"
2681	help
2682	  When kASLR is active, this provides the maximum offset that will
2683	  be applied to the kernel image. It should be set according to the
2684	  amount of physical RAM available in the target system minus
2685	  PHYSICAL_START and must be a power of 2.
2686
2687	  This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2688	  EVA or 64-bit. The default is 16Mb.
2689
2690config NODES_SHIFT
2691	int
2692	default "6"
2693	depends on NUMA
2694
2695config HW_PERF_EVENTS
2696	bool "Enable hardware performance counter support for perf events"
2697	depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
2698	default y
2699	help
2700	  Enable hardware performance counter support for perf events. If
2701	  disabled, perf events will use software events only.
2702
2703config DMI
2704	bool "Enable DMI scanning"
2705	depends on MACH_LOONGSON64
2706	select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2707	default y
2708	help
2709	  Enabled scanning of DMI to identify machine quirks. Say Y
2710	  here unless you have verified that your setup is not
2711	  affected by entries in the DMI blacklist. Required by PNP
2712	  BIOS code.
2713
2714config SMP
2715	bool "Multi-Processing support"
2716	depends on SYS_SUPPORTS_SMP
2717	help
2718	  This enables support for systems with more than one CPU. If you have
2719	  a system with only one CPU, say N. If you have a system with more
2720	  than one CPU, say Y.
2721
2722	  If you say N here, the kernel will run on uni- and multiprocessor
2723	  machines, but will use only one CPU of a multiprocessor machine. If
2724	  you say Y here, the kernel will run on many, but not all,
2725	  uniprocessor machines. On a uniprocessor machine, the kernel
2726	  will run faster if you say N here.
2727
2728	  People using multiprocessor machines who say Y here should also say
2729	  Y to "Enhanced Real Time Clock Support", below.
2730
2731	  See also the SMP-HOWTO available at
2732	  <https://www.tldp.org/docs.html#howto>.
2733
2734	  If you don't know what to do here, say N.
2735
2736config HOTPLUG_CPU
2737	bool "Support for hot-pluggable CPUs"
2738	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2739	help
2740	  Say Y here to allow turning CPUs off and on. CPUs can be
2741	  controlled through /sys/devices/system/cpu.
2742	  (Note: power management support will enable this option
2743	    automatically on SMP systems. )
2744	  Say N if you want to disable CPU hotplug.
2745
2746config SMP_UP
2747	bool
2748
2749config SYS_SUPPORTS_MIPS_CPS
2750	bool
2751
2752config SYS_SUPPORTS_SMP
2753	bool
2754
2755config NR_CPUS_DEFAULT_4
2756	bool
2757
2758config NR_CPUS_DEFAULT_8
2759	bool
2760
2761config NR_CPUS_DEFAULT_16
2762	bool
2763
2764config NR_CPUS_DEFAULT_32
2765	bool
2766
2767config NR_CPUS_DEFAULT_64
2768	bool
2769
2770config NR_CPUS
2771	int "Maximum number of CPUs (2-256)"
2772	range 2 256
2773	depends on SMP
2774	default "4" if NR_CPUS_DEFAULT_4
2775	default "8" if NR_CPUS_DEFAULT_8
2776	default "16" if NR_CPUS_DEFAULT_16
2777	default "32" if NR_CPUS_DEFAULT_32
2778	default "64" if NR_CPUS_DEFAULT_64
2779	help
2780	  This allows you to specify the maximum number of CPUs which this
2781	  kernel will support.  The maximum supported value is 32 for 32-bit
2782	  kernel and 64 for 64-bit kernels; the minimum value which makes
2783	  sense is 1 for Qemu (useful only for kernel debugging purposes)
2784	  and 2 for all others.
2785
2786	  This is purely to save memory - each supported CPU adds
2787	  approximately eight kilobytes to the kernel image.  For best
2788	  performance should round up your number of processors to the next
2789	  power of two.
2790
2791config MIPS_PERF_SHARED_TC_COUNTERS
2792	bool
2793
2794config MIPS_NR_CPU_NR_MAP_1024
2795	bool
2796
2797config MIPS_NR_CPU_NR_MAP
2798	int
2799	depends on SMP
2800	default 1024 if MIPS_NR_CPU_NR_MAP_1024
2801	default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2802
2803#
2804# Timer Interrupt Frequency Configuration
2805#
2806
2807choice
2808	prompt "Timer frequency"
2809	default HZ_250
2810	help
2811	  Allows the configuration of the timer frequency.
2812
2813	config HZ_24
2814		bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2815
2816	config HZ_48
2817		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2818
2819	config HZ_100
2820		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2821
2822	config HZ_128
2823		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2824
2825	config HZ_250
2826		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2827
2828	config HZ_256
2829		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2830
2831	config HZ_1000
2832		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2833
2834	config HZ_1024
2835		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2836
2837endchoice
2838
2839config SYS_SUPPORTS_24HZ
2840	bool
2841
2842config SYS_SUPPORTS_48HZ
2843	bool
2844
2845config SYS_SUPPORTS_100HZ
2846	bool
2847
2848config SYS_SUPPORTS_128HZ
2849	bool
2850
2851config SYS_SUPPORTS_250HZ
2852	bool
2853
2854config SYS_SUPPORTS_256HZ
2855	bool
2856
2857config SYS_SUPPORTS_1000HZ
2858	bool
2859
2860config SYS_SUPPORTS_1024HZ
2861	bool
2862
2863config SYS_SUPPORTS_ARBIT_HZ
2864	bool
2865	default y if !SYS_SUPPORTS_24HZ && \
2866		     !SYS_SUPPORTS_48HZ && \
2867		     !SYS_SUPPORTS_100HZ && \
2868		     !SYS_SUPPORTS_128HZ && \
2869		     !SYS_SUPPORTS_250HZ && \
2870		     !SYS_SUPPORTS_256HZ && \
2871		     !SYS_SUPPORTS_1000HZ && \
2872		     !SYS_SUPPORTS_1024HZ
2873
2874config HZ
2875	int
2876	default 24 if HZ_24
2877	default 48 if HZ_48
2878	default 100 if HZ_100
2879	default 128 if HZ_128
2880	default 250 if HZ_250
2881	default 256 if HZ_256
2882	default 1000 if HZ_1000
2883	default 1024 if HZ_1024
2884
2885config SCHED_HRTICK
2886	def_bool HIGH_RES_TIMERS
2887
2888config ARCH_SUPPORTS_KEXEC
2889	def_bool y
2890
2891config ARCH_SUPPORTS_CRASH_DUMP
2892	def_bool y
2893
2894config ARCH_DEFAULT_CRASH_DUMP
2895	def_bool y
2896
2897config PHYSICAL_START
2898	hex "Physical address where the kernel is loaded"
2899	default "0xffffffff84000000"
2900	depends on CRASH_DUMP
2901	help
2902	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2903	  If you plan to use kernel for capturing the crash dump change
2904	  this value to start of the reserved region (the "X" value as
2905	  specified in the "crashkernel=YM@XM" command line boot parameter
2906	  passed to the panic-ed kernel).
2907
2908config MIPS_O32_FP64_SUPPORT
2909	bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2910	depends on 32BIT || MIPS32_O32
2911	help
2912	  When this is enabled, the kernel will support use of 64-bit floating
2913	  point registers with binaries using the O32 ABI along with the
2914	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2915	  32-bit MIPS systems this support is at the cost of increasing the
2916	  size and complexity of the compiled FPU emulator. Thus if you are
2917	  running a MIPS32 system and know that none of your userland binaries
2918	  will require 64-bit floating point, you may wish to reduce the size
2919	  of your kernel & potentially improve FP emulation performance by
2920	  saying N here.
2921
2922	  Although binutils currently supports use of this flag the details
2923	  concerning its effect upon the O32 ABI in userland are still being
2924	  worked on. In order to avoid userland becoming dependent upon current
2925	  behaviour before the details have been finalised, this option should
2926	  be considered experimental and only enabled by those working upon
2927	  said details.
2928
2929	  If unsure, say N.
2930
2931config USE_OF
2932	bool
2933	select OF
2934	select OF_EARLY_FLATTREE
2935	select IRQ_DOMAIN
2936
2937config UHI_BOOT
2938	bool
2939
2940config BUILTIN_DTB
2941	bool
2942
2943choice
2944	prompt "Kernel appended dtb support"
2945	depends on USE_OF
2946	default MIPS_NO_APPENDED_DTB
2947
2948	config MIPS_NO_APPENDED_DTB
2949		bool "None"
2950		help
2951		  Do not enable appended dtb support.
2952
2953	config MIPS_ELF_APPENDED_DTB
2954		bool "vmlinux"
2955		help
2956		  With this option, the boot code will look for a device tree binary
2957		  DTB) included in the vmlinux ELF section .appended_dtb. By default
2958		  it is empty and the DTB can be appended using binutils command
2959		  objcopy:
2960
2961		    objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
2962
2963		  This is meant as a backward compatibility convenience for those
2964		  systems with a bootloader that can't be upgraded to accommodate
2965		  the documented boot protocol using a device tree.
2966
2967	config MIPS_RAW_APPENDED_DTB
2968		bool "vmlinux.bin or vmlinuz.bin"
2969		help
2970		  With this option, the boot code will look for a device tree binary
2971		  DTB) appended to raw vmlinux.bin or vmlinuz.bin.
2972		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
2973
2974		  This is meant as a backward compatibility convenience for those
2975		  systems with a bootloader that can't be upgraded to accommodate
2976		  the documented boot protocol using a device tree.
2977
2978		  Beware that there is very little in terms of protection against
2979		  this option being confused by leftover garbage in memory that might
2980		  look like a DTB header after a reboot if no actual DTB is appended
2981		  to vmlinux.bin.  Do not leave this option active in a production kernel
2982		  if you don't intend to always append a DTB.
2983endchoice
2984
2985choice
2986	prompt "Kernel command line type"
2987	depends on !CMDLINE_OVERRIDE
2988	default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
2989					 !MACH_LOONGSON64 && !MACH_LOONGSON32 && \
2990					 !MIPS_MALTA && !CAVIUM_OCTEON_SOC
2991	default MIPS_CMDLINE_FROM_BOOTLOADER
2992
2993	config MIPS_CMDLINE_FROM_DTB
2994		depends on USE_OF
2995		bool "Dtb kernel arguments if available"
2996
2997	config MIPS_CMDLINE_DTB_EXTEND
2998		depends on USE_OF
2999		bool "Extend dtb kernel arguments with bootloader arguments"
3000
3001	config MIPS_CMDLINE_FROM_BOOTLOADER
3002		bool "Bootloader kernel arguments if available"
3003
3004	config MIPS_CMDLINE_BUILTIN_EXTEND
3005		depends on CMDLINE_BOOL
3006		bool "Extend builtin kernel arguments with bootloader arguments"
3007endchoice
3008
3009endmenu
3010
3011config LOCKDEP_SUPPORT
3012	bool
3013	default y
3014
3015config STACKTRACE_SUPPORT
3016	bool
3017	default y
3018
3019config PGTABLE_LEVELS
3020	int
3021	default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3022	default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
3023	default 2
3024
3025config MIPS_AUTO_PFN_OFFSET
3026	bool
3027
3028menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3029
3030config PCI_DRIVERS_GENERIC
3031	select PCI_DOMAINS_GENERIC if PCI
3032	bool
3033
3034config PCI_DRIVERS_LEGACY
3035	def_bool !PCI_DRIVERS_GENERIC
3036	select NO_GENERIC_PCI_IOPORT_MAP
3037	select PCI_DOMAINS if PCI
3038
3039#
3040# ISA support is now enabled via select.  Too many systems still have the one
3041# or other ISA chip on the board that users don't know about so don't expect
3042# users to choose the right thing ...
3043#
3044config ISA
3045	bool
3046
3047config TC
3048	bool "TURBOchannel support"
3049	depends on MACH_DECSTATION
3050	help
3051	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3052	  processors.  TURBOchannel programming specifications are available
3053	  at:
3054	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3055	  and:
3056	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3057	  Linux driver support status is documented at:
3058	  <http://www.linux-mips.org/wiki/DECstation>
3059
3060config MMU
3061	bool
3062	default y
3063
3064config ARCH_MMAP_RND_BITS_MIN
3065	default 12 if 64BIT
3066	default 8
3067
3068config ARCH_MMAP_RND_BITS_MAX
3069	default 18 if 64BIT
3070	default 15
3071
3072config ARCH_MMAP_RND_COMPAT_BITS_MIN
3073	default 8
3074
3075config ARCH_MMAP_RND_COMPAT_BITS_MAX
3076	default 15
3077
3078config I8253
3079	bool
3080	select CLKSRC_I8253
3081	select CLKEVT_I8253
3082	select MIPS_EXTERNAL_TIMER
3083endmenu
3084
3085config TRAD_SIGNALS
3086	bool
3087
3088config MIPS32_COMPAT
3089	bool
3090
3091config COMPAT
3092	bool
3093
3094config MIPS32_O32
3095	bool "Kernel support for o32 binaries"
3096	depends on 64BIT
3097	select ARCH_WANT_OLD_COMPAT_IPC
3098	select COMPAT
3099	select MIPS32_COMPAT
3100	help
3101	  Select this option if you want to run o32 binaries.  These are pure
3102	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
3103	  existing binaries are in this format.
3104
3105	  If unsure, say Y.
3106
3107config MIPS32_N32
3108	bool "Kernel support for n32 binaries"
3109	depends on 64BIT
3110	select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3111	select COMPAT
3112	select MIPS32_COMPAT
3113	help
3114	  Select this option if you want to run n32 binaries.  These are
3115	  64-bit binaries using 32-bit quantities for addressing and certain
3116	  data that would normally be 64-bit.  They are used in special
3117	  cases.
3118
3119	  If unsure, say N.
3120
3121config CC_HAS_MNO_BRANCH_LIKELY
3122	def_bool y
3123	depends on $(cc-option,-mno-branch-likely)
3124
3125# https://github.com/llvm/llvm-project/issues/61045
3126config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH
3127	def_bool y if CC_IS_CLANG
3128
3129menu "Power management options"
3130
3131config ARCH_HIBERNATION_POSSIBLE
3132	def_bool y
3133	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3134
3135config ARCH_SUSPEND_POSSIBLE
3136	def_bool y
3137	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3138
3139source "kernel/power/Kconfig"
3140
3141endmenu
3142
3143config MIPS_EXTERNAL_TIMER
3144	bool
3145
3146menu "CPU Power Management"
3147
3148if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3149source "drivers/cpufreq/Kconfig"
3150endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3151
3152source "drivers/cpuidle/Kconfig"
3153
3154endmenu
3155
3156source "arch/mips/kvm/Kconfig"
3157
3158source "arch/mips/vdso/Kconfig"
3159