1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */ 2 /* 3 * This header provides constants for pinctrl bindings for TI's K3 SoC 4 * family. 5 * 6 * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 */ 8 #ifndef DTS_ARM64_TI_K3_PINCTRL_H 9 #define DTS_ARM64_TI_K3_PINCTRL_H 10 11 #define ST_EN_SHIFT (14) 12 #define PULLUDEN_SHIFT (16) 13 #define PULLTYPESEL_SHIFT (17) 14 #define RXACTIVE_SHIFT (18) 15 #define DEBOUNCE_SHIFT (11) 16 #define FORCE_DS_EN_SHIFT (15) 17 #define DS_EN_SHIFT (24) 18 #define DS_OUT_DIS_SHIFT (25) 19 #define DS_OUT_VAL_SHIFT (26) 20 #define DS_PULLUD_EN_SHIFT (27) 21 #define DS_PULLTYPE_SEL_SHIFT (28) 22 23 /* Schmitt trigger configuration */ 24 #define ST_DISABLE (0 << ST_EN_SHIFT) 25 #define ST_ENABLE (1 << ST_EN_SHIFT) 26 27 #define PULL_DISABLE (1 << PULLUDEN_SHIFT) 28 #define PULL_ENABLE (0 << PULLUDEN_SHIFT) 29 30 #define PULL_UP (1 << PULLTYPESEL_SHIFT | PULL_ENABLE) 31 #define PULL_DOWN (0 << PULLTYPESEL_SHIFT | PULL_ENABLE) 32 33 #define INPUT_EN (1 << RXACTIVE_SHIFT) 34 #define INPUT_DISABLE (0 << RXACTIVE_SHIFT) 35 36 /* Only these macros are expected be used directly in device tree files */ 37 #define PIN_OUTPUT (INPUT_DISABLE | PULL_DISABLE) 38 #define PIN_OUTPUT_PULLUP (INPUT_DISABLE | PULL_UP) 39 #define PIN_OUTPUT_PULLDOWN (INPUT_DISABLE | PULL_DOWN) 40 #define PIN_INPUT (INPUT_EN | ST_ENABLE | PULL_DISABLE) 41 #define PIN_INPUT_PULLUP (INPUT_EN | ST_ENABLE | PULL_UP) 42 #define PIN_INPUT_PULLDOWN (INPUT_EN | ST_ENABLE | PULL_DOWN) 43 /* Input configurations with Schmitt Trigger disabled */ 44 #define PIN_INPUT_NOST (INPUT_EN | PULL_DISABLE) 45 #define PIN_INPUT_PULLUP_NOST (INPUT_EN | PULL_UP) 46 #define PIN_INPUT_PULLDOWN_NOST (INPUT_EN | PULL_DOWN) 47 48 #define PIN_DEBOUNCE_DISABLE (0 << DEBOUNCE_SHIFT) 49 #define PIN_DEBOUNCE_CONF1 (1 << DEBOUNCE_SHIFT) 50 #define PIN_DEBOUNCE_CONF2 (2 << DEBOUNCE_SHIFT) 51 #define PIN_DEBOUNCE_CONF3 (3 << DEBOUNCE_SHIFT) 52 #define PIN_DEBOUNCE_CONF4 (4 << DEBOUNCE_SHIFT) 53 #define PIN_DEBOUNCE_CONF5 (5 << DEBOUNCE_SHIFT) 54 #define PIN_DEBOUNCE_CONF6 (6 << DEBOUNCE_SHIFT) 55 56 #define PIN_DS_FORCE_DISABLE (0 << FORCE_DS_EN_SHIFT) 57 #define PIN_DS_FORCE_ENABLE (1 << FORCE_DS_EN_SHIFT) 58 #define PIN_DS_IO_OVERRIDE_DISABLE (0 << DS_IO_OVERRIDE_EN_SHIFT) 59 #define PIN_DS_IO_OVERRIDE_ENABLE (1 << DS_IO_OVERRIDE_EN_SHIFT) 60 #define PIN_DS_OUT_ENABLE (0 << DS_OUT_DIS_SHIFT) 61 #define PIN_DS_OUT_DISABLE (1 << DS_OUT_DIS_SHIFT) 62 #define PIN_DS_OUT_VALUE_ZERO (0 << DS_OUT_VAL_SHIFT) 63 #define PIN_DS_OUT_VALUE_ONE (1 << DS_OUT_VAL_SHIFT) 64 #define PIN_DS_PULLUD_ENABLE (0 << DS_PULLUD_EN_SHIFT) 65 #define PIN_DS_PULLUD_DISABLE (1 << DS_PULLUD_EN_SHIFT) 66 #define PIN_DS_PULL_DOWN (0 << DS_PULLTYPE_SEL_SHIFT) 67 #define PIN_DS_PULL_UP (1 << DS_PULLTYPE_SEL_SHIFT) 68 69 /* Default mux configuration for gpio-ranges to use with pinctrl */ 70 #define PIN_GPIO_RANGE_IOPAD (PIN_INPUT | 7) 71 72 #define AM62AX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 73 #define AM62AX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 74 75 #define AM62DX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 76 #define AM62DX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 77 78 #define AM62PX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 79 #define AM62PX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 80 81 #define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 82 #define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 83 84 #define AM64X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 85 #define AM64X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 86 87 #define AM65X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 88 #define AM65X_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 89 90 #define J721E_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 91 #define J721E_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 92 93 #define J721S2_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 94 #define J721S2_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 95 96 #define J722S_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 97 #define J722S_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 98 99 #define J784S4_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 100 #define J784S4_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 101 102 #endif 103