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Searched refs:writel (Results 1 – 7 of 7) sorted by relevance

/titanic_50/usr/src/grub/grub-0.97/netboot/
H A Dforcedeth.c400 writel(NVREG_MIISTAT_MASK, base + NvRegMIIStatus); in mii_rw()
405 writel(reg & ~NVREG_ADAPTCTL_RUNNING, in mii_rw()
410 writel(NVREG_MIICTL_INUSE, base + NvRegMIIControl); in mii_rw()
417 writel(value, base + NvRegMIIData); in mii_rw()
420 writel(reg, base + NvRegMIIControl); in mii_rw()
445 writel(reg | NVREG_ADAPTCTL_RUNNING, in mii_rw()
458 writel(0, base + NvRegReceiverControl); in start_rx()
461 writel(np->linkspeed, base + NvRegLinkSpeed); in start_rx()
463 writel(NVREG_RCVCTL_START, base + NvRegReceiverControl); in start_rx()
472 writel(0, base + NvRegReceiverControl); in stop_rx()
[all …]
H A Dns83820.c327 #define __kick_rx() writel(CR_RXE, ns->base + CR)
331 writel(virt_to_le32desc(&rx_ring[ns->cur_rx]), ns->base + RXDP); \
436 writel(readl(ns->base + TXCFG) in phy_intr()
439 writel(readl(ns->base + RXCFG) | RXCFG_RX_FD, in phy_intr()
442 writel(readl(ns->base + GPIOR) | GPIOR_GP1_OUT, in phy_intr()
453 writel((readl(ns->base + TXCFG) in phy_intr()
456 writel(readl(ns->base + RXCFG) & ~RXCFG_RX_FD, in phy_intr()
459 writel(readl(ns->base + GPIOR) & ~GPIOR_GP1_OUT, in phy_intr()
483 writel(new_cfg, ns->base + CFG); in phy_intr()
522 writel(0, ns->base + RXDP_HI); in ns83820_setup_rx()
[all …]
H A Dw89c840.c158 #undef writel
164 #define writel outl macro
309 writel(0x00000001, ioaddr + PCIBusCfg); in w89c840_reset()
313 writel(virt_to_bus(w840private.rx_ring), ioaddr + RxRingPtr); in w89c840_reset()
314 writel(virt_to_bus(w840private.tx_ring), ioaddr + TxRingPtr); in w89c840_reset()
331 writel(0xE010, ioaddr + PCIBusCfg); in w89c840_reset()
333 writel(0, ioaddr + RxStartDemand); in w89c840_reset()
356 writel(intr_stat & 0x001ffff, ioaddr + IntrStatus);
370 writel(0, ioaddr + RxStartDemand);
522 writel(0, ioaddr + TxStartDemand); in w89c840_transmit()
[all …]
H A Dio.h89 #define writel(b,addr) ((*(volatile unsigned int *) (addr)) = (b)) macro
H A De1000.c150 (writel((value), ((a)->hw_addr + E1000_##reg))) : \
151 (writel((value), ((a)->hw_addr + E1000_82542_##reg))))
160 writel((value), ((a)->hw_addr + E1000_##reg + ((offset) << 2))) : \
161 writel((value), ((a)->hw_addr + E1000_82542_##reg + ((offset) << 2))))
H A Dr8169.c123 #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
H A Dtg3.c105 #define tw32_mailbox(reg, val) writel(((val) & 0xffffffff), tg3.regs + (reg))