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Searched refs:u16 (Results 1 – 25 of 143) sorted by relevance

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/titanic_50/usr/src/uts/common/io/i40e/core/
H A Di40e_prototype.h58 u16 i40e_clean_asq(struct i40e_hw *hw);
65 u16 *events_pending);
69 u16 buff_size,
74 void *desc, void *buffer, u16 buf_len);
80 enum i40e_status_code i40e_aq_get_rss_lut(struct i40e_hw *hw, u16 seid,
81 bool pf_lut, u8 *lut, u16 lut_size);
82 enum i40e_status_code i40e_aq_set_rss_lut(struct i40e_hw *hw, u16 seid,
83 bool pf_lut, u8 *lut, u16 lut_size);
85 u16 seid,
88 u16 seid,
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H A Di40e_virtchnl.h154 u16 vsi_id;
155 u16 num_queue_pairs;
157 u16 qset_handle;
178 u16 num_vsis;
179 u16 num_queue_pairs;
180 u16 max_vectors;
181 u16 max_mtu;
198 u16 vsi_id;
199 u16 queue_id;
200 u16 ring_len; /* number of descriptors, multiple of 8 */
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H A Di40e_adminq.h57 u16 count; /* Number of descriptors */
58 u16 rx_buf_len; /* Admin Receive Queue buffer length */
61 u16 next_to_use;
62 u16 next_to_clean;
76 u16 flags_ena;
77 u16 flags_dis;
89 u16 msg_len;
90 u16 buf_len;
99 u16 num_arq_entries; /* receive queue depth */
100 u16 num_asq_entries; /* send queue depth */
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H A Di40e_lan_hmc.h51 u16 head;
52 u16 cpuid; /* bigger than needed, see above for reason */
54 u16 qlen;
56 u16 dbuff; /* bigger than needed, see above for reason */
58 u16 hbuff; /* bigger than needed, see above for reason */
72 u16 lrxqthresh; /* bigger than needed, see above for reason */
84 u16 head;
91 u16 thead_wb;
94 u16 qlen;
100 u16 rdylist;
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H A Di40e_common.c310 void *buffer, u16 buf_len) in i40e_debug_aq()
313 u16 len = LE16_TO_CPU(aq_desc->datalen); in i40e_debug_aq()
315 u16 i = 0; in i40e_debug_aq()
419 u16 vsi_id, bool pf_lut, in i40e_aq_get_set_rss_lut()
420 u8 *lut, u16 lut_size, in i40e_aq_get_set_rss_lut()
436 desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_BUF); in i40e_aq_get_set_rss_lut()
437 desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_RD); in i40e_aq_get_set_rss_lut()
440 CPU_TO_LE16((u16)((vsi_id << in i40e_aq_get_set_rss_lut()
443 cmd_resp->vsi_id |= CPU_TO_LE16((u16)I40E_AQC_SET_RSS_LUT_VSI_VALID); in i40e_aq_get_set_rss_lut()
446 cmd_resp->flags |= CPU_TO_LE16((u16) in i40e_aq_get_set_rss_lut()
[all …]
/titanic_50/usr/src/uts/common/io/e1000api/
H A De1000_nvm.h39 u16 word[2];
40 u16 *pba_block;
45 s32 e1000_null_read_nvm(struct e1000_hw *hw, u16 a, u16 b, u16 *c);
47 s32 e1000_null_led_default(struct e1000_hw *hw, u16 *data);
48 s32 e1000_null_write_nvm(struct e1000_hw *hw, u16 a, u16 b, u16 *c);
56 s32 e1000_read_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
57 u32 eeprom_buf_size, u16 max_pba_block_size,
59 s32 e1000_write_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
61 s32 e1000_get_pba_block_size(struct e1000_hw *hw, u16 *eeprom_buf,
62 u32 eeprom_buf_size, u16 *pba_block_size);
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H A De1000_vf.h95 u16 pkt_info;
97 u16 hdr_info;
103 u16 ip_id; /* IP id */
104 u16 csum; /* Packet Checksum */
110 u16 length; /* Packet length */
111 u16 vlan; /* VLAN tag */
205 s32 (*get_link_up_info)(struct e1000_hw *, u16 *, u16 *);
222 u16 mta_reg_count;
223 u16 rar_entry_count;
230 s32 (*read)(struct e1000_hw *, u32 *, u16, u16);
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H A De1000_hw.h372 #define __le16 u16
642 u16 vlan_id;
644 u16 reserved2;
667 u16 reserved1;
668 u16 reserved2;
669 u16 command_length;
696 s32 (*get_link_up_info)(struct e1000_hw *, u16 *, u16 *);
713 s32 (*acquire_swfw_sync)(struct e1000_hw *, u16);
714 void (*release_swfw_sync)(struct e1000_hw *, u16);
742 s32 (*set_page)(struct e1000_hw *, u16);
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H A De1000_phy.h39 s32 e1000_null_read_reg(struct e1000_hw *hw, u32 offset, u16 *data);
42 s32 e1000_null_write_reg(struct e1000_hw *hw, u32 offset, u16 data);
43 s32 e1000_null_set_page(struct e1000_hw *hw, u16 data);
70 void e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
73 s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data);
74 s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data);
75 s32 e1000_set_page_igp(struct e1000_hw *hw, u16 page);
76 s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
77 s32 e1000_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data);
78 s32 e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
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H A De1000_nvm.c67 u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b, in e1000_null_read_nvm()
68 u16 E1000_UNUSEDARG *c) in e1000_null_read_nvm()
89 u16 E1000_UNUSEDARG *data) in e1000_null_led_default()
100 u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b, in e1000_null_write_nvm()
101 u16 E1000_UNUSEDARG *c) in e1000_null_write_nvm()
147 static void e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count) in e1000_shift_out_eec_bits()
194 static u16 e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count) in e1000_shift_in_eec_bits()
198 u16 data; in e1000_shift_in_eec_bits()
397 u16 timeout = NVM_MAX_RETRY_SPI; in e1000_ready_nvm_eeprom()
440 s32 e1000_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) in e1000_read_nvm_spi()
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H A De1000_i210.h42 s32 e1000_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset,
43 u16 words, u16 *data);
44 s32 e1000_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset,
45 u16 words, u16 *data);
46 s32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
47 void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
48 s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
49 u16 *data);
50 s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
51 u16 data);
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H A De1000_mbx.h95 s32 e1000_read_mbx(struct e1000_hw *, u32 *, u16, u16);
96 s32 e1000_write_mbx(struct e1000_hw *, u32 *, u16, u16);
97 s32 e1000_read_posted_mbx(struct e1000_hw *, u32 *, u16, u16);
98 s32 e1000_write_posted_mbx(struct e1000_hw *, u32 *, u16, u16);
99 s32 e1000_check_for_msg(struct e1000_hw *, u16);
100 s32 e1000_check_for_ack(struct e1000_hw *, u16);
101 s32 e1000_check_for_rst(struct e1000_hw *, u16);
H A De1000_mbx.c42 u16 E1000_UNUSEDARG mbx_id) in e1000_null_mbx_check_for_flag()
55 u16 E1000_UNUSEDARG size, in e1000_null_mbx_transact()
56 u16 E1000_UNUSEDARG mbx_id) in e1000_null_mbx_transact()
72 s32 e1000_read_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id) in e1000_read_mbx()
98 s32 e1000_write_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id) in e1000_write_mbx()
121 s32 e1000_check_for_msg(struct e1000_hw *hw, u16 mbx_id) in e1000_check_for_msg()
141 s32 e1000_check_for_ack(struct e1000_hw *hw, u16 mbx_id) in e1000_check_for_ack()
161 s32 e1000_check_for_rst(struct e1000_hw *hw, u16 mbx_id) in e1000_check_for_rst()
181 static s32 e1000_poll_for_msg(struct e1000_hw *hw, u16 mbx_id) in e1000_poll_for_msg()
212 static s32 e1000_poll_for_ack(struct e1000_hw *hw, u16 mbx_id) in e1000_poll_for_ack()
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H A De1000_i210.c41 static s32 e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
42 u16 *data);
44 static s32 e1000_valid_led_default_i210(struct e1000_hw *hw, u16 *data);
88 s32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask) in e1000_acquire_swfw_sync_i210()
140 void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask) in e1000_release_swfw_sync_i210()
235 s32 e1000_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset, u16 words, in e1000_read_nvm_srrd_i210()
236 u16 *data) in e1000_read_nvm_srrd_i210()
239 u16 i, count; in e1000_read_nvm_srrd_i210()
280 s32 e1000_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, u16 words, in e1000_write_nvm_srwr_i210()
281 u16 *data) in e1000_write_nvm_srwr_i210()
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/titanic_50/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_common.h46 u16 word[2];
47 u16 *pba_block;
53 u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
62 s32 ixgbe_read_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,
63 u32 eeprom_buf_size, u16 max_pba_block_size,
65 s32 ixgbe_write_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,
67 s32 ixgbe_get_pba_block_size(struct ixgbe_hw *hw, u16 *eeprom_buf,
68 u32 eeprom_buf_size, u16 *pba_block_size);
71 void ixgbe_set_pci_config_data_generic(struct ixgbe_hw *hw, u16 link_status);
79 s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
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H A Dixgbe_mbx.h140 s32 ixgbe_read_mbx(struct ixgbe_hw *, u32 *, u16, u16);
141 s32 ixgbe_write_mbx(struct ixgbe_hw *, u32 *, u16, u16);
142 s32 ixgbe_read_posted_mbx(struct ixgbe_hw *, u32 *, u16, u16);
143 s32 ixgbe_write_posted_mbx(struct ixgbe_hw *, u32 *, u16, u16);
144 s32 ixgbe_check_for_msg(struct ixgbe_hw *, u16);
145 s32 ixgbe_check_for_ack(struct ixgbe_hw *, u16);
146 s32 ixgbe_check_for_rst(struct ixgbe_hw *, u16);
H A Dixgbe_x540.h50 s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data);
51 s32 ixgbe_read_eerd_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words,
52 u16 *data);
53 s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data);
54 s32 ixgbe_write_eewr_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words,
55 u16 *data);
57 s32 ixgbe_validate_eeprom_checksum_X540(struct ixgbe_hw *hw, u16 *checksum_val);
H A Dixgbe_x550.h48 s32 ixgbe_calc_checksum_X550(struct ixgbe_hw *hw, u16 *buffer, u32 buffer_size);
49 s32 ixgbe_validate_eeprom_checksum_X550(struct ixgbe_hw *hw, u16 *checksum_val);
52 u16 offset, u16 words, u16 *data);
53 s32 ixgbe_write_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset,
54 u16 data);
56 u16 offset, u16 words, u16 *data);
57 s32 ixgbe_read_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset,
58 u16 *data);
59 s32 ixgbe_read_ee_hostif_data_X550(struct ixgbe_hw *hw, u16 offset,
60 u16 *data);
[all …]
H A Dixgbe_api.h69 u16 *phy_data);
71 u16 phy_data);
99 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data);
100 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
101 u16 words, u16 *data);
102 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data);
103 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
104 u16 words, u16 *data);
106 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val);
137 u16 *firmware_version);
[all …]
H A Dixgbe_mbx.c47 s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id) in ixgbe_read_mbx()
73 s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id) in ixgbe_write_mbx()
97 s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id) in ixgbe_check_for_msg()
117 s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id) in ixgbe_check_for_ack()
137 s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id) in ixgbe_check_for_rst()
157 static s32 ixgbe_poll_for_msg(struct ixgbe_hw *hw, u16 mbx_id) in ixgbe_poll_for_msg()
189 static s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id) in ixgbe_poll_for_ack()
224 s32 ixgbe_read_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id) in ixgbe_read_posted_mbx()
253 s32 ixgbe_write_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, in ixgbe_write_posted_mbx()
254 u16 mbx_id) in ixgbe_write_posted_mbx()
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/titanic_50/usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/
H A Dhw_channel.h114 u16 type;
115 u16 length;
219 u16 db_size;
240 u16 pf_link_speed;
262 u16 stats_stride;
281 u16 hc_rate; /* desired interrupts per sec. */
284 u16 mtu;
285 u16 buf_sz;
286 u16 flags; /* VFPF_QUEUE_FLG_X flags */
287 u16 stat_id; /* valid iff VFPF_QUEUE_FLG_STATS */
[all …]
H A Dvfpf_if.h37 u16 opcode;
48 u16 opcode;
136 u16 db_size;
185 u16 padding;
197 u16 hc_rate; /* desired interrupts per sec. */
200 u16 mtu;
201 u16 buf_sz;
202 u16 flags; /* VFPF_QUEUE_FLG_X flags */
203 u16 stat_id; /* valid iff VFPF_QUEUE_FLG_STATS */
206 u16 sge_buf_sz;
[all …]
/titanic_50/usr/src/grub/grub-0.97/netboot/
H A Dtlan.c79 static void TLan_EeSendStart(u16);
80 static int TLan_EeSendByte(u16, u8, int);
81 static void TLan_EeReceiveByte(u16, u8 *, int);
82 static int TLan_EeReadByte(u16 io_base, u8, u8 *);
102 static int TLan_MiiReadReg(struct nic *nic __unused, u16, u16, u16 *);
103 static void TLan_MiiSendData(u16, u32, unsigned);
104 static void TLan_MiiSync(u16);
105 static void TLan_MiiWriteReg(struct nic *nic __unused, u16, u16, u16);
130 u16 addrOfs; /* Address Offset */
188 u16 cStat;
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H A Dtlan.h45 typedef unsigned short u16; typedef
96 u16 vendorId;
97 u16 deviceId;
100 u16 addrOfs;
396 inline u8 TLan_DioRead8(u16 base_addr, u16 internal_addr) in TLan_DioRead8()
406 inline u16 TLan_DioRead16(u16 base_addr, u16 internal_addr) in TLan_DioRead16()
416 inline u32 TLan_DioRead32(u16 base_addr, u16 internal_addr) in TLan_DioRead32()
426 inline void TLan_DioWrite8(u16 base_addr, u16 internal_addr, u8 data) in TLan_DioWrite8()
436 inline void TLan_DioWrite16(u16 base_addr, u16 internal_addr, u16 data) in TLan_DioWrite16()
446 inline void TLan_DioWrite32(u16 base_addr, u16 internal_addr, u32 data) in TLan_DioWrite32()
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/titanic_50/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dclc.h28 u32 *wb_write, u16 len);
30 u32 *wb_write, u16 len);
34 u16 gpio_num,
40 extern u32 elink_cb_gpio_read(struct elink_dev *cb, u16 gpio_num, u8 port);
42 u16 gpio_num,
249 typedef u8 (*format_fw_ver_t)(u32 raw, u8 *str, u16 *len);
257 u16 reg;
258 u16 val;
267 u16 flags;
288 u16 rx_preemphasis[4];
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