Home
last modified time | relevance | path

Searched refs:inb (Results 1 – 25 of 63) sorted by relevance

123

/titanic_50/usr/src/grub/grub-0.97/netboot/
H A Dns8390.c144 while((inb(eth_asic_base + _3COM_STREG) & _3COM_STREG_DPRDY) == 0)
153 *(dst++) = inb(eth_asic_base + ASIC_PIO);
197 while((inb(eth_asic_base + _3COM_STREG) & _3COM_STREG_DPRDY) == 0) in eth_pio_write()
215 (inb(eth_nic_base + D8390_P0_ISR) & D8390_ISR_RDC) in eth_pio_write()
222 while((inb(eth_nic_base + D8390_P0_ISR) & D8390_ISR_RDC) in eth_pio_write()
248 if(inb(eth_nic_base + 8 + i)!=mcfilter[i]) in enable_multicast()
414 inb(0x84); in ns8390_transmit()
420 inb(0x84); in ns8390_transmit()
422 inb(0x84); in ns8390_transmit()
432 inb(0x84); in ns8390_transmit()
[all …]
H A Dvia-rhine.c746 byMIIAdrbak = inb (byMIIAD); in ReadMII()
747 byMIICRbak = inb (byMIICR); in ReadMII()
754 outb (inb (byMIICR) | 0x40, byMIICR); in ReadMII()
756 byMIItemp = inb (byMIICR); in ReadMII()
761 byMIItemp = inb (byMIICR); in ReadMII()
786 byMIIAdrbak = inb (byMIIAD); in WriteMII()
788 byMIICRbak = inb (byMIICR); in WriteMII()
794 outb (inb (byMIICR) | 0x40, byMIICR); in WriteMII()
796 byMIItemp = inb (byMIICR); in WriteMII()
801 byMIItemp = inb (byMIICR); in WriteMII()
[all …]
H A Dpic8259.h49 #define irq_enabled(x) ( ( inb ( IMR_REG(x) ) & IMR_BIT(x) ) == 0 )
50 #define enable_irq(x) outb ( inb( IMR_REG(x) ) & ~IMR_BIT(x), IMR_REG(x) )
51 #define disable_irq(x) outb ( inb( IMR_REG(x) ) | IMR_BIT(x), IMR_REG(x) )
H A Drtl8139.c212 speed10 = inb(nic->ioaddr + MediaStatus) & MSRSpeed10; in rtl8139_probe()
220 if (inb(nic->ioaddr + MediaStatus) & MSRLinkFail) { in rtl8139_probe()
281 retval = (retval << 1) | ((inb(ee_addr) & EE_DATA_READ) ? 1 : 0); in read_eeprom()
321 while ((inb(nic->ioaddr + ChipCmd) & CmdReset) != 0 && in rtl_reset()
429 if (inb(nic->ioaddr + ChipCmd) & RxBufEmpty) { in rtl_poll()
523 while ((inb(nic->ioaddr + ChipCmd) & CmdReset) != 0 && timer2_running()) in rtl_disable()
H A Di386_timer.c29 outb((inb(PPC_PORTB) & ~PPCB_SPKR) | PPCB_T2GATE, PPC_PORTB); in __load_timer2()
40 return ((inb(PPC_PORTB) & PPCB_T2OUT) == 0); in __timer2_running()
H A D3c595.c118 inb(BASE + VX_W1_TX_STATUS); in t595_reset()
192 while(( status=inb(BASE + VX_W1_TX_STATUS) )& TXS_COMPLETE ) { in t595_transmit()
271 nic->packet[rx_fifo-1]=inb(BASE + VX_W1_RX_PIO_RD_1); in t595_poll()
284 nic->packet[nic->packetlen+rx_fifo-1]=inb(BASE + VX_W1_RX_PIO_RD_1); in t595_poll()
/titanic_50/usr/src/uts/i86pc/dboot/
H A Ddboot_asm.s46 inb(int port)
81 ENTRY(inb)
84 inb (%dx)
86 SET_SIZE(inb)
128 ENTRY_NP(inb)
130 inb (%dx)
133 SET_SIZE(inb)
H A Ddboot_asm.h38 extern uint8_t inb(int port);
/titanic_50/usr/src/uts/i86pc/io/
H A Dtodpc_subr.c362 reg = inb(RTC_DATA); in todpc_rtcget()
370 reg = inb(RTC_DATA); in todpc_rtcget()
378 *rawp++ = inb(RTC_DATA); in todpc_rtcget()
381 ((struct rtc_t *)buf)->rtc_century = inb(RTC_DATA); in todpc_rtcget()
385 ((struct rtc_t *)buf)->rtc_adom = inb(RTC_DATA) & 0x3f; in todpc_rtcget()
389 ((struct rtc_t *)buf)->rtc_amon = inb(RTC_DATA); in todpc_rtcget()
393 reg = inb(RTC_DATA); in todpc_rtcget()
423 reg = inb(RTC_DATA); in todpc_rtcput()
436 tmp = inb(RTC_DATA) & RTC_VRT; in todpc_rtcput()
446 reg = inb(RTC_DATA); in todpc_rtcput()
H A Dmicrofind.c118 status = inb(PITCTR0_PORT); in microfind_pit_delta()
119 count = inb(PITCTR0_PORT); in microfind_pit_delta()
120 count |= inb(PITCTR0_PORT) << 8; in microfind_pit_delta()
/titanic_50/usr/src/uts/common/io/
H A Di8237A.c246 if ((istate = (inb(EISA_DMAIS) & 0xef)) != 0) { in d37A_intr()
256 mask = inb(DMAC1_ALLMASK) >> (chnl); in d37A_intr()
258 mask = inb(DMAC2_ALLMASK) >> (chnl - 4); in d37A_intr()
722 adr_byte[0] = inb(chan_addr[chnl].addr_reg); in d37A_read_addr()
723 adr_byte[1] = inb(chan_addr[chnl].addr_reg); in d37A_read_addr()
724 adr_byte[2] = inb(chan_addr[chnl].page_reg); in d37A_read_addr()
726 adr_byte[3] = inb(chan_addr[chnl].hpage_reg); in d37A_read_addr()
821 count_byte[0] = inb(chan_addr[chnl].cnt_reg); in d37A_read_count()
822 count_byte[1] = inb(chan_addr[chnl].cnt_reg); in d37A_read_count()
824 count_byte[2] = inb(chan_addr[chnl].hcnt_reg); in d37A_read_count()
H A Dfdc.c481 stat = inb(ioaddr + FCR_MSR); in fdc_probe()
589 fcp->c_mode = (inb(fcp->c_regbase + FCR_SRB) & 0x1c) ? in fdc_attach()
722 (inb(fcp->c_regbase + FCR_DIR) & 0x70) == 0) in fdc_propinit2()
731 if ((inb(fcp->c_regbase + FCR_DIR) & in fdc_propinit2()
777 save = inb(fcp->c_regbase + FCR_SRA); in fdc_enhance_probe()
789 if (inb(fcp->c_regbase + FCR_SRB) != 0x00) in fdc_enhance_probe()
793 if (inb(fcp->c_regbase + FCR_SRB) != 0x65) in fdc_enhance_probe()
797 result = inb(fcp->c_regbase + FCR_SRB); in fdc_enhance_probe()
817 if (inb(fcp->c_regbase + FCR_SRB) != 0x00) in fdc_enhance_probe()
821 if (inb(fcp->c_regbase + FCR_SRB) != 0x66) in fdc_enhance_probe()
[all …]
/titanic_50/usr/src/uts/intel/io/acpica/
H A Dacpica_ec.c128 while (inb(sc_addr) & EC_IBF) { in ec_wait_ibf_clear()
146 while (!(inb(sc_addr) & EC_OBF)) { in ec_wait_obf_set()
164 sc = inb(ec.ec_sc); in ec_rd()
198 rv = inb(ec.ec_base); in ec_rd()
213 sc = inb(ec.ec_sc); in ec_wr()
278 rv = inb(ec.ec_base); in ec_query()
355 if (!(inb(ec.ec_sc) & EC_SCI)) in ec_gpe_callback()
607 if (inb(ec.ec_sc) & EC_OBF) { in ec_init()
608 x = inb(ec.ec_base); /* read and discard value */ in ec_init()
/titanic_50/usr/src/uts/i86pc/os/
H A Dpci_neptune.c60 oldstatus = inb(PCI_CSE_PORT); in pci_check_neptune()
74 (inb(PCI_CADDR2(0, PCI_CONF_REVID)) & 0xf0) != 0x10) { in pci_check_neptune()
100 neptune_BIOS_cfg_method = inb(PCI_PMC); in pci_check_neptune()
H A Dpci_mech2.c56 old = inb(PCI_CSE_PORT); in pci_mech2_config_enable()
82 val = inb(PCI_CADDR2(device, reg)); in pci_mech2_getb()
/titanic_50/usr/src/uts/i86pc/boot/
H A Dboot_console.c160 if (inb(port + ISR) & 0x20) { in serial_init()
181 if ((inb(port + ISR) & 0xc0) != 0xc0) { in serial_init()
792 while (((inb(port + LSR) & XHRE) == 0) && checks--) in serial_putchar()
805 lsr = inb(port + LSR); in serial_getchar()
809 return (inb(port + DAT)); in serial_getchar()
812 (void) inb(port + DAT); in serial_getchar()
816 return (inb(port + DAT)); in serial_getchar()
822 return (inb(port + LSR) & RCA); in serial_ischar()
H A Dboot_keyboard.c193 buffer_stat = inb(I8042_STAT); in kb_ischar()
206 (void) inb(I8042_DATA); in kb_ischar()
210 code = inb(I8042_DATA); in kb_ischar()
442 (inb(I8042_STAT) & I8042_STAT_INBF) != 0 && retries < 100000; in kb_send()
/titanic_50/usr/src/uts/i86pc/io/pcplusmp/
H A Dapic_common.c1080 pit_tick_lo = inb(PITCTR0_PORT); in apic_calibrate()
1081 pit_tick = (inb(PITCTR0_PORT) << 8) | pit_tick_lo; in apic_calibrate()
1092 pit_tick_lo = inb(PITCTR0_PORT); in apic_calibrate()
1093 pit_tick = (inb(PITCTR0_PORT) << 8) | pit_tick_lo; in apic_calibrate()
1104 pit_tick_lo = inb(PITCTR0_PORT); in apic_calibrate()
1105 pit_tick = (inb(PITCTR0_PORT) << 8) | pit_tick_lo; in apic_calibrate()
1229 byte = inb(CMOS_DATA); in apic_shutdown()
1235 byte = inb(CMOS_DATA); in apic_shutdown()
1248 byte = inb(CMOS_DATA); in apic_shutdown()
1263 byte = inb(MISMIC_FLAG_REGISTER); in apic_shutdown()
[all …]
/titanic_50/usr/src/grub/grub-0.97/stage2/
H A Dserial.c69 inb (unsigned short port) in inb() function
91 if (inb (serial_hw_port + UART_LSR) & UART_DATA_READY) in serial_hw_fetch()
92 return inb (serial_hw_port + UART_RX); in serial_hw_fetch()
104 while ((inb (serial_hw_port + UART_LSR) & UART_EMPTY_TRANSMITTER) == 0) in serial_hw_put()
/titanic_50/usr/src/uts/i86pc/ml/
H A Dlocore.s376 inb $MIMR_PORT
389 inb $CYRIX_CRI
402 inb $MCMD_PORT
412 inb $CYRIX_CRD
451 inb $CYRIX_CRD
494 inb $CYRIX_CRD
520 inb $CYRIX_CRD
559 inb $CYRIX_CRD
692 inb $CYRIX_CRD
729 inb $CYRIX_CRD
[all …]
H A Damd64.il125 .inline inb,4
128 inb (%dx)
H A Dia32.il112 .inline inb,4
115 inb (%dx)
/titanic_50/usr/src/cmd/refer/
H A Dglue4.c27 char *inp, inb[500]; in grepcall() local
33 strcpy(inp = inb, in); in grepcall()
/titanic_50/usr/src/uts/intel/io/
H A Dpit_beep.c278 outb(PITAUX_PORT, inb(PITAUX_PORT) | (PITAUX_OUT2 | PITAUX_GATE2)); in pit_beep_on()
286 outb(PITAUX_PORT, inb(PITAUX_PORT) & ~(PITAUX_OUT2 | PITAUX_GATE2)); in pit_beep_off()
/titanic_50/usr/src/uts/i86pc/io/psm/
H A Dpsm_common.c281 elcrval = (inb(ELCR_PORT2) << 8) | (inb(ELCR_PORT1)); in build_reserved_irqlist()
1005 outb(elcr_port, inb(elcr_port) | elcr_bit); in psm_set_elcr()
1008 outb(elcr_port, inb(elcr_port) & ~elcr_bit); in psm_set_elcr()
1023 return ((inb(elcr_port) & elcr_bit) ? 1 : 0); in psm_get_elcr()

123