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Searched refs:H_EOK (Results 1 – 25 of 37) sorted by relevance

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/titanic_50/usr/src/uts/sun4v/io/px/
H A Dpx_lib4v.c264 devino, sysino)) != H_EOK) { in px_lib_intr_devino_to_sysino()
287 (int *)intr_valid_state)) != H_EOK) { in px_lib_intr_getvalid()
309 if ((ret = hvio_intr_setvalid(sysino, intr_valid_state)) != H_EOK) { in px_lib_intr_setvalid()
328 if ((ret = hvio_intr_getstate(sysino, (int *)intr_state)) != H_EOK) { in px_lib_intr_getstate()
350 if ((ret = hvio_intr_setstate(sysino, intr_state)) != H_EOK) { in px_lib_intr_setstate()
368 if ((ret = hvio_intr_gettarget(sysino, cpuid)) != H_EOK) { in px_lib_intr_gettarget()
394 } else if (ret != H_EOK) { in px_lib_intr_settarget()
476 &ttes_mapped)) != H_EOK) { in px_lib_iommu_map()
518 &ttes_demapped)) != H_EOK) { in px_lib_iommu_demap()
544 attr_p, r_addr_p)) != H_EOK) { in px_lib_iommu_getmap()
[all …]
H A Dpx_libhv.c72 (pci_cfg_data_t *)&data)) != H_EOK) in hvio_rp_mps()
79 (pci_cfg_data_t *)&hdr)) != H_EOK) in hvio_rp_mps()
135 return (H_EOK); in hvio_rp_mps()
/titanic_50/usr/src/uts/sun4v/promif/
H A Dpromif_cpu.c60 if ((rv = hv_cpu_set_rtba(&rtba)) != H_EOK) in promif_set_mmfsa_traptable()
73 if ((rv = hv_mmu_fault_area_conf(&mmfsa_ra)) != H_EOK) { in promif_set_mmfsa_traptable()
77 if ((rv = hv_cpu_set_rtba(&rtba)) != H_EOK) { in promif_set_mmfsa_traptable()
114 if (rv != H_EOK) { in promif_start_cpu()
H A Dpromif_version.c58 return ((status == H_EOK) ? 0 : -1); in promif_set_sun4v_api_version()
81 return ((status == H_EOK) ? 0 : -1); in promif_get_sun4v_api_version()
/titanic_50/usr/src/uts/sun4v/os/
H A Dmach_startup.c393 if ((ret == H_EOK) && (prev_bufsize != 0)) { in mach_htraptrace_configure()
403 if (ret == H_EOK) { in mach_htraptrace_configure()
406 if (ret != H_EOK) { in mach_htraptrace_configure()
425 if (ret != H_EOK) { in mach_htraptrace_configure()
433 if ((ret == H_EOK) && (prev_bufsize != 0)) { in mach_htraptrace_configure()
436 if (ret == H_EOK) { in mach_htraptrace_configure()
H A Dmach_mp_states.c89 if (hv_cpu_state(cpuid, &state) != H_EOK) in stopcpu_bycpuid()
140 if (rv != H_EOK) in stopcpu_bycpuid()
148 if (hv_cpu_state(cpuid, &state) != H_EOK) in stopcpu_bycpuid()
H A Dintrq.c42 if (ret != H_EOK) in cpu_intrq_register()
47 if (ret != H_EOK) in cpu_intrq_register()
52 if (ret != H_EOK) in cpu_intrq_register()
57 if (ret != H_EOK) in cpu_intrq_register()
H A Dmach_cpu_states.c138 if ((status != H_EOK) && (invoke_cb == B_FALSE)) in store_boot_cmd()
172 if (status == H_EOK) { in store_boot_cmd()
175 if (status != H_EOK) { in store_boot_cmd()
670 if (ret != H_EOK) { in mach_dump_buffer_init()
698 if (ret != H_EOK) { in update_hvdump_buffer()
801 while (stat != H_EOK) { in send_one_mondo()
886 if (stat == H_EOK) { in send_mondo_set()
1554 if (rc != H_EOK) { in mach_set_soft_state()
1568 if (rc != H_EOK) { in mach_get_soft_state()
H A Derror.c617 if (hv_mem_scrub(pa, length, &scrubbed_len) != H_EOK) in mem_scrub()
655 if (hv_mem_sync(pa, length, &flushed) != H_EOK) in mem_sync()
690 if (retval != H_EOK || cpu_state == CPU_STATE_ERROR) { in errh_rq_full()
H A Dwdt.c252 if (ret != H_EOK) { in config_watchdog()
/titanic_50/usr/src/uts/sun4u/io/px/
H A Dpx_hlib.c1848 return (H_EOK); in hvio_iommu_map()
1877 return (H_EOK); in hvio_iommu_demap()
1887 uint64_t ret = H_EOK; in hvio_iommu_getmap()
2034 return (H_EOK); in hvio_iommu_getbypass()
2057 return (H_EOK); in hvio_intr_devino_to_sysino()
2075 return (H_EOK); in hvio_intr_getvalid()
2100 return (H_EOK); in hvio_intr_setvalid()
2130 return (H_EOK); in hvio_intr_getstate()
2161 return (H_EOK); in hvio_intr_setstate()
2190 return (H_EOK); in hvio_intr_gettarget()
[all …]
H A Dpx_lib4u.c340 pxu_p, devino, sysino)) != H_EOK) { in px_lib_intr_devino_to_sysino()
363 sysino, intr_valid_state)) != H_EOK) { in px_lib_intr_getvalid()
386 sysino, intr_valid_state)) != H_EOK) { in px_lib_intr_setvalid()
406 sysino, intr_state)) != H_EOK) { in px_lib_intr_getstate()
429 sysino, intr_state)) != H_EOK) { in px_lib_intr_setstate()
450 sysino, cpuid)) != H_EOK) { in px_lib_intr_gettarget()
473 sysino, cpuid)) != H_EOK) { in px_lib_intr_settarget()
519 attr, addr, pfn_index, flags)) != H_EOK) { in px_lib_iommu_map()
540 != H_EOK) { in px_lib_iommu_demap()
563 attr_p, r_addr_p)) != H_EOK) { in px_lib_iommu_getmap()
[all …]
/titanic_50/usr/src/uts/sun4v/io/n2piupc/
H A Dn2piupc_biterr.c113 dev_data) != H_EOK) { in n2piupc_biterr_write()
153 &raw_data) != H_EOK) { in n2piupc_biterr_read()
179 &raw_data) != H_EOK) { in n2piupc_biterr_read()
H A Dn2piupc_kstats.c285 regid, data) != H_EOK) in n2piupc_write()
313 regid, data) != H_EOK) in n2piupc_read()
/titanic_50/usr/src/uts/sun4v/io/glvc/
H A Dglvc.c505 if (err != H_EOK) { in glvc_add_intr_handlers()
648 while (hverr == H_EOK && (status_reg & GLVC_REG_RECV) != in glvc_read()
679 if (hverr == H_EOK) { in glvc_read()
696 if (hv_service_clrstatus(softsp->s_id, GLVC_REG_RECV) != H_EOK) { in glvc_read()
703 != H_EOK) { in glvc_read()
782 uint64_t hverr = H_EOK; in glvc_intr()
801 != H_EOK) { in glvc_intr()
835 uint64_t hverr = H_EOK; in glvc_peek()
850 while (hverr == H_EOK && (status_reg & GLVC_REG_RECV) != in glvc_peek()
880 if (hverr == H_EOK && recv_count > 0) { in glvc_peek()
[all …]
/titanic_50/usr/src/uts/sun4v/io/
H A Dvnex.c233 &intr_state) == H_EOK) && (intr_state == HV_INTR_NOTVALID)) in vnex_intr_dist()
246 H_EOK) && (intr_state == HV_INTR_DELIVERED_STATE)) { in vnex_intr_dist()
415 if ((hvio_intr_settarget(vid_p->vid_ihdl, cpuid)) != H_EOK) { in vnex_enable_intr()
419 if (hvio_intr_setstate(vid_p->vid_ihdl, HV_INTR_IDLE_STATE) != H_EOK) { in vnex_enable_intr()
423 if ((hvio_intr_setvalid(vid_p->vid_ihdl, HV_INTR_VALID)) != H_EOK) { in vnex_enable_intr()
439 if (hvio_intr_setvalid(vid_p->vid_ihdl, HV_INTR_NOTVALID) != H_EOK) { in vnex_disable_intr()
488 if (hvio_intr_devino_to_sysino(cfg, ino, &ihdl) != H_EOK) in vnex_add_intr()
H A Dhardclk.c171 if (ret != H_EOK) { in tod_get()
217 if (ret != H_EOK && ret != H_ENOTSUPPORTED && ret != H_EWOULDBLOCK) in tod_set()
H A Dqcn.c896 if (retval == H_EOK) { in qcn_transmit_write()
1097 if (rv == H_EOK) { in qcn_receive_read()
1148 } while (rv == H_EOK); in qcn_receive_read()
1159 if (rv == H_EOK) { in qcn_receive_getchr()
1183 } while (rv == H_EOK); in qcn_receive_getchr()
1212 if (rv != H_EOK) in qcn_poll_handler()
1322 (hv_cngetchar(&state->qcn_hold_char) == H_EOK)); in qcn_polledio_ischar()
H A Dvnet_dds.c932 &start, &size) != H_EOK) { in vdds_new_niu_node()
1121 if (rv != H_EOK) { in vdds_get_interrupts()
1127 if (rv != H_EOK) { in vdds_get_interrupts()
1136 if (rv != H_EOK) { in vdds_get_interrupts()
1156 if (rv != H_EOK) { in vdds_get_interrupts()
/titanic_50/usr/src/uts/sun4v/io/iospc/
H A Drfios_iospc.c115 if (rfiospc_get_perfreg(iospc_handle, regid, data) != H_EOK) { in rfios_access_hv()
125 if (rfiospc_set_perfreg(iospc_handle, regid, *data) != H_EOK) { in rfios_access_hv()
/titanic_50/usr/src/uts/sun4v/io/n2rng/
H A Dn2rng.c427 case H_EOK: in n2rng_herr2kerr()
562 case H_EOK: in n2rng_collect_diag_bits()
624 case H_EOK: in n2rng_collect_diag_bits()
669 case H_EOK: in n2rng_collect_diag_bits()
740 case H_EOK: in n2rng_getentropy()
858 case H_EOK: in n2rng_ctl_wait()
903 if (rv == H_EOK) { in n2rng_ctl_write()
1174 case H_EOK: in n2rng_config_test()
/titanic_50/usr/src/uts/sun4v/vm/
H A Dmach_sfmmu.c130 if (rv != H_EOK) in sfmmu_set_tsbs()
138 if (rv != H_EOK) in sfmmu_set_tsbs()
299 if (ret != H_EOK) { in kdi_tlb_page_lock()
/titanic_50/usr/src/uts/sun4v/io/niumx/
H A Dniumx.c222 (hvio_intr_getstate(sysino, &state) == H_EOK) && in niumx_intr_dist()
936 != H_EOK) { in niumx_set_intr()
963 if (hvio_intr_gettarget(sysino, cpu_id) != H_EOK) { in niumx_get_intr_target()
999 if (hvio_intr_gettarget(sysino, &old_cpu_id) != H_EOK) { in niumx_set_intr_target()
1009 (hvio_intr_getstate(sysino, &state) == H_EOK) && in niumx_set_intr_target()
1067 hdlp->ih_vector, &sysino)) != H_EOK) { in niumx_add_intr()
1116 != H_EOK) { in niumx_add_intr()
1158 (hvio_intr_getstate(sysino, &state) == H_EOK) && in niumx_rem_intr()
/titanic_50/usr/src/uts/sun4v/cpu/
H A Dniagara.c387 if (hvret != H_EOK) in cpu_trapstat_conf()
393 if (hvret != H_EOK) in cpu_trapstat_conf()
/titanic_50/usr/src/uts/sun4v/pcbe/
H A Dniagara2_pcbe.c586 allstopped | CPC_PCR_HT) != H_EOK) { in ni2_pcbe_configure()
700 if (hv_niagara_setperf(HV_SPARC_CTL, pcr) != H_EOK) { in ni2_pcbe_program()
733 if (hv_niagara_setperf(HV_SPARC_CTL, allstopped) != H_EOK) in ni2_pcbe_allstop()

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