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Searched refs:HXGE_REG_RD64 (Results 1 – 9 of 9) sorted by relevance

/titanic_50/usr/src/uts/common/io/hxge/
H A Dhxge_vmac.c391 HXGE_REG_RD64(handle, VMAC_TX_FRAME_CNT, &tx_frame_cnt.value); in hxge_save_cntrs()
392 HXGE_REG_RD64(handle, VMAC_TX_BYTE_CNT, &tx_byte_cnt.value); in hxge_save_cntrs()
393 HXGE_REG_RD64(handle, VMAC_RX_FRAME_CNT, &rx_frame_cnt.value); in hxge_save_cntrs()
394 HXGE_REG_RD64(handle, VMAC_RX_BYTE_CNT, &rx_byte_cnt.value); in hxge_save_cntrs()
395 HXGE_REG_RD64(handle, VMAC_RX_DROP_FR_CNT, &rx_drop_fr_cnt.value); in hxge_save_cntrs()
396 HXGE_REG_RD64(handle, VMAC_RX_DROP_BYTE_CNT, &rx_drop_byte_cnt.value); in hxge_save_cntrs()
397 HXGE_REG_RD64(handle, VMAC_RX_CRC_CNT, &rx_crc_cnt.value); in hxge_save_cntrs()
398 HXGE_REG_RD64(handle, VMAC_RX_PAUSE_CNT, &rx_pause_cnt.value); in hxge_save_cntrs()
399 HXGE_REG_RD64(handle, VMAC_RX_BCAST_FR_CNT, &rx_bcast_fr_cnt.value); in hxge_save_cntrs()
400 HXGE_REG_RD64(handle, VMAC_RX_MCAST_FR_CNT, &rx_mcast_fr_cnt.value); in hxge_save_cntrs()
H A Dhpi_vmac.c39 HXGE_REG_RD64(handle, VMAC_RST, &(reset.value)); in hpi_tx_vmac_reset()
53 HXGE_REG_RD64(handle, VMAC_RST, &(reset.value)); in hpi_rx_vmac_reset()
76 HXGE_REG_RD64(handle, VMAC_TX_CFG, &cfg.value); in hpi_vmac_tx_config()
134 HXGE_REG_RD64(handle, VMAC_RX_CFG, &cfg.value); in hpi_vmac_rx_set_framesize()
165 HXGE_REG_RD64(handle, VMAC_RX_CFG, &cfg.value); in hpi_vmac_rx_config()
H A Dhxge_common_impl.h184 #define HXGE_REG_RD64(handle, offset, val_p) { \ macro
210 #define HXGE_REG_RD64(handle, offset, val_p) { \ macro
H A Dhpi_txdma.h54 HXGE_REG_RD64(handle, \
H A Dhpi_rxdma.h111 HXGE_REG_RD64(handle, (HXGE_RXDMA_OFFSET(reg, handle.is_vraddr,\
H A Dhpi_rxdma.c457 HXGE_REG_RD64(handle, RDC_PREF_PAR_LOG, &pre_log->value); in hpi_rxdma_ring_perr_stat_get()
458 HXGE_REG_RD64(handle, RDC_SHADOW_PAR_LOG, &sha_log->value); in hpi_rxdma_ring_perr_stat_get()
H A Dhxge_txdma.c2124 HXGE_REG_RD64(hxgep->hpi_handle, TDC_REORD_TBL_CMD, in hxge_txdma_hw_start()
2141 HXGE_REG_RD64(hxgep->hpi_handle, TDC_REORD_TBL_CMD, in hxge_txdma_hw_start()
2145 HXGE_REG_RD64(hxgep->hpi_handle, TDC_REORD_TBL_DATA_HI, &tmp); in hxge_txdma_hw_start()
2153 HXGE_REG_RD64(hxgep->hpi_handle, TDC_REORD_TBL_DATA_LO, &tmp); in hxge_txdma_hw_start()
2160 HXGE_REG_RD64(hxgep->hpi_handle, TDC_FIFO_ERR_STAT, &tmp); in hxge_txdma_hw_start()
2168 HXGE_REG_RD64(hxgep->hpi_handle, TDC_FIFO_ERR_STAT, &tmp); in hxge_txdma_hw_start()
2676 HXGE_REG_RD64(handle, TDC_FIFO_ERR_STAT, &fifo_stat.value); in hxge_txdma_handle_sys_errors()
H A Dhxge_pfc.h53 HXGE_REG_RD64((handle), (offset), (val_p))
H A Dhxge_rxdma.c3524 HXGE_REG_RD64(handle, RDC_FIFO_ERR_STAT, &stat.value); in hxge_rxdma_handle_sys_errors()
3689 HXGE_REG_RD64(handle, RDC_RX_CFG1, &tmp); in hxge_rxdma_fatal_err_recover()