13dec9fcdSqs148142 /*
23dec9fcdSqs148142 * CDDL HEADER START
33dec9fcdSqs148142 *
43dec9fcdSqs148142 * The contents of this file are subject to the terms of the
53dec9fcdSqs148142 * Common Development and Distribution License (the "License").
63dec9fcdSqs148142 * You may not use this file except in compliance with the License.
73dec9fcdSqs148142 *
83dec9fcdSqs148142 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
93dec9fcdSqs148142 * or http://www.opensolaris.org/os/licensing.
103dec9fcdSqs148142 * See the License for the specific language governing permissions
113dec9fcdSqs148142 * and limitations under the License.
123dec9fcdSqs148142 *
133dec9fcdSqs148142 * When distributing Covered Code, include this CDDL HEADER in each
143dec9fcdSqs148142 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
153dec9fcdSqs148142 * If applicable, add the following below this CDDL HEADER, with the
163dec9fcdSqs148142 * fields enclosed by brackets "[]" replaced with your own identifying
173dec9fcdSqs148142 * information: Portions Copyright [yyyy] [name of copyright owner]
183dec9fcdSqs148142 *
193dec9fcdSqs148142 * CDDL HEADER END
203dec9fcdSqs148142 */
21*f043ebedSMichael Speer
223dec9fcdSqs148142 /*
23*f043ebedSMichael Speer * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
243dec9fcdSqs148142 * Use is subject to license terms.
253dec9fcdSqs148142 */
263dec9fcdSqs148142
273dec9fcdSqs148142 #include <hxge_impl.h>
283dec9fcdSqs148142 #include <hxge_vmac.h>
293dec9fcdSqs148142
303dec9fcdSqs148142 hxge_status_t hxge_vmac_init(p_hxge_t hxgep);
313dec9fcdSqs148142 hxge_status_t hxge_tx_vmac_init(p_hxge_t hxgep);
323dec9fcdSqs148142 hxge_status_t hxge_rx_vmac_init(p_hxge_t hxgep);
333dec9fcdSqs148142 hxge_status_t hxge_tx_vmac_enable(p_hxge_t hxgep);
343dec9fcdSqs148142 hxge_status_t hxge_tx_vmac_disable(p_hxge_t hxgep);
353dec9fcdSqs148142 hxge_status_t hxge_rx_vmac_enable(p_hxge_t hxgep);
363dec9fcdSqs148142 hxge_status_t hxge_rx_vmac_disable(p_hxge_t hxgep);
373dec9fcdSqs148142 hxge_status_t hxge_tx_vmac_reset(p_hxge_t hxgep);
383dec9fcdSqs148142 hxge_status_t hxge_rx_vmac_reset(p_hxge_t hxgep);
393dec9fcdSqs148142 uint_t hxge_vmac_intr(caddr_t arg1, caddr_t arg2);
403dec9fcdSqs148142 hxge_status_t hxge_set_promisc(p_hxge_t hxgep, boolean_t on);
413dec9fcdSqs148142
423dec9fcdSqs148142 hxge_status_t
hxge_link_init(p_hxge_t hxgep)433dec9fcdSqs148142 hxge_link_init(p_hxge_t hxgep)
443dec9fcdSqs148142 {
453dec9fcdSqs148142 p_hxge_stats_t statsp;
463dec9fcdSqs148142
473dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, MAC_CTL, "==> hxge_link_init>"));
483dec9fcdSqs148142
493dec9fcdSqs148142 statsp = hxgep->statsp;
503dec9fcdSqs148142
513dec9fcdSqs148142 statsp->mac_stats.cap_10gfdx = 1;
523dec9fcdSqs148142 statsp->mac_stats.lp_cap_10gfdx = 1;
533dec9fcdSqs148142
543dec9fcdSqs148142 /*
553dec9fcdSqs148142 * The driver doesn't control the link.
563dec9fcdSqs148142 * It is always 10Gb full duplex.
573dec9fcdSqs148142 */
583dec9fcdSqs148142 statsp->mac_stats.link_duplex = 2;
593dec9fcdSqs148142 statsp->mac_stats.link_speed = 10000;
603dec9fcdSqs148142
613dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, MAC_CTL, "<== hxge_link_init"));
623dec9fcdSqs148142 return (HXGE_OK);
633dec9fcdSqs148142 }
643dec9fcdSqs148142
653dec9fcdSqs148142 hxge_status_t
hxge_vmac_init(p_hxge_t hxgep)663dec9fcdSqs148142 hxge_vmac_init(p_hxge_t hxgep)
673dec9fcdSqs148142 {
683dec9fcdSqs148142 hxge_status_t status = HXGE_OK;
693dec9fcdSqs148142
703dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, MAC_CTL, "==> hxge_vmac_init:"));
713dec9fcdSqs148142
723dec9fcdSqs148142 if ((status = hxge_tx_vmac_reset(hxgep)) != HXGE_OK)
733dec9fcdSqs148142 goto fail;
743dec9fcdSqs148142
753dec9fcdSqs148142 if ((status = hxge_rx_vmac_reset(hxgep)) != HXGE_OK)
763dec9fcdSqs148142 goto fail;
773dec9fcdSqs148142
783dec9fcdSqs148142 if ((status = hxge_tx_vmac_enable(hxgep)) != HXGE_OK)
793dec9fcdSqs148142 goto fail;
803dec9fcdSqs148142
813dec9fcdSqs148142 if ((status = hxge_rx_vmac_enable(hxgep)) != HXGE_OK)
823dec9fcdSqs148142 goto fail;
833dec9fcdSqs148142
843dec9fcdSqs148142 /* Clear the interrupt status registers */
853dec9fcdSqs148142 (void) hpi_vmac_clear_rx_int_stat(hxgep->hpi_handle);
863dec9fcdSqs148142 (void) hpi_vmac_clear_tx_int_stat(hxgep->hpi_handle);
873dec9fcdSqs148142
883dec9fcdSqs148142 /*
893dec9fcdSqs148142 * Take the masks off the overflow counters. Interrupt the system when
903dec9fcdSqs148142 * any counts overflow. Don't interrupt the system for each frame.
913dec9fcdSqs148142 * The current counts are retrieved when the "kstat" command is used.
923dec9fcdSqs148142 */
933dec9fcdSqs148142 (void) hpi_pfc_set_rx_int_stat_mask(hxgep->hpi_handle, 0, 1);
943dec9fcdSqs148142 (void) hpi_pfc_set_tx_int_stat_mask(hxgep->hpi_handle, 0, 1);
953dec9fcdSqs148142
963dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, MAC_CTL, "<== hxge_vmac_init:"));
973dec9fcdSqs148142
983dec9fcdSqs148142 return (HXGE_OK);
993dec9fcdSqs148142 fail:
1003dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, MAC_CTL,
1013dec9fcdSqs148142 "hxge_vmac_init: failed to initialize VMAC>"));
1023dec9fcdSqs148142
1033dec9fcdSqs148142 return (status);
1043dec9fcdSqs148142 }
1053dec9fcdSqs148142
1063dec9fcdSqs148142
1073dec9fcdSqs148142 /* Initialize the TxVMAC sub-block */
1083dec9fcdSqs148142
1093dec9fcdSqs148142 hxge_status_t
hxge_tx_vmac_init(p_hxge_t hxgep)1103dec9fcdSqs148142 hxge_tx_vmac_init(p_hxge_t hxgep)
1113dec9fcdSqs148142 {
1123dec9fcdSqs148142 uint64_t config;
1133dec9fcdSqs148142 hpi_handle_t handle = hxgep->hpi_handle;
1143dec9fcdSqs148142
1153dec9fcdSqs148142 /* CFG_VMAC_TX_EN is done separately */
1163dec9fcdSqs148142 config = CFG_VMAC_TX_CRC_INSERT | CFG_VMAC_TX_PAD;
1173dec9fcdSqs148142
1183dec9fcdSqs148142 if (hpi_vmac_tx_config(handle, INIT, config,
1193dec9fcdSqs148142 hxgep->vmac.maxframesize) != HPI_SUCCESS)
1203dec9fcdSqs148142 return (HXGE_ERROR);
1213dec9fcdSqs148142
1223dec9fcdSqs148142 hxgep->vmac.tx_config = config;
1233dec9fcdSqs148142
1243dec9fcdSqs148142 return (HXGE_OK);
1253dec9fcdSqs148142 }
1263dec9fcdSqs148142
1273dec9fcdSqs148142 /* Initialize the RxVMAC sub-block */
1283dec9fcdSqs148142
1293dec9fcdSqs148142 hxge_status_t
hxge_rx_vmac_init(p_hxge_t hxgep)1303dec9fcdSqs148142 hxge_rx_vmac_init(p_hxge_t hxgep)
1313dec9fcdSqs148142 {
1323dec9fcdSqs148142 uint64_t xconfig;
1333dec9fcdSqs148142 hpi_handle_t handle = hxgep->hpi_handle;
1343dec9fcdSqs148142 uint16_t max_frame_length = hxgep->vmac.maxframesize;
1353dec9fcdSqs148142
1363dec9fcdSqs148142 /*
1373dec9fcdSqs148142 * NOTE: CFG_VMAC_RX_ENABLE is done separately. Do not enable
1383dec9fcdSqs148142 * strip CRC. Bug ID 11451 -- enable strip CRC will cause
1393dec9fcdSqs148142 * rejection on minimum sized packets.
1403dec9fcdSqs148142 */
1411c29f7e3SQiyan Sun - Sun Microsystems - San Diego United States xconfig = CFG_VMAC_RX_PASS_FLOW_CTRL_FR;
1423dec9fcdSqs148142
1433dec9fcdSqs148142 if (hxgep->filter.all_phys_cnt != 0)
1443dec9fcdSqs148142 xconfig |= CFG_VMAC_RX_PROMISCUOUS_MODE;
1453dec9fcdSqs148142
1463dec9fcdSqs148142 if (hxgep->filter.all_multicast_cnt != 0)
1473dec9fcdSqs148142 xconfig |= CFG_VMAC_RX_PROMIXCUOUS_GROUP;
1483dec9fcdSqs148142
1493dec9fcdSqs148142 if (hxgep->statsp->port_stats.lb_mode != hxge_lb_normal)
1503dec9fcdSqs148142 xconfig |= CFG_VMAC_RX_LOOP_BACK;
1513dec9fcdSqs148142
152*f043ebedSMichael Speer if (hpi_vmac_rx_config(handle, INIT, xconfig,
153*f043ebedSMichael Speer max_frame_length) != HPI_SUCCESS)
1543dec9fcdSqs148142 return (HXGE_ERROR);
1553dec9fcdSqs148142
1563dec9fcdSqs148142 hxgep->vmac.rx_config = xconfig;
1573dec9fcdSqs148142
1583dec9fcdSqs148142 return (HXGE_OK);
1593dec9fcdSqs148142 }
1603dec9fcdSqs148142
1613dec9fcdSqs148142 /* Enable TxVMAC */
1623dec9fcdSqs148142
1633dec9fcdSqs148142 hxge_status_t
hxge_tx_vmac_enable(p_hxge_t hxgep)1643dec9fcdSqs148142 hxge_tx_vmac_enable(p_hxge_t hxgep)
1653dec9fcdSqs148142 {
1663dec9fcdSqs148142 hpi_status_t rv;
1673dec9fcdSqs148142 hxge_status_t status = HXGE_OK;
1683dec9fcdSqs148142 hpi_handle_t handle = hxgep->hpi_handle;
1693dec9fcdSqs148142
1703dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, MAC_CTL, "==> hxge_tx_vmac_enable"));
1713dec9fcdSqs148142
1723dec9fcdSqs148142 rv = hxge_tx_vmac_init(hxgep);
1733dec9fcdSqs148142 if (rv != HXGE_OK)
1743dec9fcdSqs148142 return (rv);
1753dec9fcdSqs148142
1763dec9fcdSqs148142 /* Based on speed */
1773dec9fcdSqs148142 hxgep->msg_min = ETHERMIN;
1783dec9fcdSqs148142
1793dec9fcdSqs148142 rv = hpi_vmac_tx_config(handle, ENABLE, CFG_VMAC_TX_EN, 0);
1803dec9fcdSqs148142
1813dec9fcdSqs148142 status = (rv == HPI_SUCCESS) ? HXGE_OK : HXGE_ERROR;
1823dec9fcdSqs148142
1833dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, MAC_CTL, "<== hxge_tx_vmac_enable"));
1843dec9fcdSqs148142
1853dec9fcdSqs148142 return (status);
1863dec9fcdSqs148142 }
1873dec9fcdSqs148142
1883dec9fcdSqs148142 /* Disable TxVMAC */
1893dec9fcdSqs148142
1903dec9fcdSqs148142 hxge_status_t
hxge_tx_vmac_disable(p_hxge_t hxgep)1913dec9fcdSqs148142 hxge_tx_vmac_disable(p_hxge_t hxgep)
1923dec9fcdSqs148142 {
1933dec9fcdSqs148142 hpi_status_t rv;
1943dec9fcdSqs148142 hxge_status_t status = HXGE_OK;
1953dec9fcdSqs148142 hpi_handle_t handle = hxgep->hpi_handle;
1963dec9fcdSqs148142
1973dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, MAC_CTL, "==> hxge_tx_vmac_disable"));
1983dec9fcdSqs148142
1993dec9fcdSqs148142 rv = hpi_vmac_tx_config(handle, DISABLE, CFG_VMAC_TX_EN, 0);
2003dec9fcdSqs148142
2013dec9fcdSqs148142 status = (rv == HPI_SUCCESS) ? HXGE_OK : HXGE_ERROR;
2023dec9fcdSqs148142
2033dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, MAC_CTL, "<== hxge_tx_vmac_disable"));
2043dec9fcdSqs148142
2053dec9fcdSqs148142 return (status);
2063dec9fcdSqs148142 }
2073dec9fcdSqs148142
2083dec9fcdSqs148142 /* Enable RxVMAC */
2093dec9fcdSqs148142
2103dec9fcdSqs148142 hxge_status_t
hxge_rx_vmac_enable(p_hxge_t hxgep)2113dec9fcdSqs148142 hxge_rx_vmac_enable(p_hxge_t hxgep)
2123dec9fcdSqs148142 {
2133dec9fcdSqs148142 hpi_status_t rv;
2143dec9fcdSqs148142 hxge_status_t status = HXGE_OK;
2153dec9fcdSqs148142 hpi_handle_t handle = hxgep->hpi_handle;
2163dec9fcdSqs148142
2173dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, MAC_CTL, "==> hxge_rx_vmac_enable"));
2183dec9fcdSqs148142
2196afd6caeSMichael Speer /*
2206afd6caeSMichael Speer * Because of hardware bug document with CR6770577, need
2216afd6caeSMichael Speer * reprogram max framesize when enabling/disabling RX
2226afd6caeSMichael Speer * vmac. Max framesize is programed here in
2236afd6caeSMichael Speer * hxge_rx_vmac_init().
2246afd6caeSMichael Speer */
225*f043ebedSMichael Speer rv = hpi_vmac_rx_set_framesize(HXGE_DEV_HPI_HANDLE(hxgep),
226*f043ebedSMichael Speer (uint16_t)hxgep->vmac.maxframesize);
227*f043ebedSMichael Speer if (rv != HPI_SUCCESS) {
228*f043ebedSMichael Speer HXGE_DEBUG_MSG((hxgep, MAC_CTL, "<== hxge_rx_vmac_enable"));
229*f043ebedSMichael Speer return (HXGE_ERROR);
230*f043ebedSMichael Speer }
2313dec9fcdSqs148142
232*f043ebedSMichael Speer /*
233*f043ebedSMichael Speer * Wait for a period of time.
234*f043ebedSMichael Speer */
235*f043ebedSMichael Speer HXGE_DELAY(10);
236*f043ebedSMichael Speer
237*f043ebedSMichael Speer /*
238*f043ebedSMichael Speer * Enable the vmac.
239*f043ebedSMichael Speer */
2403dec9fcdSqs148142 rv = hpi_vmac_rx_config(handle, ENABLE, CFG_VMAC_RX_EN, 0);
2413dec9fcdSqs148142
2423dec9fcdSqs148142 status = (rv == HPI_SUCCESS) ? HXGE_OK : HXGE_ERROR;
2433dec9fcdSqs148142
2443dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, MAC_CTL, "<== hxge_rx_vmac_enable"));
2453dec9fcdSqs148142 return (status);
2463dec9fcdSqs148142 }
2473dec9fcdSqs148142
2483dec9fcdSqs148142 /* Disable RxVMAC */
2493dec9fcdSqs148142
2503dec9fcdSqs148142 hxge_status_t
hxge_rx_vmac_disable(p_hxge_t hxgep)2513dec9fcdSqs148142 hxge_rx_vmac_disable(p_hxge_t hxgep)
2523dec9fcdSqs148142 {
2533dec9fcdSqs148142 hpi_status_t rv;
2543dec9fcdSqs148142 hxge_status_t status = HXGE_OK;
2553dec9fcdSqs148142 hpi_handle_t handle = hxgep->hpi_handle;
2563dec9fcdSqs148142
2573dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, MAC_CTL, "==> hxge_rx_vmac_disable"));
2583dec9fcdSqs148142
2596afd6caeSMichael Speer /*
2606afd6caeSMichael Speer * Because of hardware bug document with CR6770577, need
2616afd6caeSMichael Speer * reprogram max framesize when enabling/disabling RX
2626afd6caeSMichael Speer * vmac. Max framesize is programed here in
2636afd6caeSMichael Speer * hxge_rx_vmac_init().
2646afd6caeSMichael Speer */
2656afd6caeSMichael Speer (void) hpi_vmac_rx_set_framesize(HXGE_DEV_HPI_HANDLE(hxgep),
2666afd6caeSMichael Speer (uint16_t)0);
2676afd6caeSMichael Speer
268*f043ebedSMichael Speer /*
269*f043ebedSMichael Speer * Wait for 10us before doing disable.
270*f043ebedSMichael Speer */
271*f043ebedSMichael Speer HXGE_DELAY(10);
272*f043ebedSMichael Speer
2733dec9fcdSqs148142 rv = hpi_vmac_rx_config(handle, DISABLE, CFG_VMAC_RX_EN, 0);
2743dec9fcdSqs148142
2753dec9fcdSqs148142 status = (rv == HPI_SUCCESS) ? HXGE_OK : HXGE_ERROR;
2763dec9fcdSqs148142
2773dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, MAC_CTL, "<== hxge_rx_vmac_disable"));
2783dec9fcdSqs148142 return (status);
2793dec9fcdSqs148142 }
2803dec9fcdSqs148142
2813dec9fcdSqs148142 /* Reset TxVMAC */
2823dec9fcdSqs148142
2833dec9fcdSqs148142 hxge_status_t
hxge_tx_vmac_reset(p_hxge_t hxgep)2843dec9fcdSqs148142 hxge_tx_vmac_reset(p_hxge_t hxgep)
2853dec9fcdSqs148142 {
2863dec9fcdSqs148142 hpi_handle_t handle = hxgep->hpi_handle;
2873dec9fcdSqs148142
2883dec9fcdSqs148142 (void) hpi_tx_vmac_reset(handle);
2893dec9fcdSqs148142
2903dec9fcdSqs148142 return (HXGE_OK);
2913dec9fcdSqs148142 }
2923dec9fcdSqs148142
2933dec9fcdSqs148142 /* Reset RxVMAC */
2943dec9fcdSqs148142
2953dec9fcdSqs148142 hxge_status_t
hxge_rx_vmac_reset(p_hxge_t hxgep)2963dec9fcdSqs148142 hxge_rx_vmac_reset(p_hxge_t hxgep)
2973dec9fcdSqs148142 {
2983dec9fcdSqs148142 hpi_handle_t handle = hxgep->hpi_handle;
2993dec9fcdSqs148142
300*f043ebedSMichael Speer (void) hpi_vmac_rx_set_framesize(HXGE_DEV_HPI_HANDLE(hxgep),
301*f043ebedSMichael Speer (uint16_t)0);
302*f043ebedSMichael Speer
303*f043ebedSMichael Speer /*
304*f043ebedSMichael Speer * Wait for 10us before doing reset.
305*f043ebedSMichael Speer */
306*f043ebedSMichael Speer HXGE_DELAY(10);
307*f043ebedSMichael Speer
3083dec9fcdSqs148142 (void) hpi_rx_vmac_reset(handle);
3093dec9fcdSqs148142
3103dec9fcdSqs148142 return (HXGE_OK);
3113dec9fcdSqs148142 }
3123dec9fcdSqs148142
3133dec9fcdSqs148142 /*ARGSUSED*/
3143dec9fcdSqs148142 uint_t
hxge_vmac_intr(caddr_t arg1,caddr_t arg2)3153dec9fcdSqs148142 hxge_vmac_intr(caddr_t arg1, caddr_t arg2)
3163dec9fcdSqs148142 {
3173dec9fcdSqs148142 p_hxge_t hxgep = (p_hxge_t)arg2;
3183dec9fcdSqs148142 hpi_handle_t handle;
3193dec9fcdSqs148142
3203dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, INT_CTL, "==> hxge_vmac_intr"));
3213dec9fcdSqs148142
3223dec9fcdSqs148142 handle = HXGE_DEV_HPI_HANDLE(hxgep);
3233dec9fcdSqs148142
3243dec9fcdSqs148142 hxge_save_cntrs(hxgep);
3253dec9fcdSqs148142
3263dec9fcdSqs148142 /* Clear the interrupt status registers */
3273dec9fcdSqs148142 (void) hpi_vmac_clear_rx_int_stat(handle);
3283dec9fcdSqs148142 (void) hpi_vmac_clear_tx_int_stat(handle);
3293dec9fcdSqs148142
3303dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, INT_CTL, "<== hxge_vmac_intr"));
3313dec9fcdSqs148142 return (DDI_INTR_CLAIMED);
3323dec9fcdSqs148142 }
3333dec9fcdSqs148142
3343dec9fcdSqs148142 /*
3353dec9fcdSqs148142 * Set promiscous mode
3363dec9fcdSqs148142 */
3373dec9fcdSqs148142 hxge_status_t
hxge_set_promisc(p_hxge_t hxgep,boolean_t on)3383dec9fcdSqs148142 hxge_set_promisc(p_hxge_t hxgep, boolean_t on)
3393dec9fcdSqs148142 {
3403dec9fcdSqs148142 hxge_status_t status = HXGE_OK;
3413dec9fcdSqs148142
3423dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, MAC_CTL, "==> hxge_set_promisc: on %d", on));
3433dec9fcdSqs148142
3443dec9fcdSqs148142 hxgep->filter.all_phys_cnt = ((on) ? 1 : 0);
3453dec9fcdSqs148142
3463dec9fcdSqs148142 RW_ENTER_WRITER(&hxgep->filter_lock);
3473dec9fcdSqs148142 if ((status = hxge_rx_vmac_disable(hxgep)) != HXGE_OK)
3483dec9fcdSqs148142 goto fail;
3493dec9fcdSqs148142 if ((status = hxge_rx_vmac_enable(hxgep)) != HXGE_OK)
3503dec9fcdSqs148142 goto fail;
3513dec9fcdSqs148142 RW_EXIT(&hxgep->filter_lock);
3523dec9fcdSqs148142
3533dec9fcdSqs148142 if (on)
3543dec9fcdSqs148142 hxgep->statsp->mac_stats.promisc = B_TRUE;
3553dec9fcdSqs148142 else
3563dec9fcdSqs148142 hxgep->statsp->mac_stats.promisc = B_FALSE;
3573dec9fcdSqs148142
3583dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, MAC_CTL, "<== hxge_set_promisc"));
3593dec9fcdSqs148142 return (HXGE_OK);
3603dec9fcdSqs148142
3613dec9fcdSqs148142 fail:
3623dec9fcdSqs148142 RW_EXIT(&hxgep->filter_lock);
3633dec9fcdSqs148142
3643dec9fcdSqs148142 HXGE_ERROR_MSG((hxgep, HXGE_ERR_CTL, "hxge_set_promisc: "
3653dec9fcdSqs148142 "Unable to set promisc (%d)", on));
3663dec9fcdSqs148142 return (status);
3673dec9fcdSqs148142 }
3683dec9fcdSqs148142
3693dec9fcdSqs148142 void
hxge_save_cntrs(p_hxge_t hxgep)3703dec9fcdSqs148142 hxge_save_cntrs(p_hxge_t hxgep)
3713dec9fcdSqs148142 {
3723dec9fcdSqs148142 p_hxge_stats_t statsp;
3733dec9fcdSqs148142 hpi_handle_t handle;
3743dec9fcdSqs148142
3753dec9fcdSqs148142 vmac_tx_frame_cnt_t tx_frame_cnt;
3763dec9fcdSqs148142 vmac_tx_byte_cnt_t tx_byte_cnt;
3773dec9fcdSqs148142 vmac_rx_frame_cnt_t rx_frame_cnt;
3783dec9fcdSqs148142 vmac_rx_byte_cnt_t rx_byte_cnt;
3793dec9fcdSqs148142 vmac_rx_drop_fr_cnt_t rx_drop_fr_cnt;
3803dec9fcdSqs148142 vmac_rx_drop_byte_cnt_t rx_drop_byte_cnt;
3813dec9fcdSqs148142 vmac_rx_crc_cnt_t rx_crc_cnt;
3823dec9fcdSqs148142 vmac_rx_pause_cnt_t rx_pause_cnt;
3833dec9fcdSqs148142 vmac_rx_bcast_fr_cnt_t rx_bcast_fr_cnt;
3843dec9fcdSqs148142 vmac_rx_mcast_fr_cnt_t rx_mcast_fr_cnt;
3853dec9fcdSqs148142
3863dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, INT_CTL, "==> hxge_save_cntrs"));
3873dec9fcdSqs148142
3883dec9fcdSqs148142 statsp = (p_hxge_stats_t)hxgep->statsp;
3893dec9fcdSqs148142 handle = hxgep->hpi_handle;
3903dec9fcdSqs148142
3913dec9fcdSqs148142 HXGE_REG_RD64(handle, VMAC_TX_FRAME_CNT, &tx_frame_cnt.value);
3923dec9fcdSqs148142 HXGE_REG_RD64(handle, VMAC_TX_BYTE_CNT, &tx_byte_cnt.value);
3933dec9fcdSqs148142 HXGE_REG_RD64(handle, VMAC_RX_FRAME_CNT, &rx_frame_cnt.value);
3943dec9fcdSqs148142 HXGE_REG_RD64(handle, VMAC_RX_BYTE_CNT, &rx_byte_cnt.value);
3953dec9fcdSqs148142 HXGE_REG_RD64(handle, VMAC_RX_DROP_FR_CNT, &rx_drop_fr_cnt.value);
3963dec9fcdSqs148142 HXGE_REG_RD64(handle, VMAC_RX_DROP_BYTE_CNT, &rx_drop_byte_cnt.value);
3973dec9fcdSqs148142 HXGE_REG_RD64(handle, VMAC_RX_CRC_CNT, &rx_crc_cnt.value);
3983dec9fcdSqs148142 HXGE_REG_RD64(handle, VMAC_RX_PAUSE_CNT, &rx_pause_cnt.value);
3993dec9fcdSqs148142 HXGE_REG_RD64(handle, VMAC_RX_BCAST_FR_CNT, &rx_bcast_fr_cnt.value);
4003dec9fcdSqs148142 HXGE_REG_RD64(handle, VMAC_RX_MCAST_FR_CNT, &rx_mcast_fr_cnt.value);
4013dec9fcdSqs148142
4023dec9fcdSqs148142 statsp->vmac_stats.tx_frame_cnt += tx_frame_cnt.bits.tx_frame_cnt;
4033dec9fcdSqs148142 statsp->vmac_stats.tx_byte_cnt += tx_byte_cnt.bits.tx_byte_cnt;
4043dec9fcdSqs148142 statsp->vmac_stats.rx_frame_cnt += rx_frame_cnt.bits.rx_frame_cnt;
4053dec9fcdSqs148142 statsp->vmac_stats.rx_byte_cnt += rx_byte_cnt.bits.rx_byte_cnt;
4063dec9fcdSqs148142 statsp->vmac_stats.rx_drop_frame_cnt +=
4073dec9fcdSqs148142 rx_drop_fr_cnt.bits.rx_drop_frame_cnt;
4083dec9fcdSqs148142 statsp->vmac_stats.rx_drop_byte_cnt +=
4093dec9fcdSqs148142 rx_drop_byte_cnt.bits.rx_drop_byte_cnt;
4103dec9fcdSqs148142 statsp->vmac_stats.rx_crc_cnt += rx_crc_cnt.bits.rx_crc_cnt;
4113dec9fcdSqs148142 statsp->vmac_stats.rx_pause_cnt += rx_pause_cnt.bits.rx_pause_cnt;
4123dec9fcdSqs148142 statsp->vmac_stats.rx_bcast_fr_cnt +=
4133dec9fcdSqs148142 rx_bcast_fr_cnt.bits.rx_bcast_fr_cnt;
4143dec9fcdSqs148142 statsp->vmac_stats.rx_mcast_fr_cnt +=
4153dec9fcdSqs148142 rx_mcast_fr_cnt.bits.rx_mcast_fr_cnt;
4163dec9fcdSqs148142
4173dec9fcdSqs148142 hxge_save_cntrs_exit:
4183dec9fcdSqs148142 HXGE_DEBUG_MSG((hxgep, INT_CTL, "<== hxge_save_cntrs"));
4193dec9fcdSqs148142 }
420a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States
421a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States int
hxge_vmac_set_framesize(p_hxge_t hxgep)422a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States hxge_vmac_set_framesize(p_hxge_t hxgep)
423a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States {
424a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States int status = 0;
425a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States
426a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_vmac_set_framesize"));
427a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States
428a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States RW_ENTER_WRITER(&hxgep->filter_lock);
429a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States (void) hxge_rx_vmac_disable(hxgep);
430a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States (void) hxge_tx_vmac_disable(hxgep);
431a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States
432a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States /*
433a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States * Apply the new jumbo parameter here which is contained in hxgep
434a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States * data structure (hxgep->vmac.maxframesize);
435a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States * The order of the following two calls is important.
436a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States */
437a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States (void) hxge_tx_vmac_enable(hxgep);
438a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States (void) hxge_rx_vmac_enable(hxgep);
439a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States RW_EXIT(&hxgep->filter_lock);
440a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States
441a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_vmac_set_framesize"));
442a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States return (status);
443a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States }
444