| /titanic_44/usr/src/uts/i86pc/os/ |
| H A D | pci_cfgspace.c | 81 uint32_t (*pci_getl_func)(int bus, int dev, int func, int reg); variable
152 pci_getl_func = pci_mech1_getl; in pci_check()
176 pci_getl_func = pci_orion_getl; in pci_check()
183 pci_getl_func = pci_mech1_amd_getl; in pci_check()
191 pci_getl_func = pci_mech1_getl; in pci_check()
210 pci_getl_func = pci_neptune_getl; in pci_check()
217 pci_getl_func = pci_mech2_getl; in pci_check()
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| H A D | pci_cfgacc_x86.c | 137 VAL32(req) = (*pci_getl_func)(bus, dev, func, in pci_cfgacc_io()
147 VAL64(req) = (*pci_getl_func)(bus, dev, func, in pci_cfgacc_io()
149 VAL64(req) |= (uint64_t)(*pci_getl_func)(bus, dev, func, in pci_cfgacc_io()
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| H A D | cpuid_subr.c | 428 val = pci_getl_func(0, 24, 2, 0x94); in synth_amd_info()
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| H A D | lgrpplat.c | 3503 node_info[0] = pci_getl_func(bus, dev, OPT_PCS_FUNC_HT, in opt_get_numa_config()
3537 node_info[node] = pci_getl_func(bus, dev, in opt_get_numa_config()
3553 base_lo = dram_map[node].base_lo = pci_getl_func(bus, dev, in opt_get_numa_config()
3571 limit_lo = dram_map[node].limit_lo = pci_getl_func(bus, in opt_get_numa_config()
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| H A D | mp_startup.c | 741 nnodes = ((pci_getl_func(0, 24, 0, 0x60) & 0x70) >> 4) + 1; in opteron_get_nnodes()
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| H A D | cpuid.c | 878 nb_caps_reg = pci_getl_func(0, 24, 3, 0xe8); in cpuid_amd_getids()
904 pci_getl_func(0, 24 + node2_1, 3, 0xe8); in cpuid_amd_getids()
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| /titanic_44/usr/src/uts/intel/io/pciex/ |
| H A D | pcie_nvidia.c | 94 slot_cap = (*pci_getl_func)(bus, dev, func, in check_if_device_is_pciex()
231 base = (*pci_getl_func)(bus, dev, func, in add_nvidia_isa_bridge_props()
240 base = (*pci_getl_func)(bus, dev, func, in add_nvidia_isa_bridge_props()
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| /titanic_44/usr/src/uts/intel/sys/ |
| H A D | pci_cfgspace.h | 47 extern uint32_t (*pci_getl_func)(int bus, int dev, int func, int reg);
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| /titanic_44/usr/src/uts/intel/io/mc-amd/ |
| H A D | mcamd_pcicfg.c | 98 return ((*pci_getl_func)(0, MC_AMD_DEV_OFFSET + mc->mc_props.mcp_num, in mc_pcicfg_get32_nohdl()
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| H A D | mcamd_drv.c | 1779 if (pci_getl_func == NULL) in _init()
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| /titanic_44/usr/src/uts/i86pc/cpu/genuineintel/ |
| H A D | gintel_main.c | 61 #define MC_COR_ECC_CNT(chipid, reg) (*pci_getl_func)(SOCKET_BUS(chipid), \
118 nb_chipset = (*pci_getl_func)(0, 0, 0, 0x0); in gintel_init()
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| /titanic_44/usr/src/uts/i86pc/io/gfx_private/ |
| H A D | gfxp_pci.c | 241 val = (*pci_getl_func)(bus, dev, func, offset); in gfxp_pci_read_dword()
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| /titanic_44/usr/src/uts/intel/io/intel_nhm/ |
| H A D | nhm_init.c | 326 if (pci_getl_func == NULL) in nhm_init()
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| /titanic_44/usr/src/uts/intel/io/intel_nb5000/ |
| H A D | nb5000_init.c | 1523 if (pci_getl_func == NULL) in nb_init()
1527 nb_chipset = (*pci_getl_func)(0, 0, 0, PCI_CONF_VENID); in nb_init()
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| /titanic_44/usr/src/uts/intel/io/pci/ |
| H A D | pci_boot.c | 52 #define pci_getl (*pci_getl_func)
3294 lobase = (*pci_getl_func)(bus, dev, fn, PCI_CONF_BASE0); in create_ioapic_node()
3301 hibase = (*pci_getl_func)(bus, dev, fn, PCI_CONF_BASE0 + 4); in create_ioapic_node()
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| /titanic_44/usr/src/uts/i86pc/io/pci/ |
| H A D | pci_common.c | 1583 rval = (*pci_getl_func)(cfp->c_busnum, cfp->c_devnum, in pci_config_rd32()
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| /titanic_44/usr/src/uts/intel/io/acpica/ |
| H A D | osl.c | 971 *Value = (UINT64)(*pci_getl_func) in AcpiOsReadPciConfiguration()
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| /titanic_44/usr/src/uts/i86pc/io/ |
| H A D | immu_dvma.c | 728 revclass = pci_getl_func(bus, dev, func, PCI_CONF_REVID); in create_immu_devi()
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| /titanic_44/usr/src/uts/common/io/ |
| H A D | pcic.c | 2003 classcode = (*pci_getl_func)(bus, dev, 1, in pcic_setup_adapter()
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